1 /******************************************************************************
2 *
3 * Copyright(c) 2007 - 2017 Realtek Corporation.
4 *
5 * This program is free software; you can redistribute it and/or modify it
6 * under the terms of version 2 of the GNU General Public License as
7 * published by the Free Software Foundation.
8 *
9 * This program is distributed in the hope that it will be useful, but WITHOUT
10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
12 * more details.
13 *
14 * The full GNU General Public License is included in this distribution in the
15 * file called LICENSE.
16 *
17 * Contact Information:
18 * wlanfae <wlanfae@realtek.com>
19 * Realtek Corporation, No. 2, Innovation Road II, Hsinchu Science Park,
20 * Hsinchu 300, Taiwan.
21 *
22 * Larry Finger <Larry.Finger@lwfinger.net>
23 *
24 *****************************************************************************/
25
26 /*@************************************************************
27 * include files
28 ************************************************************/
29
30 #include "mp_precomp.h"
31 #include "phydm_precomp.h"
32
phydm_init_debug_setting(struct dm_struct * dm)33 void phydm_init_debug_setting(struct dm_struct *dm)
34 {
35 dm->fw_debug_components = 0;
36 dm->debug_components =
37
38 #if DBG
39 /*@BB Functions*/
40 /*@DBG_DIG |*/
41 /*@DBG_RA_MASK |*/
42 /*@DBG_DYN_TXPWR |*/
43 /*@DBG_FA_CNT |*/
44 /*@DBG_RSSI_MNTR |*/
45 /*@DBG_CCKPD |*/
46 /*@DBG_ANT_DIV |*/
47 /*@DBG_SMT_ANT |*/
48 /*@DBG_PWR_TRAIN |*/
49 /*@DBG_RA |*/
50 /*@DBG_PATH_DIV |*/
51 /*@DBG_DFS |*/
52 /*@DBG_DYN_ARFR |*/
53 /*@DBG_ADPTVTY |*/
54 /*@DBG_CFO_TRK |*/
55 /*@DBG_ENV_MNTR |*/
56 /*@DBG_PRI_CCA |*/
57 /*@DBG_ADPTV_SOML |*/
58 /*@DBG_LNA_SAT_CHK |*/
59 /*@DBG_PHY_STATUS |*/
60 /*@DBG_TMP |*/
61 /*@DBG_FW_TRACE |*/
62 /*@DBG_TXBF |*/
63 /*@DBG_COMMON_FLOW |*/
64 /*@ODM_PHY_CONFIG |*/
65 /*@ODM_COMP_INIT |*/
66 /*@DBG_CMN |*/
67 /*@ODM_COMP_API |*/
68 #endif
69 0;
70
71 dm->fw_buff_is_enpty = true;
72 dm->pre_c2h_seq = 0;
73 dm->c2h_cmd_start = 0;
74 dm->cmn_dbg_msg_cnt = PHYDM_WATCH_DOG_PERIOD;
75 dm->cmn_dbg_msg_period = PHYDM_WATCH_DOG_PERIOD;
76 phydm_reset_rx_rate_distribution(dm);
77 }
78
phydm_bb_dbg_port_header_sel(void * dm_void,u32 header_idx)79 void phydm_bb_dbg_port_header_sel(void *dm_void, u32 header_idx)
80 {
81 struct dm_struct *dm = (struct dm_struct *)dm_void;
82
83 if (dm->support_ic_type & ODM_IC_11AC_SERIES) {
84 odm_set_bb_reg(dm, R_0x8f8, 0x3c00000, header_idx);
85
86 /*@
87 * header_idx:
88 * (0:) '{ofdm_dbg[31:0]}'
89 * (1:) '{cca,crc32_fail,dbg_ofdm[29:0]}'
90 * (2:) '{vbon,crc32_fail,dbg_ofdm[29:0]}'
91 * (3:) '{cca,crc32_ok,dbg_ofdm[29:0]}'
92 * (4:) '{vbon,crc32_ok,dbg_ofdm[29:0]}'
93 * (5:) '{dbg_iqk_anta}'
94 * (6:) '{cca,ofdm_crc_ok,dbg_dp_anta[29:0]}'
95 * (7:) '{dbg_iqk_antb}'
96 * (8:) '{DBGOUT_RFC_b[31:0]}'
97 * (9:) '{DBGOUT_RFC_a[31:0]}'
98 * (a:) '{dbg_ofdm}'
99 * (b:) '{dbg_cck}'
100 */
101 }
102 }
103
phydm_bb_dbg_port_clock_en(void * dm_void,u8 enable)104 void phydm_bb_dbg_port_clock_en(void *dm_void, u8 enable)
105 {
106 struct dm_struct *dm = (struct dm_struct *)dm_void;
107 u32 reg_value = 0;
108
109 if (dm->support_ic_type & ODM_IC_11AC_2_SERIES) {
110 /*@enable/disable debug port clock, for power saving*/
111 reg_value = enable ? 0x7 : 0;
112 odm_set_bb_reg(dm, R_0x198c, 0x7, reg_value);
113 }
114 }
115
phydm_get_bb_dbg_port_idx(void * dm_void)116 u32 phydm_get_bb_dbg_port_idx(void *dm_void)
117 {
118 struct dm_struct *dm = (struct dm_struct *)dm_void;
119 u32 val = 0;
120
121 if (dm->support_ic_type & ODM_IC_11AC_SERIES) {
122 phydm_bb_dbg_port_clock_en(dm, true);
123 val = odm_get_bb_reg(dm, R_0x8fc, MASKDWORD);
124 } else if (dm->support_ic_type & ODM_IC_JGR3_SERIES) {
125 val = odm_get_bb_reg(dm, R_0x1c3c, 0xfff00);
126 } else { /*@if (dm->support_ic_type & ODM_IC_11N_SERIES)*/
127 val = odm_get_bb_reg(dm, R_0x908, MASKDWORD);
128 }
129 return val;
130 }
131
phydm_set_bb_dbg_port(void * dm_void,u8 curr_dbg_priority,u32 debug_port)132 u8 phydm_set_bb_dbg_port(void *dm_void, u8 curr_dbg_priority, u32 debug_port)
133 {
134 struct dm_struct *dm = (struct dm_struct *)dm_void;
135 u8 dbg_port_result = false;
136
137 if (curr_dbg_priority > dm->pre_dbg_priority) {
138 if (dm->support_ic_type & ODM_IC_11AC_SERIES) {
139 phydm_bb_dbg_port_clock_en(dm, true);
140
141 odm_set_bb_reg(dm, R_0x8fc, MASKDWORD, debug_port);
142 } else if (dm->support_ic_type & ODM_IC_JGR3_SERIES) {
143 odm_set_bb_reg(dm, R_0x1c3c, 0xfff00, debug_port);
144 } else { /*@if (dm->support_ic_type & ODM_IC_11N_SERIES)*/
145 odm_set_bb_reg(dm, R_0x908, MASKDWORD, debug_port);
146 }
147 PHYDM_DBG(dm, ODM_COMP_API,
148 "DbgPort ((0x%x)) set success, Cur_priority=((%d)), Pre_priority=((%d))\n",
149 debug_port, curr_dbg_priority, dm->pre_dbg_priority);
150 dm->pre_dbg_priority = curr_dbg_priority;
151 dbg_port_result = true;
152 }
153
154 return dbg_port_result;
155 }
156
phydm_release_bb_dbg_port(void * dm_void)157 void phydm_release_bb_dbg_port(void *dm_void)
158 {
159 struct dm_struct *dm = (struct dm_struct *)dm_void;
160
161 phydm_bb_dbg_port_clock_en(dm, false);
162 phydm_bb_dbg_port_header_sel(dm, 0);
163
164 dm->pre_dbg_priority = DBGPORT_RELEASE;
165 PHYDM_DBG(dm, ODM_COMP_API, "Release BB dbg_port\n");
166 }
167
phydm_get_bb_dbg_port_val(void * dm_void)168 u32 phydm_get_bb_dbg_port_val(void *dm_void)
169 {
170 struct dm_struct *dm = (struct dm_struct *)dm_void;
171 u32 dbg_port_value = 0;
172
173 if (dm->support_ic_type & ODM_IC_11AC_SERIES)
174 dbg_port_value = odm_get_bb_reg(dm, R_0xfa0, MASKDWORD);
175 else if (dm->support_ic_type & ODM_IC_JGR3_SERIES)
176 dbg_port_value = odm_get_bb_reg(dm, R_0x2dbc, MASKDWORD);
177 else /*@if (dm->support_ic_type & ODM_IC_11N_SERIES)*/
178 dbg_port_value = odm_get_bb_reg(dm, R_0xdf4, MASKDWORD);
179
180 PHYDM_DBG(dm, ODM_COMP_API, "dbg_port_value = 0x%x\n", dbg_port_value);
181 return dbg_port_value;
182 }
183
184 #ifdef CONFIG_PHYDM_DEBUG_FUNCTION
185 #if (ODM_IC_11N_SERIES_SUPPORT)
phydm_bb_hw_dbg_info_n(void * dm_void,u32 * _used,char * output,u32 * _out_len)186 void phydm_bb_hw_dbg_info_n(void *dm_void, u32 *_used, char *output,
187 u32 *_out_len)
188 {
189 struct dm_struct *dm = (struct dm_struct *)dm_void;
190 u32 used = *_used;
191 u32 out_len = *_out_len;
192 u32 value32 = 0, value32_1 = 0;
193 u8 rf_gain_a = 0, rf_gain_b = 0, rf_gain_c = 0, rf_gain_d = 0;
194 u8 rx_snr_a = 0, rx_snr_b = 0, rx_snr_c = 0, rx_snr_d = 0;
195 s8 rxevm_0 = 0, rxevm_1 = 0;
196 #if 1
197 struct phydm_cfo_rpt cfo;
198 u8 i = 0;
199 #else
200 s32 short_cfo_a = 0, short_cfo_b = 0, long_cfo_a = 0, long_cfo_b = 0;
201 s32 scfo_a = 0, scfo_b = 0, avg_cfo_a = 0, avg_cfo_b = 0;
202 s32 cfo_end_a = 0, cfo_end_b = 0, acq_cfo_a = 0, acq_cfo_b = 0;
203 #endif
204
205 PDM_SNPF(out_len, used, output + used, out_len - used, "\r\n %-35s\n",
206 "BB Report Info");
207
208 /*@AGC result*/
209 value32 = odm_get_bb_reg(dm, R_0xdd0, MASKDWORD);
210 rf_gain_a = (u8)(value32 & 0x3f);
211 rf_gain_a = rf_gain_a << 1;
212
213 rf_gain_b = (u8)((value32 >> 8) & 0x3f);
214 rf_gain_b = rf_gain_b << 1;
215
216 rf_gain_c = (u8)((value32 >> 16) & 0x3f);
217 rf_gain_c = rf_gain_c << 1;
218
219 rf_gain_d = (u8)((value32 >> 24) & 0x3f);
220 rf_gain_d = rf_gain_d << 1;
221
222 PDM_SNPF(out_len, used, output + used, out_len - used,
223 "\r\n %-35s = %d / %d / %d / %d", "OFDM RX RF Gain(A/B/C/D)",
224 rf_gain_a, rf_gain_b, rf_gain_c, rf_gain_d);
225
226 /*SNR report*/
227 value32 = odm_get_bb_reg(dm, R_0xdd4, MASKDWORD);
228 rx_snr_a = (u8)(value32 & 0xff);
229 rx_snr_a = rx_snr_a >> 1;
230
231 rx_snr_b = (u8)((value32 >> 8) & 0xff);
232 rx_snr_b = rx_snr_b >> 1;
233
234 rx_snr_c = (u8)((value32 >> 16) & 0xff);
235 rx_snr_c = rx_snr_c >> 1;
236
237 rx_snr_d = (u8)((value32 >> 24) & 0xff);
238 rx_snr_d = rx_snr_d >> 1;
239
240 PDM_SNPF(out_len, used, output + used, out_len - used,
241 "\r\n %-35s = %d / %d / %d / %d", "RXSNR(A/B/C/D, dB)",
242 rx_snr_a, rx_snr_b, rx_snr_c, rx_snr_d);
243
244 /* PostFFT related info*/
245 value32 = odm_get_bb_reg(dm, R_0xdd8, MASKDWORD);
246
247 rxevm_0 = (s8)((value32 & MASKBYTE2) >> 16);
248 rxevm_0 /= 2;
249 if (rxevm_0 < -63)
250 rxevm_0 = 0;
251
252 rxevm_1 = (s8)((value32 & MASKBYTE3) >> 24);
253 rxevm_1 /= 2;
254 if (rxevm_1 < -63)
255 rxevm_1 = 0;
256
257 PDM_SNPF(out_len, used, output + used, out_len - used,
258 "\r\n %-35s = %d / %d", "RXEVM (1ss/2ss)", rxevm_0, rxevm_1);
259
260 #if 1
261 phydm_get_cfo_info(dm, &cfo);
262 for (i = 0; i < dm->num_rf_path; i++) {
263 PDM_SNPF(out_len, used, output + used, out_len - used,
264 "\r\n %s[%d] %-28s = {%d, %d, %d, %d, %d}",
265 "CFO", i, "{S, L, Sec, Acq, End}",
266 cfo.cfo_rpt_s[i], cfo.cfo_rpt_l[i], cfo.cfo_rpt_sec[i],
267 cfo.cfo_rpt_acq[i], cfo.cfo_rpt_end[i]);
268 }
269 #else
270 /*@CFO Report Info*/
271 odm_set_bb_reg(dm, R_0xd00, BIT(26), 1);
272
273 /*Short CFO*/
274 value32 = odm_get_bb_reg(dm, R_0xdac, MASKDWORD);
275 value32_1 = odm_get_bb_reg(dm, R_0xdb0, MASKDWORD);
276
277 short_cfo_b = (s32)(value32 & 0xfff); /*S(12,11)*/
278 short_cfo_a = (s32)((value32 & 0x0fff0000) >> 16);
279
280 long_cfo_b = (s32)(value32_1 & 0x1fff); /*S(13,12)*/
281 long_cfo_a = (s32)((value32_1 & 0x1fff0000) >> 16);
282
283 /*SFO 2's to dec*/
284 if (short_cfo_a > 2047)
285 short_cfo_a = short_cfo_a - 4096;
286 if (short_cfo_b > 2047)
287 short_cfo_b = short_cfo_b - 4096;
288
289 short_cfo_a = (short_cfo_a * 312500) / 2048;
290 short_cfo_b = (short_cfo_b * 312500) / 2048;
291
292 /*@LFO 2's to dec*/
293
294 if (long_cfo_a > 4095)
295 long_cfo_a = long_cfo_a - 8192;
296
297 if (long_cfo_b > 4095)
298 long_cfo_b = long_cfo_b - 8192;
299
300 long_cfo_a = long_cfo_a * 312500 / 4096;
301 long_cfo_b = long_cfo_b * 312500 / 4096;
302
303 PDM_SNPF(out_len, used, output + used, out_len - used, "\r\n %-35s",
304 "CFO Report Info");
305 PDM_SNPF(out_len, used, output + used, out_len - used,
306 "\r\n %-35s = %d / %d", "Short CFO(Hz) <A/B>", short_cfo_a,
307 short_cfo_b);
308 PDM_SNPF(out_len, used, output + used, out_len - used,
309 "\r\n %-35s = %d / %d", "Long CFO(Hz) <A/B>", long_cfo_a,
310 long_cfo_b);
311
312 /*SCFO*/
313 value32 = odm_get_bb_reg(dm, R_0xdb8, MASKDWORD);
314 value32_1 = odm_get_bb_reg(dm, R_0xdb4, MASKDWORD);
315
316 scfo_b = (s32)(value32 & 0x7ff); /*S(11,10)*/
317 scfo_a = (s32)((value32 & 0x07ff0000) >> 16);
318
319 if (scfo_a > 1023)
320 scfo_a = scfo_a - 2048;
321
322 if (scfo_b > 1023)
323 scfo_b = scfo_b - 2048;
324
325 scfo_a = scfo_a * 312500 / 1024;
326 scfo_b = scfo_b * 312500 / 1024;
327
328 avg_cfo_b = (s32)(value32_1 & 0x1fff); /*S(13,12)*/
329 avg_cfo_a = (s32)((value32_1 & 0x1fff0000) >> 16);
330
331 if (avg_cfo_a > 4095)
332 avg_cfo_a = avg_cfo_a - 8192;
333
334 if (avg_cfo_b > 4095)
335 avg_cfo_b = avg_cfo_b - 8192;
336
337 avg_cfo_a = avg_cfo_a * 312500 / 4096;
338 avg_cfo_b = avg_cfo_b * 312500 / 4096;
339
340 PDM_SNPF(out_len, used, output + used, out_len - used,
341 "\r\n %-35s = %d / %d", "value SCFO(Hz) <A/B>", scfo_a,
342 scfo_b);
343 PDM_SNPF(out_len, used, output + used, out_len - used,
344 "\r\n %-35s = %d / %d", "Avg CFO(Hz) <A/B>", avg_cfo_a,
345 avg_cfo_b);
346
347 value32 = odm_get_bb_reg(dm, R_0xdbc, MASKDWORD);
348 value32_1 = odm_get_bb_reg(dm, R_0xde0, MASKDWORD);
349
350 cfo_end_b = (s32)(value32 & 0x1fff); /*S(13,12)*/
351 cfo_end_a = (s32)((value32 & 0x1fff0000) >> 16);
352
353 if (cfo_end_a > 4095)
354 cfo_end_a = cfo_end_a - 8192;
355
356 if (cfo_end_b > 4095)
357 cfo_end_b = cfo_end_b - 8192;
358
359 cfo_end_a = cfo_end_a * 312500 / 4096;
360 cfo_end_b = cfo_end_b * 312500 / 4096;
361
362 acq_cfo_b = (s32)(value32_1 & 0x1fff); /*S(13,12)*/
363 acq_cfo_a = (s32)((value32_1 & 0x1fff0000) >> 16);
364
365 if (acq_cfo_a > 4095)
366 acq_cfo_a = acq_cfo_a - 8192;
367
368 if (acq_cfo_b > 4095)
369 acq_cfo_b = acq_cfo_b - 8192;
370
371 acq_cfo_a = acq_cfo_a * 312500 / 4096;
372 acq_cfo_b = acq_cfo_b * 312500 / 4096;
373
374 PDM_SNPF(out_len, used, output + used, out_len - used,
375 "\r\n %-35s = %d / %d", "End CFO(Hz) <A/B>", cfo_end_a,
376 cfo_end_b);
377 PDM_SNPF(out_len, used, output + used, out_len - used,
378 "\r\n %-35s = %d / %d", "ACQ CFO(Hz) <A/B>", acq_cfo_a,
379 acq_cfo_b);
380 #endif
381 }
382 #endif
383
384 #if (ODM_IC_11AC_SERIES_SUPPORT)
385 #if (RTL8822B_SUPPORT)
phydm_bb_hw_dbg_info_8822b(void * dm_void,u32 * _used,char * output,u32 * _out_len)386 void phydm_bb_hw_dbg_info_8822b(void *dm_void, u32 *_used, char *output,
387 u32 *_out_len)
388 {
389 struct dm_struct *dm = (struct dm_struct *)dm_void;
390 u32 used = *_used;
391 u32 out_len = *_out_len;
392 u32 condi_num = 0;
393 u8 i = 0;
394
395 if (!(dm->support_ic_type == ODM_RTL8822B))
396 return;
397
398 condi_num = phydm_get_condi_num_8822b(dm);
399 phydm_get_condi_num_acc_8822b(dm);
400
401 PDM_SNPF(out_len, used, output + used, out_len - used,
402 "\r\n %-35s = %d.%.4d", "condi_num",
403 condi_num >> 4, phydm_show_fraction_num(condi_num & 0xf, 4));
404
405 for (i = 0; i < CN_CNT_MAX; i++) {
406 PDM_SNPF(out_len, used, output + used, out_len - used,
407 "\r\n Tone_num[CN>%d]%-21s = %d",
408 i, " ", dm->phy_dbg_info.condi_num_cdf[i]);
409 }
410
411 *_used = used;
412 *_out_len = out_len;
413 }
414 #endif
415
phydm_bb_hw_dbg_info_ac(void * dm_void,u32 * _used,char * output,u32 * _out_len)416 void phydm_bb_hw_dbg_info_ac(void *dm_void, u32 *_used, char *output,
417 u32 *_out_len)
418 {
419 struct dm_struct *dm = (struct dm_struct *)dm_void;
420 u32 used = *_used;
421 u32 out_len = *_out_len;
422 char *tmp_string = NULL;
423 u8 rx_ht_bw, rx_vht_bw, rxsc, rx_ht, bw_idx = 0;
424 static u8 v_rx_bw;
425 u32 value32, value32_1, value32_2, value32_3;
426 struct phydm_cfo_rpt cfo;
427 u8 i = 0;
428 static u8 tail, parity, rsv, vrsv, smooth, htsound, agg;
429 static u8 stbc, vstbc, fec, fecext, sgi, sgiext, htltf, vgid, v_nsts;
430 static u8 vtxops, vrsv2, vbrsv, bf, vbcrc;
431 static u16 h_length, htcrc8, length;
432 static u16 vpaid;
433 static u16 v_length, vhtcrc8, v_mcss, v_tail, vb_tail;
434 static u8 hmcss, hrx_bw;
435 u8 pwdb;
436 s8 rxevm_0, rxevm_1, rxevm_2;
437 u8 rf_gain[4];
438 u8 rx_snr[4];
439 s32 sig_power;
440
441 PDM_SNPF(out_len, used, output + used, out_len - used, "\r\n %-35s\n",
442 "BB Report Info");
443
444 /*@ [BW & Mode] =====================================================*/
445
446 value32 = odm_get_bb_reg(dm, R_0xf80, MASKDWORD);
447 rx_ht = (u8)((value32 & 0x180) >> 7);
448
449 if (rx_ht == AD_VHT_MODE) {
450 tmp_string = "VHT";
451 bw_idx = (u8)((value32 >> 1) & 0x3);
452 } else if (rx_ht == AD_HT_MODE) {
453 tmp_string = "HT";
454 bw_idx = (u8)(value32 & 0x1);
455 } else {
456 tmp_string = "Legacy";
457 bw_idx = 0;
458 }
459 PDM_SNPF(out_len, used, output + used, out_len - used,
460 "\r\n %-35s %s %dM", "mode", tmp_string, (20 << bw_idx));
461
462 if (rx_ht != AD_LEGACY_MODE) {
463 rxsc = (u8)(value32 & 0x78);
464
465 if (rxsc == 0)
466 tmp_string = "duplicate/full bw";
467 else if (rxsc == 1)
468 tmp_string = "usc20-1";
469 else if (rxsc == 2)
470 tmp_string = "lsc20-1";
471 else if (rxsc == 3)
472 tmp_string = "usc20-2";
473 else if (rxsc == 4)
474 tmp_string = "lsc20-2";
475 else if (rxsc == 9)
476 tmp_string = "usc40";
477 else if (rxsc == 10)
478 tmp_string = "lsc40";
479
480 PDM_SNPF(out_len, used, output + used, out_len - used,
481 " %-35s", tmp_string);
482 }
483
484 /*@ [RX signal power and AGC related info] ==========================*/
485
486 pwdb = (u8)odm_get_bb_reg(dm, R_0xf90, MASKBYTE1);
487 sig_power = -110 + (pwdb >> 1);
488 PDM_SNPF(out_len, used, output + used, out_len - used,
489 "\r\n %-35s = %d", "OFDM RX Signal Power(dB)", sig_power);
490
491 value32 = odm_get_bb_reg(dm, R_0xd14, MASKDWORD);
492 rx_snr[RF_PATH_A] = (u8)(value32 & 0xFF) >> 1; /*@ S(8,1)*/
493 rf_gain[RF_PATH_A] = (s8)(((value32 & MASKBYTE1) >> 8) * 2);
494
495 value32 = odm_get_bb_reg(dm, R_0xd54, MASKDWORD);
496 rx_snr[RF_PATH_B] = (u8)(value32 & 0xFF) >> 1; /*@ S(8,1)*/
497 rf_gain[RF_PATH_B] = (s8)(((value32 & MASKBYTE1) >> 8) * 2);
498
499 value32 = odm_get_bb_reg(dm, R_0xd94, MASKDWORD);
500 rx_snr[RF_PATH_C] = (u8)(value32 & 0xFF) >> 1; /*@ S(8,1)*/
501 rf_gain[RF_PATH_C] = (s8)(((value32 & MASKBYTE1) >> 8) * 2);
502
503 value32 = odm_get_bb_reg(dm, R_0xdd4, MASKDWORD);
504 rx_snr[RF_PATH_D] = (u8)(value32 & 0xFF) >> 1; /*@ S(8,1)*/
505 rf_gain[RF_PATH_D] = (s8)(((value32 & MASKBYTE1) >> 8) * 2);
506
507 PDM_SNPF(out_len, used, output + used, out_len - used,
508 "\r\n %-35s = %d / %d / %d / %d", "OFDM RX RF Gain(A/B/C/D)",
509 rf_gain[RF_PATH_A], rf_gain[RF_PATH_B],
510 rf_gain[RF_PATH_C], rf_gain[RF_PATH_D]);
511
512 /*@ [RX counter Info] ===============================================*/
513
514 PDM_SNPF(out_len, used, output + used, out_len - used,
515 "\r\n %-35s = %d", "OFDM CCA cnt",
516 odm_get_bb_reg(dm, R_0xf08, 0xFFFF0000));
517
518 PDM_SNPF(out_len, used, output + used, out_len - used,
519 "\r\n %-35s = %d", "OFDM SBD Fail cnt",
520 odm_get_bb_reg(dm, R_0xfd0, 0xFFFF));
521
522 value32 = odm_get_bb_reg(dm, R_0xfc4, MASKDWORD);
523 PDM_SNPF(out_len, used, output + used, out_len - used,
524 "\r\n %-35s = %d / %d", "VHT SIGA/SIGB CRC8 Fail cnt",
525 value32 & 0xFFFF, ((value32 & 0xFFFF0000) >> 16));
526
527 PDM_SNPF(out_len, used, output + used, out_len - used,
528 "\r\n %-35s = %d", "CCK CCA cnt",
529 odm_get_bb_reg(dm, R_0xfcc, 0xFFFF));
530
531 value32 = odm_get_bb_reg(dm, R_0xfbc, MASKDWORD);
532 PDM_SNPF(out_len, used, output + used, out_len - used,
533 "\r\n %-35s = %d / %d",
534 "LSIG (parity Fail/rate Illegal) cnt", value32 & 0xFFFF,
535 ((value32 & 0xFFFF0000) >> 16));
536
537 PDM_SNPF(out_len, used, output + used, out_len - used,
538 "\r\n %-35s = %d / %d", "HT/VHT MCS NOT SUPPORT cnt",
539 odm_get_bb_reg(dm, R_0xfc0, (0xFFFF0000 >> 16)),
540 odm_get_bb_reg(dm, R_0xfc8, 0xFFFF));
541
542 /*@ [PostFFT Info] =================================================*/
543 value32 = odm_get_bb_reg(dm, R_0xf8c, MASKDWORD);
544 rxevm_0 = (s8)((value32 & MASKBYTE2) >> 16);
545 rxevm_0 /= 2;
546 if (rxevm_0 < -63)
547 rxevm_0 = 0;
548
549 rxevm_1 = (s8)((value32 & MASKBYTE3) >> 24);
550 rxevm_1 /= 2;
551 value32 = odm_get_bb_reg(dm, R_0xf88, MASKDWORD);
552 rxevm_2 = (s8)((value32 & MASKBYTE2) >> 16);
553 rxevm_2 /= 2;
554
555 if (rxevm_1 < -63)
556 rxevm_1 = 0;
557 if (rxevm_2 < -63)
558 rxevm_2 = 0;
559
560 PDM_SNPF(out_len, used, output + used, out_len - used,
561 "\r\n %-35s = %d / %d / %d", "RXEVM (1ss/2ss/3ss)", rxevm_0,
562 rxevm_1, rxevm_2);
563 PDM_SNPF(out_len, used, output + used, out_len - used,
564 "\r\n %-35s = %d / %d / %d / %d", "RXSNR(A/B/C/D dB)",
565 rx_snr[RF_PATH_A], rx_snr[RF_PATH_B],
566 rx_snr[RF_PATH_C], rx_snr[RF_PATH_D]);
567
568 value32 = odm_get_bb_reg(dm, R_0xf8c, MASKDWORD);
569 PDM_SNPF(out_len, used, output + used, out_len - used,
570 "\r\n %-35s = %d / %d", "CSI_1st /CSI_2nd", value32 & 0xFFFF,
571 ((value32 & 0xFFFF0000) >> 16));
572
573 /*@ [CFO Report Info] ===============================================*/
574 phydm_get_cfo_info(dm, &cfo);
575 for (i = 0; i < dm->num_rf_path; i++) {
576 PDM_SNPF(out_len, used, output + used, out_len - used,
577 "\r\n %s[%d] %-28s = {%d, %d, %d, %d, %d}",
578 "CFO", i, "{S, L, Sec, Acq, End}",
579 cfo.cfo_rpt_s[i], cfo.cfo_rpt_l[i], cfo.cfo_rpt_sec[i],
580 cfo.cfo_rpt_acq[i], cfo.cfo_rpt_end[i]);
581 }
582
583 /*@ [L-SIG Content] =================================================*/
584 value32 = odm_get_bb_reg(dm, R_0xf20, MASKDWORD);
585
586 tail = (u8)((value32 & 0xfc0000) >> 18);/*@[23:18]*/
587 parity = (u8)((value32 & 0x20000) >> 17);/*@[17]*/
588 length = (u16)((value32 & 0x1ffe0) >> 5);/*@[16:5]*/
589 rsv = (u8)((value32 & 0x10) >> 4);/*@[4]*/
590
591 PDM_SNPF(out_len, used, output + used, out_len - used, "\r\n %-35s",
592 "L-SIG");
593 PDM_SNPF(out_len, used, output + used, out_len - used,
594 "\r\n %-35s = %d M", "rate",
595 phydm_get_l_sig_rate(dm, (u8)(value32 & 0x0f)));
596
597 PDM_SNPF(out_len, used, output + used, out_len - used,
598 "\r\n %-35s = %x / %d / %d", "Rsv/length/parity", rsv, length,
599 parity);
600
601 if (rx_ht == AD_HT_MODE) {
602 /*@ [HT SIG 1] ======================================================*/
603 value32 = odm_get_bb_reg(dm, R_0xf2c, MASKDWORD);
604
605 hmcss = (u8)(value32 & 0x7F);
606 hrx_bw = (u8)((value32 & 0x80) >> 7);
607 h_length = (u16)((value32 & 0x0fff00) >> 8);
608
609 PDM_SNPF(out_len, used, output + used, out_len - used,
610 "\r\n %-35s", "HT-SIG1");
611 PDM_SNPF(out_len, used, output + used, out_len - used,
612 "\r\n %-35s = %d / %d / %d", "MCS/BW/length",
613 hmcss, hrx_bw, h_length);
614 /*@ [HT SIG 2] ======================================================*/
615 value32 = odm_get_bb_reg(dm, R_0xf30, MASKDWORD);
616 smooth = (u8)(value32 & 0x01);
617 htsound = (u8)((value32 & 0x02) >> 1);
618 rsv = (u8)((value32 & 0x04) >> 2);
619 agg = (u8)((value32 & 0x08) >> 3);
620 stbc = (u8)((value32 & 0x30) >> 4);
621 fec = (u8)((value32 & 0x40) >> 6);
622 sgi = (u8)((value32 & 0x80) >> 7);
623 htltf = (u8)((value32 & 0x300) >> 8);
624 htcrc8 = (u16)((value32 & 0x3fc00) >> 10);
625 tail = (u8)((value32 & 0xfc0000) >> 18);
626
627 PDM_SNPF(out_len, used, output + used, out_len - used,
628 "\r\n %-35s",
629 "HT-SIG2");
630 PDM_SNPF(out_len, used, output + used, out_len - used,
631 "\r\n %-35s = %x / %x / %x / %x / %x / %x",
632 "Smooth/NoSound/Rsv/Aggregate/STBC/LDPC",
633 smooth, htsound, rsv, agg, stbc, fec);
634 PDM_SNPF(out_len, used, output + used, out_len - used,
635 "\r\n %-35s = %x / %x / %x / %x",
636 "SGI/E-HT-LTFs/CRC/tail",
637 sgi, htltf, htcrc8, tail);
638 } else if (rx_ht == AD_VHT_MODE) {
639 /*@ [VHT SIG A1] ====================================================*/
640 value32 = odm_get_bb_reg(dm, R_0xf2c, MASKDWORD);
641
642 v_rx_bw = (u8)(value32 & 0x03);
643 vrsv = (u8)((value32 & 0x04) >> 2);
644 vstbc = (u8)((value32 & 0x08) >> 3);
645 vgid = (u8)((value32 & 0x3f0) >> 4);
646 v_nsts = (u8)(((value32 & 0x1c00) >> 10) + 1);
647 vpaid = (u16)((value32 & 0x3fe000) >> 13);
648 vtxops = (u8)((value32 & 0x400000) >> 22);
649 vrsv2 = (u8)((value32 & 0x800000) >> 23);
650
651 PDM_SNPF(out_len, used, output + used, out_len - used,
652 "\r\n %-35s",
653 "VHT-SIG-A1");
654 PDM_SNPF(out_len, used, output + used, out_len - used,
655 "\r\n %-35s = %x / %x / %x / %x / %x / %x / %x / %x",
656 "BW/Rsv1/STBC/GID/Nsts/PAID/TXOPPS/Rsv2", v_rx_bw,
657 vrsv, vstbc, vgid, v_nsts, vpaid, vtxops, vrsv2);
658
659 /*@ [VHT SIG A2] ====================================================*/
660 value32 = odm_get_bb_reg(dm, R_0xf30, MASKDWORD);
661
662 /* @sgi=(u8)(value32&0x01); */
663 sgiext = (u8)(value32 & 0x03);
664 /* @fec = (u8)(value32&0x04); */
665 fecext = (u8)((value32 & 0x0C) >> 2);
666
667 v_mcss = (u8)((value32 & 0xf0) >> 4);
668 bf = (u8)((value32 & 0x100) >> 8);
669 vrsv = (u8)((value32 & 0x200) >> 9);
670 vhtcrc8 = (u16)((value32 & 0x3fc00) >> 10);
671 v_tail = (u8)((value32 & 0xfc0000) >> 18);
672
673 PDM_SNPF(out_len, used, output + used, out_len - used,
674 "\r\n %-35s", "VHT-SIG-A2");
675 PDM_SNPF(out_len, used, output + used, out_len - used,
676 "\r\n %-35s = %x / %x / %x / %x / %x / %x / %x",
677 "SGI/FEC/MCS/BF/Rsv/CRC/tail",
678 sgiext, fecext, v_mcss, bf, vrsv, vhtcrc8, v_tail);
679
680 /*@ [VHT SIG B] ====================================================*/
681 value32 = odm_get_bb_reg(dm, R_0xf34, MASKDWORD);
682
683 #if 0
684 v_length = (u16)(value32 & 0x1fffff);
685 vbrsv = (u8)((value32 & 0x600000) >> 21);
686 vb_tail = (u16)((value32 & 0x1f800000) >> 23);
687 vbcrc = (u8)((value32 & 0x80000000) >> 31);
688 #endif
689
690 PDM_SNPF(out_len, used, output + used, out_len - used,
691 "\r\n %-35s", "VHT-SIG-B");
692 PDM_SNPF(out_len, used, output + used, out_len - used,
693 "\r\n %-35s = %x",
694 "Codeword", value32);
695
696 #if 0
697 PDM_SNPF(out_len, used, output + used, out_len - used,
698 "\r\n %-35s = %x / %x / %x / %x",
699 "length/Rsv/tail/CRC",
700 v_length, vbrsv, vb_tail, vbcrc);
701 #endif
702 }
703
704 *_used = used;
705 *_out_len = out_len;
706 }
707 #endif
708
709 #ifdef PHYDM_IC_JGR3_SERIES_SUPPORT
phydm_bb_hw_dbg_info_jgr3(void * dm_void,u32 * _used,char * output,u32 * _out_len)710 void phydm_bb_hw_dbg_info_jgr3(void *dm_void, u32 *_used, char *output,
711 u32 *_out_len)
712 {
713 struct dm_struct *dm = (struct dm_struct *)dm_void;
714 u32 used = *_used;
715 u32 out_len = *_out_len;
716 char *tmp_string = NULL;
717 u8 rx_ht_bw = 0, rx_vht_bw = 0, rx_ht = 0;
718 static u8 v_rx_bw;
719 u32 value32 = 0;
720 u8 i = 0;
721 static u8 tail, parity, rsv, vrsv, smooth, htsound, agg;
722 static u8 stbc, vstbc, fec, fecext, sgi, sgiext, htltf, vgid, v_nsts;
723 static u8 vtxops, vrsv2, vbrsv, bf, vbcrc;
724 static u16 h_length, htcrc8, length;
725 static u16 vpaid;
726 static u16 v_length, vhtcrc8, v_mcss, v_tail, vb_tail;
727 static u8 hmcss, hrx_bw;
728
729 PDM_SNPF(out_len, used, output + used, out_len - used, "\r\n %-35s\n",
730 "BB Report Info");
731
732 /*@ [Mode] =====================================================*/
733
734 value32 = odm_get_bb_reg(dm, R_0x2c20, MASKDWORD);
735 rx_ht = (u8)((value32 & 0xC0000) >> 18);
736 if (rx_ht == AD_VHT_MODE)
737 tmp_string = "VHT";
738 else if (rx_ht == AD_HT_MODE)
739 tmp_string = "HT";
740 else
741 tmp_string = "Legacy";
742
743 PDM_SNPF(out_len, used, output + used, out_len - used,
744 "\r\n %-35s %s", "mode", tmp_string);
745 /*@ [RX counter Info] ===============================================*/
746
747 if (dm->support_ic_type & ODM_RTL8723F) {
748 PDM_SNPF(out_len, used, output + used, out_len - used,
749 "\r\n %-35s = %d", "CCK CCA cnt",
750 odm_get_bb_reg(dm, R_0x2aa0, 0xFFFF));
751 } else {
752 PDM_SNPF(out_len, used, output + used, out_len - used,
753 "\r\n %-35s = %d", "CCK CCA cnt",
754 odm_get_bb_reg(dm, R_0x2c08, 0xFFFF));
755 }
756 PDM_SNPF(out_len, used, output + used, out_len - used,
757 "\r\n %-35s = %d", "OFDM CCA cnt",
758 odm_get_bb_reg(dm, R_0x2c08, 0xFFFF0000));
759
760 PDM_SNPF(out_len, used, output + used, out_len - used,
761 "\r\n %-35s = %d", "OFDM SBD Fail cnt",
762 odm_get_bb_reg(dm, R_0x2d20, 0xFFFF0000));
763
764 PDM_SNPF(out_len, used, output + used, out_len - used,
765 "\r\n %-35s = %d / %d",
766 "LSIG (parity Fail/rate Illegal) cnt",
767 odm_get_bb_reg(dm, R_0x2d04, 0xFFFF0000),
768 odm_get_bb_reg(dm, R_0x2d08, 0xFFFF));
769
770 value32 = odm_get_bb_reg(dm, R_0x2d10, MASKDWORD);
771 PDM_SNPF(out_len, used, output + used, out_len - used,
772 "\r\n %-35s = %d / %d", "HT/VHT MCS NOT SUPPORT cnt",
773 value32 & 0xFFFF, ((value32 & 0xFFFF0000) >> 16));
774
775 value32 = odm_get_bb_reg(dm, R_0x2d0c, MASKDWORD);
776 PDM_SNPF(out_len, used, output + used, out_len - used,
777 "\r\n %-35s = %d / %d", "VHT SIGA/SIGB CRC8 Fail cnt",
778 value32 & 0xFFFF, ((value32 & 0xFFFF0000) >> 16));
779 /*@ [L-SIG Content] =================================================*/
780 value32 = odm_get_bb_reg(dm, R_0x2c20, MASKDWORD);
781
782 parity = (u8)((value32 & 0x20000) >> 17);/*@[17]*/
783 length = (u16)((value32 & 0x1ffe0) >> 5);/*@[16:5]*/
784 rsv = (u8)((value32 & 0x10) >> 4);/*@[4]*/
785
786 PDM_SNPF(out_len, used, output + used, out_len - used, "\r\n %-35s",
787 "L-SIG");
788 PDM_SNPF(out_len, used, output + used, out_len - used,
789 "\r\n %-35s = %d M", "rate",
790 phydm_get_l_sig_rate(dm, (u8)(value32 & 0x0f)));
791
792 PDM_SNPF(out_len, used, output + used, out_len - used,
793 "\r\n %-35s = %x / %d / %d", "Rsv/length/parity", rsv, length,
794 parity);
795
796 if (rx_ht == AD_HT_MODE) {
797 /*@ [HT SIG 1] ======================================================*/
798 value32 = odm_get_bb_reg(dm, R_0x2c2c, MASKDWORD);
799
800 hmcss = (u8)(value32 & 0x7F);
801 hrx_bw = (u8)((value32 & 0x80) >> 7);
802 h_length = (u16)((value32 & 0x0fff00) >> 8);
803
804 PDM_SNPF(out_len, used, output + used, out_len - used,
805 "\r\n %-35s", "HT-SIG1");
806 PDM_SNPF(out_len, used, output + used, out_len - used,
807 "\r\n %-35s = %d / %d / %d", "MCS/BW/length",
808 hmcss, hrx_bw, h_length);
809 /*@ [HT SIG 2] ======================================================*/
810 value32 = odm_get_bb_reg(dm, R_0x2c30, MASKDWORD);
811 smooth = (u8)(value32 & 0x01);
812 htsound = (u8)((value32 & 0x02) >> 1);
813 rsv = (u8)((value32 & 0x04) >> 2);
814 agg = (u8)((value32 & 0x08) >> 3);
815 stbc = (u8)((value32 & 0x30) >> 4);
816 fec = (u8)((value32 & 0x40) >> 6);
817 sgi = (u8)((value32 & 0x80) >> 7);
818 htltf = (u8)((value32 & 0x300) >> 8);
819 htcrc8 = (u16)((value32 & 0x3fc00) >> 10);
820 tail = (u8)((value32 & 0xfc0000) >> 18);
821
822 PDM_SNPF(out_len, used, output + used, out_len - used,
823 "\r\n %-35s",
824 "HT-SIG2");
825 PDM_SNPF(out_len, used, output + used, out_len - used,
826 "\r\n %-35s = %x / %x / %x / %x / %x / %x",
827 "Smooth/NoSound/Rsv/Aggregate/STBC/LDPC",
828 smooth, htsound, rsv, agg, stbc, fec);
829 PDM_SNPF(out_len, used, output + used, out_len - used,
830 "\r\n %-35s = %x / %x / %x / %x",
831 "SGI/E-HT-LTFs/CRC/tail",
832 sgi, htltf, htcrc8, tail);
833 } else if (rx_ht == AD_VHT_MODE) {
834 /*@ [VHT SIG A1] ====================================================*/
835 value32 = odm_get_bb_reg(dm, R_0x2c2c, MASKDWORD);
836
837 v_rx_bw = (u8)(value32 & 0x03);
838 vrsv = (u8)((value32 & 0x04) >> 2);
839 vstbc = (u8)((value32 & 0x08) >> 3);
840 vgid = (u8)((value32 & 0x3f0) >> 4);
841 v_nsts = (u8)(((value32 & 0x1c00) >> 10) + 1);
842 vpaid = (u16)((value32 & 0x3fe000) >> 13);
843 vtxops = (u8)((value32 & 0x400000) >> 22);
844 vrsv2 = (u8)((value32 & 0x800000) >> 23);
845
846 PDM_SNPF(out_len, used, output + used, out_len - used,
847 "\r\n %-35s",
848 "VHT-SIG-A1");
849 PDM_SNPF(out_len, used, output + used, out_len - used,
850 "\r\n %-35s = %x / %x / %x / %x / %x / %x / %x / %x",
851 "BW/Rsv1/STBC/GID/Nsts/PAID/TXOPPS/Rsv2", v_rx_bw,
852 vrsv, vstbc, vgid, v_nsts, vpaid, vtxops, vrsv2);
853
854 /*@ [VHT SIG A2] ====================================================*/
855 value32 = odm_get_bb_reg(dm, R_0x2c30, MASKDWORD);
856
857 /* @sgi=(u8)(value32&0x01); */
858 sgiext = (u8)(value32 & 0x03);
859 /* @fec = (u8)(value32&0x04); */
860 fecext = (u8)((value32 & 0x0C) >> 2);
861
862 v_mcss = (u8)((value32 & 0xf0) >> 4);
863 bf = (u8)((value32 & 0x100) >> 8);
864 vrsv = (u8)((value32 & 0x200) >> 9);
865 vhtcrc8 = (u16)((value32 & 0x3fc00) >> 10);
866 v_tail = (u8)((value32 & 0xfc0000) >> 18);
867
868 PDM_SNPF(out_len, used, output + used, out_len - used,
869 "\r\n %-35s", "VHT-SIG-A2");
870 PDM_SNPF(out_len, used, output + used, out_len - used,
871 "\r\n %-35s = %x / %x / %x / %x / %x / %x / %x",
872 "SGI/FEC/MCS/BF/Rsv/CRC/tail",
873 sgiext, fecext, v_mcss, bf, vrsv, vhtcrc8, v_tail);
874
875 /*@ [VHT SIG B] ====================================================*/
876 value32 = odm_get_bb_reg(dm, R_0x2c34, MASKDWORD);
877
878 PDM_SNPF(out_len, used, output + used, out_len - used,
879 "\r\n %-35s", "VHT-SIG-B");
880 PDM_SNPF(out_len, used, output + used, out_len - used,
881 "\r\n %-35s = %x",
882 "Codeword", value32);
883
884 if (v_rx_bw == 0) {
885 v_length = (u16)(value32 & 0x1ffff);
886 vbrsv = (u8)((value32 & 0xE0000) >> 17);
887 vb_tail = (u16)((value32 & 0x03F00000) >> 20);
888 } else if (v_rx_bw == 1) {
889 v_length = (u16)(value32 & 0x7FFFF);
890 vbrsv = (u8)((value32 & 0x180000) >> 19);
891 vb_tail = (u16)((value32 & 0x07E00000) >> 21);
892 } else if (v_rx_bw == 2) {
893 v_length = (u16)(value32 & 0x1fffff);
894 vbrsv = (u8)((value32 & 0x600000) >> 21);
895 vb_tail = (u16)((value32 & 0x1f800000) >> 23);
896 }
897 vbcrc = (u8)((value32 & 0x80000000) >> 31);
898
899 PDM_SNPF(out_len, used, output + used, out_len - used,
900 "\r\n %-35s = %x / %x / %x / %x",
901 "length/Rsv/tail/CRC",
902 v_length, vbrsv, vb_tail, vbcrc);
903 }
904
905 *_used = used;
906 *_out_len = out_len;
907 }
908 #endif
909
phydm_get_l_sig_rate(void * dm_void,u8 rate_idx_l_sig)910 u8 phydm_get_l_sig_rate(void *dm_void, u8 rate_idx_l_sig)
911 {
912 u8 rate_idx = 0xff;
913
914 switch (rate_idx_l_sig) {
915 case 0x0b:
916 rate_idx = 6;
917 break;
918 case 0x0f:
919 rate_idx = 9;
920 break;
921 case 0x0a:
922 rate_idx = 12;
923 break;
924 case 0x0e:
925 rate_idx = 18;
926 break;
927 case 0x09:
928 rate_idx = 24;
929 break;
930 case 0x0d:
931 rate_idx = 36;
932 break;
933 case 0x08:
934 rate_idx = 48;
935 break;
936 case 0x0c:
937 rate_idx = 54;
938 break;
939 default:
940 rate_idx = 0xff;
941 break;
942 }
943
944 return rate_idx;
945 }
946
phydm_bb_hw_dbg_info(void * dm_void,char input[][16],u32 * _used,char * output,u32 * _out_len)947 void phydm_bb_hw_dbg_info(void *dm_void, char input[][16], u32 *_used,
948 char *output, u32 *_out_len)
949 {
950 struct dm_struct *dm = (struct dm_struct *)dm_void;
951 u32 used = *_used;
952 u32 out_len = *_out_len;
953
954 switch (dm->ic_ip_series) {
955 #if (ODM_IC_11N_SERIES_SUPPORT)
956 case PHYDM_IC_N:
957 phydm_bb_hw_dbg_info_n(dm, &used, output, &out_len);
958 break;
959 #endif
960
961 #if (ODM_IC_11AC_SERIES_SUPPORT)
962 case PHYDM_IC_AC:
963 phydm_bb_hw_dbg_info_ac(dm, &used, output, &out_len);
964 phydm_reset_bb_hw_cnt(dm);
965 #if (RTL8822B_SUPPORT)
966 phydm_bb_hw_dbg_info_8822b(dm, &used, output, &out_len);
967 #endif
968 break;
969 #endif
970
971 #ifdef PHYDM_IC_JGR3_SERIES_SUPPORT
972 case PHYDM_IC_JGR3:
973 phydm_bb_hw_dbg_info_jgr3(dm, &used, output, &out_len);
974 phydm_reset_bb_hw_cnt(dm);
975 break;
976 #endif
977 default:
978 break;
979 }
980
981 *_used = used;
982 *_out_len = out_len;
983 }
984
985 #endif /*@#ifdef CONFIG_PHYDM_DEBUG_FUNCTION*/
986
987 #if (DM_ODM_SUPPORT_TYPE & ODM_WIN)
988
phydm_dm_summary_cli_win(void * dm_void,char * buf,u8 macid)989 void phydm_dm_summary_cli_win(void *dm_void, char *buf, u8 macid)
990 {
991 struct dm_struct *dm = (struct dm_struct *)dm_void;
992 struct phydm_dig_struct *dig_t = &dm->dm_dig_table;
993 struct phydm_cfo_track_struct *cfo_t = &dm->dm_cfo_track;
994 struct cmn_sta_info *sta = NULL;
995 struct ra_sta_info *ra = NULL;
996 struct dtp_info *dtp = NULL;
997 u64 comp = dm->support_ability;
998 u64 pause_comp = dm->pause_ability;
999
1000 if (!dm->is_linked) {
1001 RT_SPRINTF(buf, DBGM_CLI_BUF_SIZE, "[%s]No Link !!!\n", __func__);
1002 RT_PRINT(buf);
1003 return;
1004 }
1005
1006 RT_SPRINTF(buf, DBGM_CLI_BUF_SIZE, "00.(%s) %-12s: IGI=0x%x, Dyn_Rng=0x%x~0x%x, fa_src=%d, FA_th={%d,%d,%d}\n",
1007 ((comp & ODM_BB_DIG) ?
1008 ((pause_comp & ODM_BB_DIG) ? "P" : "V") : "."),
1009 "DIG",
1010 dig_t->cur_ig_value,
1011 dig_t->rx_gain_range_min, dig_t->rx_gain_range_max,
1012 dig_t->fa_source,
1013 dig_t->fa_th[0], dig_t->fa_th[1], dig_t->fa_th[2]);
1014 RT_PRINT(buf);
1015
1016 sta = dm->phydm_sta_info[macid];
1017 if (is_sta_active(sta)) {
1018 ra = &sta->ra_info;
1019 dtp = &sta->dtp_stat;
1020
1021 RT_SPRINTF(buf, DBGM_CLI_BUF_SIZE, "01.(%s) %-12s: rssi_lv=%d, mask=0x%llx\n",
1022 ((comp & ODM_BB_RA_MASK) ?
1023 ((pause_comp & ODM_BB_RA_MASK) ? "P" : "V") : "."),
1024 "RaMask",
1025 ra->rssi_level, ra->ramask);
1026 RT_PRINT(buf);
1027
1028 #ifdef CONFIG_DYNAMIC_TX_TWR
1029 RT_SPRINTF(buf, DBGM_CLI_BUF_SIZE, "02.(%s) %-12s: pwr_lv=%d\n",
1030 ((comp & ODM_BB_DYNAMIC_TXPWR) ?
1031 ((pause_comp & ODM_BB_DYNAMIC_TXPWR) ? "P" : "V") : "."),
1032 "DynTxPwr",
1033 dtp->sta_tx_high_power_lvl);
1034 RT_PRINT(buf);
1035 #endif
1036 }
1037
1038 RT_SPRINTF(buf, DBGM_CLI_BUF_SIZE, "05.(%s) %-12s: cck_pd_lv=%d\n",
1039 ((comp & ODM_BB_CCK_PD) ?
1040 ((pause_comp & ODM_BB_CCK_PD) ? "P" : "V") : "."),
1041 "CCK_PD", dm->dm_cckpd_table.cck_pd_lv);
1042 RT_PRINT(buf);
1043
1044 #ifdef CONFIG_PHYDM_ANTENNA_DIVERSITY
1045 RT_SPRINTF(buf, DBGM_CLI_BUF_SIZE, "06.(%s) %-12s: div_type=%d, curr_ant=%s\n",
1046 ((comp & ODM_BB_ANT_DIV) ?
1047 ((pause_comp & ODM_BB_ANT_DIV) ? "P" : "V") : "."),
1048 "ANT_DIV",
1049 dm->ant_div_type,
1050 (dm->dm_fat_table.rx_idle_ant == MAIN_ANT) ? "MAIN" : "AUX");
1051 RT_PRINT(buf);
1052 #endif
1053
1054 #ifdef PHYDM_POWER_TRAINING_SUPPORT
1055 RT_SPRINTF(buf, DBGM_CLI_BUF_SIZE, "08.(%s) %-12s: PT_score=%d, disable_PT=%d\n",
1056 ((comp & ODM_BB_PWR_TRAIN) ?
1057 ((pause_comp & ODM_BB_PWR_TRAIN) ? "P" : "V") : "."),
1058 "PwrTrain",
1059 dm->pow_train_table.pow_train_score,
1060 dm->is_disable_power_training);
1061 RT_PRINT(buf);
1062 #endif
1063
1064 #ifdef CONFIG_PHYDM_DFS_MASTER
1065 RT_SPRINTF(buf, DBGM_CLI_BUF_SIZE, "11.(%s) %-12s: dbg_mode=%d, region_domain=%d\n",
1066 ((comp & ODM_BB_DFS) ?
1067 ((pause_comp & ODM_BB_DFS) ? "P" : "V") : "."),
1068 "DFS",
1069 dm->dfs.dbg_mode, dm->dfs_region_domain);
1070 RT_PRINT(buf);
1071 #endif
1072 #ifdef PHYDM_SUPPORT_ADAPTIVITY
1073 RT_SPRINTF(buf, DBGM_CLI_BUF_SIZE, "13.(%s) %-12s: th{l2h, h2l}={%d, %d}, edcca_flag=%d\n",
1074 ((comp & ODM_BB_ADAPTIVITY) ?
1075 ((pause_comp & ODM_BB_ADAPTIVITY) ? "P" : "V") : "."),
1076 "Adaptivity",
1077 dm->adaptivity.th_l2h, dm->adaptivity.th_h2l,
1078 dm->false_alm_cnt.edcca_flag);
1079 RT_PRINT(buf);
1080 #endif
1081 RT_SPRINTF(buf, DBGM_CLI_BUF_SIZE, "14.(%s) %-12s: CFO_avg=%d kHz, CFO_traking=%s%d\n",
1082 ((comp & ODM_BB_CFO_TRACKING) ?
1083 ((pause_comp & ODM_BB_CFO_TRACKING) ? "P" : "V") : "."),
1084 "CfoTrack",
1085 cfo_t->CFO_ave_pre,
1086 ((cfo_t->crystal_cap > cfo_t->def_x_cap) ? "+" : "-"),
1087 DIFF_2(cfo_t->crystal_cap, cfo_t->def_x_cap));
1088 RT_PRINT(buf);
1089
1090 RT_SPRINTF(buf, DBGM_CLI_BUF_SIZE,
1091 "15.(%s) %-12s: ratio{nhm, clm}={%d, %d}, nhm_pwr=%d\n",
1092 ((comp & ODM_BB_ENV_MONITOR) ?
1093 ((pause_comp & ODM_BB_ENV_MONITOR) ? "P" : "V") : "."),
1094 "EnvMntr",
1095 dm->dm_ccx_info.nhm_ratio, dm->dm_ccx_info.clm_ratio,
1096 dm->dm_ccx_info.nhm_pwr);
1097 RT_PRINT(buf);
1098
1099 RT_SPRINTF(buf, DBGM_CLI_BUF_SIZE, "15.(%s) %-12s: NHM_Rpt(H->L)[%d %d %d %d %d %d %d %d %d %d %d %d]\n",
1100 ((comp & ODM_BB_ENV_MONITOR) ?
1101 ((pause_comp & ODM_BB_ENV_MONITOR) ? "P" : "V") : "."),
1102 "EnvMntr",
1103 dm->dm_ccx_info.nhm_result[11],
1104 dm->dm_ccx_info.nhm_result[10],
1105 dm->dm_ccx_info.nhm_result[9], dm->dm_ccx_info.nhm_result[8],
1106 dm->dm_ccx_info.nhm_result[7], dm->dm_ccx_info.nhm_result[6],
1107 dm->dm_ccx_info.nhm_result[5], dm->dm_ccx_info.nhm_result[4],
1108 dm->dm_ccx_info.nhm_result[3], dm->dm_ccx_info.nhm_result[2],
1109 dm->dm_ccx_info.nhm_result[1], dm->dm_ccx_info.nhm_result[0]);
1110 RT_PRINT(buf);
1111
1112 #ifdef EDCCA_CLM_SUPPORT
1113 if (dm->support_ic_type & PHYDM_IC_SUPPORT_EDCCA_CLM) {
1114 RT_SPRINTF(buf, DBGM_CLI_BUF_SIZE, "15.(%s) %-12s: edcca_clm_ratio=%d\n",
1115 ((comp & ODM_BB_ENV_MONITOR) ?
1116 ((pause_comp & ODM_BB_ENV_MONITOR) ? "P" : "V") : "."),
1117 "EnvMntr",
1118 dm->dm_ccx_info.edcca_clm_ratio);
1119 RT_PRINT(buf);
1120 }
1121 #endif
1122
1123 #ifdef PHYDM_PRIMARY_CCA
1124 RT_SPRINTF(buf, DBGM_CLI_BUF_SIZE, "16.(%s) %-12s: CCA @ (%s SB)\n",
1125 ((comp & ODM_BB_PRIMARY_CCA) ?
1126 ((pause_comp & ODM_BB_PRIMARY_CCA) ? "P" : "V") : "."),
1127 "PriCCA",
1128 ((dm->dm_pri_cca.mf_state == MF_USC_LSC) ? "D" :
1129 ((dm->dm_pri_cca.mf_state == MF_LSC) ? "L" : "U")));
1130 RT_PRINT(buf);
1131 #endif
1132 #ifdef CONFIG_ADAPTIVE_SOML
1133 RT_SPRINTF(buf, DBGM_CLI_BUF_SIZE, "17.(%s) %-12s: soml_en = %s\n",
1134 ((comp & ODM_BB_ADAPTIVE_SOML) ?
1135 ((pause_comp & ODM_BB_ADAPTIVE_SOML) ? "P" : "V") : "."),
1136 "A-SOML",
1137 (dm->dm_soml_table.soml_last_state == SOML_ON) ?
1138 "ON" : "OFF");
1139 RT_PRINT(buf);
1140 #endif
1141 #ifdef PHYDM_LNA_SAT_CHK_SUPPORT
1142 RT_SPRINTF(buf, DBGM_CLI_BUF_SIZE, "18.(%s) %-12s:\n",
1143 ((comp & ODM_BB_LNA_SAT_CHK) ?
1144 ((pause_comp & ODM_BB_LNA_SAT_CHK) ? "P" : "V") : "."),
1145 "LNA_SAT_CHK");
1146 RT_PRINT(buf);
1147 #endif
1148 }
1149
phydm_basic_dbg_msg_cli_win(void * dm_void,char * buf)1150 void phydm_basic_dbg_msg_cli_win(void *dm_void, char *buf)
1151 {
1152 struct dm_struct *dm = (struct dm_struct *)dm_void;
1153 struct phydm_fa_struct *fa_t = &dm->false_alm_cnt;
1154 struct phydm_cfo_track_struct *cfo_t = &dm->dm_cfo_track;
1155 struct odm_phy_dbg_info *dbg = &dm->phy_dbg_info_win_bkp;
1156 struct phydm_phystatus_statistic *dbg_s = &dbg->physts_statistic_info;
1157 struct phydm_phystatus_avg *dbg_avg = &dbg->phystatus_statistic_avg;
1158
1159 char *rate_type = NULL;
1160 u8 tmp_rssi_avg[4];
1161 u8 tmp_snr_avg[4];
1162 u8 tmp_evm_avg[4];
1163 u32 tmp_cnt = 0;
1164 u8 macid, target_macid = 0;
1165 u8 i = 0;
1166 u8 rate_num = dm->num_rf_path;
1167 u8 ss_ofst = 0;
1168 struct cmn_sta_info *entry = NULL;
1169 char dbg_buf[PHYDM_SNPRINT_SIZE] = {0};
1170
1171
1172 RT_SPRINTF(buf, DBGM_CLI_BUF_SIZE, "\r\n PHYDM Common Dbg Msg --------->");
1173 RT_PRINT(buf);
1174 RT_SPRINTF(buf, DBGM_CLI_BUF_SIZE, "\r\n System up time=%d", dm->phydm_sys_up_time);
1175 RT_PRINT(buf);
1176
1177 if (dm->is_linked) {
1178 RT_SPRINTF(buf, DBGM_CLI_BUF_SIZE, "\r\n ID=((%d)), BW=((%d)), fc=((CH-%d))",
1179 dm->curr_station_id, 20 << *dm->band_width, *dm->channel);
1180 RT_PRINT(buf);
1181
1182 if (((*dm->channel <= 14) && (*dm->band_width == CHANNEL_WIDTH_40)) &&
1183 (dm->support_ic_type & ODM_IC_11N_SERIES)) {
1184 RT_SPRINTF(buf, DBGM_CLI_BUF_SIZE, "\r\n Primary CCA at ((%s SB))",
1185 (*dm->sec_ch_offset == SECOND_CH_AT_LSB) ? "U" : "L");
1186 RT_PRINT(buf);
1187 }
1188
1189 if (dm->cck_new_agc || dm->rx_rate > ODM_RATE11M) {
1190 RT_SPRINTF(buf, DBGM_CLI_BUF_SIZE, "\r\n [AGC Idx] {0x%x, 0x%x, 0x%x, 0x%x}",
1191 dm->ofdm_agc_idx[0], dm->ofdm_agc_idx[1],
1192 dm->ofdm_agc_idx[2], dm->ofdm_agc_idx[3]);
1193 RT_PRINT(buf);
1194 } else {
1195 RT_SPRINTF(buf, DBGM_CLI_BUF_SIZE, "\r\n [CCK AGC Idx] {LNA,VGA}={0x%x, 0x%x}",
1196 dm->cck_lna_idx, dm->cck_vga_idx);
1197 RT_PRINT(buf);
1198 }
1199
1200 phydm_print_rate_2_buff(dm, dm->rx_rate, dbg_buf, PHYDM_SNPRINT_SIZE);
1201 RT_SPRINTF(buf, DBGM_CLI_BUF_SIZE, "\r\n RSSI:{%d, %d, %d, %d}, RxRate:%s (0x%x)",
1202 (dm->rssi_a == 0xff) ? 0 : dm->rssi_a,
1203 (dm->rssi_b == 0xff) ? 0 : dm->rssi_b,
1204 (dm->rssi_c == 0xff) ? 0 : dm->rssi_c,
1205 (dm->rssi_d == 0xff) ? 0 : dm->rssi_d,
1206 dbg_buf, dm->rx_rate);
1207 RT_PRINT(buf);
1208
1209 phydm_print_rate_2_buff(dm, dm->phy_dbg_info.beacon_phy_rate, dbg_buf, PHYDM_SNPRINT_SIZE);
1210 RT_SPRINTF(buf, DBGM_CLI_BUF_SIZE, "\r\n Beacon_cnt=%d, rate_idx:%s (0x%x)",
1211 dm->phy_dbg_info.beacon_cnt_in_period,
1212 dbg_buf,
1213 dm->phy_dbg_info.beacon_phy_rate);
1214 RT_PRINT(buf);
1215
1216 /*Show phydm_rx_rate_distribution;*/
1217 RT_SPRINTF(buf, DBGM_CLI_BUF_SIZE, "\r\n [RxRate Cnt] =============>");
1218 RT_PRINT(buf);
1219
1220 /*@======CCK=================================================*/
1221 if (*dm->channel <= 14) {
1222 RT_SPRINTF(buf, DBGM_CLI_BUF_SIZE, "\r\n * CCK = {%d, %d, %d, %d}",
1223 dbg->num_qry_legacy_pkt[0], dbg->num_qry_legacy_pkt[1],
1224 dbg->num_qry_legacy_pkt[2], dbg->num_qry_legacy_pkt[3]);
1225 RT_PRINT(buf);
1226 }
1227 /*@======OFDM================================================*/
1228 RT_SPRINTF(buf, DBGM_CLI_BUF_SIZE, "\r\n * OFDM = {%d, %d, %d, %d, %d, %d, %d, %d}",
1229 dbg->num_qry_legacy_pkt[4], dbg->num_qry_legacy_pkt[5],
1230 dbg->num_qry_legacy_pkt[6], dbg->num_qry_legacy_pkt[7],
1231 dbg->num_qry_legacy_pkt[8], dbg->num_qry_legacy_pkt[9],
1232 dbg->num_qry_legacy_pkt[10], dbg->num_qry_legacy_pkt[11]);
1233 RT_PRINT(buf);
1234
1235 /*@======HT==================================================*/
1236 if (dbg->ht_pkt_not_zero) {
1237 for (i = 0; i < rate_num; i++) {
1238 ss_ofst = (i << 3);
1239
1240 RT_SPRINTF(buf, DBGM_CLI_BUF_SIZE, "\r\n * HT MCS[%d :%d ] = {%d, %d, %d, %d, %d, %d, %d, %d}",
1241 (ss_ofst), (ss_ofst + 7),
1242 dbg->num_qry_ht_pkt[ss_ofst + 0], dbg->num_qry_ht_pkt[ss_ofst + 1],
1243 dbg->num_qry_ht_pkt[ss_ofst + 2], dbg->num_qry_ht_pkt[ss_ofst + 3],
1244 dbg->num_qry_ht_pkt[ss_ofst + 4], dbg->num_qry_ht_pkt[ss_ofst + 5],
1245 dbg->num_qry_ht_pkt[ss_ofst + 6], dbg->num_qry_ht_pkt[ss_ofst + 7]);
1246 RT_PRINT(buf);
1247 }
1248
1249 if (dbg->low_bw_20_occur) {
1250 for (i = 0; i < rate_num; i++) {
1251 ss_ofst = (i << 3);
1252
1253 RT_SPRINTF(buf, DBGM_CLI_BUF_SIZE, "\r\n * [Low BW 20M] HT MCS[%d :%d ] = {%d, %d, %d, %d, %d, %d, %d, %d}",
1254 (ss_ofst), (ss_ofst + 7),
1255 dbg->num_qry_pkt_sc_20m[ss_ofst + 0], dbg->num_qry_pkt_sc_20m[ss_ofst + 1],
1256 dbg->num_qry_pkt_sc_20m[ss_ofst + 2], dbg->num_qry_pkt_sc_20m[ss_ofst + 3],
1257 dbg->num_qry_pkt_sc_20m[ss_ofst + 4], dbg->num_qry_pkt_sc_20m[ss_ofst + 5],
1258 dbg->num_qry_pkt_sc_20m[ss_ofst + 6], dbg->num_qry_pkt_sc_20m[ss_ofst + 7]);
1259 RT_PRINT(buf);
1260 }
1261 }
1262 }
1263
1264 #if (ODM_IC_11AC_SERIES_SUPPORT || defined(PHYDM_IC_JGR3_SERIES_SUPPORT))
1265 /*@======VHT=================================================*/
1266 if (dbg->vht_pkt_not_zero) {
1267 for (i = 0; i < rate_num; i++) {
1268 ss_ofst = 10 * i;
1269
1270 RT_SPRINTF(buf, DBGM_CLI_BUF_SIZE, "\r\n * VHT-%d ss MCS[0:9] = {%d, %d, %d, %d, %d, %d, %d, %d, %d, %d}",
1271 (i + 1),
1272 dbg->num_qry_vht_pkt[ss_ofst + 0], dbg->num_qry_vht_pkt[ss_ofst + 1],
1273 dbg->num_qry_vht_pkt[ss_ofst + 2], dbg->num_qry_vht_pkt[ss_ofst + 3],
1274 dbg->num_qry_vht_pkt[ss_ofst + 4], dbg->num_qry_vht_pkt[ss_ofst + 5],
1275 dbg->num_qry_vht_pkt[ss_ofst + 6], dbg->num_qry_vht_pkt[ss_ofst + 7],
1276 dbg->num_qry_vht_pkt[ss_ofst + 8], dbg->num_qry_vht_pkt[ss_ofst + 9]);
1277 RT_PRINT(buf);
1278 }
1279
1280 if (dbg->low_bw_20_occur) {
1281 for (i = 0; i < rate_num; i++) {
1282 ss_ofst = 10 * i;
1283
1284 RT_SPRINTF(buf, DBGM_CLI_BUF_SIZE, "\r\n *[Low BW 20M] VHT-%d ss MCS[0:9] = {%d, %d, %d, %d, %d, %d, %d, %d, %d, %d}",
1285 (i + 1),
1286 dbg->num_qry_pkt_sc_20m[ss_ofst + 0], dbg->num_qry_pkt_sc_20m[ss_ofst + 1],
1287 dbg->num_qry_pkt_sc_20m[ss_ofst + 2], dbg->num_qry_pkt_sc_20m[ss_ofst + 3],
1288 dbg->num_qry_pkt_sc_20m[ss_ofst + 4], dbg->num_qry_pkt_sc_20m[ss_ofst + 5],
1289 dbg->num_qry_pkt_sc_20m[ss_ofst + 6], dbg->num_qry_pkt_sc_20m[ss_ofst + 7],
1290 dbg->num_qry_pkt_sc_20m[ss_ofst + 8], dbg->num_qry_pkt_sc_20m[ss_ofst + 9]);
1291 RT_PRINT(buf);
1292 }
1293 }
1294
1295 if (dbg->low_bw_40_occur) {
1296 for (i = 0; i < rate_num; i++) {
1297 ss_ofst = 10 * i;
1298
1299 RT_SPRINTF(buf, DBGM_CLI_BUF_SIZE, "\r\n *[Low BW 40M] VHT-%d ss MCS[0:9] = {%d, %d, %d, %d, %d, %d, %d, %d, %d, %d}",
1300 (i + 1),
1301 dbg->num_qry_pkt_sc_40m[ss_ofst + 0], dbg->num_qry_pkt_sc_40m[ss_ofst + 1],
1302 dbg->num_qry_pkt_sc_40m[ss_ofst + 2], dbg->num_qry_pkt_sc_40m[ss_ofst + 3],
1303 dbg->num_qry_pkt_sc_40m[ss_ofst + 4], dbg->num_qry_pkt_sc_40m[ss_ofst + 5],
1304 dbg->num_qry_pkt_sc_40m[ss_ofst + 6], dbg->num_qry_pkt_sc_40m[ss_ofst + 7],
1305 dbg->num_qry_pkt_sc_40m[ss_ofst + 8], dbg->num_qry_pkt_sc_40m[ss_ofst + 9]);
1306 RT_PRINT(buf);
1307 }
1308 }
1309 }
1310 #endif
1311
1312 //1 Show phydm_avg_phystatus_val
1313 RT_SPRINTF(buf, DBGM_CLI_BUF_SIZE,
1314 "\r\n [Avg PHY Statistic] ==============>\n");
1315 RT_PRINT(buf);
1316
1317 /*===[Beacon]===*/
1318 switch (dm->num_rf_path) {
1319 #if (defined(PHYDM_COMPILE_ABOVE_4SS))
1320 case 4:
1321 RT_SPRINTF(buf, DBGM_CLI_BUF_SIZE,
1322 "* %-8s Cnt=((%.3d)) RSSI:{%.2d, %.2d, %.2d, %.2d}\n",
1323 "[Beacon]", dbg_s->rssi_beacon_cnt,
1324 dbg_avg->rssi_beacon_avg[0],
1325 dbg_avg->rssi_beacon_avg[1],
1326 dbg_avg->rssi_beacon_avg[2],
1327 dbg_avg->rssi_beacon_avg[3]);
1328 break;
1329 #endif
1330 #if (defined(PHYDM_COMPILE_ABOVE_3SS))
1331 case 3:
1332 RT_SPRINTF(buf, DBGM_CLI_BUF_SIZE,
1333 "* %-8s Cnt=((%.3d)) RSSI:{%.2d, %.2d, %.2d}\n",
1334 "[Beacon]", dbg_s->rssi_beacon_cnt,
1335 dbg_avg->rssi_beacon_avg[0],
1336 dbg_avg->rssi_beacon_avg[1],
1337 dbg_avg->rssi_beacon_avg[2]);
1338 break;
1339 #endif
1340 #if (defined(PHYDM_COMPILE_ABOVE_2SS))
1341 case 2:
1342 RT_SPRINTF(buf, DBGM_CLI_BUF_SIZE,
1343 "* %-8s Cnt=((%.3d)) RSSI:{%.2d, %.2d}\n",
1344 "[Beacon]", dbg_s->rssi_beacon_cnt,
1345 dbg_avg->rssi_beacon_avg[0],
1346 dbg_avg->rssi_beacon_avg[1]);
1347 break;
1348 #endif
1349 default:
1350 RT_SPRINTF(buf, DBGM_CLI_BUF_SIZE,
1351 "* %-8s Cnt=((%.3d)) RSSI:{%.2d}\n",
1352 "[Beacon]", dbg_s->rssi_beacon_cnt,
1353 dbg_avg->rssi_beacon_avg[0]);
1354 break;
1355 }
1356 RT_PRINT(buf);
1357
1358 /*===[CCK]===*/
1359 switch (dm->num_rf_path) {
1360 #ifdef PHYSTS_3RD_TYPE_SUPPORT
1361 #if (defined(PHYDM_COMPILE_ABOVE_4SS))
1362 case 4:
1363 RT_SPRINTF(buf, DBGM_CLI_BUF_SIZE,
1364 "* %-8s Cnt=((%.3d)) RSSI:{%.2d, %.2d, %.2d, %.2d}\n",
1365 "[CCK]", dbg_s->rssi_cck_cnt,
1366 dbg_avg->rssi_cck_avg,
1367 dbg_avg->rssi_cck_avg_abv_2ss[0],
1368 dbg_avg->rssi_cck_avg_abv_2ss[1],
1369 dbg_avg->rssi_cck_avg_abv_2ss[2]);
1370 break;
1371 #endif
1372 #if (defined(PHYDM_COMPILE_ABOVE_3SS))
1373 case 3:
1374 RT_SPRINTF(buf, DBGM_CLI_BUF_SIZE,
1375 "* %-8s Cnt=((%.3d)) RSSI:{%.2d, %.2d, %.2d}\n",
1376 "[CCK]", dbg_s->rssi_cck_cnt,
1377 dbg_avg->rssi_cck_avg,
1378 dbg_avg->rssi_cck_avg_abv_2ss[0],
1379 dbg_avg->rssi_cck_avg_abv_2ss[1]);
1380 break;
1381 #endif
1382 #if (defined(PHYDM_COMPILE_ABOVE_2SS))
1383 case 2:
1384 RT_SPRINTF(buf, DBGM_CLI_BUF_SIZE,
1385 "* %-8s Cnt=((%.3d)) RSSI:{%.2d, %.2d}\n",
1386 "[CCK]", dbg_s->rssi_cck_cnt,
1387 dbg_avg->rssi_cck_avg,
1388 dbg_avg->rssi_cck_avg_abv_2ss[0]);
1389 break;
1390 #endif
1391 #endif
1392 default:
1393 RT_SPRINTF(buf, DBGM_CLI_BUF_SIZE,
1394 "* %-8s Cnt=((%.3d)) RSSI:{%.2d}\n",
1395 "[CCK]", dbg_s->rssi_cck_cnt,
1396 dbg_avg->rssi_cck_avg);
1397 break;
1398 }
1399 RT_PRINT(buf);
1400
1401 for (i = 0; i <= 4; i++) {
1402 if (i > dm->num_rf_path)
1403 break;
1404
1405 odm_memory_set(dm, tmp_rssi_avg, 0, 4);
1406 odm_memory_set(dm, tmp_snr_avg, 0, 4);
1407 odm_memory_set(dm, tmp_evm_avg, 0, 4);
1408
1409 #if (defined(PHYDM_COMPILE_ABOVE_4SS))
1410 if (i == 4) {
1411 rate_type = "[4-SS]";
1412 tmp_cnt = dbg_s->rssi_4ss_cnt;
1413 odm_move_memory(dm, tmp_rssi_avg, dbg_avg->rssi_4ss_avg, dm->num_rf_path);
1414 odm_move_memory(dm, tmp_snr_avg, dbg_avg->snr_4ss_avg, dm->num_rf_path);
1415 odm_move_memory(dm, tmp_evm_avg, dbg_avg->evm_4ss_avg, 4);
1416 } else
1417 #endif
1418 #if (defined(PHYDM_COMPILE_ABOVE_3SS))
1419 if (i == 3) {
1420 rate_type = "[3-SS]";
1421 tmp_cnt = dbg_s->rssi_3ss_cnt;
1422 odm_move_memory(dm, tmp_rssi_avg, dbg_avg->rssi_3ss_avg, dm->num_rf_path);
1423 odm_move_memory(dm, tmp_snr_avg, dbg_avg->snr_3ss_avg, dm->num_rf_path);
1424 odm_move_memory(dm, tmp_evm_avg, dbg_avg->evm_3ss_avg, 3);
1425 } else
1426 #endif
1427 #if (defined(PHYDM_COMPILE_ABOVE_2SS))
1428 if (i == 2) {
1429 rate_type = "[2-SS]";
1430 tmp_cnt = dbg_s->rssi_2ss_cnt;
1431 odm_move_memory(dm, tmp_rssi_avg, dbg_avg->rssi_2ss_avg, dm->num_rf_path);
1432 odm_move_memory(dm, tmp_snr_avg, dbg_avg->snr_2ss_avg, dm->num_rf_path);
1433 odm_move_memory(dm, tmp_evm_avg, dbg_avg->evm_2ss_avg, 2);
1434 } else
1435 #endif
1436 if (i == 1) {
1437 rate_type = "[1-SS]";
1438 tmp_cnt = dbg_s->rssi_1ss_cnt;
1439 odm_move_memory(dm, tmp_rssi_avg, dbg_avg->rssi_1ss_avg, dm->num_rf_path);
1440 odm_move_memory(dm, tmp_snr_avg, dbg_avg->snr_1ss_avg, dm->num_rf_path);
1441 odm_move_memory(dm, tmp_evm_avg, &dbg_avg->evm_1ss_avg, 1);
1442 } else {
1443 rate_type = "[L-OFDM]";
1444 tmp_cnt = dbg_s->rssi_ofdm_cnt;
1445 odm_move_memory(dm, tmp_rssi_avg, dbg_avg->rssi_ofdm_avg, dm->num_rf_path);
1446 odm_move_memory(dm, tmp_snr_avg, dbg_avg->snr_ofdm_avg, dm->num_rf_path);
1447 odm_move_memory(dm, tmp_evm_avg, &dbg_avg->evm_ofdm_avg, 1);
1448 }
1449
1450 RT_SPRINTF(buf, DBGM_CLI_BUF_SIZE,
1451 "* %-8s Cnt=((%.3d)) RSSI:{%.2d, %.2d, %.2d, %.2d} SNR:{%.2d, %.2d, %.2d, %.2d} EVM:{-%.2d, -%.2d, -%.2d, -%.2d}\n",
1452 rate_type, tmp_cnt,
1453 tmp_rssi_avg[0], tmp_rssi_avg[1], tmp_rssi_avg[2], tmp_rssi_avg[3],
1454 tmp_snr_avg[0], tmp_snr_avg[1], tmp_snr_avg[2], tmp_snr_avg[3],
1455 tmp_evm_avg[0], tmp_evm_avg[1], tmp_evm_avg[2], tmp_evm_avg[3]);
1456 RT_PRINT(buf);
1457 }
1458 /*@----------------------------------------------------------*/
1459
1460 /*Print TX rate*/
1461 for (macid = 0; macid < ODM_ASSOCIATE_ENTRY_NUM; macid++) {
1462 entry = dm->phydm_sta_info[macid];
1463
1464 if (is_sta_active(entry)) {
1465 phydm_print_rate_2_buff(dm, entry->ra_info.curr_tx_rate, dbg_buf, PHYDM_SNPRINT_SIZE);
1466 RT_SPRINTF(buf, DBGM_CLI_BUF_SIZE, "\r\n TxRate[%d]=%s (0x%x)", macid, dbg_buf, entry->ra_info.curr_tx_rate);
1467 RT_PRINT(buf);
1468 target_macid = macid;
1469 break;
1470 }
1471 }
1472
1473 RT_SPRINTF(buf, DBGM_CLI_BUF_SIZE,
1474 "\r\n TP {Tx, Rx, Total} = {%d, %d, %d}Mbps, Traffic_Load=(%d))",
1475 dm->tx_tp, dm->rx_tp, dm->total_tp, dm->traffic_load);
1476 RT_PRINT(buf);
1477
1478 RT_SPRINTF(buf, DBGM_CLI_BUF_SIZE, "\r\n CFO_avg=((%d kHz)), CFO_traking = ((%s%d))",
1479 cfo_t->CFO_ave_pre,
1480 ((cfo_t->crystal_cap > cfo_t->def_x_cap) ? "+" : "-"),
1481 DIFF_2(cfo_t->crystal_cap, cfo_t->def_x_cap));
1482 RT_PRINT(buf);
1483
1484 /* @Condition number */
1485 #if (RTL8822B_SUPPORT)
1486 if (dm->support_ic_type == ODM_RTL8822B) {
1487 RT_SPRINTF(buf, DBGM_CLI_BUF_SIZE, "\r\n Condi_Num=((%d.%.4d))",
1488 dm->phy_dbg_info.condi_num >> 4,
1489 phydm_show_fraction_num(dm->phy_dbg_info.condi_num & 0xf, 4));
1490 RT_PRINT(buf);
1491 }
1492 #endif
1493
1494 #if (ODM_PHY_STATUS_NEW_TYPE_SUPPORT || defined(PHYSTS_3RD_TYPE_SUPPORT))
1495 /*STBC or LDPC pkt*/
1496 if (dm->support_ic_type & (PHYSTS_2ND_TYPE_IC |
1497 PHYSTS_3RD_TYPE_IC))
1498 RT_SPRINTF(buf, DBGM_CLI_BUF_SIZE, "\r\n Coding: LDPC=((%s)), STBC=((%s))",
1499 (dm->phy_dbg_info.is_ldpc_pkt) ? "Y" : "N",
1500 (dm->phy_dbg_info.is_stbc_pkt) ? "Y" : "N");
1501 RT_PRINT(buf);
1502 #endif
1503
1504 } else {
1505 RT_SPRINTF(buf, DBGM_CLI_BUF_SIZE, "\r\n No Link !!!");
1506 RT_PRINT(buf);
1507 }
1508
1509 RT_SPRINTF(buf, DBGM_CLI_BUF_SIZE,
1510 "\r\n [Tx cnt] {CCK_TxEN, CCK_TxON, OFDM_TxEN, OFDM_TxON} = {%d, %d, %d, %d}",
1511 fa_t->cnt_cck_txen, fa_t->cnt_cck_txon, fa_t->cnt_ofdm_txen,
1512 fa_t->cnt_ofdm_txon);
1513 RT_PRINT(buf);
1514
1515 RT_SPRINTF(buf, DBGM_CLI_BUF_SIZE, "\r\n [CCA Cnt] {CCK, OFDM, Total} = {%d, %d, %d}",
1516 fa_t->cnt_cck_cca, fa_t->cnt_ofdm_cca, fa_t->cnt_cca_all);
1517 RT_PRINT(buf);
1518
1519 RT_SPRINTF(buf, DBGM_CLI_BUF_SIZE, "\r\n [FA Cnt] {CCK, OFDM, Total} = {%d, %d, %d}",
1520 fa_t->cnt_cck_fail, fa_t->cnt_ofdm_fail, fa_t->cnt_all);
1521 RT_PRINT(buf);
1522
1523 RT_SPRINTF(buf, DBGM_CLI_BUF_SIZE,
1524 "\r\n [FA duration(us)] {exp, ifs_clm, fahm} = {%d, %d, %d}",
1525 fa_t->time_fa_exp, fa_t->time_fa_ifs_clm,
1526 fa_t->time_fa_fahm);
1527 RT_PRINT(buf);
1528
1529 RT_SPRINTF(buf, DBGM_CLI_BUF_SIZE,
1530 "\r\n [OFDM FA] Parity=%d, Rate=%d, Fast_Fsync=%d, SBD=%d",
1531 fa_t->cnt_parity_fail, fa_t->cnt_rate_illegal,
1532 fa_t->cnt_fast_fsync, fa_t->cnt_sb_search_fail);
1533 RT_PRINT(buf);
1534
1535 RT_SPRINTF(buf, DBGM_CLI_BUF_SIZE, "\r\n [HT FA] CRC8=%d, MCS=%d",
1536 fa_t->cnt_crc8_fail, fa_t->cnt_mcs_fail);
1537 RT_PRINT(buf);
1538
1539 #if (ODM_IC_11AC_SERIES_SUPPORT || defined(PHYDM_IC_JGR3_SERIES_SUPPORT))
1540 if (dm->support_ic_type & (ODM_IC_11AC_SERIES | ODM_IC_JGR3_SERIES)) {
1541 RT_SPRINTF(buf, DBGM_CLI_BUF_SIZE,
1542 "\r\n [VHT FA] SIGA_CRC8=%d, SIGB_CRC8=%d, MCS=%d",
1543 fa_t->cnt_crc8_fail_vhta, fa_t->cnt_crc8_fail_vhtb,
1544 fa_t->cnt_mcs_fail_vht);
1545 RT_PRINT(buf);
1546 }
1547 #endif
1548
1549 RT_SPRINTF(buf, DBGM_CLI_BUF_SIZE,
1550 "\r\n [CRC32 OK Cnt] {CCK, OFDM, HT, VHT, Total} = {%d, %d, %d, %d, %d}",
1551 fa_t->cnt_cck_crc32_ok, fa_t->cnt_ofdm_crc32_ok,
1552 fa_t->cnt_ht_crc32_ok, fa_t->cnt_vht_crc32_ok,
1553 fa_t->cnt_crc32_ok_all);
1554 RT_PRINT(buf);
1555
1556 RT_SPRINTF(buf, DBGM_CLI_BUF_SIZE,
1557 "\r\n [CRC32 Err Cnt] {CCK, OFDM, HT, VHT, Total} = {%d, %d, %d, %d, %d}",
1558 fa_t->cnt_cck_crc32_error, fa_t->cnt_ofdm_crc32_error,
1559 fa_t->cnt_ht_crc32_error, fa_t->cnt_vht_crc32_error,
1560 fa_t->cnt_crc32_error_all);
1561 RT_PRINT(buf);
1562
1563 if (fa_t->ofdm2_rate_idx) {
1564 phydm_print_rate_2_buff(dm, fa_t->ofdm2_rate_idx,
1565 dbg_buf, PHYDM_SNPRINT_SIZE);
1566 RT_SPRINTF(buf, DBGM_CLI_BUF_SIZE,
1567 "\r\n [OFDM:%s CRC32 Cnt] {error, ok}= {%d, %d} (%d percent)",
1568 dbg_buf, fa_t->cnt_ofdm2_crc32_error,
1569 fa_t->cnt_ofdm2_crc32_ok, fa_t->ofdm2_pcr);
1570 RT_PRINT(buf);
1571 }
1572
1573 if (fa_t->ht2_rate_idx) {
1574 phydm_print_rate_2_buff(dm, fa_t->ht2_rate_idx, dbg_buf,
1575 PHYDM_SNPRINT_SIZE);
1576 RT_SPRINTF(buf, DBGM_CLI_BUF_SIZE,
1577 "\r\n [HT :%s CRC32 Cnt] {error, ok}= {%d, %d} (%d percent)",
1578 dbg_buf, fa_t->cnt_ht2_crc32_error,
1579 fa_t->cnt_ht2_crc32_ok, fa_t->ht2_pcr);
1580 RT_PRINT(buf);
1581 }
1582
1583 #if (ODM_IC_11AC_SERIES_SUPPORT || defined(PHYDM_IC_JGR3_SERIES_SUPPORT))
1584 if (dm->support_ic_type & (ODM_IC_11AC_SERIES | ODM_IC_JGR3_SERIES)) {
1585 if (fa_t->vht2_rate_idx) {
1586 phydm_print_rate_2_buff(dm, fa_t->vht2_rate_idx,
1587 dbg_buf, PHYDM_SNPRINT_SIZE);
1588 RT_SPRINTF(buf, DBGM_CLI_BUF_SIZE,
1589 "\r\n [VHT :%s CRC32 Cnt] {error, ok}= {%d, %d} (%d percent)",
1590 dbg_buf, fa_t->cnt_vht2_crc32_error,
1591 fa_t->cnt_vht2_crc32_ok, fa_t->vht2_pcr);
1592 RT_PRINT(buf);
1593 }
1594 }
1595 #endif
1596
1597 if (dm->support_ic_type & (ODM_IC_11N_SERIES | ODM_IC_11AC_SERIES))
1598 RT_SPRINTF(buf, DBGM_CLI_BUF_SIZE,
1599 "\r\n is_linked = %d, Num_client = %d, rssi_min = %d, IGI = 0x%x, bNoisy=%d\n",
1600 dm->is_linked, dm->number_linked_client, dm->rssi_min,
1601 dm->dm_dig_table.cur_ig_value, dm->noisy_decision);
1602 else
1603 RT_SPRINTF(buf, DBGM_CLI_BUF_SIZE,
1604 "\r\n is_linked = %d, Num_client = %d, rssi_min = %d, IGI = 0x%x\n",
1605 dm->is_linked, dm->number_linked_client, dm->rssi_min,
1606 dm->dm_dig_table.cur_ig_value);
1607
1608 RT_PRINT(buf);
1609
1610 phydm_dm_summary_cli_win(dm, buf, target_macid);
1611 }
1612
1613 #ifdef CONFIG_PHYDM_DEBUG_FUNCTION
phydm_sbd_check(struct dm_struct * dm)1614 void phydm_sbd_check(
1615 struct dm_struct *dm)
1616 {
1617 static u32 pkt_cnt;
1618 static boolean sbd_state;
1619 u32 sym_count, count, value32;
1620
1621 if (sbd_state == 0) {
1622 pkt_cnt++;
1623 /*read SBD conter once every 5 packets*/
1624 if (pkt_cnt % 5 == 0) {
1625 odm_set_timer(dm, &dm->sbdcnt_timer, 0); /*@ms*/
1626 sbd_state = 1;
1627 }
1628 } else { /*read counter*/
1629 value32 = odm_get_bb_reg(dm, R_0xf98, MASKDWORD);
1630 sym_count = (value32 & 0x7C000000) >> 26;
1631 count = (value32 & 0x3F00000) >> 20;
1632 pr_debug("#SBD# sym_count %d count %d\n", sym_count, count);
1633 sbd_state = 0;
1634 }
1635 }
1636 #endif
1637
phydm_sbd_callback(struct phydm_timer_list * timer)1638 void phydm_sbd_callback(
1639 struct phydm_timer_list *timer)
1640 {
1641 #ifdef CONFIG_PHYDM_DEBUG_FUNCTION
1642 void *adapter = timer->Adapter;
1643 HAL_DATA_TYPE *hal_data = GET_HAL_DATA((PADAPTER)adapter);
1644 struct dm_struct *dm = &hal_data->DM_OutSrc;
1645
1646 #if USE_WORKITEM
1647 odm_schedule_work_item(&dm->sbdcnt_workitem);
1648 #else
1649 phydm_sbd_check(dm);
1650 #endif
1651 #endif
1652 }
1653
phydm_sbd_workitem_callback(void * context)1654 void phydm_sbd_workitem_callback(
1655 void *context)
1656 {
1657 #ifdef CONFIG_PHYDM_DEBUG_FUNCTION
1658 void *adapter = (void *)context;
1659 HAL_DATA_TYPE *hal_data = GET_HAL_DATA((PADAPTER)adapter);
1660 struct dm_struct *dm = &hal_data->DM_OutSrc;
1661
1662 phydm_sbd_check(dm);
1663 #endif
1664 }
1665 #endif
1666
phydm_reset_rx_rate_distribution(struct dm_struct * dm)1667 void phydm_reset_rx_rate_distribution(struct dm_struct *dm)
1668 {
1669 struct odm_phy_dbg_info *dbg = &dm->phy_dbg_info;
1670
1671 odm_memory_set(dm, &dbg->num_qry_legacy_pkt[0], 0,
1672 (LEGACY_RATE_NUM * 2));
1673 odm_memory_set(dm, &dbg->num_qry_ht_pkt[0], 0,
1674 (HT_RATE_NUM * 2));
1675 odm_memory_set(dm, &dbg->num_qry_pkt_sc_20m[0], 0,
1676 (LOW_BW_RATE_NUM * 2));
1677
1678 dbg->ht_pkt_not_zero = false;
1679 dbg->low_bw_20_occur = false;
1680
1681 #if (ODM_IC_11AC_SERIES_SUPPORT || defined(PHYDM_IC_JGR3_SERIES_SUPPORT))
1682 odm_memory_set(dm, &dbg->num_qry_vht_pkt[0], 0, VHT_RATE_NUM * 2);
1683 odm_memory_set(dm, &dbg->num_qry_pkt_sc_40m[0], 0, LOW_BW_RATE_NUM * 2);
1684 #if (ODM_PHY_STATUS_NEW_TYPE_SUPPORT == 1) || (defined(PHYSTS_3RD_TYPE_SUPPORT))
1685 odm_memory_set(dm, &dbg->num_mu_vht_pkt[0], 0, VHT_RATE_NUM * 2);
1686 #endif
1687 dbg->vht_pkt_not_zero = false;
1688 dbg->low_bw_40_occur = false;
1689 #endif
1690 }
1691
phydm_rx_rate_distribution(void * dm_void)1692 void phydm_rx_rate_distribution(void *dm_void)
1693 {
1694 struct dm_struct *dm = (struct dm_struct *)dm_void;
1695 struct odm_phy_dbg_info *dbg = &dm->phy_dbg_info;
1696 u8 i = 0;
1697 u8 rate_num = dm->num_rf_path, ss_ofst = 0;
1698
1699 PHYDM_DBG(dm, DBG_CMN, "[RxRate Cnt] =============>\n");
1700
1701 /*@======CCK=========================================================*/
1702 if (*dm->channel <= 14) {
1703 PHYDM_DBG(dm, DBG_CMN, "* CCK = {%d, %d, %d, %d}\n",
1704 dbg->num_qry_legacy_pkt[0],
1705 dbg->num_qry_legacy_pkt[1],
1706 dbg->num_qry_legacy_pkt[2],
1707 dbg->num_qry_legacy_pkt[3]);
1708 }
1709 /*@======OFDM========================================================*/
1710 PHYDM_DBG(dm, DBG_CMN, "* OFDM = {%d, %d, %d, %d, %d, %d, %d, %d}\n",
1711 dbg->num_qry_legacy_pkt[4], dbg->num_qry_legacy_pkt[5],
1712 dbg->num_qry_legacy_pkt[6], dbg->num_qry_legacy_pkt[7],
1713 dbg->num_qry_legacy_pkt[8], dbg->num_qry_legacy_pkt[9],
1714 dbg->num_qry_legacy_pkt[10], dbg->num_qry_legacy_pkt[11]);
1715
1716 /*@======HT==========================================================*/
1717 if (dbg->ht_pkt_not_zero) {
1718 for (i = 0; i < rate_num; i++) {
1719 ss_ofst = (i << 3);
1720
1721 PHYDM_DBG(dm, DBG_CMN,
1722 "* HT MCS[%d :%d ] = {%d, %d, %d, %d, %d, %d, %d, %d}\n",
1723 (ss_ofst), (ss_ofst + 7),
1724 dbg->num_qry_ht_pkt[ss_ofst + 0],
1725 dbg->num_qry_ht_pkt[ss_ofst + 1],
1726 dbg->num_qry_ht_pkt[ss_ofst + 2],
1727 dbg->num_qry_ht_pkt[ss_ofst + 3],
1728 dbg->num_qry_ht_pkt[ss_ofst + 4],
1729 dbg->num_qry_ht_pkt[ss_ofst + 5],
1730 dbg->num_qry_ht_pkt[ss_ofst + 6],
1731 dbg->num_qry_ht_pkt[ss_ofst + 7]);
1732 }
1733
1734 if (dbg->low_bw_20_occur) {
1735 for (i = 0; i < rate_num; i++) {
1736 ss_ofst = (i << 3);
1737
1738 PHYDM_DBG(dm, DBG_CMN,
1739 "* [Low BW 20M] HT MCS[%d :%d ] = {%d, %d, %d, %d, %d, %d, %d, %d}\n",
1740 (ss_ofst), (ss_ofst + 7),
1741 dbg->num_qry_pkt_sc_20m[ss_ofst + 0],
1742 dbg->num_qry_pkt_sc_20m[ss_ofst + 1],
1743 dbg->num_qry_pkt_sc_20m[ss_ofst + 2],
1744 dbg->num_qry_pkt_sc_20m[ss_ofst + 3],
1745 dbg->num_qry_pkt_sc_20m[ss_ofst + 4],
1746 dbg->num_qry_pkt_sc_20m[ss_ofst + 5],
1747 dbg->num_qry_pkt_sc_20m[ss_ofst + 6],
1748 dbg->num_qry_pkt_sc_20m[ss_ofst + 7]);
1749 }
1750 }
1751 }
1752
1753 #if (ODM_IC_11AC_SERIES_SUPPORT || defined(PHYDM_IC_JGR3_SERIES_SUPPORT))
1754 /*@======VHT==========================================================*/
1755 if (dbg->vht_pkt_not_zero) {
1756 for (i = 0; i < rate_num; i++) {
1757 ss_ofst = 10 * i;
1758
1759 PHYDM_DBG(dm, DBG_CMN,
1760 "* VHT-%d ss MCS[0:9] = {%d, %d, %d, %d, %d, %d, %d, %d, %d, %d}\n",
1761 (i + 1),
1762 dbg->num_qry_vht_pkt[ss_ofst + 0],
1763 dbg->num_qry_vht_pkt[ss_ofst + 1],
1764 dbg->num_qry_vht_pkt[ss_ofst + 2],
1765 dbg->num_qry_vht_pkt[ss_ofst + 3],
1766 dbg->num_qry_vht_pkt[ss_ofst + 4],
1767 dbg->num_qry_vht_pkt[ss_ofst + 5],
1768 dbg->num_qry_vht_pkt[ss_ofst + 6],
1769 dbg->num_qry_vht_pkt[ss_ofst + 7],
1770 dbg->num_qry_vht_pkt[ss_ofst + 8],
1771 dbg->num_qry_vht_pkt[ss_ofst + 9]);
1772 }
1773
1774 if (dbg->low_bw_20_occur) {
1775 for (i = 0; i < rate_num; i++) {
1776 ss_ofst = 10 * i;
1777
1778 PHYDM_DBG(dm, DBG_CMN,
1779 "*[Low BW 20M] VHT-%d ss MCS[0:9] = {%d, %d, %d, %d, %d, %d, %d, %d, %d, %d}\n",
1780 (i + 1),
1781 dbg->num_qry_pkt_sc_20m[ss_ofst + 0],
1782 dbg->num_qry_pkt_sc_20m[ss_ofst + 1],
1783 dbg->num_qry_pkt_sc_20m[ss_ofst + 2],
1784 dbg->num_qry_pkt_sc_20m[ss_ofst + 3],
1785 dbg->num_qry_pkt_sc_20m[ss_ofst + 4],
1786 dbg->num_qry_pkt_sc_20m[ss_ofst + 5],
1787 dbg->num_qry_pkt_sc_20m[ss_ofst + 6],
1788 dbg->num_qry_pkt_sc_20m[ss_ofst + 7],
1789 dbg->num_qry_pkt_sc_20m[ss_ofst + 8],
1790 dbg->num_qry_pkt_sc_20m[ss_ofst + 9]);
1791 }
1792 }
1793
1794 if (dbg->low_bw_40_occur) {
1795 for (i = 0; i < rate_num; i++) {
1796 ss_ofst = 10 * i;
1797
1798 PHYDM_DBG(dm, DBG_CMN,
1799 "*[Low BW 40M] VHT-%d ss MCS[0:9] = {%d, %d, %d, %d, %d, %d, %d, %d, %d, %d}\n",
1800 (i + 1),
1801 dbg->num_qry_pkt_sc_40m[ss_ofst + 0],
1802 dbg->num_qry_pkt_sc_40m[ss_ofst + 1],
1803 dbg->num_qry_pkt_sc_40m[ss_ofst + 2],
1804 dbg->num_qry_pkt_sc_40m[ss_ofst + 3],
1805 dbg->num_qry_pkt_sc_40m[ss_ofst + 4],
1806 dbg->num_qry_pkt_sc_40m[ss_ofst + 5],
1807 dbg->num_qry_pkt_sc_40m[ss_ofst + 6],
1808 dbg->num_qry_pkt_sc_40m[ss_ofst + 7],
1809 dbg->num_qry_pkt_sc_40m[ss_ofst + 8],
1810 dbg->num_qry_pkt_sc_40m[ss_ofst + 9]);
1811 }
1812 }
1813 }
1814 #endif
1815 }
1816
phydm_rx_utility(void * dm_void,u16 avg_phy_rate,u8 rx_max_ss,enum channel_width bw)1817 u16 phydm_rx_utility(void *dm_void, u16 avg_phy_rate, u8 rx_max_ss,
1818 enum channel_width bw)
1819 {
1820 struct dm_struct *dm = (struct dm_struct *)dm_void;
1821 struct odm_phy_dbg_info *dbg = &dm->phy_dbg_info;
1822 u16 utility_primitive = 0, utility = 0;
1823
1824 if (dbg->ht_pkt_not_zero) {
1825 /*@ MCS7 20M: tp = 65, 1000/65 = 15.38, 65*15.5 = 1007*/
1826 utility_primitive = avg_phy_rate * 15 + (avg_phy_rate >> 1);
1827 }
1828 #if (ODM_IC_11AC_SERIES_SUPPORT || defined(PHYDM_IC_JGR3_SERIES_SUPPORT))
1829 else if (dbg->vht_pkt_not_zero) {
1830 /*@ VHT 1SS MCS9(fake) 20M: tp = 90, 1000/90 = 11.11, 65*11.125 = 1001*/
1831 utility_primitive = avg_phy_rate * 11 + (avg_phy_rate >> 3);
1832 }
1833 #endif
1834 else {
1835 /*@ 54M, 1000/54 = 18.5, 54*18.5 = 999*/
1836 utility_primitive = avg_phy_rate * 18 + (avg_phy_rate >> 1);
1837 }
1838
1839 utility = (utility_primitive / rx_max_ss) >> bw;
1840
1841 if (utility > 1000)
1842 utility = 1000;
1843
1844 return utility;
1845 }
1846
phydm_rx_avg_phy_rate(void * dm_void)1847 u16 phydm_rx_avg_phy_rate(void *dm_void)
1848 {
1849 struct dm_struct *dm = (struct dm_struct *)dm_void;
1850 struct odm_phy_dbg_info *dbg = &dm->phy_dbg_info;
1851 u8 i = 0, rate_num = 0, rate_base = 0;
1852 u16 rate = 0, avg_phy_rate = 0;
1853 u32 pkt_cnt = 0, phy_rate_sum = 0;
1854
1855 if (dbg->ht_pkt_not_zero) {
1856 rate_num = HT_RATE_NUM;
1857 rate_base = ODM_RATEMCS0;
1858 for (i = 0; i < rate_num; i++) {
1859 rate = phy_rate_table[i + rate_base] << *dm->band_width;
1860 phy_rate_sum += dbg->num_qry_ht_pkt[i] * rate;
1861 pkt_cnt += dbg->num_qry_ht_pkt[i];
1862 }
1863 }
1864 #if (ODM_IC_11AC_SERIES_SUPPORT || defined(PHYDM_IC_JGR3_SERIES_SUPPORT))
1865 else if (dbg->vht_pkt_not_zero) {
1866 rate_num = VHT_RATE_NUM;
1867 rate_base = ODM_RATEVHTSS1MCS0;
1868 for (i = 0; i < rate_num; i++) {
1869 rate = phy_rate_table[i + rate_base] << *dm->band_width;
1870 phy_rate_sum += dbg->num_qry_vht_pkt[i] * rate;
1871 pkt_cnt += dbg->num_qry_vht_pkt[i];
1872 }
1873 }
1874 #endif
1875 else {
1876 for (i = ODM_RATE1M; i <= ODM_RATE54M; i++) {
1877 /*SKIP 1M & 6M for beacon case*/
1878 if (*dm->channel < 36 && i == ODM_RATE1M)
1879 continue;
1880
1881 if (*dm->channel >= 36 && i == ODM_RATE6M)
1882 continue;
1883
1884 rate = phy_rate_table[i];
1885 phy_rate_sum += dbg->num_qry_legacy_pkt[i] * rate;
1886 pkt_cnt += dbg->num_qry_legacy_pkt[i];
1887 }
1888 }
1889
1890 #if (ODM_IC_11AC_SERIES_SUPPORT || defined(PHYDM_IC_JGR3_SERIES_SUPPORT))
1891 if (dbg->low_bw_40_occur) {
1892 for (i = 0; i < LOW_BW_RATE_NUM; i++) {
1893 rate = phy_rate_table[i + rate_base]
1894 << CHANNEL_WIDTH_40;
1895 phy_rate_sum += dbg->num_qry_pkt_sc_40m[i] * rate;
1896 pkt_cnt += dbg->num_qry_pkt_sc_40m[i];
1897 }
1898 }
1899 #endif
1900
1901 if (dbg->low_bw_20_occur) {
1902 for (i = 0; i < LOW_BW_RATE_NUM; i++) {
1903 rate = phy_rate_table[i + rate_base];
1904 phy_rate_sum += dbg->num_qry_pkt_sc_20m[i] * rate;
1905 pkt_cnt += dbg->num_qry_pkt_sc_20m[i];
1906 }
1907 }
1908
1909 avg_phy_rate = (pkt_cnt == 0) ? 0 : (u16)(phy_rate_sum / pkt_cnt);
1910
1911 return avg_phy_rate;
1912 }
1913
phydm_print_hist_2_buf(void * dm_void,u16 * val,u16 len,char * buf,u16 buf_size)1914 void phydm_print_hist_2_buf(void *dm_void, u16 *val, u16 len, char *buf,
1915 u16 buf_size)
1916 {
1917 struct dm_struct *dm = (struct dm_struct *)dm_void;
1918
1919 if (len == PHY_HIST_SIZE) {
1920 PHYDM_SNPRINTF(buf, buf_size,
1921 "[%.2d, %.2d, %.2d, %.2d, %.2d, %.2d, %.2d, %.2d, %.2d, %.2d, %.2d, %.2d]",
1922 val[0], val[1], val[2], val[3], val[4],
1923 val[5], val[6], val[7], val[8], val[9],
1924 val[10], val[11]);
1925 } else if (len == (PHY_HIST_SIZE - 1)) {
1926 PHYDM_SNPRINTF(buf, buf_size,
1927 "[%.2d, %.2d, %.2d, %.2d, %.2d, %.2d, %.2d, %.2d, %.2d, %.2d, %.2d]",
1928 val[0], val[1], val[2], val[3], val[4],
1929 val[5], val[6], val[7], val[8], val[9],
1930 val[10]);
1931 }
1932 }
1933
phydm_nss_hitogram(void * dm_void,enum PDM_RATE_TYPE rate_type)1934 void phydm_nss_hitogram(void *dm_void, enum PDM_RATE_TYPE rate_type)
1935 {
1936 struct dm_struct *dm = (struct dm_struct *)dm_void;
1937 struct odm_phy_dbg_info *dbg_i = &dm->phy_dbg_info;
1938 struct phydm_phystatus_statistic *dbg_s = &dbg_i->physts_statistic_info;
1939 char buf[PHYDM_SNPRINT_SIZE] = {0};
1940 u16 buf_size = PHYDM_SNPRINT_SIZE;
1941 u16 h_size = PHY_HIST_SIZE;
1942 u16 *evm_hist = &dbg_s->evm_1ss_hist[0];
1943 u16 *snr_hist = &dbg_s->snr_1ss_hist[0];
1944 u8 i = 0;
1945 u8 ss = phydm_rate_type_2_num_ss(dm, rate_type);
1946
1947 for (i = 0; i < ss; i++) {
1948 if (rate_type == PDM_1SS) {
1949 evm_hist = &dbg_s->evm_1ss_hist[0];
1950 snr_hist = &dbg_s->snr_1ss_hist[0];
1951 } else if (rate_type == PDM_2SS) {
1952 #if (defined(PHYDM_COMPILE_ABOVE_2SS))
1953 evm_hist = &dbg_s->evm_2ss_hist[i][0];
1954 snr_hist = &dbg_s->snr_2ss_hist[i][0];
1955 #endif
1956 } else if (rate_type == PDM_3SS) {
1957 #if (defined(PHYDM_COMPILE_ABOVE_3SS))
1958 evm_hist = &dbg_s->evm_3ss_hist[i][0];
1959 snr_hist = &dbg_s->snr_3ss_hist[i][0];
1960 #endif
1961 } else if (rate_type == PDM_4SS) {
1962 #if (defined(PHYDM_COMPILE_ABOVE_4SS))
1963 evm_hist = &dbg_s->evm_4ss_hist[i][0];
1964 snr_hist = &dbg_s->snr_4ss_hist[i][0];
1965 #endif
1966 }
1967
1968 phydm_print_hist_2_buf(dm, evm_hist, h_size, buf, buf_size);
1969 PHYDM_DBG(dm, DBG_CMN, "[%d-SS][EVM][%d]=%s\n", ss, i, buf);
1970 phydm_print_hist_2_buf(dm, snr_hist, h_size, buf, buf_size);
1971 PHYDM_DBG(dm, DBG_CMN, "[%d-SS][SNR][%d]=%s\n", ss, i, buf);
1972 }
1973 }
1974
1975 #ifdef PHYDM_PHYSTAUS_AUTO_SWITCH
phydm_show_cn_hitogram(void * dm_void)1976 void phydm_show_cn_hitogram(void *dm_void)
1977 {
1978 struct dm_struct *dm = (struct dm_struct *)dm_void;
1979 struct odm_phy_dbg_info *dbg_i = &dm->phy_dbg_info;
1980 struct phydm_phystatus_statistic *dbg_s = &dbg_i->physts_statistic_info;
1981 u16 th_tmp[PHY_HIST_TH_SIZE];
1982 char buf[PHYDM_SNPRINT_SIZE] = {0};
1983 u8 i = 0;
1984 u16 *cn_hist = NULL;
1985 u32 cn_avg = 0;
1986
1987 if (!dm->pkt_proc_struct.physts_auto_swch_en)
1988 return;
1989
1990 if (dm->num_rf_path == 1)
1991 return;
1992
1993 PHYDM_DBG(dm, DBG_CMN, "[Condition number Histogram] ========>\n");
1994 /*@===[Threshold]=============================================================*/
1995 for (i = 0; i < PHY_HIST_TH_SIZE; i++)
1996 th_tmp[i] = dbg_i->cn_hist_th[i] >> 1;
1997
1998 phydm_print_hist_2_buf(dm, th_tmp,
1999 PHY_HIST_TH_SIZE, buf, PHYDM_SNPRINT_SIZE);
2000 PHYDM_DBG(dm, DBG_CMN, "%-24s=%s\n", "[CN_TH]", buf);
2001
2002 /*@===[Histogram]=============================================================*/
2003
2004 for (i = 1; i <= dm->num_rf_path; i++) {
2005 if (dbg_s->p4_cnt[i] == 0)
2006 continue;
2007
2008 cn_avg = PHYDM_DIV((dbg_s->cn_sum[i] +
2009 (dbg_s->p4_cnt[i] >> 1)) << 2,
2010 dbg_s->p4_cnt[i]); /*u(8,1)<<2 -> u(10,3)*/
2011
2012 cn_hist = &dbg_s->cn_hist[i][0];
2013 phydm_print_hist_2_buf(dm, cn_hist,
2014 PHY_HIST_SIZE, buf, PHYDM_SNPRINT_SIZE);
2015 PHYDM_DBG(dm, DBG_CMN, "[%d-SS]%s=(avg:%d.%4d)%s\n",
2016 i + 1, "[CN]", cn_avg >> 3,
2017 phydm_show_fraction_num(cn_avg & 0x7, 3), buf);
2018 }
2019 }
2020 #endif
2021
phydm_show_phy_hitogram(void * dm_void)2022 void phydm_show_phy_hitogram(void *dm_void)
2023 {
2024 struct dm_struct *dm = (struct dm_struct *)dm_void;
2025 struct odm_phy_dbg_info *dbg_i = &dm->phy_dbg_info;
2026 struct phydm_phystatus_statistic *dbg_s = &dbg_i->physts_statistic_info;
2027 char buf[PHYDM_SNPRINT_SIZE] = {0};
2028 u16 buf_size = PHYDM_SNPRINT_SIZE;
2029 u16 th_size = PHY_HIST_SIZE - 1;
2030 u8 i = 0;
2031
2032 PHYDM_DBG(dm, DBG_CMN, "[PHY Histogram] ==============>\n");
2033 /*@===[Threshold]=============================================================*/
2034 phydm_print_hist_2_buf(dm, dbg_i->evm_hist_th, th_size, buf, buf_size);
2035 PHYDM_DBG(dm, DBG_CMN, "%-16s=%s\n", "[EVM_TH]", buf);
2036
2037 phydm_print_hist_2_buf(dm, dbg_i->snr_hist_th, th_size, buf, buf_size);
2038 PHYDM_DBG(dm, DBG_CMN, "%-16s=%s\n", "[SNR_TH]", buf);
2039 /*@===[OFDM]==================================================================*/
2040 if (dbg_s->rssi_ofdm_cnt) {
2041 phydm_print_hist_2_buf(dm, dbg_s->evm_ofdm_hist, PHY_HIST_SIZE,
2042 buf, buf_size);
2043 PHYDM_DBG(dm, DBG_CMN, "%-14s=%s\n", "[OFDM][EVM]", buf);
2044
2045 phydm_print_hist_2_buf(dm, dbg_s->snr_ofdm_hist, PHY_HIST_SIZE,
2046 buf, buf_size);
2047 PHYDM_DBG(dm, DBG_CMN, "%-14s=%s\n", "[OFDM][SNR]", buf);
2048 }
2049 /*@===[1-SS]==================================================================*/
2050 if (dbg_s->rssi_1ss_cnt)
2051 phydm_nss_hitogram(dm, PDM_1SS);
2052 /*@===[2-SS]==================================================================*/
2053 #if (defined(PHYDM_COMPILE_ABOVE_2SS))
2054 if ((dm->support_ic_type & PHYDM_IC_ABOVE_2SS) && dbg_s->rssi_2ss_cnt)
2055 phydm_nss_hitogram(dm, PDM_2SS);
2056 #endif
2057 /*@===[3-SS]==================================================================*/
2058 #if (defined(PHYDM_COMPILE_ABOVE_3SS))
2059 if ((dm->support_ic_type & PHYDM_IC_ABOVE_3SS) && dbg_s->rssi_3ss_cnt)
2060 phydm_nss_hitogram(dm, PDM_3SS);
2061 #endif
2062 /*@===[4-SS]==================================================================*/
2063 #if (defined(PHYDM_COMPILE_ABOVE_4SS))
2064 if (dm->support_ic_type & PHYDM_IC_ABOVE_4SS && dbg_s->rssi_4ss_cnt)
2065 phydm_nss_hitogram(dm, PDM_4SS);
2066 #endif
2067 }
2068
phydm_avg_phy_val_nss(void * dm_void,u8 nss)2069 void phydm_avg_phy_val_nss(void *dm_void, u8 nss)
2070 {
2071 struct dm_struct *dm = (struct dm_struct *)dm_void;
2072 struct odm_phy_dbg_info *dbg_i = &dm->phy_dbg_info;
2073 struct phydm_phystatus_statistic *dbg_s = &dbg_i->physts_statistic_info;
2074 struct phydm_phystatus_avg *dbg_avg = &dbg_i->phystatus_statistic_avg;
2075 char *rate_type = NULL;
2076 u32 *tmp_cnt = NULL;
2077 u8 *tmp_rssi_avg = NULL;
2078 u32 *tmp_rssi_sum = NULL;
2079 u8 *tmp_snr_avg = NULL;
2080 u32 *tmp_snr_sum = NULL;
2081 u8 *tmp_evm_avg = NULL;
2082 u32 *tmp_evm_sum = NULL;
2083 u8 evm_rpt_show[RF_PATH_MEM_SIZE];
2084 u8 i = 0;
2085
2086 odm_memory_set(dm, &evm_rpt_show[0], 0, RF_PATH_MEM_SIZE);
2087
2088 switch (nss) {
2089 #if (defined(PHYDM_COMPILE_ABOVE_4SS))
2090 case 4:
2091 rate_type = "[4-SS]";
2092 tmp_cnt = &dbg_s->rssi_4ss_cnt;
2093 tmp_rssi_avg = &dbg_avg->rssi_4ss_avg[0];
2094 tmp_snr_avg = &dbg_avg->snr_4ss_avg[0];
2095 tmp_rssi_sum = &dbg_s->rssi_4ss_sum[0];
2096 tmp_snr_sum = &dbg_s->snr_4ss_sum[0];
2097 tmp_evm_avg = &dbg_avg->evm_4ss_avg[0];
2098 tmp_evm_sum = &dbg_s->evm_4ss_sum[0];
2099 break;
2100 #endif
2101 #if (defined(PHYDM_COMPILE_ABOVE_3SS))
2102 case 3:
2103 rate_type = "[3-SS]";
2104 tmp_cnt = &dbg_s->rssi_3ss_cnt;
2105 tmp_rssi_avg = &dbg_avg->rssi_3ss_avg[0];
2106 tmp_snr_avg = &dbg_avg->snr_3ss_avg[0];
2107 tmp_rssi_sum = &dbg_s->rssi_3ss_sum[0];
2108 tmp_snr_sum = &dbg_s->snr_3ss_sum[0];
2109 tmp_evm_avg = &dbg_avg->evm_3ss_avg[0];
2110 tmp_evm_sum = &dbg_s->evm_3ss_sum[0];
2111 break;
2112 #endif
2113 #if (defined(PHYDM_COMPILE_ABOVE_2SS))
2114 case 2:
2115 rate_type = "[2-SS]";
2116 tmp_cnt = &dbg_s->rssi_2ss_cnt;
2117 tmp_rssi_avg = &dbg_avg->rssi_2ss_avg[0];
2118 tmp_snr_avg = &dbg_avg->snr_2ss_avg[0];
2119 tmp_rssi_sum = &dbg_s->rssi_2ss_sum[0];
2120 tmp_snr_sum = &dbg_s->snr_2ss_sum[0];
2121 tmp_evm_avg = &dbg_avg->evm_2ss_avg[0];
2122 tmp_evm_sum = &dbg_s->evm_2ss_sum[0];
2123 break;
2124 #endif
2125 case 1:
2126 rate_type = "[1-SS]";
2127 tmp_cnt = &dbg_s->rssi_1ss_cnt;
2128 tmp_rssi_avg = &dbg_avg->rssi_1ss_avg[0];
2129 tmp_snr_avg = &dbg_avg->snr_1ss_avg[0];
2130 tmp_rssi_sum = &dbg_s->rssi_1ss_sum[0];
2131 tmp_snr_sum = &dbg_s->snr_1ss_sum[0];
2132 tmp_evm_avg = &dbg_avg->evm_1ss_avg;
2133 tmp_evm_sum = &dbg_s->evm_1ss_sum;
2134 break;
2135 case 0:
2136 rate_type = "[L-OFDM]";
2137 tmp_cnt = &dbg_s->rssi_ofdm_cnt;
2138 tmp_rssi_avg = &dbg_avg->rssi_ofdm_avg[0];
2139 tmp_snr_avg = &dbg_avg->snr_ofdm_avg[0];
2140 tmp_rssi_sum = &dbg_s->rssi_ofdm_sum[0];
2141 tmp_snr_sum = &dbg_s->snr_ofdm_sum[0];
2142 tmp_evm_avg = &dbg_avg->evm_ofdm_avg;
2143 tmp_evm_sum = &dbg_s->evm_ofdm_sum;
2144 break;
2145 default:
2146 PHYDM_DBG(dm, DBG_CMN, "[warning] %s\n", __func__);
2147 return;
2148 }
2149
2150 if (*tmp_cnt != 0) {
2151 for (i = 0; i < dm->num_rf_path; i++) {
2152 tmp_rssi_avg[i] = (u8)(tmp_rssi_sum[i] / *tmp_cnt);
2153 tmp_snr_avg[i] = (u8)(tmp_snr_sum[i] / *tmp_cnt);
2154 }
2155
2156 if (nss == 0 || nss == 1) {
2157 *tmp_evm_avg = (u8)(*tmp_evm_sum / *tmp_cnt);
2158 evm_rpt_show[0] = *tmp_evm_avg;
2159 } else {
2160 for (i = 0; i < nss; i++) {
2161 tmp_evm_avg[i] = (u8)(tmp_evm_sum[i] /
2162 *tmp_cnt);
2163 evm_rpt_show[i] = tmp_evm_avg[i];
2164 }
2165 }
2166 }
2167
2168 #if (defined(PHYDM_COMPILE_ABOVE_4SS))
2169 PHYDM_DBG(dm, DBG_CMN,
2170 "* %-8s Cnt=((%.3d)) RSSI:{%.2d, %.2d, %.2d, %.2d} SNR:{%.2d, %.2d, %.2d, %.2d} EVM:{-%.2d, -%.2d, -%.2d, -%.2d}\n",
2171 rate_type, *tmp_cnt,
2172 tmp_rssi_avg[0], tmp_rssi_avg[1], tmp_rssi_avg[2],
2173 tmp_rssi_avg[3], tmp_snr_avg[0], tmp_snr_avg[1],
2174 tmp_snr_avg[2], tmp_snr_avg[3], evm_rpt_show[0],
2175 evm_rpt_show[1], evm_rpt_show[2], evm_rpt_show[3]);
2176 #elif (defined(PHYDM_COMPILE_ABOVE_3SS))
2177 PHYDM_DBG(dm, DBG_CMN,
2178 "* %-8s Cnt=((%.3d)) RSSI:{%.2d, %.2d, %.2d} SNR:{%.2d, %.2d, %.2d} EVM:{-%.2d, -%.2d, -%.2d}\n",
2179 rate_type, *tmp_cnt,
2180 tmp_rssi_avg[0], tmp_rssi_avg[1], tmp_rssi_avg[2],
2181 tmp_snr_avg[0], tmp_snr_avg[1], tmp_snr_avg[2],
2182 evm_rpt_show[0], evm_rpt_show[1], evm_rpt_show[2]);
2183 #elif (defined(PHYDM_COMPILE_ABOVE_2SS))
2184 PHYDM_DBG(dm, DBG_CMN,
2185 "* %-8s Cnt= ((%.3d)) RSSI:{%.2d, %.2d} SNR:{%.2d, %.2d} EVM:{-%.2d, -%.2d}\n",
2186 rate_type, *tmp_cnt,
2187 tmp_rssi_avg[0], tmp_rssi_avg[1],
2188 tmp_snr_avg[0], tmp_snr_avg[1],
2189 evm_rpt_show[0], evm_rpt_show[1]);
2190 #else
2191 PHYDM_DBG(dm, DBG_CMN,
2192 "* %-8s Cnt= ((%.3d)) RSSI:{%.2d} SNR:{%.2d} EVM:{-%.2d}\n",
2193 rate_type, *tmp_cnt,
2194 tmp_rssi_avg[0], tmp_snr_avg[0], evm_rpt_show[0]);
2195 #endif
2196 }
2197
phydm_get_avg_phystatus_val(void * dm_void)2198 void phydm_get_avg_phystatus_val(void *dm_void)
2199 {
2200 struct dm_struct *dm = (struct dm_struct *)dm_void;
2201 struct odm_phy_dbg_info *dbg_i = &dm->phy_dbg_info;
2202 struct phydm_phystatus_statistic *dbg_s = &dbg_i->physts_statistic_info;
2203 struct phydm_phystatus_avg *dbg_avg = &dbg_i->phystatus_statistic_avg;
2204 u32 avg_tmp = 0;
2205 u8 i = 0;
2206
2207 PHYDM_DBG(dm, DBG_CMN, "[PHY Avg] ==============>\n");
2208 phydm_reset_phystatus_avg(dm);
2209
2210 /*@===[Beacon]===*/
2211 if (dbg_s->rssi_beacon_cnt) {
2212 for (i = 0; i < dm->num_rf_path; i++) {
2213 avg_tmp = dbg_s->rssi_beacon_sum[i] /
2214 dbg_s->rssi_beacon_cnt;
2215 dbg_avg->rssi_beacon_avg[i] = (u8)avg_tmp;
2216 }
2217 }
2218
2219 switch (dm->num_rf_path) {
2220 #if (defined(PHYDM_COMPILE_ABOVE_4SS))
2221 case 4:
2222 PHYDM_DBG(dm, DBG_CMN,
2223 "* %-8s Cnt=((%.3d)) RSSI:{%.2d, %.2d, %.2d, %.2d}\n",
2224 "[Beacon]", dbg_s->rssi_beacon_cnt,
2225 dbg_avg->rssi_beacon_avg[0],
2226 dbg_avg->rssi_beacon_avg[1],
2227 dbg_avg->rssi_beacon_avg[2],
2228 dbg_avg->rssi_beacon_avg[3]);
2229 break;
2230 #endif
2231 #if (defined(PHYDM_COMPILE_ABOVE_3SS))
2232 case 3:
2233 PHYDM_DBG(dm, DBG_CMN,
2234 "* %-8s Cnt=((%.3d)) RSSI:{%.2d, %.2d, %.2d}\n",
2235 "[Beacon]", dbg_s->rssi_beacon_cnt,
2236 dbg_avg->rssi_beacon_avg[0],
2237 dbg_avg->rssi_beacon_avg[1],
2238 dbg_avg->rssi_beacon_avg[2]);
2239 break;
2240 #endif
2241 #if (defined(PHYDM_COMPILE_ABOVE_2SS))
2242 case 2:
2243 PHYDM_DBG(dm, DBG_CMN,
2244 "* %-8s Cnt=((%.3d)) RSSI:{%.2d, %.2d}\n",
2245 "[Beacon]", dbg_s->rssi_beacon_cnt,
2246 dbg_avg->rssi_beacon_avg[0],
2247 dbg_avg->rssi_beacon_avg[1]);
2248 break;
2249 #endif
2250 default:
2251 PHYDM_DBG(dm, DBG_CMN, "* %-8s Cnt=((%.3d)) RSSI:{%.2d}\n",
2252 "[Beacon]", dbg_s->rssi_beacon_cnt,
2253 dbg_avg->rssi_beacon_avg[0]);
2254 break;
2255 }
2256
2257 /*@===[CCK]===*/
2258 if (dbg_s->rssi_cck_cnt) {
2259 dbg_avg->rssi_cck_avg = (u8)(dbg_s->rssi_cck_sum /
2260 dbg_s->rssi_cck_cnt);
2261 #if (defined(PHYSTS_3RD_TYPE_SUPPORT) && defined(PHYDM_COMPILE_ABOVE_2SS))
2262 if (dm->support_ic_type & PHYSTS_3RD_TYPE_IC) {
2263 for (i = 0; i < dm->num_rf_path - 1; i++) {
2264 avg_tmp = dbg_s->rssi_cck_sum_abv_2ss[i] /
2265 dbg_s->rssi_cck_cnt;
2266 dbg_avg->rssi_cck_avg_abv_2ss[i] = (u8)avg_tmp;
2267 }
2268 }
2269 #endif
2270 }
2271
2272 switch (dm->num_rf_path) {
2273 #ifdef PHYSTS_3RD_TYPE_SUPPORT
2274 #if (defined(PHYDM_COMPILE_ABOVE_4SS))
2275 case 4:
2276 PHYDM_DBG(dm, DBG_CMN,
2277 "* %-8s Cnt=((%.3d)) RSSI:{%.2d, %.2d, %.2d, %.2d}\n",
2278 "[CCK]", dbg_s->rssi_cck_cnt, dbg_avg->rssi_cck_avg,
2279 dbg_avg->rssi_cck_avg_abv_2ss[0],
2280 dbg_avg->rssi_cck_avg_abv_2ss[1],
2281 dbg_avg->rssi_cck_avg_abv_2ss[2]);
2282 break;
2283 #endif
2284 #if (defined(PHYDM_COMPILE_ABOVE_3SS))
2285 case 3:
2286 PHYDM_DBG(dm, DBG_CMN,
2287 "* %-8s Cnt=((%.3d)) RSSI:{%.2d, %.2d, %.2d}\n",
2288 "[CCK]", dbg_s->rssi_cck_cnt, dbg_avg->rssi_cck_avg,
2289 dbg_avg->rssi_cck_avg_abv_2ss[0],
2290 dbg_avg->rssi_cck_avg_abv_2ss[1]);
2291 break;
2292 #endif
2293 #if (defined(PHYDM_COMPILE_ABOVE_2SS))
2294 case 2:
2295 PHYDM_DBG(dm, DBG_CMN,
2296 "* %-8s Cnt=((%.3d)) RSSI:{%.2d, %.2d}\n",
2297 "[CCK]", dbg_s->rssi_cck_cnt, dbg_avg->rssi_cck_avg,
2298 dbg_avg->rssi_cck_avg_abv_2ss[0]);
2299 break;
2300 #endif
2301 #endif
2302 default:
2303 PHYDM_DBG(dm, DBG_CMN, "* %-8s Cnt=((%.3d)) RSSI:{%.2d}\n",
2304 "[CCK]", dbg_s->rssi_cck_cnt, dbg_avg->rssi_cck_avg);
2305 break;
2306 }
2307
2308 for (i = 0; i <= dm->num_rf_path; i++)
2309 phydm_avg_phy_val_nss(dm, i);
2310 }
2311
phydm_get_phy_statistic(void * dm_void)2312 void phydm_get_phy_statistic(void *dm_void)
2313 {
2314 struct dm_struct *dm = (struct dm_struct *)dm_void;
2315 struct cmn_sta_info *sta = dm->phydm_sta_info[dm->one_entry_macid];
2316 enum channel_width bw;
2317 u16 avg_phy_rate = 0;
2318 u16 utility = 0;
2319 u8 rx_ss = 1;
2320
2321 avg_phy_rate = phydm_rx_avg_phy_rate(dm);
2322
2323 if (dm->is_one_entry_only && is_sta_active(sta)) {
2324 rx_ss = phydm_get_rx_stream_num(dm, sta->mimo_type);
2325 bw = sta->bw_mode;
2326 utility = phydm_rx_utility(dm, avg_phy_rate, rx_ss, bw);
2327 }
2328 PHYDM_DBG(dm, DBG_CMN, "Avg_rx_rate = %d, rx_utility=( %d / 1000 )\n",
2329 avg_phy_rate, utility);
2330
2331 phydm_rx_rate_distribution(dm);
2332 phydm_reset_rx_rate_distribution(dm);
2333
2334 phydm_show_phy_hitogram(dm);
2335 #ifdef PHYDM_PHYSTAUS_AUTO_SWITCH
2336 phydm_show_cn_hitogram(dm);
2337 #endif
2338 phydm_get_avg_phystatus_val(dm);
2339 phydm_reset_phystatus_statistic(dm);
2340 };
2341
phydm_basic_dbg_msg_linked(void * dm_void)2342 void phydm_basic_dbg_msg_linked(void *dm_void)
2343 {
2344 struct dm_struct *dm = (struct dm_struct *)dm_void;
2345 struct phydm_cfo_track_struct *cfo_t = &dm->dm_cfo_track;
2346 struct odm_phy_dbg_info *dbg_t = &dm->phy_dbg_info;
2347 u16 macid, client_cnt = 0;
2348 u8 rate = 0;
2349 struct cmn_sta_info *entry = NULL;
2350 char dbg_buf[PHYDM_SNPRINT_SIZE] = {0};
2351 struct phydm_cfo_rpt cfo;
2352 u8 i = 0;
2353
2354 PHYDM_DBG(dm, DBG_CMN, "ID=((%d)), BW=((%d)), fc=((CH-%d))\n",
2355 dm->curr_station_id, 20 << *dm->band_width, *dm->channel);
2356
2357 #ifdef ODM_IC_11N_SERIES_SUPPORT
2358 #ifdef PHYDM_PRIMARY_CCA
2359 if (((*dm->channel <= 14) && (*dm->band_width == CHANNEL_WIDTH_40)) &&
2360 (dm->support_ic_type & ODM_IC_11N_SERIES) &&
2361 (dm->support_ability & ODM_BB_PRIMARY_CCA)) {
2362 PHYDM_DBG(dm, DBG_CMN, "Primary CCA at ((%s SB))\n",
2363 ((*dm->sec_ch_offset == SECOND_CH_AT_LSB) ? "U" :
2364 "L"));
2365 }
2366 #endif
2367 #endif
2368
2369 if (dm->cck_new_agc || dm->rx_rate > ODM_RATE11M) {
2370 PHYDM_DBG(dm, DBG_CMN, "[AGC Idx] {0x%x, 0x%x, 0x%x, 0x%x}\n",
2371 dm->ofdm_agc_idx[0], dm->ofdm_agc_idx[1],
2372 dm->ofdm_agc_idx[2], dm->ofdm_agc_idx[3]);
2373 } else {
2374 PHYDM_DBG(dm, DBG_CMN, "[CCK AGC Idx] {LNA,VGA}={0x%x, 0x%x}\n",
2375 dm->cck_lna_idx, dm->cck_vga_idx);
2376 }
2377
2378 phydm_print_rate_2_buff(dm, dm->rx_rate, dbg_buf, PHYDM_SNPRINT_SIZE);
2379 PHYDM_DBG(dm, DBG_CMN, "RSSI:{%d, %d, %d, %d}, RxRate:%s (0x%x)\n",
2380 (dm->rssi_a == 0xff) ? 0 : dm->rssi_a,
2381 (dm->rssi_b == 0xff) ? 0 : dm->rssi_b,
2382 (dm->rssi_c == 0xff) ? 0 : dm->rssi_c,
2383 (dm->rssi_d == 0xff) ? 0 : dm->rssi_d,
2384 dbg_buf, dm->rx_rate);
2385
2386 rate = dbg_t->beacon_phy_rate;
2387 phydm_print_rate_2_buff(dm, rate, dbg_buf, PHYDM_SNPRINT_SIZE);
2388
2389 PHYDM_DBG(dm, DBG_CMN, "Beacon_cnt=%d, rate_idx=%s (0x%x)\n",
2390 dbg_t->num_qry_beacon_pkt, dbg_buf, dbg_t->beacon_phy_rate);
2391
2392 phydm_get_phy_statistic(dm);
2393
2394 PHYDM_DBG(dm, DBG_CMN,
2395 "rxsc_idx {Legacy, 20, 40, 80} = {%d, %d, %d, %d}\n",
2396 dm->rxsc_l, dm->rxsc_20, dm->rxsc_40, dm->rxsc_80);
2397
2398 /*Print TX rate*/
2399 for (macid = 0; macid < ODM_ASSOCIATE_ENTRY_NUM; macid++) {
2400 entry = dm->phydm_sta_info[macid];
2401
2402 if (!is_sta_active(entry))
2403 continue;
2404
2405 rate = entry->ra_info.curr_tx_rate;
2406 phydm_print_rate_2_buff(dm, rate, dbg_buf, PHYDM_SNPRINT_SIZE);
2407 PHYDM_DBG(dm, DBG_CMN, "TxRate[%d]=%s (0x%x)\n",
2408 macid, dbg_buf, entry->ra_info.curr_tx_rate);
2409
2410 client_cnt++;
2411
2412 if (client_cnt >= dm->number_linked_client)
2413 break;
2414 }
2415
2416 PHYDM_DBG(dm, DBG_CMN,
2417 "TP {Tx, Rx, Total} = {%d, %d, %d}Mbps, Traffic_Load=(%d))\n",
2418 dm->tx_tp, dm->rx_tp, dm->total_tp, dm->traffic_load);
2419
2420 PHYDM_DBG(dm, DBG_CMN, "CFO_avg=((%d kHz)), CFO_traking = ((%s%d))\n",
2421 cfo_t->CFO_ave_pre,
2422 ((cfo_t->crystal_cap > cfo_t->def_x_cap) ? "+" : "-"),
2423 DIFF_2(cfo_t->crystal_cap, cfo_t->def_x_cap));
2424
2425 /* @CFO report */
2426 switch (dm->ic_ip_series) {
2427 #ifdef PHYDM_IC_JGR3_SERIES_SUPPORT
2428 case PHYDM_IC_JGR3:
2429 PHYDM_DBG(dm, DBG_CMN, "cfo_tail = {%d, %d, %d, %d}\n",
2430 dbg_t->cfo_tail[0], dbg_t->cfo_tail[1],
2431 dbg_t->cfo_tail[2], dbg_t->cfo_tail[3]);
2432 break;
2433 #endif
2434 default:
2435 phydm_get_cfo_info(dm, &cfo);
2436 for (i = 0; i < dm->num_rf_path; i++) {
2437 PHYDM_DBG(dm, DBG_CMN,
2438 "CFO[%d] {S, L, Sec, Acq, End} = {%d, %d, %d, %d, %d}\n",
2439 i, cfo.cfo_rpt_s[i], cfo.cfo_rpt_l[i],
2440 cfo.cfo_rpt_sec[i], cfo.cfo_rpt_acq[i],
2441 cfo.cfo_rpt_end[i]);
2442 }
2443 break;
2444 }
2445
2446 /* @Condition number */
2447 #if (RTL8822B_SUPPORT)
2448 if (dm->support_ic_type == ODM_RTL8822B) {
2449 PHYDM_DBG(dm, DBG_CMN, "Condi_Num=((%d.%.4d)), %d\n",
2450 dbg_t->condi_num >> 4,
2451 phydm_show_fraction_num(dbg_t->condi_num & 0xf, 4),
2452 dbg_t->condi_num);
2453 }
2454 #endif
2455 #ifdef PHYSTS_3RD_TYPE_SUPPORT
2456 if (dm->support_ic_type & PHYSTS_3RD_TYPE_IC) {
2457 PHYDM_DBG(dm, DBG_CMN, "Condi_Num=((%d.%4d dB))\n",
2458 dbg_t->condi_num >> 1,
2459 phydm_show_fraction_num(dbg_t->condi_num & 0x1, 1));
2460 }
2461 #endif
2462
2463 #if (ODM_PHY_STATUS_NEW_TYPE_SUPPORT || defined(PHYSTS_3RD_TYPE_SUPPORT))
2464 /*STBC or LDPC pkt*/
2465 if (dm->support_ic_type & (PHYSTS_2ND_TYPE_IC | PHYSTS_3RD_TYPE_IC))
2466 PHYDM_DBG(dm, DBG_CMN, "Coding: LDPC=((%s)), STBC=((%s))\n",
2467 (dbg_t->is_ldpc_pkt) ? "Y" : "N",
2468 (dbg_t->is_stbc_pkt) ? "Y" : "N");
2469 #endif
2470
2471 #if (RTL8822C_SUPPORT || RTL8723F_SUPPORT)
2472 /*Beamformed pkt*/
2473 if (dm->support_ic_type & (ODM_RTL8822C | ODM_RTL8723F))
2474 PHYDM_DBG(dm, DBG_CMN, "Beamformed=((%s))\n",
2475 (dm->is_beamformed) ? "Y" : "N");
2476 #endif
2477 }
2478
phydm_dm_summary(void * dm_void,u8 macid)2479 void phydm_dm_summary(void *dm_void, u8 macid)
2480 {
2481 struct dm_struct *dm = (struct dm_struct *)dm_void;
2482 struct phydm_dig_struct *dig_t = &dm->dm_dig_table;
2483 struct phydm_cfo_track_struct *cfo_t = &dm->dm_cfo_track;
2484 struct cmn_sta_info *sta = NULL;
2485 struct ra_sta_info *ra = NULL;
2486 struct dtp_info *dtp = NULL;
2487 u64 comp = dm->support_ability;
2488 u64 pause_comp = dm->pause_ability;
2489
2490 if (!(dm->debug_components & DBG_DM_SUMMARY))
2491 return;
2492
2493 if (!dm->is_linked) {
2494 pr_debug("[%s]No Link !!!\n", __func__);
2495 return;
2496 }
2497
2498 sta = dm->phydm_sta_info[macid];
2499
2500 if (!is_sta_active(sta)) {
2501 pr_debug("[Warning] %s invalid STA, macid=%d\n",
2502 __func__, macid);
2503 return;
2504 }
2505
2506 ra = &sta->ra_info;
2507 dtp = &sta->dtp_stat;
2508 pr_debug("[%s]===========>\n", __func__);
2509
2510 pr_debug("00.(%s) %-12s: IGI=0x%x, Dyn_Rng=0x%x~0x%x, FA_th={%d,%d,%d}\n",
2511 ((comp & ODM_BB_DIG) ?
2512 ((pause_comp & ODM_BB_DIG) ? "P" : "V") : "."),
2513 "DIG",
2514 dig_t->cur_ig_value,
2515 dig_t->rx_gain_range_min, dig_t->rx_gain_range_max,
2516 dig_t->fa_th[0], dig_t->fa_th[1], dig_t->fa_th[2]);
2517
2518 pr_debug("01.(%s) %-12s: rssi_lv=%d, mask=0x%llx\n",
2519 ((comp & ODM_BB_RA_MASK) ?
2520 ((pause_comp & ODM_BB_RA_MASK) ? "P" : "V") : "."),
2521 "RaMask",
2522 ra->rssi_level, ra->ramask);
2523
2524 #ifdef CONFIG_DYNAMIC_TX_TWR
2525 pr_debug("02.(%s) %-12s: pwr_lv=%d\n",
2526 ((comp & ODM_BB_DYNAMIC_TXPWR) ?
2527 ((pause_comp & ODM_BB_DYNAMIC_TXPWR) ? "P" : "V") : "."),
2528 "DynTxPwr",
2529 dtp->sta_tx_high_power_lvl);
2530 #endif
2531
2532 pr_debug("05.(%s) %-12s: cck_pd_lv=%d\n",
2533 ((comp & ODM_BB_CCK_PD) ?
2534 ((pause_comp & ODM_BB_CCK_PD) ? "P" : "V") : "."),
2535 "CCK_PD", dm->dm_cckpd_table.cck_pd_lv);
2536
2537 #ifdef CONFIG_PHYDM_ANTENNA_DIVERSITY
2538 pr_debug("06.(%s) %-12s: div_type=%d, curr_ant=%s\n",
2539 ((comp & ODM_BB_ANT_DIV) ?
2540 ((pause_comp & ODM_BB_ANT_DIV) ? "P" : "V") : "."),
2541 "ANT_DIV",
2542 dm->ant_div_type,
2543 (dm->dm_fat_table.rx_idle_ant == MAIN_ANT) ? "MAIN" : "AUX");
2544 #endif
2545
2546 #ifdef PHYDM_POWER_TRAINING_SUPPORT
2547 pr_debug("08.(%s) %-12s: PT_score=%d, disable_PT=%d\n",
2548 ((comp & ODM_BB_PWR_TRAIN) ?
2549 ((pause_comp & ODM_BB_PWR_TRAIN) ? "P" : "V") : "."),
2550 "PwrTrain",
2551 dm->pow_train_table.pow_train_score,
2552 dm->is_disable_power_training);
2553 #endif
2554
2555 #ifdef CONFIG_PHYDM_DFS_MASTER
2556 pr_debug("11.(%s) %-12s: dbg_mode=%d, region_domain=%d\n",
2557 ((comp & ODM_BB_DFS) ?
2558 ((pause_comp & ODM_BB_DFS) ? "P" : "V") : "."),
2559 "DFS",
2560 dm->dfs.dbg_mode, dm->dfs_region_domain);
2561 #endif
2562 #ifdef PHYDM_SUPPORT_ADAPTIVITY
2563 pr_debug("13.(%s) %-12s: th{l2h, h2l}={%d, %d}, edcca_flag=%d\n",
2564 ((comp & ODM_BB_ADAPTIVITY) ?
2565 ((pause_comp & ODM_BB_ADAPTIVITY) ? "P" : "V") : "."),
2566 "Adaptivity",
2567 dm->adaptivity.th_l2h, dm->adaptivity.th_h2l,
2568 dm->false_alm_cnt.edcca_flag);
2569 #endif
2570 pr_debug("14.(%s) %-12s: CFO_avg=%d kHz, CFO_traking=%s%d\n",
2571 ((comp & ODM_BB_CFO_TRACKING) ?
2572 ((pause_comp & ODM_BB_CFO_TRACKING) ? "P" : "V") : "."),
2573 "CfoTrack",
2574 cfo_t->CFO_ave_pre,
2575 ((cfo_t->crystal_cap > cfo_t->def_x_cap) ? "+" : "-"),
2576 DIFF_2(cfo_t->crystal_cap, cfo_t->def_x_cap));
2577
2578 pr_debug("15.(%s) %-12s: ratio{nhm, clm}={%d, %d}\n",
2579 ((comp & ODM_BB_ENV_MONITOR) ?
2580 ((pause_comp & ODM_BB_ENV_MONITOR) ? "P" : "V") : "."),
2581 "EnvMntr",
2582 dm->dm_ccx_info.nhm_ratio, dm->dm_ccx_info.clm_ratio);
2583
2584 #ifdef PHYDM_PRIMARY_CCA
2585 pr_debug("16.(%s) %-12s: CCA @ (%s SB)\n",
2586 ((comp & ODM_BB_PRIMARY_CCA) ?
2587 ((pause_comp & ODM_BB_PRIMARY_CCA) ? "P" : "V") : "."),
2588 "PriCCA",
2589 ((dm->dm_pri_cca.mf_state == MF_USC_LSC) ? "D" :
2590 ((dm->dm_pri_cca.mf_state == MF_LSC) ? "L" : "U")));
2591 #endif
2592 #ifdef CONFIG_ADAPTIVE_SOML
2593 pr_debug("17.(%s) %-12s: soml_en = %s\n",
2594 ((comp & ODM_BB_ADAPTIVE_SOML) ?
2595 ((pause_comp & ODM_BB_ADAPTIVE_SOML) ? "P" : "V") : "."),
2596 "A-SOML",
2597 (dm->dm_soml_table.soml_last_state == SOML_ON) ?
2598 "ON" : "OFF");
2599 #endif
2600 #ifdef PHYDM_LNA_SAT_CHK_SUPPORT
2601 pr_debug("18.(%s) %-12s:\n",
2602 ((comp & ODM_BB_LNA_SAT_CHK) ?
2603 ((pause_comp & ODM_BB_LNA_SAT_CHK) ? "P" : "V") : "."),
2604 "LNA_SAT_CHK");
2605 #endif
2606 }
2607
phydm_basic_dbg_message(void * dm_void)2608 void phydm_basic_dbg_message(void *dm_void)
2609 {
2610 struct dm_struct *dm = (struct dm_struct *)dm_void;
2611 struct phydm_fa_struct *fa_t = &dm->false_alm_cnt;
2612 struct odm_phy_dbg_info *dbg = &dm->phy_dbg_info;
2613 #if (DM_ODM_SUPPORT_TYPE == ODM_WIN)
2614 struct odm_phy_dbg_info *dbg_b = &dm->phy_dbg_info_win_bkp;
2615 #endif
2616 #ifdef NHM_SUPPORT
2617 struct ccx_info *ccx = &dm->dm_ccx_info;
2618 #endif
2619
2620 #if (DM_ODM_SUPPORT_TYPE == ODM_WIN)
2621 /* backup memory*/
2622 odm_move_memory(dm, dbg_b, dbg, sizeof(struct odm_phy_dbg_info));
2623 #endif
2624
2625 if (!(dm->debug_components & DBG_CMN)) {
2626 #if (DM_ODM_SUPPORT_TYPE == ODM_WIN)
2627 /* reset rx rate distribution*/
2628 phydm_reset_rx_rate_distribution(dm);
2629 /* cal & reset avg of rssi/snr/evm*/
2630 phydm_get_avg_phystatus_val(dm);
2631 /* reset sum of rssi/snr/evm*/
2632 phydm_reset_phystatus_statistic(dm);
2633 #endif
2634 return;
2635 }
2636
2637 if (dm->cmn_dbg_msg_cnt >= dm->cmn_dbg_msg_period) {
2638 dm->cmn_dbg_msg_cnt = PHYDM_WATCH_DOG_PERIOD;
2639 } else {
2640 dm->cmn_dbg_msg_cnt += PHYDM_WATCH_DOG_PERIOD;
2641 return;
2642 }
2643
2644 PHYDM_DBG(dm, DBG_CMN, "[%s] System up time: ((%d sec))---->\n",
2645 __func__, dm->phydm_sys_up_time);
2646
2647 if (dm->is_linked)
2648 phydm_basic_dbg_msg_linked(dm);
2649 else
2650 PHYDM_DBG(dm, DBG_CMN, "No Link !!!\n");
2651
2652 PHYDM_DBG(dm, DBG_CMN,
2653 "[Tx cnt] {CCK_TxEN, CCK_TxON, OFDM_TxEN, OFDM_TxON} = {%d, %d, %d, %d}\n",
2654 fa_t->cnt_cck_txen, fa_t->cnt_cck_txon, fa_t->cnt_ofdm_txen,
2655 fa_t->cnt_ofdm_txon);
2656 PHYDM_DBG(dm, DBG_CMN, "[CCA Cnt] {CCK, OFDM, Total} = {%d, %d, %d}\n",
2657 fa_t->cnt_cck_cca, fa_t->cnt_ofdm_cca, fa_t->cnt_cca_all);
2658 PHYDM_DBG(dm, DBG_CMN, "[FA Cnt] {CCK, OFDM, Total} = {%d, %d, %d}\n",
2659 fa_t->cnt_cck_fail, fa_t->cnt_ofdm_fail, fa_t->cnt_all);
2660 PHYDM_DBG(dm, DBG_CMN,
2661 "[FA duration(us)] {exp, ifs_clm, fahm} = {%d, %d, %d}\n",
2662 fa_t->time_fa_exp, fa_t->time_fa_ifs_clm,
2663 fa_t->time_fa_fahm);
2664 PHYDM_DBG(dm, DBG_CMN,
2665 "[OFDM FA] Parity=%d, Rate=%d, Fast_Fsync=%d, SBD=%d\n",
2666 fa_t->cnt_parity_fail, fa_t->cnt_rate_illegal,
2667 fa_t->cnt_fast_fsync, fa_t->cnt_sb_search_fail);
2668 PHYDM_DBG(dm, DBG_CMN, "[HT FA] CRC8=%d, MCS=%d\n",
2669 fa_t->cnt_crc8_fail, fa_t->cnt_mcs_fail);
2670 #if (ODM_IC_11AC_SERIES_SUPPORT || defined(PHYDM_IC_JGR3_SERIES_SUPPORT))
2671 if (dm->support_ic_type & (ODM_IC_11AC_SERIES | ODM_IC_JGR3_SERIES)) {
2672 PHYDM_DBG(dm, DBG_CMN,
2673 "[VHT FA] SIGA_CRC8=%d, SIGB_CRC8=%d, MCS=%d\n",
2674 fa_t->cnt_crc8_fail_vhta, fa_t->cnt_crc8_fail_vhtb,
2675 fa_t->cnt_mcs_fail_vht);
2676 }
2677 #endif
2678 PHYDM_DBG(dm, DBG_CMN,
2679 "[CRC32 OK Cnt] {CCK, OFDM, HT, VHT, Total} = {%d, %d, %d, %d, %d}\n",
2680 fa_t->cnt_cck_crc32_ok, fa_t->cnt_ofdm_crc32_ok,
2681 fa_t->cnt_ht_crc32_ok, fa_t->cnt_vht_crc32_ok,
2682 fa_t->cnt_crc32_ok_all);
2683 PHYDM_DBG(dm, DBG_CMN,
2684 "[CRC32 Err Cnt] {CCK, OFDM, HT, VHT, Total} = {%d, %d, %d, %d, %d}\n",
2685 fa_t->cnt_cck_crc32_error, fa_t->cnt_ofdm_crc32_error,
2686 fa_t->cnt_ht_crc32_error, fa_t->cnt_vht_crc32_error,
2687 fa_t->cnt_crc32_error_all);
2688
2689 if (dm->support_ic_type & (ODM_IC_11N_SERIES | ODM_IC_11AC_SERIES))
2690 PHYDM_DBG(dm, DBG_CMN,
2691 "is_linked = %d, Num_client = %d, rssi_min = %d, IGI = 0x%x, bNoisy=%d\n",
2692 dm->is_linked, dm->number_linked_client, dm->rssi_min,
2693 dm->dm_dig_table.cur_ig_value, dm->noisy_decision);
2694 else
2695 PHYDM_DBG(dm, DBG_CMN,
2696 "is_linked = %d, Num_client = %d, rssi_min = %d, IGI = 0x%x\n",
2697 dm->is_linked, dm->number_linked_client, dm->rssi_min,
2698 dm->dm_dig_table.cur_ig_value);
2699
2700 PHYDM_DBG(dm, DBG_CMN, "ratio{nhm, clm}={%d, %d}, nhm_pwr=%d\n",
2701 ccx->nhm_ratio, ccx->clm_ratio, ccx->nhm_pwr);
2702
2703 PHYDM_DBG(dm, DBG_CMN,
2704 "NHM_Rpt(H->L)[%d %d %d %d %d %d %d %d %d %d %d %d]\n",
2705 ccx->nhm_result[11], ccx->nhm_result[10], ccx->nhm_result[9],
2706 ccx->nhm_result[8], ccx->nhm_result[7], ccx->nhm_result[6],
2707 ccx->nhm_result[5], ccx->nhm_result[4], ccx->nhm_result[3],
2708 ccx->nhm_result[2], ccx->nhm_result[1], ccx->nhm_result[0]);
2709
2710 #ifdef EDCCA_CLM_SUPPORT
2711 if (dm->support_ic_type & PHYDM_IC_SUPPORT_EDCCA_CLM) {
2712 PHYDM_DBG(dm, DBG_CMN, "edcca_clm_ratio=%d\n",
2713 ccx->edcca_clm_ratio);
2714 }
2715 #endif
2716 }
2717
phydm_basic_profile(void * dm_void,u32 * _used,char * output,u32 * _out_len)2718 void phydm_basic_profile(void *dm_void, u32 *_used, char *output, u32 *_out_len)
2719 {
2720 #ifdef CONFIG_PHYDM_DEBUG_FUNCTION
2721 struct dm_struct *dm = (struct dm_struct *)dm_void;
2722 char *cut = NULL;
2723 char *ic_type = NULL;
2724 u32 used = *_used;
2725 u32 out_len = *_out_len;
2726 u32 date = 0;
2727 char *commit_by = NULL;
2728 u32 release_ver = 0;
2729
2730 PDM_SNPF(out_len, used, output + used, out_len - used, "%-35s\n",
2731 "% Basic Profile %");
2732
2733 if (dm->support_ic_type == ODM_RTL8188E) {
2734 #if (RTL8188E_SUPPORT)
2735 ic_type = "RTL8188E";
2736 date = RELEASE_DATE_8188E;
2737 commit_by = COMMIT_BY_8188E;
2738 release_ver = RELEASE_VERSION_8188E;
2739 #endif
2740 #if (RTL8812A_SUPPORT)
2741 } else if (dm->support_ic_type == ODM_RTL8812) {
2742 ic_type = "RTL8812A";
2743 date = RELEASE_DATE_8812A;
2744 commit_by = COMMIT_BY_8812A;
2745 release_ver = RELEASE_VERSION_8812A;
2746 #endif
2747 #if (RTL8821A_SUPPORT)
2748 } else if (dm->support_ic_type == ODM_RTL8821) {
2749 ic_type = "RTL8821A";
2750 date = RELEASE_DATE_8821A;
2751 commit_by = COMMIT_BY_8821A;
2752 release_ver = RELEASE_VERSION_8821A;
2753 #endif
2754 #if (RTL8192E_SUPPORT)
2755 } else if (dm->support_ic_type == ODM_RTL8192E) {
2756 ic_type = "RTL8192E";
2757 date = RELEASE_DATE_8192E;
2758 commit_by = COMMIT_BY_8192E;
2759 release_ver = RELEASE_VERSION_8192E;
2760 #endif
2761 #if (RTL8723B_SUPPORT)
2762 } else if (dm->support_ic_type == ODM_RTL8723B) {
2763 ic_type = "RTL8723B";
2764 date = RELEASE_DATE_8723B;
2765 commit_by = COMMIT_BY_8723B;
2766 release_ver = RELEASE_VERSION_8723B;
2767 #endif
2768 #if (RTL8814A_SUPPORT)
2769 } else if (dm->support_ic_type == ODM_RTL8814A) {
2770 ic_type = "RTL8814A";
2771 date = RELEASE_DATE_8814A;
2772 commit_by = COMMIT_BY_8814A;
2773 release_ver = RELEASE_VERSION_8814A;
2774 #endif
2775 #if (RTL8881A_SUPPORT)
2776 } else if (dm->support_ic_type == ODM_RTL8881A) {
2777 ic_type = "RTL8881A";
2778 #endif
2779 #if (RTL8822B_SUPPORT)
2780 } else if (dm->support_ic_type == ODM_RTL8822B) {
2781 ic_type = "RTL8822B";
2782 date = RELEASE_DATE_8822B;
2783 commit_by = COMMIT_BY_8822B;
2784 release_ver = RELEASE_VERSION_8822B;
2785 #endif
2786 #if (RTL8197F_SUPPORT)
2787 } else if (dm->support_ic_type == ODM_RTL8197F) {
2788 ic_type = "RTL8197F";
2789 date = RELEASE_DATE_8197F;
2790 commit_by = COMMIT_BY_8197F;
2791 release_ver = RELEASE_VERSION_8197F;
2792 #endif
2793 #if (RTL8703B_SUPPORT)
2794 } else if (dm->support_ic_type == ODM_RTL8703B) {
2795 ic_type = "RTL8703B";
2796 date = RELEASE_DATE_8703B;
2797 commit_by = COMMIT_BY_8703B;
2798 release_ver = RELEASE_VERSION_8703B;
2799 #endif
2800 #if (RTL8195A_SUPPORT)
2801 } else if (dm->support_ic_type == ODM_RTL8195A) {
2802 ic_type = "RTL8195A";
2803 #endif
2804 #if (RTL8188F_SUPPORT)
2805 } else if (dm->support_ic_type == ODM_RTL8188F) {
2806 ic_type = "RTL8188F";
2807 date = RELEASE_DATE_8188F;
2808 commit_by = COMMIT_BY_8188F;
2809 release_ver = RELEASE_VERSION_8188F;
2810 #endif
2811 #if (RTL8723D_SUPPORT)
2812 } else if (dm->support_ic_type == ODM_RTL8723D) {
2813 ic_type = "RTL8723D";
2814 date = RELEASE_DATE_8723D;
2815 commit_by = COMMIT_BY_8723D;
2816 release_ver = RELEASE_VERSION_8723D;
2817 #endif
2818 }
2819
2820 /* @JJ ADD 20161014 */
2821 #if (RTL8710B_SUPPORT)
2822 else if (dm->support_ic_type == ODM_RTL8710B) {
2823 ic_type = "RTL8710B";
2824 date = RELEASE_DATE_8710B;
2825 commit_by = COMMIT_BY_8710B;
2826 release_ver = RELEASE_VERSION_8710B;
2827 }
2828 #endif
2829
2830 #if (RTL8721D_SUPPORT)
2831 else if (dm->support_ic_type == ODM_RTL8721D) {
2832 ic_type = "RTL8721D";
2833 date = RELEASE_DATE_8721D;
2834 commit_by = COMMIT_BY_8721D;
2835 release_ver = RELEASE_VERSION_8721D;
2836 }
2837 #endif
2838
2839 #if (RTL8710C_SUPPORT)
2840 else if (dm->support_ic_type == ODM_RTL8710C) {
2841 ic_type = "RTL8710C";
2842 date = RELEASE_DATE_8710C;
2843 commit_by = COMMIT_BY_8710C;
2844 release_ver = RELEASE_VERSION_8710C;
2845 }
2846 #endif
2847
2848 #if (RTL8821C_SUPPORT)
2849 else if (dm->support_ic_type == ODM_RTL8821C) {
2850 ic_type = "RTL8821C";
2851 date = RELEASE_DATE_8821C;
2852 commit_by = COMMIT_BY_8821C;
2853 release_ver = RELEASE_VERSION_8821C;
2854 }
2855 #endif
2856
2857 /*@jj add 20170822*/
2858 #if (RTL8192F_SUPPORT)
2859 else if (dm->support_ic_type == ODM_RTL8192F) {
2860 ic_type = "RTL8192F";
2861 date = RELEASE_DATE_8192F;
2862 commit_by = COMMIT_BY_8192F;
2863 release_ver = RELEASE_VERSION_8192F;
2864 }
2865 #endif
2866
2867 #if (RTL8198F_SUPPORT)
2868 else if (dm->support_ic_type == ODM_RTL8198F) {
2869 ic_type = "RTL8198F";
2870 date = RELEASE_DATE_8198F;
2871 commit_by = COMMIT_BY_8198F;
2872 release_ver = RELEASE_VERSION_8198F;
2873 }
2874 #endif
2875
2876 #if (RTL8822C_SUPPORT)
2877 else if (dm->support_ic_type == ODM_RTL8822C) {
2878 ic_type = "RTL8822C";
2879 date = RELEASE_DATE_8822C;
2880 commit_by = COMMIT_BY_8822C;
2881 release_ver = RELEASE_VERSION_8822C;
2882 }
2883 #endif
2884
2885 #if (RTL8723F_SUPPORT)
2886 else if (dm->support_ic_type == ODM_RTL8723F) {
2887 ic_type = "RTL8723F";
2888 date = RELEASE_DATE_8723F;
2889 commit_by = COMMIT_BY_8723F;
2890 release_ver = RELEASE_VERSION_8723F;
2891 }
2892 #endif
2893 #if (RTL8812F_SUPPORT)
2894 else if (dm->support_ic_type == ODM_RTL8812F) {
2895 ic_type = "RTL8812F";
2896 date = RELEASE_DATE_8812F;
2897 commit_by = COMMIT_BY_8812F;
2898 release_ver = RELEASE_VERSION_8812F;
2899 }
2900 #endif
2901
2902 #if (RTL8197G_SUPPORT)
2903 else if (dm->support_ic_type == ODM_RTL8197G) {
2904 ic_type = "RTL8197G";
2905 date = RELEASE_DATE_8197G;
2906 commit_by = COMMIT_BY_8197G;
2907 release_ver = RELEASE_VERSION_8197G;
2908 }
2909 #endif
2910
2911 #if (RTL8814B_SUPPORT)
2912 else if (dm->support_ic_type == ODM_RTL8814B) {
2913 ic_type = "RTL8814B";
2914 date = RELEASE_DATE_8814B;
2915 commit_by = COMMIT_BY_8814B;
2916 release_ver = RELEASE_VERSION_8814B;
2917 }
2918 #endif
2919 #if (RTL8814C_SUPPORT)
2920 else if (dm->support_ic_type == ODM_RTL8814C) {
2921 ic_type = "RTL8814C";
2922 date = RELEASE_DATE_8814C;
2923 commit_by = COMMIT_BY_8814C;
2924 release_ver = RELEASE_VERSION_8814C;
2925 }
2926 #endif
2927
2928 PDM_SNPF(out_len, used, output + used, out_len - used,
2929 " %-35s: %s (MP Chip: %s)\n", "IC type", ic_type,
2930 dm->is_mp_chip ? "Yes" : "No");
2931
2932 if (dm->cut_version == ODM_CUT_A)
2933 cut = "A";
2934 else if (dm->cut_version == ODM_CUT_B)
2935 cut = "B";
2936 else if (dm->cut_version == ODM_CUT_C)
2937 cut = "C";
2938 else if (dm->cut_version == ODM_CUT_D)
2939 cut = "D";
2940 else if (dm->cut_version == ODM_CUT_E)
2941 cut = "E";
2942 else if (dm->cut_version == ODM_CUT_F)
2943 cut = "F";
2944 else if (dm->cut_version == ODM_CUT_G)
2945 cut = "G";
2946 else if (dm->cut_version == ODM_CUT_H)
2947 cut = "H";
2948 else if (dm->cut_version == ODM_CUT_I)
2949 cut = "I";
2950 else if (dm->cut_version == ODM_CUT_J)
2951 cut = "J";
2952 else if (dm->cut_version == ODM_CUT_K)
2953 cut = "K";
2954 else if (dm->cut_version == ODM_CUT_L)
2955 cut = "L";
2956 else if (dm->cut_version == ODM_CUT_M)
2957 cut = "M";
2958 else if (dm->cut_version == ODM_CUT_N)
2959 cut = "N";
2960 else if (dm->cut_version == ODM_CUT_O)
2961 cut = "O";
2962 else if (dm->cut_version == ODM_CUT_TEST)
2963 cut = "TEST";
2964 else
2965 cut = "UNKNOWN";
2966
2967 PDM_SNPF(out_len, used, output + used, out_len - used, " %-35s: %d\n",
2968 "RFE type", dm->rfe_type);
2969 PDM_SNPF(out_len, used, output + used, out_len - used, " %-35s: %s\n",
2970 "CART_Ver", cut);
2971 PDM_SNPF(out_len, used, output + used, out_len - used, " %-35s: %d\n",
2972 "PHY Para Ver", odm_get_hw_img_version(dm));
2973 PDM_SNPF(out_len, used, output + used, out_len - used, " %-35s: %d\n",
2974 "PHY Para Commit date", date);
2975 PDM_SNPF(out_len, used, output + used, out_len - used, " %-35s: %s\n",
2976 "PHY Para Commit by", commit_by);
2977 PDM_SNPF(out_len, used, output + used, out_len - used, " %-35s: %d\n",
2978 "PHY Para Release Ver", release_ver);
2979
2980 PDM_SNPF(out_len, used, output + used, out_len - used,
2981 " %-35s: %d (Subversion: %d)\n", "FW Ver", dm->fw_version,
2982 dm->fw_sub_version);
2983
2984 /* @1 PHY DM version List */
2985 PDM_SNPF(out_len, used, output + used, out_len - used, "%-35s\n",
2986 "% PHYDM version %");
2987 PDM_SNPF(out_len, used, output + used, out_len - used, " %-35s: %s\n",
2988 "Code base", PHYDM_CODE_BASE);
2989 #ifdef PHYDM_SVN_REV
2990 PDM_SNPF(out_len, used, output + used, out_len - used, " %-35s: %s\n",
2991 "PHYDM SVN Ver", PHYDM_SVN_REV);
2992 #endif
2993 PDM_SNPF(out_len, used, output + used, out_len - used, " %-35s: %s\n",
2994 "Release Date", PHYDM_RELEASE_DATE);
2995 PDM_SNPF(out_len, used, output + used, out_len - used, " %-35s: %s\n",
2996 "Adaptivity", ADAPTIVITY_VERSION);
2997 PDM_SNPF(out_len, used, output + used, out_len - used, " %-35s: %s\n",
2998 "DIG", DIG_VERSION);
2999 PDM_SNPF(out_len, used, output + used, out_len - used, " %-35s: %s\n",
3000 "CFO Tracking", CFO_TRACKING_VERSION);
3001 #ifdef CONFIG_PHYDM_ANTENNA_DIVERSITY
3002 PDM_SNPF(out_len, used, output + used, out_len - used, " %-35s: %s\n",
3003 "AntDiv", ANTDIV_VERSION);
3004 #endif
3005 #ifdef CONFIG_DYNAMIC_TX_TWR
3006 PDM_SNPF(out_len, used, output + used, out_len - used, " %-35s: %s\n",
3007 "Dynamic TxPower", DYNAMIC_TXPWR_VERSION);
3008 #endif
3009 PDM_SNPF(out_len, used, output + used, out_len - used, " %-35s: %s\n",
3010 "RA Info", RAINFO_VERSION);
3011 #if (DM_ODM_SUPPORT_TYPE & ODM_WIN)
3012 PDM_SNPF(out_len, used, output + used, out_len - used, " %-35s: %s\n",
3013 "AntDetect", ANTDECT_VERSION);
3014 #endif
3015 #ifdef CONFIG_PATH_DIVERSITY
3016 PDM_SNPF(out_len, used, output + used, out_len - used, " %-35s: %s\n",
3017 "PathDiv", PATHDIV_VERSION);
3018 #endif
3019 #ifdef CONFIG_ADAPTIVE_SOML
3020 PDM_SNPF(out_len, used, output + used, out_len - used, " %-35s: %s\n",
3021 "Adaptive SOML", ADAPTIVE_SOML_VERSION);
3022 #endif
3023 #if (PHYDM_LA_MODE_SUPPORT)
3024 PDM_SNPF(out_len, used, output + used, out_len - used, " %-35s: %s\n",
3025 "LA mode", DYNAMIC_LA_MODE);
3026 #endif
3027 #ifdef PHYDM_PRIMARY_CCA
3028 PDM_SNPF(out_len, used, output + used, out_len - used, " %-35s: %s\n",
3029 "Primary CCA", PRIMARYCCA_VERSION);
3030 #endif
3031 PDM_SNPF(out_len, used, output + used, out_len - used, " %-35s: %s\n",
3032 "DFS", DFS_VERSION);
3033
3034 #if (RTL8822B_SUPPORT)
3035 if (dm->support_ic_type & ODM_RTL8822B)
3036 PDM_SNPF(out_len, used, output + used, out_len - used,
3037 " %-35s: %s\n", "PHY config 8822B",
3038 PHY_CONFIG_VERSION_8822B);
3039
3040 #endif
3041 #if (RTL8197F_SUPPORT)
3042 if (dm->support_ic_type & ODM_RTL8197F)
3043 PDM_SNPF(out_len, used, output + used, out_len - used,
3044 " %-35s: %s\n", "PHY config 8197F",
3045 PHY_CONFIG_VERSION_8197F);
3046 #endif
3047
3048 /*@jj add 20170822*/
3049 #if (RTL8192F_SUPPORT)
3050 if (dm->support_ic_type & ODM_RTL8192F)
3051 PDM_SNPF(out_len, used, output + used, out_len - used,
3052 " %-35s: %s\n", "PHY config 8192F",
3053 PHY_CONFIG_VERSION_8192F);
3054 #endif
3055 #if (RTL8721D_SUPPORT)
3056 if (dm->support_ic_type & ODM_RTL8721D)
3057 PDM_SNPF(out_len, used, output + used, out_len - used,
3058 " %-35s: %s\n", "PHY config 8721D",
3059 PHY_CONFIG_VERSION_8721D);
3060 #endif
3061
3062 #if (RTL8710C_SUPPORT)
3063 if (dm->support_ic_type & ODM_RTL8710C)
3064 PDM_SNPF(out_len, used, output + used, out_len - used,
3065 " %-35s: %s\n", "PHY config 8710C",
3066 PHY_CONFIG_VERSION_8710C);
3067 #endif
3068
3069 *_used = used;
3070 *_out_len = out_len;
3071
3072 #endif /*@#if CONFIG_PHYDM_DEBUG_FUNCTION*/
3073 }
3074
3075 #ifdef CONFIG_PHYDM_DEBUG_FUNCTION
phydm_fw_trace_en_h2c(void * dm_void,boolean enable,u32 fw_dbg_comp,u32 monitor_mode,u32 macid)3076 void phydm_fw_trace_en_h2c(void *dm_void, boolean enable,
3077 u32 fw_dbg_comp, u32 monitor_mode, u32 macid)
3078 {
3079 struct dm_struct *dm = (struct dm_struct *)dm_void;
3080 u8 h2c_parameter[7] = {0};
3081 u8 cmd_length;
3082
3083 if (dm->support_ic_type & PHYDM_IC_3081_SERIES) {
3084 h2c_parameter[0] = enable;
3085 h2c_parameter[1] = (u8)(fw_dbg_comp & MASKBYTE0);
3086 h2c_parameter[2] = (u8)((fw_dbg_comp & MASKBYTE1) >> 8);
3087 h2c_parameter[3] = (u8)((fw_dbg_comp & MASKBYTE2) >> 16);
3088 h2c_parameter[4] = (u8)((fw_dbg_comp & MASKBYTE3) >> 24);
3089 h2c_parameter[5] = (u8)monitor_mode;
3090 h2c_parameter[6] = (u8)macid;
3091 cmd_length = 7;
3092
3093 } else {
3094 h2c_parameter[0] = enable;
3095 h2c_parameter[1] = (u8)monitor_mode;
3096 h2c_parameter[2] = (u8)macid;
3097 cmd_length = 3;
3098 }
3099
3100 PHYDM_DBG(dm, DBG_FW_TRACE,
3101 "[H2C] FW_debug_en: (( %d )), mode: (( %d )), macid: (( %d ))\n",
3102 enable, monitor_mode, macid);
3103
3104 odm_fill_h2c_cmd(dm, PHYDM_H2C_FW_TRACE_EN, cmd_length, h2c_parameter);
3105 }
3106
phydm_get_per_path_txagc(void * dm_void,u8 path,u32 * _used,char * output,u32 * _out_len)3107 void phydm_get_per_path_txagc(void *dm_void, u8 path, u32 *_used, char *output,
3108 u32 *_out_len)
3109 {
3110 struct dm_struct *dm = (struct dm_struct *)dm_void;
3111 u8 rate_idx = 0;
3112 u8 txagc = 0;
3113 u32 used = *_used;
3114 u32 out_len = *_out_len;
3115
3116 #ifdef PHYDM_COMMON_API_SUPPORT
3117 if (!(dm->support_ic_type & CMN_API_SUPPORT_IC))
3118 return;
3119
3120 if (dm->num_rf_path == 1 && path > RF_PATH_A)
3121 return;
3122 else if (dm->num_rf_path == 2 && path > RF_PATH_B)
3123 return;
3124 else if (dm->num_rf_path == 3 && path > RF_PATH_C)
3125 return;
3126 else if (dm->num_rf_path == 4 && path > RF_PATH_D)
3127 return;
3128
3129 for (rate_idx = 0; rate_idx <= 0x53; rate_idx++) {
3130 if (!(dm->support_ic_type & PHYDM_IC_ABOVE_3SS) &&
3131 ((rate_idx >= ODM_RATEMCS16 &&
3132 rate_idx < ODM_RATEVHTSS1MCS0) ||
3133 rate_idx >= ODM_RATEVHTSS3MCS0))
3134 continue;
3135
3136 if (rate_idx == ODM_RATE1M)
3137 PDM_SNPF(out_len, used, output + used, out_len - used,
3138 " %-35s\n", "CCK====>");
3139 else if (rate_idx == ODM_RATE6M)
3140 PDM_SNPF(out_len, used, output + used, out_len - used,
3141 "\n %-35s\n", "OFDM====>");
3142 else if (rate_idx == ODM_RATEMCS0)
3143 PDM_SNPF(out_len, used, output + used, out_len - used,
3144 "\n %-35s\n", "HT 1ss====>");
3145 else if (rate_idx == ODM_RATEMCS8)
3146 PDM_SNPF(out_len, used, output + used, out_len - used,
3147 "\n %-35s\n", "HT 2ss====>");
3148 else if (rate_idx == ODM_RATEMCS16)
3149 PDM_SNPF(out_len, used, output + used, out_len - used,
3150 "\n %-35s\n", "HT 3ss====>");
3151 else if (rate_idx == ODM_RATEMCS24)
3152 PDM_SNPF(out_len, used, output + used, out_len - used,
3153 "\n %-35s\n", "HT 4ss====>");
3154 else if (rate_idx == ODM_RATEVHTSS1MCS0)
3155 PDM_SNPF(out_len, used, output + used, out_len - used,
3156 "\n %-35s\n", "VHT 1ss====>");
3157 else if (rate_idx == ODM_RATEVHTSS2MCS0)
3158 PDM_SNPF(out_len, used, output + used, out_len - used,
3159 "\n %-35s\n", "VHT 2ss====>");
3160 else if (rate_idx == ODM_RATEVHTSS3MCS0)
3161 PDM_SNPF(out_len, used, output + used, out_len - used,
3162 "\n %-35s\n", "VHT 3ss====>");
3163 else if (rate_idx == ODM_RATEVHTSS4MCS0)
3164 PDM_SNPF(out_len, used, output + used, out_len - used,
3165 "\n %-35s\n", "VHT 4ss====>");
3166
3167 txagc = phydm_api_get_txagc(dm, (enum rf_path)path, rate_idx);
3168 if (config_phydm_read_txagc_check(txagc))
3169 PDM_SNPF(out_len, used, output + used,
3170 out_len - used, " 0x%02x ", txagc);
3171 else
3172 PDM_SNPF(out_len, used, output + used,
3173 out_len - used, " 0x%s ", "xx");
3174 }
3175 #endif
3176
3177 *_used = used;
3178 *_out_len = out_len;
3179 }
3180
phydm_get_txagc(void * dm_void,u32 * _used,char * output,u32 * _out_len)3181 void phydm_get_txagc(void *dm_void, u32 *_used, char *output, u32 *_out_len)
3182 {
3183 struct dm_struct *dm = (struct dm_struct *)dm_void;
3184 u32 used = *_used;
3185 u32 out_len = *_out_len;
3186 u8 i = 0;
3187
3188 #if (RTL8822C_SUPPORT)
3189 PDM_SNPF(out_len, used, output + used,
3190 out_len - used, "Disabled DPD rate mask: 0x%x\n",
3191 dm->dis_dpd_rate);
3192 #endif
3193
3194 for (i = RF_PATH_A; i < dm->num_rf_path; i++) {
3195 if (i == RF_PATH_A)
3196 PDM_SNPF(out_len, used, output + used, out_len - used,
3197 "%-35s\n", "path-A====================");
3198 else if (i == RF_PATH_B)
3199 PDM_SNPF(out_len, used, output + used, out_len - used,
3200 "\n%-35s\n", "path-B====================");
3201 else if (i == RF_PATH_C)
3202 PDM_SNPF(out_len, used, output + used, out_len - used,
3203 "\n%-35s\n", "path-C====================");
3204 else if (i == RF_PATH_D)
3205 PDM_SNPF(out_len, used, output + used, out_len - used,
3206 "\n%-35s\n", "path-D====================");
3207
3208 phydm_get_per_path_txagc(dm, i, &used, output, &out_len);
3209 }
3210 *_used = used;
3211 *_out_len = out_len;
3212 }
3213
phydm_set_txagc(void * dm_void,u32 * const val,u32 * _used,char * output,u32 * _out_len)3214 void phydm_set_txagc(void *dm_void, u32 *const val, u32 *_used,
3215 char *output, u32 *_out_len)
3216 {
3217 struct dm_struct *dm = (struct dm_struct *)dm_void;
3218 u32 used = *_used;
3219 u32 out_len = *_out_len;
3220 u8 i = 0;
3221 u32 pow = 0; /*power index*/
3222 u8 vht_start_rate = ODM_RATEVHTSS1MCS0;
3223 boolean rpt = true;
3224 enum rf_path path = RF_PATH_A;
3225
3226 /*@val[1] = path*/
3227 /*@val[2] = hw_rate*/
3228 /*@val[3] = power_index*/
3229
3230 #ifdef PHYDM_COMMON_API_SUPPORT
3231 if (!(dm->support_ic_type & CMN_API_SUPPORT_IC))
3232 return;
3233
3234 path = (enum rf_path)val[1];
3235
3236 if (val[1] >= dm->num_rf_path) {
3237 PDM_SNPF(out_len, used, output + used, out_len - used,
3238 "Write path-%d rate_idx-0x%x fail\n", val[1], val[2]);
3239 } else if ((u8)val[2] != 0xff) {
3240 if (phydm_api_set_txagc(dm, val[3], path, (u8)val[2], true))
3241 PDM_SNPF(out_len, used, output + used, out_len - used,
3242 "Write path-%d rate_idx-0x%x = 0x%x\n",
3243 val[1], val[2], val[3]);
3244 else
3245 PDM_SNPF(out_len, used, output + used, out_len - used,
3246 "Write path-%d rate index-0x%x fail\n",
3247 val[1], val[2]);
3248 } else {
3249
3250 if (dm->support_ic_type &
3251 (ODM_RTL8822B | ODM_RTL8821C | ODM_RTL8195B)) {
3252 pow = (val[3] & 0x3f);
3253 pow = BYTE_DUPLICATE_2_DWORD(pow);
3254
3255 for (i = 0; i < ODM_RATEVHTSS2MCS9; i += 4)
3256 rpt &= phydm_api_set_txagc(dm, pow, path, i, 0);
3257 } else if (dm->support_ic_type &
3258 (ODM_RTL8197F | ODM_RTL8192F)) {
3259 pow = (val[3] & 0x3f);
3260 for (i = 0; i <= ODM_RATEMCS15; i++)
3261 rpt &= phydm_api_set_txagc(dm, pow, path, i, 0);
3262 } else if (dm->support_ic_type & ODM_RTL8198F) {
3263 pow = (val[3] & 0x7f);
3264 for (i = 0; i <= ODM_RATEVHTSS4MCS9; i++)
3265 rpt &= phydm_api_set_txagc(dm, pow, path, i, 0);
3266 } else if (dm->support_ic_type &
3267 (ODM_RTL8822C | ODM_RTL8812F | ODM_RTL8197G)) {
3268 pow = (val[3] & 0x7f);
3269 for (i = 0; i <= ODM_RATEMCS15; i++)
3270 rpt &= phydm_api_set_txagc(dm, pow, path, i, 0);
3271 for (i = vht_start_rate; i <= ODM_RATEVHTSS2MCS9; i++)
3272 rpt &= phydm_api_set_txagc(dm, pow, path, i, 0);
3273 } else if (dm->support_ic_type &
3274 (ODM_RTL8721D | ODM_RTL8710C)) {
3275 pow = (val[3] & 0x3f);
3276 for (i = 0; i <= ODM_RATEMCS7; i++)
3277 rpt &= phydm_api_set_txagc(dm, pow, path, i, 0);
3278 } else if (dm->support_ic_type &(ODM_RTL8723F)) {
3279 pow = (val[3] & 0x7f);
3280 for (i = 0; i <= ODM_RATEMCS7; i++)
3281 rpt &= phydm_api_set_txagc(dm, pow, path, i, 0);
3282 }
3283
3284 if (rpt)
3285 PDM_SNPF(out_len, used, output + used, out_len - used,
3286 "Write all TXAGC of path-%d = 0x%x\n",
3287 val[1], val[3]);
3288 else
3289 PDM_SNPF(out_len, used, output + used, out_len - used,
3290 "Write all TXAGC of path-%d fail\n", val[1]);
3291 }
3292
3293 #endif
3294 *_used = used;
3295 *_out_len = out_len;
3296 }
3297
phydm_shift_txagc(void * dm_void,u32 * const val,u32 * _used,char * output,u32 * _out_len)3298 void phydm_shift_txagc(void *dm_void, u32 *const val, u32 *_used, char *output,
3299 u32 *_out_len)
3300 {
3301 struct dm_struct *dm = (struct dm_struct *)dm_void;
3302 u32 used = *_used;
3303 u32 out_len = *_out_len;
3304 u8 i = 0;
3305 u32 pow = 0; /*Power index*/
3306 boolean rpt = true;
3307 u8 vht_start_rate = ODM_RATEVHTSS1MCS0;
3308 enum rf_path path = RF_PATH_A;
3309
3310 #ifdef PHYDM_COMMON_API_SUPPORT
3311 if (!(dm->support_ic_type & CMN_API_SUPPORT_IC))
3312 return;
3313
3314 if (val[1] >= dm->num_rf_path) {
3315 PDM_SNPF(out_len, used, output + used, out_len - used,
3316 "Write path-%d fail\n", val[1]);
3317 return;
3318 }
3319
3320 path = (enum rf_path)val[1];
3321
3322 if ((u8)val[2] == 0) {
3323 /*@{0:-, 1:+} {Pwr Offset}*/
3324 if (dm->support_ic_type & (ODM_RTL8195B | ODM_RTL8821C)) {
3325 for (i = 0; i <= ODM_RATEMCS7; i++) {
3326 pow = phydm_api_get_txagc(dm, path, i) - val[3];
3327 rpt &= phydm_api_set_txagc(dm, pow, path, i, 1);
3328 }
3329 for (i = vht_start_rate; i <= ODM_RATEVHTSS1MCS9; i++) {
3330 pow = phydm_api_get_txagc(dm, path, i) - val[3];
3331 rpt &= phydm_api_set_txagc(dm, pow, path, i, 1);
3332 }
3333 } else if (dm->support_ic_type & (ODM_RTL8822B)) {
3334 for (i = 0; i <= ODM_RATEMCS15; i++) {
3335 pow = phydm_api_get_txagc(dm, path, i) - val[3];
3336 rpt &= phydm_api_set_txagc(dm, pow, path, i, 1);
3337 }
3338 for (i = vht_start_rate; i <= ODM_RATEVHTSS2MCS9; i++) {
3339 pow = phydm_api_get_txagc(dm, path, i) - val[3];
3340 rpt &= phydm_api_set_txagc(dm, pow, path, i, 1);
3341 }
3342 } else if (dm->support_ic_type &
3343 (ODM_RTL8197F | ODM_RTL8192F)) {
3344 for (i = 0; i <= ODM_RATEMCS15; i++) {
3345 pow = phydm_api_get_txagc(dm, path, i) - val[3];
3346 rpt &= phydm_api_set_txagc(dm, pow, path, i, 1);
3347 }
3348 } else if (dm->support_ic_type & ODM_IC_JGR3_SERIES) {
3349 rpt &= phydm_api_shift_txagc(dm, val[3], path, 0);
3350 } else if (dm->support_ic_type &
3351 (ODM_RTL8721D | ODM_RTL8710C)) {
3352 for (i = 0; i <= ODM_RATEMCS7; i++) {
3353 pow = phydm_api_get_txagc(dm, path, i) - val[3];
3354 rpt &= phydm_api_set_txagc(dm, pow, path, i, 1);
3355 }
3356 }
3357 } else if ((u8)val[2] == 1) {
3358 /*@{0:-, 1:+} {Pwr Offset}*/
3359 if (dm->support_ic_type & (ODM_RTL8195B | ODM_RTL8821C)) {
3360 for (i = 0; i <= ODM_RATEMCS7; i++) {
3361 pow = phydm_api_get_txagc(dm, path, i) + val[3];
3362 rpt &= phydm_api_set_txagc(dm, pow, path, i, 1);
3363 }
3364 for (i = vht_start_rate; i <= ODM_RATEVHTSS1MCS9; i++) {
3365 pow = phydm_api_get_txagc(dm, path, i) + val[3];
3366 rpt &= phydm_api_set_txagc(dm, pow, path, i, 1);
3367 }
3368 } else if (dm->support_ic_type & (ODM_RTL8822B)) {
3369 for (i = 0; i <= ODM_RATEMCS15; i++) {
3370 pow = phydm_api_get_txagc(dm, path, i) + val[3];
3371 rpt &= phydm_api_set_txagc(dm, pow, path, i, 1);
3372 }
3373 for (i = vht_start_rate; i <= ODM_RATEVHTSS2MCS9; i++) {
3374 pow = phydm_api_get_txagc(dm, path, i) + val[3];
3375 rpt &= phydm_api_set_txagc(dm, pow, path, i, 1);
3376 }
3377 } else if (dm->support_ic_type &
3378 (ODM_RTL8197F | ODM_RTL8192F)) {
3379 for (i = 0; i <= ODM_RATEMCS15; i++) {
3380 pow = phydm_api_get_txagc(dm, path, i) + val[3];
3381 rpt &= phydm_api_set_txagc(dm, pow, path, i, 1);
3382 }
3383 } else if (dm->support_ic_type & (ODM_RTL8721D |
3384 ODM_RTL8710C)) {
3385 for (i = 0; i <= ODM_RATEMCS7; i++) {
3386 pow = phydm_api_get_txagc(dm, path, i) + val[3];
3387 rpt &= phydm_api_set_txagc(dm, pow, path, i, 1);
3388 }
3389 } else if (dm->support_ic_type &
3390 (ODM_RTL8822C | ODM_RTL8814B | ODM_RTL8814C |
3391 ODM_RTL8812F | ODM_RTL8197G | ODM_RTL8723F)) {
3392 rpt &= phydm_api_shift_txagc(dm, val[3], path, 1);
3393 }
3394 }
3395 #ifdef PHYDM_IC_JGR3_SERIES_SUPPORT
3396 if (dm->support_ic_type & ODM_IC_JGR3_SERIES)
3397 PDM_SNPF(out_len, used, output + used, out_len - used,
3398 "[All rate] Set Path-%d Pow_idx: %s %d\n",
3399 val[1], (val[2] ? "+" : "-"), val[3]);
3400 else
3401 #endif
3402 PDM_SNPF(out_len, used, output + used, out_len - used,
3403 "[All rate] Set Path-%d Pow_idx: %s %d(%d.%s dB)\n",
3404 val[1], (val[2] ? "+" : "-"), val[3], val[3] >> 1,
3405 ((val[3] & 1) ? "5" : "0"));
3406
3407 #endif
3408 *_used = used;
3409 *_out_len = out_len;
3410 }
3411
phydm_set_txagc_dbg(void * dm_void,char input[][16],u32 * _used,char * output,u32 * _out_len)3412 void phydm_set_txagc_dbg(void *dm_void, char input[][16], u32 *_used,
3413 char *output, u32 *_out_len)
3414 {
3415 struct dm_struct *dm = (struct dm_struct *)dm_void;
3416 u32 used = *_used;
3417 u32 out_len = *_out_len;
3418 u32 var1[10] = {0};
3419 char help[] = "-h";
3420 u8 i = 0, input_idx = 0;
3421
3422 for (i = 0; i < 5; i++) {
3423 PHYDM_SSCANF(input[i + 1], DCMD_HEX, &var1[i]);
3424 input_idx++;
3425 }
3426
3427 if ((strcmp(input[1], help) == 0)) {
3428 PDM_SNPF(out_len, used, output + used, out_len - used,
3429 "{Dis:0, En:1} {pathA~D(0~3)} {rate_idx(Hex), All_rate:0xff} {txagc_idx (Hex)}\n");
3430 PDM_SNPF(out_len, used, output + used, out_len - used,
3431 "{Pwr Shift(All rate):2} {pathA~D(0~3)} {0:-, 1:+} {Pwr Offset(Hex)}\n");
3432 #ifdef PHYDM_IC_JGR3_SERIES_SUPPORT
3433 PDM_SNPF(out_len, used, output + used, out_len - used,
3434 "{reset all rate ref/diff to 0x0:0xff}\n");
3435 #endif
3436 } else if (var1[0] == 0) {
3437 dm->is_disable_phy_api = false;
3438 PDM_SNPF(out_len, used, output + used, out_len - used,
3439 "Disable API debug mode\n");
3440 } else if (var1[0] == 1) {
3441 dm->is_disable_phy_api = false;
3442 #ifdef CONFIG_TXAGC_DEBUG_8822C
3443 config_phydm_write_txagc_8822c(dm, var1[3],
3444 (enum rf_path)var1[1],
3445 (u8)var1[2]);
3446 #elif (defined(CONFIG_TXAGC_DEBUG_8814B))
3447 config_phydm_write_txagc_8814b(dm, var1[3],
3448 (enum rf_path)var1[1],
3449 (u8)var1[2]);
3450 #else
3451 phydm_set_txagc(dm, (u32 *)var1, &used, output, &out_len);
3452 #endif
3453 dm->is_disable_phy_api = true;
3454 } else if (var1[0] == 2) {
3455 PHYDM_SSCANF(input[4], DCMD_HEX, &var1[3]);
3456 dm->is_disable_phy_api = false;
3457 phydm_shift_txagc(dm, (u32 *)var1, &used, output, &out_len);
3458 dm->is_disable_phy_api = true;
3459 }
3460 #ifdef PHYDM_IC_JGR3_SERIES_SUPPORT
3461 else if (var1[0] == 0xff) {
3462 dm->is_disable_phy_api = false;
3463 phydm_reset_txagc(dm);
3464 dm->is_disable_phy_api = true;
3465 }
3466 #endif
3467 #ifdef CONFIG_TXAGC_DEBUG_8822C
3468 else if (var1[0] == 3) {
3469 dm->is_disable_phy_api = false;
3470 phydm_txagc_tab_buff_show_8822c(dm);
3471 dm->is_disable_phy_api = true;
3472 } else if (var1[0] == 4) {
3473 dm->is_disable_phy_api = false;
3474 config_phydm_set_txagc_to_hw_8822c(dm);
3475 dm->is_disable_phy_api = true;
3476 }
3477 #elif (defined(CONFIG_TXAGC_DEBUG_8814B))
3478 else if (var1[0] == 3) {
3479 dm->is_disable_phy_api = false;
3480 phydm_txagc_tab_buff_show_8814b(dm);
3481 dm->is_disable_phy_api = true;
3482 } else if (var1[0] == 4) {
3483 dm->is_disable_phy_api = false;
3484 config_phydm_set_txagc_to_hw_8814b(dm);
3485 dm->is_disable_phy_api = true;
3486 }
3487 #endif
3488
3489 *_used = used;
3490 *_out_len = out_len;
3491 }
3492
phydm_cmn_msg_setting(void * dm_void,u32 * val,u32 * _used,char * output,u32 * _out_len)3493 void phydm_cmn_msg_setting(void *dm_void, u32 *val, u32 *_used,
3494 char *output, u32 *_out_len)
3495 {
3496 struct dm_struct *dm = (struct dm_struct *)dm_void;
3497 u32 used = *_used;
3498 u32 out_len = *_out_len;
3499
3500 if (val[1] == 1) {
3501 dm->cmn_dbg_msg_period = (u8)val[2];
3502
3503 if (dm->cmn_dbg_msg_period < PHYDM_WATCH_DOG_PERIOD)
3504 dm->cmn_dbg_msg_period = PHYDM_WATCH_DOG_PERIOD;
3505
3506 PDM_SNPF(out_len, used, output + used, out_len - used,
3507 "cmn_dbg_msg_period=%d\n", dm->cmn_dbg_msg_period);
3508 }
3509
3510 #ifdef PHYDM_PHYSTAUS_AUTO_SWITCH
3511 if (val[1] == 1)
3512 phydm_physts_auto_switch_jgr3_set(dm, true, BIT(4) | BIT(1));
3513 else
3514 phydm_physts_auto_switch_jgr3_set(dm, false, BIT(1));
3515 #endif
3516 *_used = used;
3517 *_out_len = out_len;
3518 }
3519
phydm_debug_trace(void * dm_void,char input[][16],u32 * _used,char * output,u32 * _out_len)3520 void phydm_debug_trace(void *dm_void, char input[][16], u32 *_used,
3521 char *output, u32 *_out_len)
3522 {
3523 struct dm_struct *dm = (struct dm_struct *)dm_void;
3524 u64 pre_debug_components, one = 1;
3525 u64 comp = 0;
3526 u32 used = *_used;
3527 u32 out_len = *_out_len;
3528 u32 val[10] = {0};
3529 u8 i = 0;
3530
3531 for (i = 0; i < 5; i++) {
3532 PHYDM_SSCANF(input[i + 1], DCMD_DECIMAL, &val[i]);
3533 }
3534 comp = dm->debug_components;
3535 pre_debug_components = dm->debug_components;
3536
3537 PDM_SNPF(out_len, used, output + used, out_len - used,
3538 "\n================================\n");
3539 if (val[0] == 100) {
3540 PDM_SNPF(out_len, used, output + used, out_len - used,
3541 "[DBG MSG] Component Selection\n");
3542 PDM_SNPF(out_len, used, output + used, out_len - used,
3543 "================================\n");
3544 PDM_SNPF(out_len, used, output + used, out_len - used,
3545 "00. (( %s ))DIG\n",
3546 ((comp & DBG_DIG) ? ("V") : (".")));
3547 PDM_SNPF(out_len, used, output + used, out_len - used,
3548 "01. (( %s ))RA_MASK\n",
3549 ((comp & DBG_RA_MASK) ? ("V") : (".")));
3550 PDM_SNPF(out_len, used, output + used, out_len - used,
3551 "02. (( %s ))DYN_TXPWR\n",
3552 ((comp & DBG_DYN_TXPWR) ? ("V") : (".")));
3553 PDM_SNPF(out_len, used, output + used, out_len - used,
3554 "03. (( %s ))FA_CNT\n",
3555 ((comp & DBG_FA_CNT) ? ("V") : (".")));
3556 PDM_SNPF(out_len, used, output + used, out_len - used,
3557 "04. (( %s ))RSSI_MNTR\n",
3558 ((comp & DBG_RSSI_MNTR) ? ("V") : (".")));
3559 PDM_SNPF(out_len, used, output + used, out_len - used,
3560 "05. (( %s ))CCKPD\n",
3561 ((comp & DBG_CCKPD) ? ("V") : (".")));
3562 PDM_SNPF(out_len, used, output + used, out_len - used,
3563 "06. (( %s ))ANT_DIV\n",
3564 ((comp & DBG_ANT_DIV) ? ("V") : (".")));
3565 PDM_SNPF(out_len, used, output + used, out_len - used,
3566 "07. (( %s ))SMT_ANT\n",
3567 ((comp & DBG_SMT_ANT) ? ("V") : (".")));
3568 PDM_SNPF(out_len, used, output + used, out_len - used,
3569 "08. (( %s ))PWR_TRAIN\n",
3570 ((comp & DBG_PWR_TRAIN) ? ("V") : (".")));
3571 PDM_SNPF(out_len, used, output + used, out_len - used,
3572 "09. (( %s ))RA\n",
3573 ((comp & DBG_RA) ? ("V") : (".")));
3574 PDM_SNPF(out_len, used, output + used, out_len - used,
3575 "10. (( %s ))PATH_DIV\n",
3576 ((comp & DBG_PATH_DIV) ? ("V") : (".")));
3577 PDM_SNPF(out_len, used, output + used, out_len - used,
3578 "11. (( %s ))DFS\n",
3579 ((comp & DBG_DFS) ? ("V") : (".")));
3580 PDM_SNPF(out_len, used, output + used, out_len - used,
3581 "12. (( %s ))DYN_ARFR\n",
3582 ((comp & DBG_DYN_ARFR) ? ("V") : (".")));
3583 PDM_SNPF(out_len, used, output + used, out_len - used,
3584 "13. (( %s ))ADAPTIVITY\n",
3585 ((comp & DBG_ADPTVTY) ? ("V") : (".")));
3586 PDM_SNPF(out_len, used, output + used, out_len - used,
3587 "14. (( %s ))CFO_TRK\n",
3588 ((comp & DBG_CFO_TRK) ? ("V") : (".")));
3589 PDM_SNPF(out_len, used, output + used, out_len - used,
3590 "15. (( %s ))ENV_MNTR\n",
3591 ((comp & DBG_ENV_MNTR) ? ("V") : (".")));
3592 PDM_SNPF(out_len, used, output + used, out_len - used,
3593 "16. (( %s ))PRI_CCA\n",
3594 ((comp & DBG_PRI_CCA) ? ("V") : (".")));
3595 PDM_SNPF(out_len, used, output + used, out_len - used,
3596 "17. (( %s ))ADPTV_SOML\n",
3597 ((comp & DBG_ADPTV_SOML) ? ("V") : (".")));
3598 PDM_SNPF(out_len, used, output + used, out_len - used,
3599 "18. (( %s ))LNA_SAT_CHK\n",
3600 ((comp & DBG_LNA_SAT_CHK) ? ("V") : (".")));
3601 PDM_SNPF(out_len, used, output + used, out_len - used,
3602 "20. (( %s ))PHY_STATUS\n",
3603 ((comp & DBG_PHY_STATUS) ? ("V") : (".")));
3604 PDM_SNPF(out_len, used, output + used, out_len - used,
3605 "21. (( %s ))TMP\n",
3606 ((comp & DBG_TMP) ? ("V") : (".")));
3607 PDM_SNPF(out_len, used, output + used, out_len - used,
3608 "22. (( %s ))FW_DBG_TRACE\n",
3609 ((comp & DBG_FW_TRACE) ? ("V") : (".")));
3610 PDM_SNPF(out_len, used, output + used, out_len - used,
3611 "23. (( %s ))TXBF\n",
3612 ((comp & DBG_TXBF) ? ("V") : (".")));
3613 PDM_SNPF(out_len, used, output + used, out_len - used,
3614 "24. (( %s ))COMMON_FLOW\n",
3615 ((comp & DBG_COMMON_FLOW) ? ("V") : (".")));
3616 PDM_SNPF(out_len, used, output + used, out_len - used,
3617 "28. (( %s ))PHY_CONFIG\n",
3618 ((comp & ODM_PHY_CONFIG) ? ("V") : (".")));
3619 PDM_SNPF(out_len, used, output + used, out_len - used,
3620 "29. (( %s ))INIT\n",
3621 ((comp & ODM_COMP_INIT) ? ("V") : (".")));
3622 PDM_SNPF(out_len, used, output + used, out_len - used,
3623 "30. (( %s ))COMMON\n",
3624 ((comp & DBG_CMN) ? ("V") : (".")));
3625 PDM_SNPF(out_len, used, output + used, out_len - used,
3626 "31. (( %s ))API\n",
3627 ((comp & ODM_COMP_API) ? ("V") : (".")));
3628 PDM_SNPF(out_len, used, output + used, out_len - used,
3629 "================================\n");
3630
3631 } else if (val[0] == 101) {
3632 dm->debug_components = 0;
3633 PDM_SNPF(out_len, used, output + used, out_len - used,
3634 "Disable all debug components\n");
3635 } else {
3636 if (val[1] == 1) /*@enable*/
3637 dm->debug_components |= (one << val[0]);
3638 else if (val[1] == 2) /*@disable*/
3639 dm->debug_components &= ~(one << val[0]);
3640 else
3641 PDM_SNPF(out_len, used, output + used, out_len - used,
3642 "[Warning] 1:on, 2:off\n");
3643
3644 if ((BIT(val[0]) == DBG_PHY_STATUS) && val[1] == 1) {
3645 dm->phy_dbg_info.show_phy_sts_all_pkt = (u8)val[2];
3646 dm->phy_dbg_info.show_phy_sts_max_cnt = (u16)val[3];
3647
3648 PDM_SNPF(out_len, used, output + used, out_len - used,
3649 "show_all_pkt=%d, show_max_num=%d\n\n",
3650 dm->phy_dbg_info.show_phy_sts_all_pkt,
3651 dm->phy_dbg_info.show_phy_sts_max_cnt);
3652
3653 } else if (BIT(val[0]) == DBG_CMN) {
3654 phydm_cmn_msg_setting(dm, val, &used, output, &out_len);
3655 }
3656 }
3657 PDM_SNPF(out_len, used, output + used, out_len - used,
3658 "pre-DbgComponents = 0x%llx\n", pre_debug_components);
3659 PDM_SNPF(out_len, used, output + used, out_len - used,
3660 "Curr-DbgComponents = 0x%llx\n", dm->debug_components);
3661 PDM_SNPF(out_len, used, output + used, out_len - used,
3662 "================================\n");
3663
3664 *_used = used;
3665 *_out_len = out_len;
3666 }
3667
phydm_fw_debug_trace(void * dm_void,char input[][16],u32 * _used,char * output,u32 * _out_len)3668 void phydm_fw_debug_trace(void *dm_void, char input[][16], u32 *_used,
3669 char *output, u32 *_out_len)
3670 {
3671 struct dm_struct *dm = (struct dm_struct *)dm_void;
3672 u32 used = *_used;
3673 u32 out_len = *_out_len;
3674 u32 val[10] = {0};
3675 u8 i, input_idx = 0;
3676 char help[] = "-h";
3677 u32 pre_fw_debug_components = 0, one = 1;
3678 u32 comp = 0;
3679
3680 for (i = 0; i < 5; i++) {
3681 PHYDM_SSCANF(input[i + 1], DCMD_DECIMAL, &val[i]);
3682 input_idx++;
3683 }
3684
3685 if (input_idx == 0)
3686 return;
3687
3688 pre_fw_debug_components = dm->fw_debug_components;
3689 comp = dm->fw_debug_components;
3690
3691 if ((strcmp(input[1], help) == 0)) {
3692 PDM_SNPF(out_len, used, output + used, out_len - used,
3693 "{dbg_comp} {1:en, 2:dis} {mode} {macid}\n");
3694 } else {
3695 if (val[0] == 101) {
3696 dm->fw_debug_components = 0;
3697 PDM_SNPF(out_len, used, output + used, out_len - used,
3698 "%s\n", "Clear all fw debug components");
3699 } else {
3700 if (val[1] == 1) /*@enable*/
3701 dm->fw_debug_components |= (one << val[0]);
3702 else if (val[1] == 2) /*@disable*/
3703 dm->fw_debug_components &= ~(one << val[0]);
3704 else
3705 PDM_SNPF(out_len, used, output + used,
3706 out_len - used, "%s\n",
3707 "[Warning!!!] 1:enable, 2:disable");
3708 }
3709
3710 comp = dm->fw_debug_components;
3711
3712 if (comp == 0) {
3713 dm->debug_components &= ~DBG_FW_TRACE;
3714 /*@H2C to enable C2H Msg*/
3715 phydm_fw_trace_en_h2c(dm, false, comp, val[2], val[3]);
3716 } else {
3717 dm->debug_components |= DBG_FW_TRACE;
3718 /*@H2C to enable C2H Msg*/
3719 phydm_fw_trace_en_h2c(dm, true, comp, val[2], val[3]);
3720 }
3721 }
3722 }
3723
3724 #if (ODM_IC_11N_SERIES_SUPPORT)
phydm_dump_bb_reg_n(void * dm_void,u32 * _used,char * output,u32 * _out_len)3725 void phydm_dump_bb_reg_n(void *dm_void, u32 *_used, char *output, u32 *_out_len)
3726 {
3727 struct dm_struct *dm = (struct dm_struct *)dm_void;
3728 u32 addr = 0;
3729 u32 used = *_used;
3730 u32 out_len = *_out_len;
3731
3732 /*@For Nseries IC we only need to dump page8 to pageF using 3 digits*/
3733 for (addr = 0x800; addr < 0xfff; addr += 4) {
3734 PDM_VAST_SNPF(out_len, used, output + used, out_len - used,
3735 "0x%03x 0x%08x\n",
3736 addr, odm_get_bb_reg(dm, addr, MASKDWORD));
3737 }
3738
3739 *_used = used;
3740 *_out_len = out_len;
3741 }
3742 #endif
3743
3744 #if (ODM_IC_11AC_SERIES_SUPPORT)
phydm_dump_bb_reg_ac(void * dm_void,u32 * _used,char * output,u32 * _out_len)3745 void phydm_dump_bb_reg_ac(void *dm_void, u32 *_used, char *output,
3746 u32 *_out_len)
3747 {
3748 struct dm_struct *dm = (struct dm_struct *)dm_void;
3749 u32 addr = 0;
3750 u32 used = *_used;
3751 u32 out_len = *_out_len;
3752
3753 for (addr = 0x800; addr < 0xfff; addr += 4) {
3754 PDM_VAST_SNPF(out_len, used, output + used, out_len - used,
3755 "0x%04x 0x%08x\n",
3756 addr, odm_get_bb_reg(dm, addr, MASKDWORD));
3757 }
3758
3759 if (!(dm->support_ic_type &
3760 (ODM_RTL8822B | ODM_RTL8814A | ODM_RTL8821C | ODM_RTL8195B)))
3761 goto rpt_reg;
3762
3763 if (dm->rf_type > RF_2T2R) {
3764 for (addr = 0x1800; addr < 0x18ff; addr += 4)
3765 PDM_VAST_SNPF(out_len, used, output + used,
3766 out_len - used, "0x%04x 0x%08x\n",
3767 addr,
3768 odm_get_bb_reg(dm, addr, MASKDWORD));
3769 }
3770
3771 if (dm->rf_type > RF_3T3R) {
3772 for (addr = 0x1a00; addr < 0x1aff; addr += 4)
3773 PDM_VAST_SNPF(out_len, used, output + used,
3774 out_len - used, "0x%04x 0x%08x\n",
3775 addr,
3776 odm_get_bb_reg(dm, addr, MASKDWORD));
3777 }
3778
3779 for (addr = 0x1900; addr < 0x19ff; addr += 4)
3780 PDM_VAST_SNPF(out_len, used, output + used, out_len - used,
3781 "0x%04x 0x%08x\n",
3782 addr, odm_get_bb_reg(dm, addr, MASKDWORD));
3783
3784 for (addr = 0x1c00; addr < 0x1cff; addr += 4)
3785 PDM_VAST_SNPF(out_len, used, output + used, out_len - used,
3786 "0x%04x 0x%08x\n",
3787 addr, odm_get_bb_reg(dm, addr, MASKDWORD));
3788
3789 for (addr = 0x1f00; addr < 0x1fff; addr += 4)
3790 PDM_VAST_SNPF(out_len, used, output + used, out_len - used,
3791 "0x%04x 0x%08x\n",
3792 addr, odm_get_bb_reg(dm, addr, MASKDWORD));
3793
3794 rpt_reg:
3795
3796 *_used = used;
3797 *_out_len = out_len;
3798 }
3799
3800 #endif
3801
3802 #ifdef PHYDM_IC_JGR3_SERIES_SUPPORT
phydm_dump_bb_reg_jgr3(void * dm_void,u32 * _used,char * output,u32 * _out_len)3803 void phydm_dump_bb_reg_jgr3(void *dm_void, u32 *_used, char *output,
3804 u32 *_out_len)
3805 {
3806 struct dm_struct *dm = (struct dm_struct *)dm_void;
3807 u32 addr = 0;
3808 u32 used = *_used;
3809 u32 out_len = *_out_len;
3810
3811 if (dm->support_ic_type & ODM_IC_JGR3_SERIES) {
3812 for (addr = 0x800; addr < 0xdff; addr += 4)
3813 PDM_VAST_SNPF(out_len, used, output + used,
3814 out_len - used, "0x%04x 0x%08x\n", addr,
3815 odm_get_bb_reg(dm, addr, MASKDWORD));
3816
3817 for (addr = 0x1800; addr < 0x1aff; addr += 4)
3818 PDM_VAST_SNPF(out_len, used, output + used,
3819 out_len - used, "0x%04x 0x%08x\n", addr,
3820 odm_get_bb_reg(dm, addr, MASKDWORD));
3821
3822 for (addr = 0x1c00; addr < 0x1eff; addr += 4)
3823 PDM_VAST_SNPF(out_len, used, output + used,
3824 out_len - used, "0x%04x 0x%08x\n", addr,
3825 odm_get_bb_reg(dm, addr, MASKDWORD));
3826
3827 #if (defined(RTL8723F_SUPPORT))
3828 if (dm->support_ic_type & ODM_RTL8723F) {
3829 for (addr = 0x2a00; addr < 0x2a5c; addr += 4) {
3830 PDM_VAST_SNPF(out_len, used, output + used,
3831 out_len - used, "0x%04x 0x%08x\n",
3832 addr,
3833 odm_get_bb_reg(dm, addr,
3834 MASKDWORD));
3835 }
3836 }
3837 #endif
3838
3839 for (addr = 0x4000; addr < 0x41ff; addr += 4)
3840 PDM_VAST_SNPF(out_len, used, output + used,
3841 out_len - used, "0x%04x 0x%08x\n", addr,
3842 odm_get_bb_reg(dm, addr, MASKDWORD));
3843
3844 #if (defined(RTL8723F_SUPPORT))
3845 if (dm->support_ic_type & ODM_RTL8723F) {
3846 for (addr = 0x4300; addr < 0x43bf; addr += 4) {
3847 PDM_VAST_SNPF(out_len, used, output + used,
3848 out_len - used, "0x%04x 0x%08x\n",
3849 addr,
3850 odm_get_bb_reg(dm, addr,
3851 MASKDWORD));
3852 }
3853 }
3854 #endif
3855 }
3856 *_used = used;
3857 *_out_len = out_len;
3858 }
3859
phydm_dump_bb_reg2_jgr3(void * dm_void,u32 * _used,char * output,u32 * _out_len)3860 void phydm_dump_bb_reg2_jgr3(void *dm_void, u32 *_used, char *output,
3861 u32 *_out_len)
3862 {
3863 struct dm_struct *dm = (struct dm_struct *)dm_void;
3864 u32 addr = 0;
3865 u32 used = *_used;
3866 u32 out_len = *_out_len;
3867
3868 if (!(dm->support_ic_type & ODM_IC_JGR3_SERIES))
3869 return;
3870
3871 #if (defined(PHYDM_COMPILE_ABOVE_4SS))
3872 if (dm->support_ic_type & PHYDM_IC_ABOVE_4SS) {
3873 for (addr = 0x5000; addr < 0x53ff; addr += 4) {
3874 PDM_VAST_SNPF(out_len, used, output + used,
3875 out_len - used, "0x%04x 0x%08x\n",
3876 addr,
3877 odm_get_bb_reg(dm, addr, MASKDWORD));
3878 }
3879 }
3880 #endif
3881
3882 /* @Do not change the order of page-2C/2D*/
3883 PDM_VAST_SNPF(out_len, used, output + used, out_len - used,
3884 "------ BB report-register start ------\n");
3885
3886 #if (defined(RTL8723F_SUPPORT))
3887 if (dm->support_ic_type & ODM_RTL8723F) {
3888 for (addr = 0x2aa0; addr < 0x2aff; addr += 4) {
3889 PDM_VAST_SNPF(out_len, used, output + used,
3890 out_len - used, "0x%04x 0x%08x\n",
3891 addr,
3892 odm_get_bb_reg(dm, addr, MASKDWORD));
3893 }
3894 }
3895 #endif
3896
3897 for (addr = 0x2c00; addr < 0x2dff; addr += 4) {
3898 PDM_VAST_SNPF(out_len, used, output + used, out_len - used,
3899 "0x%04x 0x%08x\n",
3900 addr, odm_get_bb_reg(dm, addr, MASKDWORD));
3901 }
3902
3903 *_used = used;
3904 *_out_len = out_len;
3905 }
3906
phydm_get_per_path_anapar_jgr3(void * dm_void,u8 path,u32 * _used,char * output,u32 * _out_len)3907 void phydm_get_per_path_anapar_jgr3(void *dm_void, u8 path, u32 *_used,
3908 char *output, u32 *_out_len)
3909 {
3910 struct dm_struct *dm = (struct dm_struct *)dm_void;
3911 u8 state = 0;
3912 u8 state_bp = 0;
3913 u32 control_bb = 0;
3914 u32 control_pow = 0;
3915 u32 used = *_used;
3916 u32 out_len = *_out_len;
3917 u32 reg_idx = 0;
3918 u32 dbgport_idx = 0;
3919 u32 dbgport_val = 0;
3920
3921 PDM_VAST_SNPF(out_len, used, output + used, out_len - used,
3922 "path-%d:\n", path);
3923
3924 if (path == RF_PATH_A) {
3925 reg_idx = R_0x1830;
3926 dbgport_idx = 0x9F0;
3927 } else if (path == RF_PATH_B) {
3928 reg_idx = R_0x4130;
3929 dbgport_idx = 0xBF0;
3930 } else if (path == RF_PATH_C) {
3931 reg_idx = R_0x5230;
3932 dbgport_idx = 0xDF0;
3933 } else if (path == RF_PATH_D) {
3934 reg_idx = R_0x5330;
3935 dbgport_idx = 0xFF0;
3936 }
3937
3938 state_bp = (u8)odm_get_bb_reg(dm, reg_idx, 0xf00000);
3939 odm_set_bb_reg(dm, reg_idx, 0x38000000, 0x5); /* @read en*/
3940
3941 for (state = 0; state <= 0xf; state++) {
3942 odm_set_bb_reg(dm, reg_idx, 0xF00000, state);
3943 if (phydm_set_bb_dbg_port(dm, DBGPORT_PRI_3, dbgport_idx)) {
3944 dbgport_val = phydm_get_bb_dbg_port_val(dm);
3945 phydm_release_bb_dbg_port(dm);
3946 } else {
3947 PDM_VAST_SNPF(out_len, used, output + used,
3948 out_len - used,
3949 "state:0x%x = read dbg_port error!\n",
3950 state);
3951 }
3952 control_bb = (dbgport_val & 0xFFFF0) >> 4;
3953 control_pow = dbgport_val & 0xF;
3954 PDM_VAST_SNPF(out_len, used, output + used, out_len - used,
3955 "state:0x%x = control_bb:0x%x pow_bb:0x%x\n",
3956 state, control_bb, control_pow);
3957 }
3958 odm_set_bb_reg(dm, reg_idx, 0xf00000, state_bp);
3959 odm_set_bb_reg(dm, reg_idx, 0x38000000, 0x6); /* @write en*/
3960
3961 *_used = used;
3962 *_out_len = out_len;
3963 }
3964
phydm_get_csi_table_jgr3(void * dm_void,u32 * _used,char * output,u32 * _out_len)3965 void phydm_get_csi_table_jgr3(void *dm_void, u32 *_used, char *output,
3966 u32 *_out_len)
3967 {
3968 struct dm_struct *dm = (struct dm_struct *)dm_void;
3969 u8 table_idx = 0;
3970 u8 table_val = 0;
3971 u32 used = *_used;
3972 u32 out_len = *_out_len;
3973 u32 dbgport_idx = 0x39e;
3974 u32 dbgport_val = 0;
3975
3976 /*enable clk*/
3977 odm_set_bb_reg(dm, R_0x1ee8, 0x3, 0x3);
3978 /*enable read table*/
3979 odm_set_bb_reg(dm, R_0x1d94, BIT(31) | BIT(30), 0x2);
3980
3981 for (table_idx = 0; table_idx < 128; table_idx++) {
3982 odm_set_bb_reg(dm, R_0x1d94, MASKBYTE2, table_idx);
3983 if (phydm_set_bb_dbg_port(dm, DBGPORT_PRI_3, dbgport_idx)) {
3984 dbgport_val = phydm_get_bb_dbg_port_val(dm);
3985 phydm_release_bb_dbg_port(dm);
3986 } else {
3987 PDM_VAST_SNPF(out_len, used, output + used,
3988 out_len - used,
3989 "table_idx:0x%x = read dbg_port error!\n",
3990 table_idx);
3991 }
3992 table_val = dbgport_val >> 24;
3993 PDM_VAST_SNPF(out_len, used, output + used, out_len - used,
3994 "table_idx: 0x%x = 0x%x\n",
3995 table_idx, table_val);
3996 }
3997 /*enable write table*/
3998 odm_set_bb_reg(dm, R_0x1d94, BIT(31) | BIT(30), 0x1);
3999 /*disable clk*/
4000 odm_set_bb_reg(dm, R_0x1ee8, 0x3, 0x0);
4001
4002 *_used = used;
4003 *_out_len = out_len;
4004 }
4005
4006 #endif
4007
phydm_dump_bb_reg(void * dm_void,u32 * _used,char * output,u32 * _out_len)4008 void phydm_dump_bb_reg(void *dm_void, u32 *_used, char *output, u32 *_out_len)
4009 {
4010 struct dm_struct *dm = (struct dm_struct *)dm_void;
4011 u32 used = *_used;
4012 u32 out_len = *_out_len;
4013
4014 PDM_VAST_SNPF(out_len, used, output + used, out_len - used,
4015 "BB==========\n");
4016 PDM_VAST_SNPF(out_len, used, output + used, out_len - used,
4017 "------ BB control register start ------\n");
4018
4019 switch (dm->ic_ip_series) {
4020 #ifdef PHYDM_IC_JGR3_SERIES_SUPPORT
4021 case PHYDM_IC_JGR3:
4022 phydm_dump_bb_reg_jgr3(dm, &used, output, &out_len);
4023 break;
4024 #endif
4025
4026 #if (ODM_IC_11AC_SERIES_SUPPORT)
4027 case PHYDM_IC_AC:
4028 phydm_dump_bb_reg_ac(dm, &used, output, &out_len);
4029 break;
4030 #endif
4031
4032 #if (ODM_IC_11N_SERIES_SUPPORT)
4033 case PHYDM_IC_N:
4034 phydm_dump_bb_reg_n(dm, &used, output, &out_len);
4035 break;
4036 #endif
4037
4038 default:
4039 break;
4040 }
4041
4042 *_used = used;
4043 *_out_len = out_len;
4044 }
4045
phydm_dump_rf_reg(void * dm_void,u32 * _used,char * output,u32 * _out_len)4046 void phydm_dump_rf_reg(void *dm_void, u32 *_used, char *output, u32 *_out_len)
4047 {
4048 struct dm_struct *dm = (struct dm_struct *)dm_void;
4049 u32 addr = 0;
4050 u32 used = *_used;
4051 u32 out_len = *_out_len;
4052 u32 reg = 0;
4053
4054 /* @dump RF register */
4055 PDM_VAST_SNPF(out_len, used, output + used, out_len - used,
4056 "RF-A==========\n");
4057
4058 for (addr = 0; addr <= 0xFF; addr++) {
4059 reg = odm_get_rf_reg(dm, RF_PATH_A, addr, RFREG_MASK);
4060 PDM_VAST_SNPF(out_len, used, output + used, out_len - used,
4061 "0x%02x 0x%05x\n", addr, reg);
4062 }
4063
4064 #ifdef PHYDM_COMPILE_ABOVE_2SS
4065 if (dm->rf_type > RF_1T1R) {
4066 PDM_VAST_SNPF(out_len, used, output + used, out_len - used,
4067 "RF-B==========\n");
4068
4069 for (addr = 0; addr <= 0xFF; addr++) {
4070 reg = odm_get_rf_reg(dm, RF_PATH_B, addr, RFREG_MASK);
4071 PDM_VAST_SNPF(out_len, used, output + used,
4072 out_len - used, "0x%02x 0x%05x\n",
4073 addr, reg);
4074 }
4075 }
4076 #endif
4077
4078 #ifdef PHYDM_COMPILE_ABOVE_3SS
4079 if (dm->rf_type > RF_2T2R) {
4080 PDM_VAST_SNPF(out_len, used, output + used, out_len - used,
4081 "RF-C==========\n");
4082
4083 for (addr = 0; addr <= 0xFF; addr++) {
4084 reg = odm_get_rf_reg(dm, RF_PATH_C, addr, RFREG_MASK);
4085 PDM_VAST_SNPF(out_len, used, output + used,
4086 out_len - used, "0x%02x 0x%05x\n",
4087 addr, reg);
4088 }
4089 }
4090 #endif
4091
4092 #ifdef PHYDM_COMPILE_ABOVE_4SS
4093 if (dm->rf_type > RF_3T3R) {
4094 PDM_VAST_SNPF(out_len, used, output + used, out_len - used,
4095 "RF-D==========\n");
4096
4097 for (addr = 0; addr <= 0xFF; addr++) {
4098 reg = odm_get_rf_reg(dm, RF_PATH_D, addr, RFREG_MASK);
4099 PDM_VAST_SNPF(out_len, used, output + used,
4100 out_len - used, "0x%02x 0x%05x\n",
4101 addr, reg);
4102 }
4103 }
4104 #endif
4105
4106 *_used = used;
4107 *_out_len = out_len;
4108 }
4109
phydm_dump_mac_reg(void * dm_void,u32 * _used,char * output,u32 * _out_len)4110 void phydm_dump_mac_reg(void *dm_void, u32 *_used, char *output, u32 *_out_len)
4111 {
4112 struct dm_struct *dm = (struct dm_struct *)dm_void;
4113 u32 addr = 0;
4114 u32 used = *_used;
4115 u32 out_len = *_out_len;
4116
4117 /* @dump MAC register */
4118 PDM_VAST_SNPF(out_len, used, output + used, out_len - used,
4119 "MAC==========\n");
4120
4121 for (addr = 0; addr < 0x7ff; addr += 4)
4122 PDM_VAST_SNPF(out_len, used, output + used, out_len - used,
4123 "0x%04x 0x%08x\n",
4124 addr, odm_get_bb_reg(dm, addr, MASKDWORD));
4125
4126 for (addr = 0x1000; addr < 0x17ff; addr += 4)
4127 PDM_VAST_SNPF(out_len, used, output + used, out_len - used,
4128 "0x%04x 0x%08x\n",
4129 addr, odm_get_bb_reg(dm, addr, MASKDWORD));
4130
4131 *_used = used;
4132 *_out_len = out_len;
4133 }
4134
phydm_dump_reg(void * dm_void,char input[][16],u32 * _used,char * output,u32 * _out_len)4135 void phydm_dump_reg(void *dm_void, char input[][16], u32 *_used, char *output,
4136 u32 *_out_len)
4137 {
4138 struct dm_struct *dm = (struct dm_struct *)dm_void;
4139 char help[] = "-h";
4140 u32 var1[10] = {0};
4141 u32 used = *_used;
4142 u32 out_len = *_out_len;
4143 u32 addr = 0;
4144
4145 PHYDM_SSCANF(input[1], DCMD_DECIMAL, &var1[0]);
4146
4147 if ((strcmp(input[1], help) == 0)) {
4148 #ifdef PHYDM_IC_JGR3_SERIES_SUPPORT
4149 if (dm->support_ic_type & ODM_IC_JGR3_SERIES)
4150 PDM_SNPF(out_len, used, output + used, out_len - used,
4151 "dumpreg {0:all, 1:BB, 2:RF, 3:MAC 4:BB2 for jgr3}\n");
4152 else
4153 #endif
4154 PDM_SNPF(out_len, used, output + used, out_len - used,
4155 "dumpreg {0:all, 1:BB, 2:RF, 3:MAC}\n");
4156 } else if (var1[0] == 0) {
4157 phydm_dump_mac_reg(dm, &used, output, &out_len);
4158 phydm_dump_bb_reg(dm, &used, output, &out_len);
4159 #ifdef PHYDM_IC_JGR3_SERIES_SUPPORT
4160 if (dm->ic_ip_series == PHYDM_IC_JGR3)
4161 phydm_dump_bb_reg2_jgr3(dm, &used, output, &out_len);
4162 #endif
4163
4164 phydm_dump_rf_reg(dm, &used, output, &out_len);
4165 } else if (var1[0] == 1) {
4166 phydm_dump_bb_reg(dm, &used, output, &out_len);
4167 } else if (var1[0] == 2) {
4168 phydm_dump_rf_reg(dm, &used, output, &out_len);
4169 } else if (var1[0] == 3) {
4170 phydm_dump_mac_reg(dm, &used, output, &out_len);
4171 } else if (var1[0] == 4) {
4172 #ifdef PHYDM_IC_JGR3_SERIES_SUPPORT
4173 if (dm->ic_ip_series == PHYDM_IC_JGR3)
4174 phydm_dump_bb_reg2_jgr3(dm, &used, output, &out_len);
4175 #endif
4176 }
4177
4178 *_used = used;
4179 *_out_len = out_len;
4180 }
4181
phydm_enable_big_jump(void * dm_void,char input[][16],u32 * _used,char * output,u32 * _out_len)4182 void phydm_enable_big_jump(void *dm_void, char input[][16], u32 *_used,
4183 char *output, u32 *_out_len)
4184 {
4185 #if (RTL8822B_SUPPORT)
4186 struct dm_struct *dm = (struct dm_struct *)dm_void;
4187 struct phydm_dig_struct *dig_t = &dm->dm_dig_table;
4188 u32 dm_value[10] = {0};
4189 u8 i, input_idx = 0;
4190 u32 val;
4191
4192 if (!(dm->support_ic_type & ODM_RTL8822B))
4193 return;
4194
4195 for (i = 0; i < 5; i++) {
4196 if (input[i + 1]) {
4197 PHYDM_SSCANF(input[i + 1], DCMD_HEX, &dm_value[i]);
4198 input_idx++;
4199 }
4200 }
4201
4202 if (input_idx == 0)
4203 return;
4204
4205 if (dm_value[0] == 0) {
4206 dm->dm_dig_table.enable_adjust_big_jump = false;
4207
4208 val = (dig_t->big_jump_step3 << 5) |
4209 (dig_t->big_jump_step2 << 3) |
4210 dig_t->big_jump_step1;
4211
4212 odm_set_bb_reg(dm, R_0x8c8, 0xfe, val);
4213 } else {
4214 dm->dm_dig_table.enable_adjust_big_jump = true;
4215 }
4216 #endif
4217 }
4218
phydm_show_rx_rate(void * dm_void,char input[][16],u32 * _used,char * output,u32 * _out_len)4219 void phydm_show_rx_rate(void *dm_void, char input[][16], u32 *_used,
4220 char *output, u32 *_out_len)
4221 {
4222 #if (RTL8822B_SUPPORT || RTL8821C_SUPPORT || RTL8814B_SUPPORT ||\
4223 RTL8195B_SUPPORT || RTL8822C_SUPPORT || RTL8723F_SUPPORT)
4224 struct dm_struct *dm = (struct dm_struct *)dm_void;
4225 struct odm_phy_dbg_info *dbg = &dm->phy_dbg_info;
4226 u32 used = *_used;
4227 u32 out_len = *_out_len;
4228 u32 var1[10] = {0};
4229 char help[] = "-h";
4230 u8 i, input_idx = 0;
4231
4232 for (i = 0; i < 5; i++) {
4233 PHYDM_SSCANF(input[i + 1], DCMD_HEX, &var1[i]);
4234 input_idx++;
4235 }
4236
4237 if (input_idx == 0)
4238 return;
4239
4240 if ((strcmp(input[1], help) == 0)) {
4241 PDM_SNPF(out_len, used, output + used, out_len - used,
4242 "{1: show Rx rate, 0:reset counter}\n");
4243 *_used = used;
4244 *_out_len = out_len;
4245 return;
4246
4247 } else if (var1[0] == 0) {
4248 phydm_reset_rx_rate_distribution(dm);
4249 *_used = used;
4250 *_out_len = out_len;
4251 return;
4252 }
4253
4254 /* @==Show SU Rate====================================================*/
4255 PDM_SNPF(out_len, used, output + used, out_len - used,
4256 "=====Rx SU rate Statistics=====\n");
4257 PDM_SNPF(out_len, used, output + used, out_len - used,
4258 "[SU][1SS] {%d, %d, %d, %d | %d, %d, %d, %d | %d, %d}\n",
4259 dbg->num_qry_vht_pkt[0], dbg->num_qry_vht_pkt[1],
4260 dbg->num_qry_vht_pkt[2], dbg->num_qry_vht_pkt[3],
4261 dbg->num_qry_vht_pkt[4], dbg->num_qry_vht_pkt[5],
4262 dbg->num_qry_vht_pkt[6], dbg->num_qry_vht_pkt[7],
4263 dbg->num_qry_vht_pkt[8], dbg->num_qry_vht_pkt[9]);
4264
4265 #if (defined(PHYDM_COMPILE_ABOVE_2SS))
4266 if (dm->support_ic_type & (PHYDM_IC_ABOVE_2SS)) {
4267 PDM_SNPF(out_len, used, output + used, out_len - used,
4268 "[SU][2SS] {%d, %d, %d, %d | %d, %d, %d, %d | %d, %d}\n",
4269 dbg->num_qry_vht_pkt[10], dbg->num_qry_vht_pkt[11],
4270 dbg->num_qry_vht_pkt[12], dbg->num_qry_vht_pkt[13],
4271 dbg->num_qry_vht_pkt[14], dbg->num_qry_vht_pkt[15],
4272 dbg->num_qry_vht_pkt[16], dbg->num_qry_vht_pkt[17],
4273 dbg->num_qry_vht_pkt[18], dbg->num_qry_vht_pkt[19]);
4274 }
4275 #endif
4276 /* @==Show MU Rate====================================================*/
4277 #if (ODM_PHY_STATUS_NEW_TYPE_SUPPORT) || (defined(PHYSTS_3RD_TYPE_SUPPORT))
4278 PDM_SNPF(out_len, used, output + used, out_len - used,
4279 "=====Rx MU rate Statistics=====\n");
4280 PDM_SNPF(out_len, used, output + used, out_len - used,
4281 "[MU][1SS] {%d, %d, %d, %d | %d, %d, %d, %d | %d, %d}\n",
4282 dbg->num_mu_vht_pkt[0], dbg->num_mu_vht_pkt[1],
4283 dbg->num_mu_vht_pkt[2], dbg->num_mu_vht_pkt[3],
4284 dbg->num_mu_vht_pkt[4], dbg->num_mu_vht_pkt[5],
4285 dbg->num_mu_vht_pkt[6], dbg->num_mu_vht_pkt[7],
4286 dbg->num_mu_vht_pkt[8], dbg->num_mu_vht_pkt[9]);
4287
4288 #if (defined(PHYDM_COMPILE_ABOVE_2SS))
4289 if (dm->support_ic_type & (PHYDM_IC_ABOVE_2SS)) {
4290 PDM_SNPF(out_len, used, output + used, out_len - used,
4291 "[MU][2SS] {%d, %d, %d, %d | %d, %d, %d, %d | %d, %d}\n",
4292 dbg->num_mu_vht_pkt[10], dbg->num_mu_vht_pkt[11],
4293 dbg->num_mu_vht_pkt[12], dbg->num_mu_vht_pkt[13],
4294 dbg->num_mu_vht_pkt[14], dbg->num_mu_vht_pkt[15],
4295 dbg->num_mu_vht_pkt[16], dbg->num_mu_vht_pkt[17],
4296 dbg->num_mu_vht_pkt[18], dbg->num_mu_vht_pkt[19]);
4297 }
4298 #endif
4299 #endif
4300 *_used = used;
4301 *_out_len = out_len;
4302 #endif
4303 }
4304
phydm_per_tone_evm(void * dm_void,char input[][16],u32 * _used,char * output,u32 * _out_len)4305 void phydm_per_tone_evm(void *dm_void, char input[][16], u32 *_used,
4306 char *output, u32 *_out_len)
4307 {
4308 struct dm_struct *dm = (struct dm_struct *)dm_void;
4309 u8 i, j;
4310 u32 used = *_used;
4311 u32 out_len = *_out_len;
4312 u32 var1[4] = {0};
4313 u32 val, tone_num, round;
4314 s8 rxevm_0, rxevm_1;
4315 s32 avg_num, evm_tone_0[256] = {0}, evm_tone_1[256] = {0};
4316 s32 rxevm_sum_0, rxevm_sum_1;
4317
4318 if (dm->support_ic_type & ODM_IC_11N_SERIES) {
4319 pr_debug("n series not support yet !\n");
4320 return;
4321 }
4322
4323 for (i = 0; i < 4; i++) {
4324 PHYDM_SSCANF(input[i + 1], DCMD_DECIMAL, &var1[i]);
4325 }
4326
4327 avg_num = var1[0];
4328 round = var1[1];
4329
4330 if (!dm->is_linked) {
4331 PDM_SNPF(out_len, used, output + used, out_len - used,
4332 "No Link !!\n");
4333
4334 *_used = used;
4335 *_out_len = out_len;
4336
4337 return;
4338 }
4339
4340 pr_debug("ID=((%d)), BW=((%d)), fc=((CH-%d))\n", dm->curr_station_id,
4341 20 << *dm->band_width, *dm->channel);
4342 pr_debug("avg_num =((%d)), round =((%d))\n", avg_num, round);
4343 #if (DM_ODM_SUPPORT_TYPE & ODM_AP)
4344 watchdog_stop(dm->priv);
4345 #endif
4346 for (j = 0; j < round; j++) {
4347 pr_debug("\nround((%d))\n", (j + 1));
4348 if (*dm->band_width == CHANNEL_WIDTH_20) {
4349 for (tone_num = 228; tone_num <= 255; tone_num++) {
4350 odm_set_bb_reg(dm, R_0x8c4, 0xff8, tone_num);
4351 rxevm_sum_0 = 0;
4352 rxevm_sum_1 = 0;
4353 for (i = 0; i < avg_num; i++) {
4354 val = odm_read_4byte(dm, R_0xf8c);
4355
4356 rxevm_0 = (s8)((val & MASKBYTE2) >> 16);
4357 rxevm_0 = (rxevm_0 / 2);
4358 if (rxevm_0 < -63)
4359 rxevm_0 = 0;
4360
4361 rxevm_1 = (s8)((val & MASKBYTE3) >> 24);
4362 rxevm_1 = (rxevm_1 / 2);
4363 if (rxevm_1 < -63)
4364 rxevm_1 = 0;
4365 rxevm_sum_0 += rxevm_0;
4366 rxevm_sum_1 += rxevm_1;
4367 ODM_delay_ms(1);
4368 }
4369 evm_tone_0[tone_num] = (rxevm_sum_0 / avg_num);
4370 evm_tone_1[tone_num] = (rxevm_sum_1 / avg_num);
4371 pr_debug("Tone(-%-3d) RXEVM(1ss/2ss)=%d, %d\n",
4372 (256 - tone_num), evm_tone_0[tone_num],
4373 evm_tone_1[tone_num]);
4374 }
4375
4376 for (tone_num = 1; tone_num <= 28; tone_num++) {
4377 odm_set_bb_reg(dm, R_0x8c4, 0xff8, tone_num);
4378 rxevm_sum_0 = 0;
4379 rxevm_sum_1 = 0;
4380 for (i = 0; i < avg_num; i++) {
4381 val = odm_read_4byte(dm, R_0xf8c);
4382
4383 rxevm_0 = (s8)((val & MASKBYTE2) >> 16);
4384 rxevm_0 = (rxevm_0 / 2);
4385 if (rxevm_0 < -63)
4386 rxevm_0 = 0;
4387
4388 rxevm_1 = (s8)((val & MASKBYTE3) >> 24);
4389 rxevm_1 = (rxevm_1 / 2);
4390 if (rxevm_1 < -63)
4391 rxevm_1 = 0;
4392 rxevm_sum_0 += rxevm_0;
4393 rxevm_sum_1 += rxevm_1;
4394 ODM_delay_ms(1);
4395 }
4396 evm_tone_0[tone_num] = (rxevm_sum_0 / avg_num);
4397 evm_tone_1[tone_num] = (rxevm_sum_1 / avg_num);
4398 pr_debug("Tone(%-3d) RXEVM(1ss/2ss)=%d, %d\n",
4399 tone_num, evm_tone_0[tone_num],
4400 evm_tone_1[tone_num]);
4401 }
4402 } else if (*dm->band_width == CHANNEL_WIDTH_40) {
4403 for (tone_num = 198; tone_num <= 254; tone_num++) {
4404 odm_set_bb_reg(dm, R_0x8c4, 0xff8, tone_num);
4405 rxevm_sum_0 = 0;
4406 rxevm_sum_1 = 0;
4407 for (i = 0; i < avg_num; i++) {
4408 val = odm_read_4byte(dm, R_0xf8c);
4409
4410 rxevm_0 = (s8)((val & MASKBYTE2) >> 16);
4411 rxevm_0 = (rxevm_0 / 2);
4412 if (rxevm_0 < -63)
4413 rxevm_0 = 0;
4414
4415 rxevm_1 = (s8)((val & MASKBYTE3) >> 24);
4416 rxevm_1 = (rxevm_1 / 2);
4417 if (rxevm_1 < -63)
4418 rxevm_1 = 0;
4419
4420 rxevm_sum_0 += rxevm_0;
4421 rxevm_sum_1 += rxevm_1;
4422 ODM_delay_ms(1);
4423 }
4424 evm_tone_0[tone_num] = (rxevm_sum_0 / avg_num);
4425 evm_tone_1[tone_num] = (rxevm_sum_1 / avg_num);
4426 pr_debug("Tone(-%-3d) RXEVM(1ss/2ss)=%d, %d\n",
4427 (256 - tone_num), evm_tone_0[tone_num],
4428 evm_tone_1[tone_num]);
4429 }
4430
4431 for (tone_num = 2; tone_num <= 58; tone_num++) {
4432 odm_set_bb_reg(dm, R_0x8c4, 0xff8, tone_num);
4433 rxevm_sum_0 = 0;
4434 rxevm_sum_1 = 0;
4435 for (i = 0; i < avg_num; i++) {
4436 val = odm_read_4byte(dm, R_0xf8c);
4437
4438 rxevm_0 = (s8)((val & MASKBYTE2) >> 16);
4439 rxevm_0 = (rxevm_0 / 2);
4440 if (rxevm_0 < -63)
4441 rxevm_0 = 0;
4442
4443 rxevm_1 = (s8)((val & MASKBYTE3) >> 24);
4444 rxevm_1 = (rxevm_1 / 2);
4445 if (rxevm_1 < -63)
4446 rxevm_1 = 0;
4447 rxevm_sum_0 += rxevm_0;
4448 rxevm_sum_1 += rxevm_1;
4449 ODM_delay_ms(1);
4450 }
4451 evm_tone_0[tone_num] = (rxevm_sum_0 / avg_num);
4452 evm_tone_1[tone_num] = (rxevm_sum_1 / avg_num);
4453 pr_debug("Tone(%-3d) RXEVM(1ss/2ss)=%d, %d\n",
4454 tone_num, evm_tone_0[tone_num],
4455 evm_tone_1[tone_num]);
4456 }
4457 } else if (*dm->band_width == CHANNEL_WIDTH_80) {
4458 for (tone_num = 134; tone_num <= 254; tone_num++) {
4459 odm_set_bb_reg(dm, R_0x8c4, 0xff8, tone_num);
4460 rxevm_sum_0 = 0;
4461 rxevm_sum_1 = 0;
4462 for (i = 0; i < avg_num; i++) {
4463 val = odm_read_4byte(dm, R_0xf8c);
4464
4465 rxevm_0 = (s8)((val & MASKBYTE2) >> 16);
4466 rxevm_0 = (rxevm_0 / 2);
4467 if (rxevm_0 < -63)
4468 rxevm_0 = 0;
4469
4470 rxevm_1 = (s8)((val & MASKBYTE3) >> 24);
4471 rxevm_1 = (rxevm_1 / 2);
4472 if (rxevm_1 < -63)
4473 rxevm_1 = 0;
4474 rxevm_sum_0 += rxevm_0;
4475 rxevm_sum_1 += rxevm_1;
4476 ODM_delay_ms(1);
4477 }
4478 evm_tone_0[tone_num] = (rxevm_sum_0 / avg_num);
4479 evm_tone_1[tone_num] = (rxevm_sum_1 / avg_num);
4480 pr_debug("Tone(-%-3d) RXEVM(1ss/2ss)=%d, %d\n",
4481 (256 - tone_num), evm_tone_0[tone_num],
4482 evm_tone_1[tone_num]);
4483 }
4484
4485 for (tone_num = 2; tone_num <= 122; tone_num++) {
4486 odm_set_bb_reg(dm, R_0x8c4, 0xff8, tone_num);
4487 rxevm_sum_0 = 0;
4488 rxevm_sum_1 = 0;
4489 for (i = 0; i < avg_num; i++) {
4490 val = odm_read_4byte(dm, R_0xf8c);
4491
4492 rxevm_0 = (s8)((val & MASKBYTE2) >> 16);
4493 rxevm_0 = (rxevm_0 / 2);
4494 if (rxevm_0 < -63)
4495 rxevm_0 = 0;
4496
4497 rxevm_1 = (s8)((val & MASKBYTE3) >> 24);
4498 rxevm_1 = (rxevm_1 / 2);
4499 if (rxevm_1 < -63)
4500 rxevm_1 = 0;
4501 rxevm_sum_0 += rxevm_0;
4502 rxevm_sum_1 += rxevm_1;
4503 ODM_delay_ms(1);
4504 }
4505 evm_tone_0[tone_num] = (rxevm_sum_0 / avg_num);
4506 evm_tone_1[tone_num] = (rxevm_sum_1 / avg_num);
4507 pr_debug("Tone(%-3d) RXEVM (1ss/2ss)=%d, %d\n",
4508 tone_num, evm_tone_0[tone_num],
4509 evm_tone_1[tone_num]);
4510 }
4511 }
4512 }
4513 *_used = used;
4514 *_out_len = out_len;
4515 }
4516
phydm_bw_ch_adjust(void * dm_void,char input[][16],u32 * _used,char * output,u32 * _out_len)4517 void phydm_bw_ch_adjust(void *dm_void, char input[][16],
4518 u32 *_used, char *output, u32 *_out_len)
4519 {
4520 struct dm_struct *dm = (struct dm_struct *)dm_void;
4521 char help[] = "-h";
4522 u32 var1[10] = {0};
4523 u32 used = *_used;
4524 u32 out_len = *_out_len;
4525 u8 i;
4526 boolean is_enable_dbg_mode;
4527 u8 central_ch, primary_ch_idx;
4528 enum channel_width bw;
4529
4530 #ifdef PHYDM_COMMON_API_SUPPORT
4531
4532 if ((strcmp(input[1], help) == 0)) {
4533 PDM_SNPF(out_len, used, output + used, out_len - used,
4534 "{en} {CH} {pr_ch_idx 1/2/3/4/9/10} {0:20M,1:40M,2:80M}\n");
4535 goto out;
4536 }
4537
4538 if (!(dm->support_ic_type & CMN_API_SUPPORT_IC)) {
4539 PDM_SNPF(out_len, used, output + used, out_len - used,
4540 "Not support this API\n");
4541 goto out;
4542 }
4543
4544 for (i = 0; i < 4; i++) {
4545 PHYDM_SSCANF(input[i + 1], DCMD_DECIMAL, &var1[i]);
4546 }
4547
4548 is_enable_dbg_mode = (boolean)var1[0];
4549 central_ch = (u8)var1[1];
4550 primary_ch_idx = (u8)var1[2];
4551 bw = (enum channel_width)var1[3];
4552
4553 if (is_enable_dbg_mode) {
4554 dm->is_disable_phy_api = false;
4555 phydm_api_switch_bw_channel(dm, central_ch, primary_ch_idx, bw);
4556 dm->is_disable_phy_api = true;
4557 PDM_SNPF(out_len, used, output + used, out_len - used,
4558 "central_ch = %d, primary_ch_idx = %d, bw = %d\n",
4559 central_ch, primary_ch_idx, bw);
4560 }
4561 out:
4562 #endif
4563
4564 *_used = used;
4565 *_out_len = out_len;
4566 }
4567
phydm_ext_rf_element_ctrl(void * dm_void,char input[][16],u32 * _used,char * output,u32 * _out_len)4568 void phydm_ext_rf_element_ctrl(void *dm_void, char input[][16], u32 *_used,
4569 char *output, u32 *_out_len)
4570 {
4571 struct dm_struct *dm = (struct dm_struct *)dm_void;
4572 u32 val[10] = {0};
4573 u8 i = 0, input_idx = 0;
4574
4575 for (i = 0; i < 5; i++) {
4576 PHYDM_SSCANF(input[i + 1], DCMD_DECIMAL, &val[i]);
4577 input_idx++;
4578 }
4579
4580 if (input_idx == 0)
4581 return;
4582
4583 if (val[0] == 1) /*@ext switch*/ {
4584 phydm_set_ext_switch(dm, val[1]);
4585 }
4586 }
4587
phydm_print_dbgport(void * dm_void,char input[][16],u32 * _used,char * output,u32 * _out_len)4588 void phydm_print_dbgport(void *dm_void, char input[][16], u32 *_used,
4589 char *output, u32 *_out_len)
4590 {
4591 struct dm_struct *dm = (struct dm_struct *)dm_void;
4592 char help[] = "-h";
4593 u32 var1[10] = {0};
4594 u32 used = *_used;
4595 u32 out_len = *_out_len;
4596 u32 dbg_port_value = 0;
4597 u8 val[32];
4598 u8 tmp = 0;
4599 u8 i;
4600
4601 if (strcmp(input[1], help) == 0) {
4602 PDM_SNPF(out_len, used, output + used, out_len - used,
4603 "{dbg_port_idx}\n");
4604 goto out;
4605 }
4606
4607 PHYDM_SSCANF(input[1], DCMD_HEX, &var1[0]);
4608
4609 dm->debug_components |= ODM_COMP_API;
4610 if (phydm_set_bb_dbg_port(dm, DBGPORT_PRI_3, var1[0])) {
4611 dbg_port_value = phydm_get_bb_dbg_port_val(dm);
4612 phydm_release_bb_dbg_port(dm);
4613
4614 for (i = 0; i < 32; i++)
4615 val[i] = (u8)((dbg_port_value & BIT(i)) >> i);
4616
4617 PDM_SNPF(out_len, used, output + used, out_len - used,
4618 "Dbg Port[0x%x] = ((0x%x))\n", var1[0],
4619 dbg_port_value);
4620
4621 for (i = 4; i != 0; i--) {
4622 tmp = 8 * (i - 1);
4623 PDM_SNPF(out_len, used, output + used, out_len - used,
4624 "val[%d:%d] = 8b'%d %d %d %d %d %d %d %d\n",
4625 tmp + 7, tmp, val[tmp + 7], val[tmp + 6],
4626 val[tmp + 5], val[tmp + 4], val[tmp + 3],
4627 val[tmp + 2], val[tmp + 1], val[tmp + 0]);
4628 }
4629 }
4630 dm->debug_components &= (~ODM_COMP_API);
4631 out:
4632 *_used = used;
4633 *_out_len = out_len;
4634 }
4635
phydm_get_anapar_table(void * dm_void,u32 * _used,char * output,u32 * _out_len)4636 void phydm_get_anapar_table(void *dm_void, u32 *_used, char *output,
4637 u32 *_out_len)
4638 {
4639 struct dm_struct *dm = (struct dm_struct *)dm_void;
4640 u32 used = *_used;
4641 u32 out_len = *_out_len;
4642 enum rf_path i = RF_PATH_A;
4643
4644 #ifdef PHYDM_IC_JGR3_SERIES_SUPPORT
4645 if (!(dm->support_ic_type & ODM_IC_JGR3_SERIES))
4646 return;
4647
4648 PDM_VAST_SNPF(out_len, used, output + used, out_len - used,
4649 "------ Analog parameters start ------\n");
4650
4651 for (i = RF_PATH_A; i < (enum rf_path)dm->num_rf_path; i++)
4652 phydm_get_per_path_anapar_jgr3(dm, i, &used, output, &out_len);
4653 #endif
4654
4655 *_used = used;
4656 *_out_len = out_len;
4657 }
4658
phydm_get_csi_table(void * dm_void,u32 * _used,char * output,u32 * _out_len)4659 void phydm_get_csi_table(void *dm_void, u32 *_used, char *output,
4660 u32 *_out_len)
4661 {
4662 struct dm_struct *dm = (struct dm_struct *)dm_void;
4663 u32 used = *_used;
4664 u32 out_len = *_out_len;
4665
4666 #ifdef PHYDM_IC_JGR3_SERIES_SUPPORT
4667 if (!(dm->support_ic_type & ODM_IC_JGR3_SERIES))
4668 return;
4669
4670 PDM_VAST_SNPF(out_len, used, output + used, out_len - used,
4671 "------ CSI Table Parsing start ------\n");
4672
4673 phydm_get_csi_table_jgr3(dm, &used, output, &out_len);
4674 #endif
4675
4676 *_used = used;
4677 *_out_len = out_len;
4678 }
4679
phydm_dd_dbg_dump(void * dm_void,char input[][16],u32 * _used,char * output,u32 * _out_len)4680 void phydm_dd_dbg_dump(void *dm_void, char input[][16], u32 *_used,
4681 char *output, u32 *_out_len)
4682 {
4683 struct dm_struct *dm = (struct dm_struct *)dm_void;
4684 char help[] = "-h";
4685 u32 var1[10] = {0};
4686 u32 used = *_used;
4687 u32 out_len = *_out_len;
4688
4689 PHYDM_SSCANF(input[1], DCMD_DECIMAL, &var1[0]);
4690
4691 if ((strcmp(input[1], help) == 0)) {
4692 PDM_SNPF(out_len, used, output + used, out_len - used,
4693 "dump: {1}\n");
4694 return;
4695 } else if (var1[0] == 1) {
4696 /*[Reg]*/
4697 phydm_dump_mac_reg(dm, &used, output, &out_len);
4698 phydm_dump_bb_reg(dm, &used, output, &out_len);
4699 #ifdef PHYDM_IC_JGR3_SERIES_SUPPORT
4700 if (dm->ic_ip_series == PHYDM_IC_JGR3)
4701 phydm_dump_bb_reg2_jgr3(dm, &used, output, &out_len);
4702 #endif
4703
4704 phydm_dump_rf_reg(dm, &used, output, &out_len);
4705 /*[Dbg Port]*/
4706 #ifdef PHYDM_AUTO_DEGBUG
4707 phydm_dbg_port_dump(dm, &used, output, &out_len);
4708 #endif
4709 /*[Analog Parameters]*/
4710 phydm_get_anapar_table(dm, &used, output, &out_len);
4711 }
4712 }
4713
phydm_nss_hitogram_mp(void * dm_void,enum PDM_RATE_TYPE rate_type,u32 * _used,char * output,u32 * _out_len)4714 void phydm_nss_hitogram_mp(void *dm_void, enum PDM_RATE_TYPE rate_type,
4715 u32 *_used, char *output, u32 *_out_len)
4716 {
4717 struct dm_struct *dm = (struct dm_struct *)dm_void;
4718 struct odm_phy_dbg_info *dbg_i = &dm->phy_dbg_info;
4719 struct phydm_phystatus_statistic *dbg_s = &dbg_i->physts_statistic_info;
4720 u32 used = *_used;
4721 u32 out_len = *_out_len;
4722 char buf[PHYDM_SNPRINT_SIZE] = {0};
4723 u16 buf_size = PHYDM_SNPRINT_SIZE;
4724 u16 h_size = PHY_HIST_SIZE;
4725 u16 *evm_hist = &dbg_s->evm_1ss_hist[0];
4726 u16 *snr_hist = &dbg_s->snr_1ss_hist[0];
4727 u8 i = 0;
4728 u8 ss = phydm_rate_type_2_num_ss(dm, rate_type);
4729
4730 if (rate_type == PDM_OFDM) {
4731 phydm_print_hist_2_buf(dm, dbg_s->evm_ofdm_hist, PHY_HIST_SIZE,
4732 buf, buf_size);
4733 PDM_SNPF(out_len, used, output + used, out_len - used,
4734 "%-14s=%s\n", "[OFDM][EVM]", buf);
4735
4736 phydm_print_hist_2_buf(dm, dbg_s->snr_ofdm_hist, PHY_HIST_SIZE,
4737 buf, buf_size);
4738 PDM_SNPF(out_len, used, output + used, out_len - used,
4739 "%-14s=%s\n", "[OFDM][SNR]", buf);
4740
4741 *_used = used;
4742 *_out_len = out_len;
4743 return;
4744 }
4745
4746 for (i = 0; i < ss; i++) {
4747 if (rate_type == PDM_1SS) {
4748 evm_hist = &dbg_s->evm_1ss_hist[0];
4749 snr_hist = &dbg_s->snr_1ss_hist[0];
4750 } else if (rate_type == PDM_2SS) {
4751 #if (defined(PHYDM_COMPILE_ABOVE_2SS))
4752 evm_hist = &dbg_s->evm_2ss_hist[i][0];
4753 snr_hist = &dbg_s->snr_2ss_hist[i][0];
4754 #endif
4755 } else if (rate_type == PDM_3SS) {
4756 #if (defined(PHYDM_COMPILE_ABOVE_3SS))
4757 evm_hist = &dbg_s->evm_3ss_hist[i][0];
4758 snr_hist = &dbg_s->snr_3ss_hist[i][0];
4759 #endif
4760 } else if (rate_type == PDM_4SS) {
4761 #if (defined(PHYDM_COMPILE_ABOVE_4SS))
4762 evm_hist = &dbg_s->evm_4ss_hist[i][0];
4763 snr_hist = &dbg_s->snr_4ss_hist[i][0];
4764 #endif
4765 }
4766
4767 phydm_print_hist_2_buf(dm, evm_hist, h_size, buf, buf_size);
4768 PDM_SNPF(out_len, used, output + used, out_len - used,
4769 "[%d-SS][EVM][%d]=%s\n", ss, i, buf);
4770 phydm_print_hist_2_buf(dm, snr_hist, h_size, buf, buf_size);
4771 PDM_SNPF(out_len, used, output + used, out_len - used,
4772 "[%d-SS][SNR][%d]=%s\n", ss, i, buf);
4773 }
4774 *_used = used;
4775 *_out_len = out_len;
4776 }
4777
phydm_mp_dbg(void * dm_void,char input[][16],u32 * _used,char * output,u32 * _out_len)4778 void phydm_mp_dbg(void *dm_void, char input[][16], u32 *_used, char *output,
4779 u32 *_out_len)
4780 {
4781 struct dm_struct *dm = (struct dm_struct *)dm_void;
4782 struct odm_phy_dbg_info *dbg_i = &dm->phy_dbg_info;
4783 struct phydm_phystatus_statistic *dbg_s = &dbg_i->physts_statistic_info;
4784 struct phydm_phystatus_avg *dbg_avg = &dbg_i->phystatus_statistic_avg;
4785 char *rate_type = NULL;
4786 u8 tmp_rssi_avg[4];
4787 u8 tmp_snr_avg[4];
4788 u8 tmp_evm_avg[4];
4789 u32 tmp_cnt = 0;
4790 char buf[PHYDM_SNPRINT_SIZE] = {0};
4791 u32 used = *_used;
4792 u32 out_len = *_out_len;
4793 u32 var1[10] = {0};
4794 u16 buf_size = PHYDM_SNPRINT_SIZE;
4795 u16 th_size = PHY_HIST_SIZE - 1;
4796 u8 i = 0;
4797
4798 if (!(*dm->mp_mode))
4799 return;
4800
4801 PDM_SNPF(out_len, used, output + used, out_len - used,
4802 "BW=((%d)), fc=((CH-%d))\n",
4803 20 << *dm->band_width, *dm->channel);
4804
4805 /*@===[PHY Histogram]================================================*/
4806 PDM_SNPF(out_len, used, output + used, out_len - used,
4807 "[PHY Histogram] ==============>\n");
4808 /*@===[Threshold]===*/
4809 phydm_print_hist_2_buf(dm, dbg_i->evm_hist_th, th_size, buf, buf_size);
4810 PDM_SNPF(out_len, used, output + used, out_len - used,
4811 "%-16s=%s\n", "[EVM_TH]", buf);
4812 phydm_print_hist_2_buf(dm, dbg_i->snr_hist_th, th_size, buf, buf_size);
4813 PDM_SNPF(out_len, used, output + used, out_len - used,
4814 "%-16s=%s\n", "[SNR_TH]", buf);
4815 /*@===[OFDM]===*/
4816 phydm_nss_hitogram_mp(dm, PDM_OFDM, &used, output, &out_len);
4817 /*@===[1-SS]===*/
4818 phydm_nss_hitogram_mp(dm, PDM_1SS, &used, output, &out_len);
4819 /*@===[2-SS]===*/
4820 #if (defined(PHYDM_COMPILE_ABOVE_2SS))
4821 if (dm->support_ic_type & PHYDM_IC_ABOVE_2SS)
4822 phydm_nss_hitogram_mp(dm, PDM_2SS, &used, output, &out_len);
4823 #endif
4824 /*@===[3-SS]===*/
4825 #if (defined(PHYDM_COMPILE_ABOVE_3SS))
4826 if (dm->support_ic_type & PHYDM_IC_ABOVE_3SS)
4827 phydm_nss_hitogram_mp(dm, PDM_3SS, &used, output, &out_len);
4828 #endif
4829 /*@===[4-SS]===*/
4830 #if (defined(PHYDM_COMPILE_ABOVE_4SS))
4831 if (dm->support_ic_type & PHYDM_IC_ABOVE_4SS)
4832 phydm_nss_hitogram_mp(dm, PDM_4SS, &used, output, &out_len);
4833 #endif
4834 /*@===[PHY Avg]======================================================*/
4835 phydm_get_avg_phystatus_val(dm);
4836 PDM_SNPF(out_len, used, output + used, out_len - used,
4837 "[PHY Avg] ==============>\n");
4838
4839 phydm_get_avg_phystatus_val(dm);
4840
4841 switch (dm->num_rf_path) {
4842 #if (defined(PHYDM_COMPILE_ABOVE_4SS))
4843 case 4:
4844 PDM_SNPF(out_len, used, output + used, out_len - used,
4845 "* %-8s Cnt=((%.3d)) RSSI:{%.2d, %.2d, %.2d, %.2d}\n",
4846 "[Beacon]", dbg_s->rssi_beacon_cnt,
4847 dbg_avg->rssi_beacon_avg[0],
4848 dbg_avg->rssi_beacon_avg[1],
4849 dbg_avg->rssi_beacon_avg[2],
4850 dbg_avg->rssi_beacon_avg[3]);
4851 break;
4852 #endif
4853 #if (defined(PHYDM_COMPILE_ABOVE_3SS))
4854 case 3:
4855 PDM_SNPF(out_len, used, output + used, out_len - used,
4856 "* %-8s Cnt=((%.3d)) RSSI:{%.2d, %.2d, %.2d}\n",
4857 "[Beacon]", dbg_s->rssi_beacon_cnt,
4858 dbg_avg->rssi_beacon_avg[0],
4859 dbg_avg->rssi_beacon_avg[1],
4860 dbg_avg->rssi_beacon_avg[2]);
4861 break;
4862 #endif
4863 #if (defined(PHYDM_COMPILE_ABOVE_2SS))
4864 case 2:
4865 PDM_SNPF(out_len, used, output + used, out_len - used,
4866 "* %-8s Cnt=((%.3d)) RSSI:{%.2d, %.2d}\n",
4867 "[Beacon]", dbg_s->rssi_beacon_cnt,
4868 dbg_avg->rssi_beacon_avg[0],
4869 dbg_avg->rssi_beacon_avg[1]);
4870 break;
4871 #endif
4872 default:
4873 PDM_SNPF(out_len, used, output + used, out_len - used,
4874 "* %-8s Cnt=((%.3d)) RSSI:{%.2d}\n",
4875 "[Beacon]", dbg_s->rssi_beacon_cnt,
4876 dbg_avg->rssi_beacon_avg[0]);
4877 break;
4878 }
4879
4880 switch (dm->num_rf_path) {
4881 #ifdef PHYSTS_3RD_TYPE_SUPPORT
4882 #if (defined(PHYDM_COMPILE_ABOVE_4SS))
4883 case 4:
4884 PDM_SNPF(out_len, used, output + used, out_len - used,
4885 "* %-8s Cnt=((%.3d)) RSSI:{%.2d, %.2d, %.2d, %.2d}\n",
4886 "[CCK]", dbg_s->rssi_cck_cnt,
4887 dbg_avg->rssi_cck_avg,
4888 dbg_avg->rssi_cck_avg_abv_2ss[0],
4889 dbg_avg->rssi_cck_avg_abv_2ss[1],
4890 dbg_avg->rssi_cck_avg_abv_2ss[2]);
4891 break;
4892 #endif
4893 #if (defined(PHYDM_COMPILE_ABOVE_3SS))
4894 case 3:
4895 PDM_SNPF(out_len, used, output + used, out_len - used,
4896 "* %-8s Cnt=((%.3d)) RSSI:{%.2d, %.2d, %.2d}\n",
4897 "[CCK]", dbg_s->rssi_cck_cnt,
4898 dbg_avg->rssi_cck_avg,
4899 dbg_avg->rssi_cck_avg_abv_2ss[0],
4900 dbg_avg->rssi_cck_avg_abv_2ss[1]);
4901 break;
4902 #endif
4903 #if (defined(PHYDM_COMPILE_ABOVE_2SS))
4904 case 2:
4905 PDM_SNPF(out_len, used, output + used, out_len - used,
4906 "* %-8s Cnt=((%.3d)) RSSI:{%.2d, %.2d}\n",
4907 "[CCK]", dbg_s->rssi_cck_cnt,
4908 dbg_avg->rssi_cck_avg,
4909 dbg_avg->rssi_cck_avg_abv_2ss[0]);
4910 break;
4911 #endif
4912 #endif
4913 default:
4914 PDM_SNPF(out_len, used, output + used, out_len - used,
4915 "* %-8s Cnt=((%.3d)) RSSI:{%.2d}\n",
4916 "[CCK]", dbg_s->rssi_cck_cnt, dbg_avg->rssi_cck_avg);
4917 break;
4918 }
4919
4920 for (i = 0; i <= 4; i++) {
4921 if (i > dm->num_rf_path)
4922 break;
4923
4924 odm_memory_set(dm, tmp_rssi_avg, 0, 4);
4925 odm_memory_set(dm, tmp_snr_avg, 0, 4);
4926 odm_memory_set(dm, tmp_evm_avg, 0, 4);
4927
4928 switch (i) {
4929 #if (defined(PHYDM_COMPILE_ABOVE_4SS))
4930 case 4:
4931 rate_type = "[4-SS]";
4932 tmp_cnt = dbg_s->rssi_4ss_cnt;
4933 odm_move_memory(dm, tmp_rssi_avg,
4934 dbg_avg->rssi_4ss_avg, dm->num_rf_path);
4935 odm_move_memory(dm, tmp_snr_avg,
4936 dbg_avg->snr_4ss_avg, dm->num_rf_path);
4937 odm_move_memory(dm, tmp_evm_avg, dbg_avg->evm_4ss_avg,
4938 4);
4939 break;
4940 #endif
4941 #if (defined(PHYDM_COMPILE_ABOVE_3SS))
4942 case 3:
4943 rate_type = "[3-SS]";
4944 tmp_cnt = dbg_s->rssi_3ss_cnt;
4945 odm_move_memory(dm, tmp_rssi_avg,
4946 dbg_avg->rssi_3ss_avg, dm->num_rf_path);
4947 odm_move_memory(dm, tmp_snr_avg,
4948 dbg_avg->snr_3ss_avg, dm->num_rf_path);
4949 odm_move_memory(dm, tmp_evm_avg,
4950 dbg_avg->evm_3ss_avg, 3);
4951 break;
4952 #endif
4953 #if (defined(PHYDM_COMPILE_ABOVE_2SS))
4954 case 2:
4955 rate_type = "[2-SS]";
4956 tmp_cnt = dbg_s->rssi_2ss_cnt;
4957 odm_move_memory(dm, tmp_rssi_avg,
4958 dbg_avg->rssi_2ss_avg, dm->num_rf_path);
4959 odm_move_memory(dm, tmp_snr_avg, dbg_avg->snr_2ss_avg,
4960 dm->num_rf_path);
4961 odm_move_memory(dm, tmp_evm_avg,
4962 dbg_avg->evm_2ss_avg, 2);
4963 break;
4964 #endif
4965 case 1:
4966 rate_type = "[1-SS]";
4967 tmp_cnt = dbg_s->rssi_1ss_cnt;
4968 odm_move_memory(dm, tmp_rssi_avg,
4969 dbg_avg->rssi_1ss_avg, dm->num_rf_path);
4970 odm_move_memory(dm, tmp_snr_avg,
4971 dbg_avg->snr_1ss_avg, dm->num_rf_path);
4972 odm_move_memory(dm, tmp_evm_avg,
4973 &dbg_avg->evm_1ss_avg, 1);
4974 break;
4975 default:
4976 rate_type = "[L-OFDM]";
4977 tmp_cnt = dbg_s->rssi_ofdm_cnt;
4978 odm_move_memory(dm, tmp_rssi_avg,
4979 dbg_avg->rssi_ofdm_avg,
4980 dm->num_rf_path);
4981 odm_move_memory(dm, tmp_snr_avg,
4982 dbg_avg->snr_ofdm_avg, dm->num_rf_path);
4983 odm_move_memory(dm, tmp_evm_avg,
4984 &dbg_avg->evm_ofdm_avg, 1);
4985 break;
4986 }
4987
4988 PDM_SNPF(out_len, used, output + used, out_len - used,
4989 "* %-8s Cnt=((%.3d)) RSSI:{%.2d, %.2d, %.2d, %.2d} SNR:{%.2d, %.2d, %.2d, %.2d} EVM:{-%.2d, -%.2d, -%.2d, -%.2d}\n",
4990 rate_type, tmp_cnt,
4991 tmp_rssi_avg[0], tmp_rssi_avg[1],
4992 tmp_rssi_avg[2], tmp_rssi_avg[3],
4993 tmp_snr_avg[0], tmp_snr_avg[1],
4994 tmp_snr_avg[2], tmp_snr_avg[3],
4995 tmp_evm_avg[0], tmp_evm_avg[1],
4996 tmp_evm_avg[2], tmp_evm_avg[3]);
4997 }
4998
4999 phydm_reset_phystatus_statistic(dm);
5000
5001 PDM_SNPF(out_len, used, output + used, out_len - used,
5002 "rxsc_idx {Legacy, 20, 40, 80} = {%d, %d, %d, %d}\n",
5003 dm->rxsc_l, dm->rxsc_20, dm->rxsc_40, dm->rxsc_80);
5004
5005 *_used = used;
5006 *_out_len = out_len;
5007 }
5008
phydm_reg_monitor(void * dm_void,char input[][16],u32 * _used,char * output,u32 * _out_len)5009 void phydm_reg_monitor(void *dm_void, char input[][16], u32 *_used,
5010 char *output, u32 *_out_len)
5011 {
5012 struct dm_struct *dm = (struct dm_struct *)dm_void;
5013 char help[] = "-h";
5014 u32 var1[10] = {0};
5015 u32 used = *_used;
5016 u32 out_len = *_out_len;
5017 boolean en_mntr = false;
5018 u8 i = 0;
5019
5020 for (i = 0; i < 7; i++) {
5021 PHYDM_SSCANF(input[i + 1], DCMD_DECIMAL, &var1[i]);
5022 }
5023
5024 if ((strcmp(input[1], help) == 0)) {
5025 PDM_SNPF(out_len, used, output + used, out_len - used,
5026 "reg_mntr {en} {0:all, 1:BB, 2:RF, 3:MAC 4:1/2/4 byte}\n");
5027 } else {
5028 if (var1[0] == 1)
5029 en_mntr = true;
5030 else
5031 en_mntr = false;
5032
5033 if (var1[1] == 0) {
5034 dm->en_reg_mntr_bb = en_mntr;
5035 dm->en_reg_mntr_rf = en_mntr;
5036 dm->en_reg_mntr_mac = en_mntr;
5037 dm->en_reg_mntr_byte = en_mntr;
5038 } else if (var1[1] == 1) {
5039 dm->en_reg_mntr_bb = en_mntr;
5040 } else if (var1[1] == 2) {
5041 dm->en_reg_mntr_rf = en_mntr;
5042 } else if (var1[1] == 3) {
5043 dm->en_reg_mntr_mac = en_mntr;
5044 } else if (var1[1] == 4) {
5045 dm->en_reg_mntr_byte = en_mntr;
5046 }
5047 }
5048
5049 PDM_SNPF(out_len, used, output + used, out_len - used,
5050 "en: BB:%d, RF:%d, MAC:%d, byte:%d\n", dm->en_reg_mntr_bb,
5051 dm->en_reg_mntr_rf, dm->en_reg_mntr_mac, dm->en_reg_mntr_byte);
5052
5053 *_used = used;
5054 *_out_len = out_len;
5055 }
5056
5057 #if (RTL8822C_SUPPORT)
phydm_get_agc_rf_gain(void * dm_void,boolean is_mod,u8 tab,u8 mp_gain_i)5058 u16 phydm_get_agc_rf_gain(void *dm_void, boolean is_mod, u8 tab, u8 mp_gain_i)
5059 {
5060 struct dm_struct *dm = (struct dm_struct *)dm_void;
5061 u16 rf_gain = 0x0;
5062
5063 if (is_mod)
5064 rf_gain = dm->agc_rf_gain[tab][mp_gain_i];
5065 else
5066 rf_gain = dm->agc_rf_gain_ori[tab][mp_gain_i];
5067
5068 return rf_gain;
5069 }
5070 #endif
5071
phydm_get_rxagc_table_dbg(void * dm_void,char input[][16],u32 * _used,char * output,u32 * _out_len)5072 void phydm_get_rxagc_table_dbg(void *dm_void, char input[][16], u32 *_used,
5073 char *output, u32 *_out_len)
5074 {
5075 struct dm_struct *dm = (struct dm_struct *)dm_void;
5076 char help[] = "-h";
5077 u32 var1[10] = {0};
5078 u32 used = *_used;
5079 u32 out_len = *_out_len;
5080 u8 tab = 0;
5081 boolean is_modified = false;
5082 u8 mp_gain = 0;
5083 u16 rf_gain = 0;
5084 u8 i = 0;
5085
5086 #if (RTL8822C_SUPPORT)
5087 if (!(dm->support_ic_type & ODM_RTL8822C))
5088 return;
5089
5090 if ((strcmp(input[1], help) == 0)) {
5091 PDM_SNPF(out_len, used, output + used, out_len - used,
5092 "get rxagc table : {0:ori, 1:modified} {table:0~15} {mp_gain_idx:0~63, all:0xff}\n");
5093 } else {
5094 for (i = 0; i < 3; i++) {
5095 PHYDM_SSCANF(input[i + 1], DCMD_HEX, &var1[i]);
5096 }
5097
5098 is_modified = (boolean)var1[0];
5099 tab = (u8)var1[1];
5100 mp_gain = (u8)var1[2];
5101
5102 PDM_SNPF(out_len, used, output + used, out_len - used,
5103 "agc_table_cnt:%d, is_agc_tab_pos_shift:%d, agc_table_shift:%d\n",
5104 dm->agc_table_cnt, dm->is_agc_tab_pos_shift,
5105 dm->agc_table_shift);
5106
5107 if (mp_gain == 0xff) {
5108 for (i = 0; i < 64; i++) {
5109 rf_gain = phydm_get_agc_rf_gain(dm, is_modified,
5110 tab, i);
5111
5112 PDM_SNPF(out_len, used, output + used,
5113 out_len - used,
5114 "agc_table:%d, mp_gain_idx:0x%x, rf_gain_idx:0x%x\n",
5115 tab, i, rf_gain);
5116 }
5117 } else {
5118 rf_gain = phydm_get_agc_rf_gain(dm, is_modified, tab,
5119 mp_gain);
5120
5121 PDM_SNPF(out_len, used, output + used, out_len - used,
5122 "agc_table:%d, mp_gain_idx:0x%x, rf_gain_idx:0x%x\n",
5123 tab, mp_gain, rf_gain);
5124 }
5125 }
5126 #endif
5127 *_used = used;
5128 *_out_len = out_len;
5129 }
5130
phydm_shift_rxagc_table_dbg(void * dm_void,char input[][16],u32 * _used,char * output,u32 * _out_len)5131 void phydm_shift_rxagc_table_dbg(void *dm_void, char input[][16], u32 *_used,
5132 char *output, u32 *_out_len)
5133 {
5134 struct dm_struct *dm = (struct dm_struct *)dm_void;
5135 char help[] = "-h";
5136 u32 var1[10] = {0};
5137 u32 used = *_used;
5138 u32 out_len = *_out_len;
5139 u8 i = 0;
5140 u16 value_db = 0;
5141
5142 #if (RTL8822C_SUPPORT)
5143 if (!(dm->support_ic_type & ODM_RTL8822C))
5144 return;
5145
5146 if ((strcmp(input[1], help) == 0)) {
5147 PDM_SNPF(out_len, used, output + used, out_len - used,
5148 "shift rxagc table : {0:-, 1:+} {value(0~63, unit:2dB)}\n");
5149 } else {
5150 for (i = 0; i < 3; i++) {
5151 PHYDM_SSCANF(input[i + 1], DCMD_DECIMAL,
5152 &var1[i]);
5153 }
5154
5155 if ((u8)var1[1] > 63) {
5156 PDM_SNPF(out_len, used, output + used, out_len - used,
5157 "Do not enter the value larger than 63!\n");
5158 } else {
5159 phydm_shift_rxagc_table(dm, (boolean)var1[0],
5160 (u8)var1[1]);
5161
5162 value_db = (u8)var1[1] << 1;
5163 PDM_SNPF(out_len, used, output + used, out_len - used,
5164 "shift %s%d dB gain\n",
5165 (((boolean)var1[0]) ? "+" : "-"), value_db);
5166 }
5167 }
5168 #endif
5169 }
5170
5171 #if (RTL8814B_SUPPORT || RTL8198F_SUPPORT)
phydm_spur_detect_dbg(void * dm_void,char input[][16],u32 * _used,char * output,u32 * _out_len)5172 void phydm_spur_detect_dbg(void *dm_void, char input[][16], u32 *_used,
5173 char *output, u32 *_out_len)
5174 {
5175 struct dm_struct *dm = (struct dm_struct *)dm_void;
5176 char help[] = "-h";
5177 u32 var1[10] = {0};
5178 u32 used = *_used;
5179 u32 out_len = *_out_len;
5180 u32 i;
5181
5182 if ((strcmp(input[1], help) == 0)) {
5183 PDM_SNPF(out_len, used, output + used, out_len - used,
5184 "{0: Auto spur detect(NBI+CSI), 1:NBI always ON/ CSI Auto,");
5185 PDM_SNPF(out_len, used, output + used, out_len - used,
5186 "2: CSI always On/ NBI Auto, 3: Disable, 4: CSI & NBI ON}\n");
5187 PDM_SNPF(out_len, used, output + used, out_len - used,
5188 "{If CSI always ON (Mode 2 or 4) -> CSI wgt manual(0~7)}\n");
5189 PDM_SNPF(out_len, used, output + used, out_len - used,
5190 "{5: Adjust CSI weight threshold} {0:-,1:+} {th offset}\n");
5191 } else {
5192 for (i = 0; i < 10; i++) {
5193 if (input[i + 1])
5194 PHYDM_SSCANF(input[i + 1], DCMD_DECIMAL,
5195 &var1[i]);
5196 }
5197
5198 if (var1[0] == 1) {
5199 dm->dsde_sel = DET_NBI;
5200 } else if (var1[0] == 2) {
5201 dm->dsde_sel = DET_CSI;
5202 } else if (var1[0] == 3) {
5203 dm->dsde_sel = DET_DISABLE;
5204 } else if (var1[0] == 4) {
5205 dm->dsde_sel = DET_CSI_NBI_EN;
5206 } else if (var1[0] == 0) {
5207 dm->dsde_sel = DET_AUTO;
5208 } else if (var1[0] == 5) {
5209 if (var1[1] == 0)
5210 for (i = 0; i < 5; i++)
5211 dm->csi_wgt_th_db[i] -= (u8)var1[2];
5212 else if (var1[1] == 1)
5213 for (i = 0; i < 5; i++)
5214 dm->csi_wgt_th_db[i] += (u8)var1[2];
5215 PDM_SNPF(out_len, used, output + used, out_len - used, "current csi weight threshold:\n");
5216 for (i = 0; i < 5; i++)
5217 PDM_SNPF(out_len, used, output + used,
5218 out_len - used, "----%2d",
5219 dm->csi_wgt_th_db[i]);
5220 PDM_SNPF(out_len, used, output + used, out_len - used, "\n");
5221 for (i = 0; i < 5; i++)
5222 PDM_SNPF(out_len, used, output + used,
5223 out_len - used, "--%d--|", i);
5224 PDM_SNPF(out_len, used, output + used, out_len - used, "\n");
5225 } else {
5226 PDM_SNPF(out_len, used, output + used, out_len - used,
5227 "Spur detection mode invalid!\n");
5228 return;
5229 }
5230 if (var1[0] < 5)
5231 PDM_SNPF(out_len, used, output + used, out_len - used,
5232 "spur detect mode = %d\n", dm->dsde_sel);
5233
5234 if (dm->dsde_sel == DET_CSI_NBI_EN) {
5235 if (var1[1] < 8) {
5236 dm->csi_wgt = (u8)var1[1];
5237 PDM_SNPF(out_len, used, output + used,
5238 out_len - used, "CSI wgt %d\n",
5239 dm->csi_wgt);
5240 } else {
5241 PDM_SNPF(out_len, used, output + used,
5242 out_len - used,
5243 "CSI wgt setting invalid. Please set the correct wgt!\n");
5244 return;
5245 }
5246 }
5247 }
5248
5249 *_used = used;
5250 *_out_len = out_len;
5251 }
5252 #endif
5253
5254 struct phydm_command {
5255 char name[16];
5256 u8 id;
5257 };
5258
5259 enum PHYDM_CMD_ID {
5260 PHYDM_HELP,
5261 PHYDM_DEMO,
5262 PHYDM_RF_CMD,
5263 PHYDM_DIG,
5264 PHYDM_RA,
5265 PHYDM_PROFILE,
5266 PHYDM_ANTDIV,
5267 PHYDM_PATHDIV,
5268 PHYDM_DEBUG,
5269 PHYDM_MP_DEBUG,
5270 PHYDM_FW_DEBUG,
5271 PHYDM_SUPPORT_ABILITY,
5272 PHYDM_GET_TXAGC,
5273 PHYDM_SET_TXAGC,
5274 PHYDM_SMART_ANT,
5275 PHYDM_CH_BW,
5276 PHYDM_TRX_PATH,
5277 PHYDM_LA_MODE,
5278 PHYDM_DUMP_REG,
5279 PHYDM_AUTO_DBG,
5280 PHYDM_DD_DBG,
5281 PHYDM_BIG_JUMP,
5282 PHYDM_SHOW_RXRATE,
5283 PHYDM_NBI_EN,
5284 PHYDM_CSI_MASK_EN,
5285 PHYDM_DFS_DEBUG,
5286 PHYDM_DFS_HIST,
5287 PHYDM_NHM,
5288 PHYDM_CLM,
5289 PHYDM_FAHM,
5290 PHYDM_ENV_MNTR,
5291 PHYDM_BB_INFO,
5292 //PHYDM_TXBF,
5293 PHYDM_H2C,
5294 PHYDM_EXT_RF_E_CTRL,
5295 PHYDM_ADAPTIVE_SOML,
5296 PHYDM_PSD,
5297 PHYDM_DEBUG_PORT,
5298 PHYDM_DIS_HTSTF_CONTROL,
5299 PHYDM_CFO_TRK,
5300 PHYDM_ADAPTIVITY_DEBUG,
5301 PHYDM_DIS_DYM_ANT_WEIGHTING,
5302 PHYDM_FORECE_PT_STATE,
5303 PHYDM_STA_INFO,
5304 PHYDM_PAUSE_FUNC,
5305 PHYDM_PER_TONE_EVM,
5306 PHYDM_DYN_TXPWR,
5307 PHYDM_LNA_SAT,
5308 PHYDM_ANAPAR,
5309 PHYDM_CCK_RX_PATHDIV,
5310 PHYDM_BEAM_FORMING,
5311 PHYDM_REG_MONITOR,
5312 #if RTL8814B_SUPPORT
5313 PHYDM_SPUR_DETECT,
5314 #endif
5315 PHYDM_PHY_STATUS,
5316 PHYDM_CRC32_CNT,
5317 PHYDM_DCC,
5318 #ifdef PHYDM_HW_IGI
5319 PHYDM_HWIGI,
5320 #endif
5321 #ifdef PHYDM_HW_SWITCH_AGC_TAB
5322 PHYDM_HW_AGCTAB,
5323 #endif
5324 PHYDM_PMAC_TX,
5325 PHYDM_GET_RXAGC,
5326 PHYDM_SHIFT_RXAGC,
5327 PHYDM_IFS_CLM,
5328 PHYDM_ENHANCE_MNTR,
5329 PHYDM_CSI_DBG,
5330 PHYDM_EDCCA_CLM
5331 };
5332
5333 struct phydm_command phy_dm_ary[] = {
5334 {"-h", PHYDM_HELP}, /*@do not move this element to other position*/
5335 {"demo", PHYDM_DEMO}, /*@do not move this element to other position*/
5336 {"rf", PHYDM_RF_CMD},
5337 {"dig", PHYDM_DIG},
5338 {"ra", PHYDM_RA},
5339 {"profile", PHYDM_PROFILE},
5340 {"antdiv", PHYDM_ANTDIV},
5341 {"pathdiv", PHYDM_PATHDIV},
5342 {"dbg", PHYDM_DEBUG},
5343 {"mp_dbg", PHYDM_MP_DEBUG},
5344 {"fw_dbg", PHYDM_FW_DEBUG},
5345 {"ability", PHYDM_SUPPORT_ABILITY},
5346 {"get_txagc", PHYDM_GET_TXAGC},
5347 {"set_txagc", PHYDM_SET_TXAGC},
5348 {"smtant", PHYDM_SMART_ANT},
5349 {"ch_bw", PHYDM_CH_BW},
5350 {"trxpath", PHYDM_TRX_PATH},
5351 {"lamode", PHYDM_LA_MODE},
5352 {"dumpreg", PHYDM_DUMP_REG},
5353 {"auto_dbg", PHYDM_AUTO_DBG},
5354 {"dd_dbg", PHYDM_DD_DBG},
5355 {"bigjump", PHYDM_BIG_JUMP},
5356 {"rxrate", PHYDM_SHOW_RXRATE},
5357 {"nbi", PHYDM_NBI_EN},
5358 {"csi_mask", PHYDM_CSI_MASK_EN},
5359 {"dfs", PHYDM_DFS_DEBUG},
5360 {"dfs_hist", PHYDM_DFS_HIST},
5361 {"nhm", PHYDM_NHM},
5362 {"clm", PHYDM_CLM},
5363 {"fahm", PHYDM_FAHM},
5364 {"env_mntr", PHYDM_ENV_MNTR},
5365 {"bbinfo", PHYDM_BB_INFO},
5366 /*{"txbf", PHYDM_TXBF},*/
5367 {"h2c", PHYDM_H2C},
5368 {"ext_rfe", PHYDM_EXT_RF_E_CTRL},
5369 {"soml", PHYDM_ADAPTIVE_SOML},
5370 {"psd", PHYDM_PSD},
5371 {"dbgport", PHYDM_DEBUG_PORT},
5372 {"dis_htstf", PHYDM_DIS_HTSTF_CONTROL},
5373 {"cfo_trk", PHYDM_CFO_TRK},
5374 {"adapt_debug", PHYDM_ADAPTIVITY_DEBUG},
5375 {"dis_dym_ant_wgt", PHYDM_DIS_DYM_ANT_WEIGHTING},
5376 {"force_pt_state", PHYDM_FORECE_PT_STATE},
5377 {"sta_info", PHYDM_STA_INFO},
5378 {"pause", PHYDM_PAUSE_FUNC},
5379 {"evm", PHYDM_PER_TONE_EVM},
5380 {"dyn_txpwr", PHYDM_DYN_TXPWR},
5381 {"lna_sat", PHYDM_LNA_SAT},
5382 {"anapar", PHYDM_ANAPAR},
5383 {"cck_rx_pathdiv", PHYDM_CCK_RX_PATHDIV},
5384 {"bf", PHYDM_BEAM_FORMING},
5385 {"reg_mntr", PHYDM_REG_MONITOR},
5386 #if RTL8814B_SUPPORT
5387 {"spur_detect", PHYDM_SPUR_DETECT},
5388 #endif
5389 {"physts", PHYDM_PHY_STATUS},
5390 {"crc32_cnt", PHYDM_CRC32_CNT},
5391 #ifdef PHYDM_PMAC_TX_SETTING_SUPPORT
5392 {"pmac_tx", PHYDM_PMAC_TX},
5393 #endif
5394 #ifdef PHYDM_HW_IGI
5395 {"hwigi", PHYDM_HWIGI},
5396 #endif
5397 #ifdef PHYDM_HW_SWITCH_AGC_TAB
5398 {"hw_agctab", PHYDM_HW_AGCTAB},
5399 #endif
5400 {"dcc", PHYDM_DCC},
5401 {"get_rxagc", PHYDM_GET_RXAGC},
5402 {"shift_rxagc", PHYDM_SHIFT_RXAGC},
5403 {"ifs_clm", PHYDM_IFS_CLM},
5404 {"enh_mntr", PHYDM_ENHANCE_MNTR},
5405 {"csi_dbg", PHYDM_CSI_DBG},
5406 {"edcca_clm", PHYDM_EDCCA_CLM}
5407 };
5408
5409 #endif /*@#ifdef CONFIG_PHYDM_DEBUG_FUNCTION*/
5410
phydm_cmd_parser(struct dm_struct * dm,char input[][MAX_ARGV],u32 input_num,u8 flag,char * output,u32 out_len)5411 void phydm_cmd_parser(struct dm_struct *dm, char input[][MAX_ARGV],
5412 u32 input_num, u8 flag, char *output, u32 out_len)
5413 {
5414 #ifdef CONFIG_PHYDM_DEBUG_FUNCTION
5415 u32 used = 0;
5416 u8 id = 0;
5417 u32 var1[10] = {0};
5418 u32 i;
5419 u32 phydm_ary_size = sizeof(phy_dm_ary) / sizeof(struct phydm_command);
5420
5421 if (flag == 0) {
5422 PDM_SNPF(out_len, used, output + used, out_len - used,
5423 "GET, nothing to print\n");
5424 return;
5425 }
5426
5427 PDM_SNPF(out_len, used, output + used, out_len - used, "\n");
5428
5429 /* Parsing Cmd ID */
5430 if (input_num) {
5431 for (i = 0; i < phydm_ary_size; i++) {
5432 if (strcmp(phy_dm_ary[i].name, input[0]) == 0) {
5433 id = phy_dm_ary[i].id;
5434 break;
5435 }
5436 }
5437 if (i == phydm_ary_size) {
5438 PDM_SNPF(out_len, used, output + used, out_len - used,
5439 "PHYDM command not found!\n");
5440 return;
5441 }
5442 }
5443
5444 switch (id) {
5445 case PHYDM_HELP: {
5446 PDM_SNPF(out_len, used, output + used, out_len - used,
5447 "BB cmd ==>\n");
5448
5449 for (i = 0; i < phydm_ary_size - 2; i++)
5450 PDM_SNPF(out_len, used, output + used, out_len - used,
5451 " %-5d: %s\n", i, phy_dm_ary[i + 2].name);
5452 } break;
5453
5454 case PHYDM_DEMO: { /*@echo demo 10 0x3a z abcde >cmd*/
5455 u32 directory = 0;
5456
5457 #if (DM_ODM_SUPPORT_TYPE & (ODM_CE | ODM_AP))
5458 char char_temp;
5459 #else
5460 u32 char_temp = ' ';
5461 #endif
5462
5463 PHYDM_SSCANF(input[1], DCMD_DECIMAL, &directory);
5464 PDM_SNPF(out_len, used, output + used, out_len - used,
5465 "Decimal value = %d\n", directory);
5466 PHYDM_SSCANF(input[2], DCMD_HEX, &directory);
5467 PDM_SNPF(out_len, used, output + used, out_len - used,
5468 "Hex value = 0x%x\n", directory);
5469 PHYDM_SSCANF(input[3], DCMD_CHAR, &char_temp);
5470 PDM_SNPF(out_len, used, output + used, out_len - used,
5471 "Char = %c\n", char_temp);
5472 PDM_SNPF(out_len, used, output + used, out_len - used,
5473 "String = %s\n", input[4]);
5474 } break;
5475 case PHYDM_RF_CMD:
5476 halrf_cmd_parser(dm, input, &used, output, &out_len, input_num);
5477 break;
5478
5479 case PHYDM_DIG:
5480 phydm_dig_debug(dm, input, &used, output, &out_len);
5481 break;
5482
5483 case PHYDM_RA:
5484 phydm_ra_debug(dm, input, &used, output, &out_len);
5485 break;
5486
5487 case PHYDM_ANTDIV:
5488 #if (defined(CONFIG_PHYDM_ANTENNA_DIVERSITY))
5489 phydm_antdiv_debug(dm, input, &used, output, &out_len);
5490 #endif
5491 break;
5492
5493 case PHYDM_PATHDIV:
5494 #if (defined(CONFIG_PATH_DIVERSITY))
5495 phydm_pathdiv_debug(dm, input, &used, output, &out_len);
5496 #endif
5497 break;
5498
5499 case PHYDM_DEBUG:
5500 phydm_debug_trace(dm, input, &used, output, &out_len);
5501 break;
5502
5503 case PHYDM_MP_DEBUG:
5504 phydm_mp_dbg(dm, input, &used, output, &out_len);
5505 break;
5506
5507 case PHYDM_FW_DEBUG:
5508 phydm_fw_debug_trace(dm, input, &used, output, &out_len);
5509 break;
5510
5511 case PHYDM_SUPPORT_ABILITY:
5512 phydm_supportability_en(dm, input, &used, output, &out_len);
5513 break;
5514
5515 case PHYDM_SMART_ANT:
5516 #if (defined(CONFIG_PHYDM_ANTENNA_DIVERSITY))
5517
5518 #ifdef CONFIG_HL_SMART_ANTENNA_TYPE2
5519 phydm_hl_smt_ant_dbg_type2(dm, input, &used, output, &out_len);
5520 #elif (defined(CONFIG_HL_SMART_ANTENNA_TYPE1))
5521 phydm_hl_smart_ant_debug(dm, input, &used, output, &out_len);
5522 #endif
5523
5524 #elif (defined(CONFIG_CUMITEK_SMART_ANTENNA))
5525 phydm_cumitek_smt_ant_debug(dm, input, &used, output, &out_len);
5526 #endif
5527
5528 break;
5529
5530 case PHYDM_CH_BW:
5531 phydm_bw_ch_adjust(dm, input, &used, output, &out_len);
5532 break;
5533
5534 case PHYDM_PROFILE:
5535 phydm_basic_profile(dm, &used, output, &out_len);
5536 break;
5537
5538 case PHYDM_GET_TXAGC:
5539 phydm_get_txagc(dm, &used, output, &out_len);
5540 break;
5541
5542 case PHYDM_SET_TXAGC:
5543 phydm_set_txagc_dbg(dm, input, &used, output, &out_len);
5544 break;
5545
5546 case PHYDM_TRX_PATH:
5547 phydm_config_trx_path(dm, input, &used, output, &out_len);
5548 break;
5549
5550 case PHYDM_LA_MODE:
5551 #if (PHYDM_LA_MODE_SUPPORT)
5552 phydm_la_cmd(dm, input, &used, output, &out_len);
5553 #endif
5554 break;
5555
5556 case PHYDM_DUMP_REG:
5557 phydm_dump_reg(dm, input, &used, output, &out_len);
5558 break;
5559
5560 case PHYDM_BIG_JUMP:
5561 phydm_enable_big_jump(dm, input, &used, output, &out_len);
5562 break;
5563
5564 case PHYDM_AUTO_DBG:
5565 #ifdef PHYDM_AUTO_DEGBUG
5566 phydm_auto_dbg_console(dm, input, &used, output, &out_len);
5567 #endif
5568 break;
5569
5570 case PHYDM_DD_DBG:
5571 phydm_dd_dbg_dump(dm, input, &used, output, &out_len);
5572 break;
5573
5574 case PHYDM_SHOW_RXRATE:
5575 phydm_show_rx_rate(dm, input, &used, output, &out_len);
5576 break;
5577
5578 case PHYDM_NBI_EN:
5579 phydm_nbi_debug(dm, input, &used, output, &out_len);
5580 break;
5581
5582 case PHYDM_CSI_MASK_EN:
5583 phydm_csi_debug(dm, input, &used, output, &out_len);
5584 break;
5585
5586 #ifdef CONFIG_PHYDM_DFS_MASTER
5587 case PHYDM_DFS_DEBUG:
5588 phydm_dfs_debug(dm, input, &used, output, &out_len);
5589 break;
5590
5591 case PHYDM_DFS_HIST:
5592 phydm_dfs_hist_dbg(dm, input, &used, output, &out_len);
5593 break;
5594 #endif
5595
5596 case PHYDM_NHM:
5597 #ifdef NHM_SUPPORT
5598 phydm_nhm_dbg(dm, input, &used, output, &out_len);
5599 #endif
5600 break;
5601
5602 case PHYDM_CLM:
5603 #ifdef CLM_SUPPORT
5604 phydm_clm_dbg(dm, input, &used, output, &out_len);
5605 #endif
5606 break;
5607
5608 #ifdef FAHM_SUPPORT
5609 case PHYDM_FAHM:
5610 phydm_fahm_dbg(dm, input, &used, output, &out_len);
5611 break;
5612 #endif
5613
5614 case PHYDM_ENV_MNTR:
5615 phydm_env_mntr_dbg(dm, input, &used, output, &out_len);
5616 break;
5617
5618 case PHYDM_BB_INFO:
5619 phydm_bb_hw_dbg_info(dm, input, &used, output, &out_len);
5620 break;
5621 /*
5622 case PHYDM_TXBF: {
5623 #if (DM_ODM_SUPPORT_TYPE & (ODM_WIN | ODM_CE))
5624 #ifdef PHYDM_BEAMFORMING_SUPPORT
5625 struct _RT_BEAMFORMING_INFO *beamforming_info = NULL;
5626
5627 beamforming_info = &dm->beamforming_info;
5628
5629 PHYDM_SSCANF(input[1], DCMD_DECIMAL, &var1[0]);
5630 if (var1[0] == 0) {
5631 beamforming_info->apply_v_matrix = false;
5632 beamforming_info->snding3ss = true;
5633 PDM_SNPF(out_len, used, output + used, out_len - used,
5634 "\r\n dont apply V matrix and 3SS 789 snding\n");
5635 } else if (var1[0] == 1) {
5636 beamforming_info->apply_v_matrix = true;
5637 beamforming_info->snding3ss = true;
5638 PDM_SNPF(out_len, used, output + used, out_len - used,
5639 "\r\n apply V matrix and 3SS 789 snding\n");
5640 } else if (var1[0] == 2) {
5641 beamforming_info->apply_v_matrix = true;
5642 beamforming_info->snding3ss = false;
5643 PDM_SNPF(out_len, used, output + used, out_len - used,
5644 "\r\n default txbf setting\n");
5645 } else
5646 PDM_SNPF(out_len, used, output + used, out_len - used,
5647 "\r\n unknown cmd!!\n");
5648 #endif
5649 #endif
5650 } break;
5651 */
5652 case PHYDM_H2C:
5653 phydm_h2C_debug(dm, input, &used, output, &out_len);
5654 break;
5655
5656 case PHYDM_EXT_RF_E_CTRL:
5657 phydm_ext_rf_element_ctrl(dm, input, &used, output, &out_len);
5658 break;
5659
5660 case PHYDM_ADAPTIVE_SOML:
5661 #ifdef CONFIG_ADAPTIVE_SOML
5662 phydm_soml_debug(dm, input, &used, output, &out_len);
5663 #endif
5664 break;
5665
5666 case PHYDM_PSD:
5667
5668 #ifdef CONFIG_PSD_TOOL
5669 phydm_psd_debug(dm, input, &used, output, &out_len);
5670 #endif
5671
5672 break;
5673
5674 case PHYDM_DEBUG_PORT:
5675 phydm_print_dbgport(dm, input, &used, output, &out_len);
5676 break;
5677
5678 case PHYDM_DIS_HTSTF_CONTROL: {
5679 PHYDM_SSCANF(input[1], DCMD_DECIMAL, &var1[0]);
5680
5681 if (var1[0] == 1) {
5682 /* setting being false is for debug */
5683 dm->bhtstfdisabled = true;
5684 PDM_SNPF(out_len, used, output + used, out_len - used,
5685 "Dynamic HT-STF Gain Control is Disable\n");
5686 } else {
5687 /* @default setting should be true,
5688 * always be dynamic control
5689 */
5690 dm->bhtstfdisabled = false;
5691 PDM_SNPF(out_len, used, output + used, out_len - used,
5692 "Dynamic HT-STF Gain Control is Enable\n");
5693 }
5694 } break;
5695
5696 case PHYDM_CFO_TRK:
5697 phydm_cfo_tracking_debug(dm, input, &used, output, &out_len);
5698 break;
5699
5700 case PHYDM_ADAPTIVITY_DEBUG:
5701 #ifdef PHYDM_SUPPORT_ADAPTIVITY
5702 phydm_adaptivity_debug(dm, input, &used, output, &out_len);
5703 #endif
5704 break;
5705
5706 case PHYDM_DIS_DYM_ANT_WEIGHTING:
5707 #ifdef DYN_ANT_WEIGHTING_SUPPORT
5708 phydm_ant_weight_dbg(dm, input, &used, output, &out_len);
5709 #endif
5710 break;
5711
5712 case PHYDM_FORECE_PT_STATE:
5713 #ifdef PHYDM_POWER_TRAINING_SUPPORT
5714 phydm_pow_train_debug(dm, input, &used, output, &out_len);
5715 #endif
5716 break;
5717
5718 case PHYDM_STA_INFO:
5719 phydm_show_sta_info(dm, input, &used, output, &out_len);
5720 break;
5721
5722 case PHYDM_PAUSE_FUNC:
5723 phydm_pause_func_console(dm, input, &used, output, &out_len);
5724 break;
5725
5726 case PHYDM_PER_TONE_EVM:
5727 phydm_per_tone_evm(dm, input, &used, output, &out_len);
5728 break;
5729
5730 #ifdef CONFIG_DYNAMIC_TX_TWR
5731 case PHYDM_DYN_TXPWR:
5732 phydm_dtp_debug(dm, input, &used, output, &out_len);
5733 break;
5734 #endif
5735
5736 case PHYDM_LNA_SAT:
5737 #ifdef PHYDM_LNA_SAT_CHK_SUPPORT
5738 phydm_lna_sat_debug(dm, input, &used, output, &out_len);
5739 #endif
5740 break;
5741
5742 case PHYDM_ANAPAR:
5743 phydm_get_anapar_table(dm, &used, output, &out_len);
5744 break;
5745 case PHYDM_CCK_RX_PATHDIV:
5746 #ifdef PHYDM_CCK_RX_PATHDIV_SUPPORT
5747 phydm_cck_rx_pathdiv_dbg(dm, input, &used, output, &out_len);
5748 #endif
5749 break;
5750
5751 case PHYDM_BEAM_FORMING:
5752 #ifdef CONFIG_BB_TXBF_API
5753 phydm_bf_debug(dm, input, &used, output, &out_len);
5754 #endif
5755 break;
5756 case PHYDM_REG_MONITOR:
5757 phydm_reg_monitor(dm, input, &used, output, &out_len);
5758 break;
5759
5760 #if RTL8814B_SUPPORT
5761 case PHYDM_SPUR_DETECT:
5762 phydm_spur_detect_dbg(dm, input, &used, output, &out_len);
5763 break;
5764 #endif
5765 case PHYDM_CRC32_CNT:
5766 phydm_crc32_cnt_dbg(dm, input, &used, output, &out_len);
5767 break;
5768 case PHYDM_PHY_STATUS:
5769 phydm_physts_dbg(dm, input, &used, output, &out_len);
5770 break;
5771 #ifdef PHYDM_DCC_ENHANCE
5772 case PHYDM_DCC:
5773 phydm_dig_cckpd_coex_dbg(dm, input, &used, output, &out_len);
5774 break;
5775 #endif
5776 #ifdef PHYDM_PMAC_TX_SETTING_SUPPORT
5777 case PHYDM_PMAC_TX:
5778 phydm_pmac_tx_dbg(dm, input, &used, output, &out_len);
5779 break;
5780 #endif
5781 #ifdef PHYDM_HW_IGI
5782 case PHYDM_HWIGI:
5783 phydm_hwigi_dbg(dm, input, &used, output, &out_len);
5784 break;
5785 #endif
5786 #ifdef PHYDM_HW_SWITCH_AGC_TAB
5787 case PHYDM_HW_AGCTAB:
5788 phydm_auto_agc_tab_debug(dm, input, &used, output, &out_len);
5789 break;
5790 #endif
5791 case PHYDM_GET_RXAGC:
5792 phydm_get_rxagc_table_dbg(dm, input, &used, output, &out_len);
5793 break;
5794 case PHYDM_SHIFT_RXAGC:
5795 phydm_shift_rxagc_table_dbg(dm, input, &used, output, &out_len);
5796 break;
5797 case PHYDM_IFS_CLM:
5798 #ifdef IFS_CLM_SUPPORT
5799 phydm_ifs_clm_dbg(dm, input, &used, output, &out_len);
5800 #endif
5801 break;
5802 case PHYDM_ENHANCE_MNTR:
5803 phydm_enhance_mntr_dbg(dm, input, &used, output, &out_len);
5804 break;
5805 case PHYDM_CSI_DBG:
5806 phydm_get_csi_table(dm, &used, output, &out_len);
5807 break;
5808 case PHYDM_EDCCA_CLM:
5809 #ifdef EDCCA_CLM_SUPPORT
5810 phydm_edcca_clm_dbg(dm, input, &used, output, &out_len);
5811 #endif
5812 break;
5813 default:
5814 PDM_SNPF(out_len, used, output + used, out_len - used,
5815 "Do not support this command\n");
5816 break;
5817 }
5818 #endif /*@#ifdef CONFIG_PHYDM_DEBUG_FUNCTION*/
5819 }
5820
5821 #if defined __ECOS || defined __ICCARM__
5822 #ifndef strsep
strsep(char ** s,const char * ct)5823 char *strsep(char **s, const char *ct)
5824 {
5825 char *sbegin = *s;
5826 char *end;
5827
5828 if (!sbegin)
5829 return NULL;
5830
5831 end = strpbrk(sbegin, ct);
5832 if (end)
5833 *end++ = '\0';
5834 *s = end;
5835 return sbegin;
5836 }
5837 #endif
5838 #endif
5839
5840 #if (DM_ODM_SUPPORT_TYPE & (ODM_CE | ODM_AP | ODM_IOT))
phydm_cmd(struct dm_struct * dm,char * input,u32 in_len,u8 flag,char * output,u32 out_len)5841 s32 phydm_cmd(struct dm_struct *dm, char *input, u32 in_len, u8 flag,
5842 char *output, u32 out_len)
5843 {
5844 char *token;
5845 u32 argc = 0;
5846 char argv[MAX_ARGC][MAX_ARGV];
5847
5848 do {
5849 token = strsep(&input, ", ");
5850 if (token) {
5851 if (strlen(token) <= MAX_ARGV)
5852 strcpy(argv[argc], token);
5853
5854 argc++;
5855 } else {
5856 break;
5857 }
5858 } while (argc < MAX_ARGC);
5859
5860 if (argc == 1)
5861 argv[0][strlen(argv[0]) - 1] = '\0';
5862
5863 phydm_cmd_parser(dm, argv, argc, flag, output, out_len);
5864
5865 return 0;
5866 }
5867 #endif
5868
phydm_fw_trace_handler(void * dm_void,u8 * cmd_buf,u8 cmd_len)5869 void phydm_fw_trace_handler(void *dm_void, u8 *cmd_buf, u8 cmd_len)
5870 {
5871 #ifdef CONFIG_PHYDM_DEBUG_FUNCTION
5872 struct dm_struct *dm = (struct dm_struct *)dm_void;
5873
5874 /*@u8 debug_trace_11byte[60];*/
5875 u8 freg_num, c2h_seq, buf_0 = 0;
5876
5877 if (!(dm->support_ic_type & PHYDM_IC_3081_SERIES))
5878 return;
5879
5880 if (cmd_len > 12 || cmd_len == 0) {
5881 pr_debug("[Warning] Error C2H cmd_len=%d\n", cmd_len);
5882 return;
5883 }
5884
5885 buf_0 = cmd_buf[0];
5886 freg_num = (buf_0 & 0xf);
5887 c2h_seq = (buf_0 & 0xf0) >> 4;
5888
5889 #if 0
5890 PHYDM_DBG(dm, DBG_FW_TRACE,
5891 "[FW debug message] freg_num = (( %d )), c2h_seq=(( %d ))\n",
5892 freg_num, c2h_seq);
5893
5894 strncpy(debug_trace_11byte, &cmd_buf[1], (cmd_len - 1));
5895 debug_trace_11byte[cmd_len - 1] = '\0';
5896 PHYDM_DBG(dm, DBG_FW_TRACE, "[FW debug message] %s\n",
5897 debug_trace_11byte);
5898 PHYDM_DBG(dm, DBG_FW_TRACE, "[FW debug message] cmd_len = (( %d ))\n",
5899 cmd_len);
5900 PHYDM_DBG(dm, DBG_FW_TRACE, "[FW debug message] c2h_cmd_start=((%d))\n",
5901 dm->c2h_cmd_start);
5902
5903 PHYDM_DBG(dm, DBG_FW_TRACE, "pre_seq = (( %d )), current_seq=((%d))\n",
5904 dm->pre_c2h_seq, c2h_seq);
5905 PHYDM_DBG(dm, DBG_FW_TRACE, "fw_buff_is_enpty = (( %d ))\n",
5906 dm->fw_buff_is_enpty);
5907 #endif
5908
5909 if (c2h_seq != dm->pre_c2h_seq && dm->fw_buff_is_enpty == false) {
5910 dm->fw_debug_trace[dm->c2h_cmd_start] = '\0';
5911 PHYDM_DBG(dm, DBG_FW_TRACE, "[FW Dbg Queue Overflow] %s\n",
5912 dm->fw_debug_trace);
5913 dm->c2h_cmd_start = 0;
5914 }
5915
5916 if ((cmd_len - 1) > (60 - dm->c2h_cmd_start)) {
5917 dm->fw_debug_trace[dm->c2h_cmd_start] = '\0';
5918 PHYDM_DBG(dm, DBG_FW_TRACE,
5919 "[FW Dbg Queue error: wrong C2H length] %s\n",
5920 dm->fw_debug_trace);
5921 dm->c2h_cmd_start = 0;
5922 return;
5923 }
5924
5925 strncpy((char *)&dm->fw_debug_trace[dm->c2h_cmd_start],
5926 (char *)&cmd_buf[1], (cmd_len - 1));
5927 dm->c2h_cmd_start += (cmd_len - 1);
5928 dm->fw_buff_is_enpty = false;
5929
5930 if (freg_num == 0 || dm->c2h_cmd_start >= 60) {
5931 if (dm->c2h_cmd_start < 60)
5932 dm->fw_debug_trace[dm->c2h_cmd_start] = '\0';
5933 else
5934 dm->fw_debug_trace[59] = '\0';
5935
5936 PHYDM_DBG(dm, DBG_FW_TRACE, "[FW DBG Msg] %s\n",
5937 dm->fw_debug_trace);
5938
5939 dm->c2h_cmd_start = 0;
5940 dm->fw_buff_is_enpty = true;
5941 }
5942
5943 dm->pre_c2h_seq = c2h_seq;
5944 #endif /*@#ifdef CONFIG_PHYDM_DEBUG_FUNCTION*/
5945 }
5946
phydm_fw_trace_handler_code(void * dm_void,u8 * buffer,u8 cmd_len)5947 void phydm_fw_trace_handler_code(void *dm_void, u8 *buffer, u8 cmd_len)
5948 {
5949 #ifdef CONFIG_PHYDM_DEBUG_FUNCTION
5950 struct dm_struct *dm = (struct dm_struct *)dm_void;
5951 u8 function = buffer[0];
5952 u8 dbg_num = buffer[1];
5953 u16 content_0 = (((u16)buffer[3]) << 8) | ((u16)buffer[2]);
5954 u16 content_1 = (((u16)buffer[5]) << 8) | ((u16)buffer[4]);
5955 u16 content_2 = (((u16)buffer[7]) << 8) | ((u16)buffer[6]);
5956 u16 content_3 = (((u16)buffer[9]) << 8) | ((u16)buffer[8]);
5957 u16 content_4 = (((u16)buffer[11]) << 8) | ((u16)buffer[10]);
5958
5959 if (cmd_len > 12)
5960 PHYDM_DBG(dm, DBG_FW_TRACE,
5961 "[FW Msg] Invalid cmd length (( %d )) >12\n",
5962 cmd_len);
5963 /*@--------------------------------------------*/
5964 #ifdef CONFIG_RA_FW_DBG_CODE
5965 if (function == RATE_DECISION) {
5966 if (dbg_num == 0) {
5967 if (content_0 == 1)
5968 PHYDM_DBG(dm, DBG_FW_TRACE,
5969 "[FW] RA_CNT=((%d)) Max_device=((%d))--------------------------->\n",
5970 content_1, content_2);
5971 else if (content_0 == 2)
5972 PHYDM_DBG(dm, DBG_FW_TRACE,
5973 "[FW] Check RA macid= ((%d)), MediaStatus=((%d)), Dis_RA=((%d)), try_bit=((0x%x))\n",
5974 content_1, content_2, content_3,
5975 content_4);
5976 else if (content_0 == 3)
5977 PHYDM_DBG(dm, DBG_FW_TRACE,
5978 "[FW] Check RA total=((%d)), drop=((0x%x)), TXRPT_TRY_bit=((%x)), bNoisy=((%x))\n",
5979 content_1, content_2, content_3,
5980 content_4);
5981 } else if (dbg_num == 1) {
5982 if (content_0 == 1)
5983 PHYDM_DBG(dm, DBG_FW_TRACE,
5984 "[FW] RTY[0,1,2,3]=[ %d , %d , %d , %d ]\n",
5985 content_1, content_2, content_3,
5986 content_4);
5987 else if (content_0 == 2) {
5988 PHYDM_DBG(dm, DBG_FW_TRACE,
5989 "[FW] RTY[4]=[ %d ], drop=(( %d )), total=(( %d )), current_rate=((0x %x ))",
5990 content_1, content_2, content_3,
5991 content_4);
5992 phydm_print_rate(dm, (u8)content_4,
5993 DBG_FW_TRACE);
5994 } else if (content_0 == 3)
5995 PHYDM_DBG(dm, DBG_FW_TRACE,
5996 "[FW] penality_idx=(( %d ))\n",
5997 content_1);
5998 else if (content_0 == 4)
5999 PHYDM_DBG(dm, DBG_FW_TRACE,
6000 "[FW] RSSI=(( %d )), ra_stage = (( %d ))\n",
6001 content_1, content_2);
6002 } else if (dbg_num == 3) {
6003 if (content_0 == 1)
6004 PHYDM_DBG(dm, DBG_FW_TRACE,
6005 "[FW] Fast_RA (( DOWN )) total=((%d)), total>>1=((%d)), R4+R3+R2 = ((%d)), RateDownHold = ((%d))\n",
6006 content_1, content_2, content_3,
6007 content_4);
6008 else if (content_0 == 2)
6009 PHYDM_DBG(dm, DBG_FW_TRACE,
6010 "[FW] Fast_RA (( UP )) total_acc=((%d)), total_acc>>1=((%d)), R4+R3+R2 = ((%d)), RateDownHold = ((%d))\n",
6011 content_1, content_2, content_3,
6012 content_4);
6013 else if (content_0 == 3)
6014 PHYDM_DBG(dm, DBG_FW_TRACE,
6015 "[FW] Fast_RA (( UP )) ((rate Down Hold)) RA_CNT=((%d))\n",
6016 content_1);
6017 else if (content_0 == 4)
6018 PHYDM_DBG(dm, DBG_FW_TRACE,
6019 "[FW] Fast_RA (( UP )) ((tota_accl<5 skip)) RA_CNT=((%d))\n",
6020 content_1);
6021 else if (content_0 == 8)
6022 PHYDM_DBG(dm, DBG_FW_TRACE,
6023 "[FW] Fast_RA (( Reset Tx Rpt )) RA_CNT=((%d))\n",
6024 content_1);
6025 } else if (dbg_num == 4) {
6026 if (content_0 == 3)
6027 PHYDM_DBG(dm, DBG_FW_TRACE,
6028 "[FW] RER_CNT PCR_ori =(( %d )), ratio_ori =(( %d )), pcr_updown_bitmap =(( 0x%x )), pcr_var_diff =(( %d ))\n",
6029 content_1, content_2, content_3,
6030 content_4);
6031 else if (content_0 == 4)
6032 PHYDM_DBG(dm, DBG_FW_TRACE,
6033 "[FW] pcr_shift_value =(( %s%d )), rate_down_threshold =(( %d )), rate_up_threshold =(( %d ))\n",
6034 ((content_1) ? "+" : "-"), content_2,
6035 content_3, content_4);
6036 else if (content_0 == 5)
6037 PHYDM_DBG(dm, DBG_FW_TRACE,
6038 "[FW] pcr_mean =(( %d )), PCR_VAR =(( %d )), offset =(( %d )), decision_offset_p =(( %d ))\n",
6039 content_1, content_2, content_3,
6040 content_4);
6041 } else if (dbg_num == 5) {
6042 if (content_0 == 1)
6043 PHYDM_DBG(dm, DBG_FW_TRACE,
6044 "[FW] (( UP)) Nsc=(( %d )), N_High=(( %d )), RateUp_Waiting=(( %d )), RateUp_Fail=(( %d ))\n",
6045 content_1, content_2, content_3,
6046 content_4);
6047 else if (content_0 == 2)
6048 PHYDM_DBG(dm, DBG_FW_TRACE,
6049 "[FW] ((DOWN)) Nsc=(( %d )), N_Low=(( %d ))\n",
6050 content_1, content_2);
6051 else if (content_0 == 3)
6052 PHYDM_DBG(dm, DBG_FW_TRACE,
6053 "[FW] ((HOLD)) Nsc=((%d)), N_High=((%d)), N_Low=((%d)), Reset_CNT=((%d))\n",
6054 content_1, content_2, content_3,
6055 content_4);
6056 } else if (dbg_num == 0x60) {
6057 if (content_0 == 1)
6058 PHYDM_DBG(dm, DBG_FW_TRACE,
6059 "[FW] ((AP RPT)) macid=((%d)), BUPDATE[macid]=((%d))\n",
6060 content_1, content_2);
6061 else if (content_0 == 4)
6062 PHYDM_DBG(dm, DBG_FW_TRACE,
6063 "[FW] ((AP RPT)) pass=((%d)), rty_num=((%d)), drop=((%d)), total=((%d))\n",
6064 content_1, content_2, content_3,
6065 content_4);
6066 else if (content_0 == 5)
6067 PHYDM_DBG(dm, DBG_FW_TRACE,
6068 "[FW] ((AP RPT)) PASS=((%d)), RTY_NUM=((%d)), DROP=((%d)), TOTAL=((%d))\n",
6069 content_1, content_2, content_3,
6070 content_4);
6071 }
6072 } else if (function == INIT_RA_TABLE) {
6073 if (dbg_num == 3)
6074 PHYDM_DBG(dm, DBG_FW_TRACE,
6075 "[FW][INIT_RA_INFO] Ra_init, RA_SKIP_CNT = (( %d ))\n",
6076 content_0);
6077 } else if (function == RATE_UP) {
6078 if (dbg_num == 2) {
6079 if (content_0 == 1)
6080 PHYDM_DBG(dm, DBG_FW_TRACE,
6081 "[FW][RateUp] ((Highest rate->return)), macid=((%d)) Nsc=((%d))\n",
6082 content_1, content_2);
6083 } else if (dbg_num == 5) {
6084 if (content_0 == 0)
6085 PHYDM_DBG(dm, DBG_FW_TRACE,
6086 "[FW][RateUp] ((rate UP)), up_rate_tmp=((0x%x)), rate_idx=((0x%x)), SGI_en=((%d)), SGI=((%d))\n",
6087 content_1, content_2, content_3,
6088 content_4);
6089 else if (content_0 == 1)
6090 PHYDM_DBG(dm, DBG_FW_TRACE,
6091 "[FW][RateUp] ((rate UP)), rate_1=((0x%x)), rate_2=((0x%x)), BW=((%d)), Try_Bit=((%d))\n",
6092 content_1, content_2, content_3,
6093 content_4);
6094 }
6095 } else if (function == RATE_DOWN) {
6096 if (dbg_num == 5) {
6097 if (content_0 == 1)
6098 PHYDM_DBG(dm, DBG_FW_TRACE,
6099 "[FW][RateDownStep] ((rate Down)), macid=((%d)), rate1=((0x%x)), rate2=((0x%x)), BW=((%d))\n",
6100 content_1, content_2, content_3,
6101 content_4);
6102 }
6103 } else if (function == TRY_DONE) {
6104 if (dbg_num == 1) {
6105 if (content_0 == 1)
6106 PHYDM_DBG(dm, DBG_FW_TRACE,
6107 "[FW][Try Done] ((try succsess )) macid=((%d)), Try_Done_cnt=((%d))\n",
6108 content_1, content_2);
6109 } else if (dbg_num == 2) {
6110 if (content_0 == 1)
6111 PHYDM_DBG(dm, DBG_FW_TRACE,
6112 "[FW][Try Done] ((try)) macid=((%d)), Try_Done_cnt=((%d)), rate_2=((%d)), try_succes=((%d))\n",
6113 content_1, content_2, content_3,
6114 content_4);
6115 }
6116 } else if (function == RA_H2C) {
6117 if (dbg_num == 1) {
6118 if (content_0 == 0)
6119 PHYDM_DBG(dm, DBG_FW_TRACE,
6120 "[FW][H2C=0x49] fw_trace_en=((%d)), mode =((%d)), macid=((%d))\n",
6121 content_1, content_2, content_3);
6122 }
6123 } else if (function == F_RATE_AP_RPT) {
6124 if (dbg_num == 1) {
6125 if (content_0 == 1)
6126 PHYDM_DBG(dm, DBG_FW_TRACE,
6127 "[FW][AP RPT] ((1)), SPE_STATIS=((0x%x))---------->\n",
6128 content_3);
6129 } else if (dbg_num == 2) {
6130 if (content_0 == 1)
6131 PHYDM_DBG(dm, DBG_FW_TRACE,
6132 "[FW][AP RPT] RTY_all=((%d))\n",
6133 content_1);
6134 } else if (dbg_num == 3) {
6135 if (content_0 == 1)
6136 PHYDM_DBG(dm, DBG_FW_TRACE,
6137 "[FW][AP RPT] MACID1[%d], TOTAL=((%d)), RTY=((%d))\n",
6138 content_3, content_1, content_2);
6139 } else if (dbg_num == 4) {
6140 if (content_0 == 1)
6141 PHYDM_DBG(dm, DBG_FW_TRACE,
6142 "[FW][AP RPT] MACID2[%d], TOTAL=((%d)), RTY=((%d))\n",
6143 content_3, content_1, content_2);
6144 } else if (dbg_num == 5) {
6145 if (content_0 == 1)
6146 PHYDM_DBG(dm, DBG_FW_TRACE,
6147 "[FW][AP RPT] MACID1[%d], PASS=((%d)), DROP=((%d))\n",
6148 content_3, content_1, content_2);
6149 } else if (dbg_num == 6) {
6150 if (content_0 == 1)
6151 PHYDM_DBG(dm, DBG_FW_TRACE,
6152 "[FW][AP RPT] MACID2[%d],, PASS=((%d)), DROP=((%d))\n",
6153 content_3, content_1, content_2);
6154 }
6155 } else if (function == DBC_FW_CLM) {
6156 PHYDM_DBG(dm, DBG_FW_TRACE,
6157 "[FW][CLM][%d, %d] = {%d, %d, %d, %d}\n", dbg_num,
6158 content_0, content_1, content_2, content_3,
6159 content_4);
6160 } else {
6161 PHYDM_DBG(dm, DBG_FW_TRACE,
6162 "[FW][general][%d, %d, %d] = {%d, %d, %d, %d}\n",
6163 function, dbg_num, content_0, content_1, content_2,
6164 content_3, content_4);
6165 }
6166 #else
6167 PHYDM_DBG(dm, DBG_FW_TRACE,
6168 "[FW][general][%d, %d, %d] = {%d, %d, %d, %d}\n", function,
6169 dbg_num, content_0, content_1, content_2, content_3,
6170 content_4);
6171 #endif
6172 /*@--------------------------------------------*/
6173
6174 #endif /*@#ifdef CONFIG_PHYDM_DEBUG_FUNCTION*/
6175 }
6176
phydm_fw_trace_handler_8051(void * dm_void,u8 * buffer,u8 cmd_len)6177 void phydm_fw_trace_handler_8051(void *dm_void, u8 *buffer, u8 cmd_len)
6178 {
6179 #ifdef CONFIG_PHYDM_DEBUG_FUNCTION
6180 struct dm_struct *dm = (struct dm_struct *)dm_void;
6181 int i = 0;
6182 u8 extend_c2h_sub_id = 0, extend_c2h_dbg_len = 0;
6183 u8 extend_c2h_dbg_seq = 0;
6184 u8 fw_debug_trace[128];
6185 u8 *extend_c2h_dbg_content = 0;
6186
6187 if (cmd_len > 127)
6188 return;
6189
6190 extend_c2h_sub_id = buffer[0];
6191 extend_c2h_dbg_len = buffer[1];
6192 extend_c2h_dbg_content = buffer + 2; /*@DbgSeq+DbgContent for show HEX*/
6193
6194 #if (DM_ODM_SUPPORT_TYPE == ODM_WIN)
6195 RT_DISP(FC2H, C2H_Summary, ("[Extend C2H packet], Extend_c2hSubId=0x%x, extend_c2h_dbg_len=%d\n",
6196 extend_c2h_sub_id, extend_c2h_dbg_len));
6197
6198 RT_DISP_DATA(FC2H, C2H_Summary, "[Extend C2H packet], Content Hex:", extend_c2h_dbg_content, cmd_len - 2);
6199 #endif
6200
6201 go_backfor_aggre_dbg_pkt:
6202 i = 0;
6203 extend_c2h_dbg_seq = buffer[2];
6204 extend_c2h_dbg_content = buffer + 3;
6205
6206 #if (DM_ODM_SUPPORT_TYPE == ODM_WIN)
6207 RT_DISP(FC2H, C2H_Summary, ("[RTKFW, SEQ= %d] :", extend_c2h_dbg_seq));
6208 #endif
6209
6210 for (;; i++) {
6211 fw_debug_trace[i] = extend_c2h_dbg_content[i];
6212 if (extend_c2h_dbg_content[i + 1] == '\0') {
6213 fw_debug_trace[i + 1] = '\0';
6214 PHYDM_DBG(dm, DBG_FW_TRACE, "[FW DBG Msg] %s",
6215 &fw_debug_trace[0]);
6216 break;
6217 } else if (extend_c2h_dbg_content[i] == '\n') {
6218 fw_debug_trace[i + 1] = '\0';
6219 PHYDM_DBG(dm, DBG_FW_TRACE, "[FW DBG Msg] %s",
6220 &fw_debug_trace[0]);
6221 buffer = extend_c2h_dbg_content + i + 3;
6222 goto go_backfor_aggre_dbg_pkt;
6223 }
6224 }
6225 #endif /*@#ifdef CONFIG_PHYDM_DEBUG_FUNCTION*/
6226 }
6227