1 /******************************************************************************
2 *
3 * Copyright(c) 2007 - 2017 Realtek Corporation.
4 *
5 * This program is free software; you can redistribute it and/or modify it
6 * under the terms of version 2 of the GNU General Public License as
7 * published by the Free Software Foundation.
8 *
9 * This program is distributed in the hope that it will be useful, but WITHOUT
10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
12 * more details.
13 *
14 * The full GNU General Public License is included in this distribution in the
15 * file called LICENSE.
16 *
17 * Contact Information:
18 * wlanfae <wlanfae@realtek.com>
19 * Realtek Corporation, No. 2, Innovation Road II, Hsinchu Science Park,
20 * Hsinchu 300, Taiwan.
21 *
22 * Larry Finger <Larry.Finger@lwfinger.net>
23 *
24 *****************************************************************************/
25
26 /* ************************************************************
27 * include files
28 * ************************************************************ */
29
30 #include "mp_precomp.h"
31 #include "phydm_precomp.h"
32
33 /*******************************************************
34 * when antenna test utility is on or some testing need to disable antenna diversity
35 * call this function to disable all ODM related mechanisms which will switch antenna.
36 ******************************************************/
37 #if (defined(CONFIG_SMART_ANTENNA))
38
39 #ifdef PHYDM_IC_JGR3_SERIES_SUPPORT
40 #if (RTL8198F_SUPPORT == 1)
phydm_smt_ant_init_98f(void * dm_void)41 void phydm_smt_ant_init_98f(void *dm_void)
42 {
43 struct dm_struct *dm = (struct dm_struct *)dm_void;
44 u32 val = 0;
45
46 #if 0
47 odm_set_bb_reg(dm, R_0x1da4, 0x3c, 4); /*6.25*4 = 25ms*/
48 odm_set_bb_reg(dm, R_0x1da4, BIT(6), 1);
49 odm_set_bb_reg(dm, R_0x1da4, BIT(7), 1);
50 #endif
51 }
52 #endif
53 #endif
54
55 #if (defined(CONFIG_CUMITEK_SMART_ANTENNA))
phydm_cumitek_smt_ant_mapping_table_8822b(void * dm_void,u8 * table_path_a,u8 * table_path_b)56 void phydm_cumitek_smt_ant_mapping_table_8822b(
57 void *dm_void,
58 u8 *table_path_a,
59 u8 *table_path_b)
60 {
61 struct dm_struct *dm = (struct dm_struct *)dm_void;
62 u32 path_a_0to3_idx = 0;
63 u32 path_b_0to3_idx = 0;
64 u32 path_a_4to7_idx = 0;
65 u32 path_b_4to7_idx = 0;
66
67 path_a_0to3_idx = ((table_path_a[3] & 0xf) << 24) | ((table_path_a[2] & 0xf) << 16) | ((table_path_a[1] & 0xf) << 8) | (table_path_a[0] & 0xf);
68
69 path_b_0to3_idx = ((table_path_b[3] & 0xf) << 28) | ((table_path_b[2] & 0xf) << 20) | ((table_path_b[1] & 0xf) << 12) | ((table_path_b[0] & 0xf) << 4);
70
71 path_a_4to7_idx = ((table_path_a[7] & 0xf) << 24) | ((table_path_a[6] & 0xf) << 16) | ((table_path_a[5] & 0xf) << 8) | (table_path_a[4] & 0xf);
72
73 path_b_4to7_idx = ((table_path_b[7] & 0xf) << 28) | ((table_path_b[6] & 0xf) << 20) | ((table_path_b[5] & 0xf) << 12) | ((table_path_b[4] & 0xf) << 4);
74
75 #if 0
76 /*PHYDM_DBG(dm, DBG_SMT_ANT, "mapping table{A, B} = {0x%x, 0x%x}\n", path_a_0to3_idx, path_b_0to3_idx);*/
77 #endif
78
79 /*pathA*/
80 odm_set_bb_reg(dm, R_0xca4, MASKDWORD, path_a_0to3_idx); /*@ant map 1*/
81 odm_set_bb_reg(dm, R_0xca8, MASKDWORD, path_a_4to7_idx); /*@ant map 2*/
82
83 /*pathB*/
84 odm_set_bb_reg(dm, R_0xea4, MASKDWORD, path_b_0to3_idx); /*@ant map 1*/
85 odm_set_bb_reg(dm, R_0xea8, MASKDWORD, path_b_4to7_idx); /*@ant map 2*/
86 }
87
phydm_cumitek_smt_ant_init_8822b(void * dm_void)88 void phydm_cumitek_smt_ant_init_8822b(
89 void *dm_void)
90 {
91 struct dm_struct *dm = (struct dm_struct *)dm_void;
92 struct smt_ant *smtant_table = &dm->smtant_table;
93 struct smt_ant_cumitek *cumi_smtant_table = &dm->smtant_table.cumi_smtant_table;
94 u32 value32;
95
96 PHYDM_DBG(dm, DBG_SMT_ANT, "[8822B Cumitek SmtAnt Int]\n");
97
98 /*@========= MAC GPIO setting =================================*/
99
100 /* Pin, pin_name, RFE_CTRL_NUM*/
101
102 /* @A0, 55, 5G_TRSW, 3*/
103 /* @A1, 52, 5G_TRSW, 0*/
104 /* @A2, 25, 5G_TRSW, 8*/
105
106 /* @B0, 16, 5G_TRSW, 4*/
107 /* @B1, 13, 5G_TRSW, 11*/
108 /* @B2, 24, 5G_TRSW, 9*/
109
110 /*@for RFE_CTRL 8 & 9*/
111 odm_set_mac_reg(dm, R_0x4c, BIT(24) | BIT(23), 2);
112 odm_set_mac_reg(dm, R_0x44, BIT(27) | BIT(26), 0);
113
114 /*@for RFE_CTRL 0*/
115 odm_set_mac_reg(dm, R_0x4c, BIT(25), 0);
116 odm_set_mac_reg(dm, R_0x64, BIT(29), 1);
117
118 /*@for RFE_CTRL 2 & 3*/
119 odm_set_mac_reg(dm, R_0x4c, BIT(26), 0);
120 odm_set_mac_reg(dm, R_0x64, BIT(28), 1);
121
122 /*@for RFE_CTRL 11*/
123 odm_set_mac_reg(dm, R_0x40, BIT(3), 1);
124
125 /*@0x604[25]=1 : 2bit mode for pathA&B&C&D*/
126 /*@0x604[25]=0 : 3bit mode for pathA&B*/
127 smtant_table->tx_desc_mode = 0;
128 odm_set_mac_reg(dm, R_0x604, BIT(25), (u32)smtant_table->tx_desc_mode);
129
130 /*@========= BB RFE setting =================================*/
131 #if 0
132 /*path A*/
133 odm_set_bb_reg(dm, R_0x1990, BIT(3), 0); /*RFE_CTRL_3*/ /*A_0*/
134 odm_set_bb_reg(dm, R_0xcbc, BIT(3), 0); /*@inv*/
135 odm_set_bb_reg(dm, R_0xcb0, 0xf000, 8);
136
137 odm_set_bb_reg(dm, R_0x1990, BIT(0), 0); /*RFE_CTRL_0*/ /*A_1*/
138 odm_set_bb_reg(dm, R_0xcbc, BIT(0), 0); /*@inv*/
139 odm_set_bb_reg(dm, R_0xcb0, 0xf, 0x9);
140
141 odm_set_bb_reg(dm, R_0x1990, BIT(8), 0); /*RFE_CTRL_8*/ /*A_2*/
142 odm_set_bb_reg(dm, R_0xcbc, BIT(8), 0); /*@inv*/
143 odm_set_bb_reg(dm, R_0xcb4, 0xf, 0xa);
144
145
146 /*path B*/
147 odm_set_bb_reg(dm, R_0x1990, BIT(4), 1); /*RFE_CTRL_4*/ /*B_0*/
148 odm_set_bb_reg(dm, R_0xdbc, BIT(4), 0); /*@inv*/
149 odm_set_bb_reg(dm, R_0xdb0, 0xf0000, 0xb);
150
151 odm_set_bb_reg(dm, R_0x1990, BIT(11), 1); /*RFE_CTRL_11*/ /*B_1*/
152 odm_set_bb_reg(dm, R_0xdbc, BIT(11), 0); /*@inv*/
153 odm_set_bb_reg(dm, R_0xdb4, 0xf000, 0xc);
154
155 odm_set_bb_reg(dm, R_0x1990, BIT(9), 1); /*RFE_CTRL_9*/ /*B_2*/
156 odm_set_bb_reg(dm, R_0xdbc, BIT(9), 0); /*@inv*/
157 odm_set_bb_reg(dm, R_0xdb4, 0xf0, 0xd);
158 #endif
159 /*@========= BB SmtAnt setting =================================*/
160 odm_set_mac_reg(dm, R_0x6d8, BIT(22) | BIT(21), 2); /*resp tx by register*/
161 odm_set_mac_reg(dm, R_0x668, BIT(3), 1);
162 odm_set_bb_reg(dm, R_0x804, BIT(4), 0); /*@lathch antsel*/
163 odm_set_bb_reg(dm, R_0x818, 0xf00000, 0); /*@keep tx by rx*/
164 odm_set_bb_reg(dm, R_0x900, BIT(19), 0); /*@fast train*/
165 odm_set_bb_reg(dm, R_0x900, BIT(18), 1); /*@1: by TXDESC*/
166
167 /*pathA*/
168 odm_set_bb_reg(dm, R_0xca4, MASKDWORD, 0x03020100); /*@ant map 1*/
169 odm_set_bb_reg(dm, R_0xca8, MASKDWORD, 0x07060504); /*@ant map 2*/
170 odm_set_bb_reg(dm, R_0xcac, BIT(9), 0); /*@keep antsel map by GNT_BT*/
171
172 /*pathB*/
173 odm_set_bb_reg(dm, R_0xea4, MASKDWORD, 0x30201000); /*@ant map 1*/
174 odm_set_bb_reg(dm, R_0xea8, MASKDWORD, 0x70605040); /*@ant map 2*/
175 odm_set_bb_reg(dm, R_0xeac, BIT(9), 0); /*@keep antsel map by GNT_BT*/
176 }
177
phydm_cumitek_smt_ant_init_8197f(void * dm_void)178 void phydm_cumitek_smt_ant_init_8197f(
179 void *dm_void)
180 {
181 struct dm_struct *dm = (struct dm_struct *)dm_void;
182 struct smt_ant *smtant_table = &dm->smtant_table;
183 struct smt_ant_cumitek *cumi_smtant_table = &dm->smtant_table.cumi_smtant_table;
184 u32 value32;
185
186 PHYDM_DBG(dm, DBG_SMT_ANT, "[8197F Cumitek SmtAnt Int]\n");
187
188 /*@GPIO setting*/
189 }
190
phydm_cumitek_smt_ant_init_8192f(void * dm_void)191 void phydm_cumitek_smt_ant_init_8192f(
192 void *dm_void)
193 {
194 struct dm_struct *dm = (struct dm_struct *)dm_void;
195 struct smt_ant *smtant_table = &dm->smtant_table;
196 struct smt_ant_cumitek *cumi_smtant_table = &dm->smtant_table.cumi_smtant_table;
197 u32 value32;
198 PHYDM_DBG(dm, DBG_SMT_ANT, "[8192F Cumitek SmtAnt Int]\n");
199
200 /*@GPIO setting*/
201 }
202
phydm_cumitek_smt_tx_ant_update(void * dm_void,u8 tx_ant_idx_path_a,u8 tx_ant_idx_path_b,u32 mac_id)203 void phydm_cumitek_smt_tx_ant_update(
204 void *dm_void,
205 u8 tx_ant_idx_path_a,
206 u8 tx_ant_idx_path_b,
207 u32 mac_id)
208 {
209 struct dm_struct *dm = (struct dm_struct *)dm_void;
210 struct smt_ant *smtant_table = &dm->smtant_table;
211 struct smt_ant_cumitek *cumi_smtant_table = &dm->smtant_table.cumi_smtant_table;
212
213 PHYDM_DBG(dm, DBG_ANT_DIV,
214 "[Cumitek] Set TX-ANT[%d] = (( A:0x%x , B:0x%x ))\n", mac_id,
215 tx_ant_idx_path_a, tx_ant_idx_path_b);
216
217 /*path-A*/
218 cumi_smtant_table->tx_ant_idx[0][mac_id] = tx_ant_idx_path_a; /*@fill this value into TXDESC*/
219
220 /*path-B*/
221 cumi_smtant_table->tx_ant_idx[1][mac_id] = tx_ant_idx_path_b; /*@fill this value into TXDESC*/
222 }
223
phydm_cumitek_smt_rx_default_ant_update(void * dm_void,u8 rx_ant_idx_path_a,u8 rx_ant_idx_path_b)224 void phydm_cumitek_smt_rx_default_ant_update(
225 void *dm_void,
226 u8 rx_ant_idx_path_a,
227 u8 rx_ant_idx_path_b)
228 {
229 struct dm_struct *dm = (struct dm_struct *)dm_void;
230 struct smt_ant *smtant_table = &dm->smtant_table;
231 struct smt_ant_cumitek *cumi_smtant_table = &dm->smtant_table.cumi_smtant_table;
232
233 PHYDM_DBG(dm, DBG_ANT_DIV,
234 "[Cumitek] Set RX-ANT = (( A:0x%x, B:0x%x ))\n",
235 rx_ant_idx_path_a, rx_ant_idx_path_b);
236
237 /*path-A*/
238 if (cumi_smtant_table->rx_default_ant_idx[0] != rx_ant_idx_path_a) {
239 #if (RTL8822B_SUPPORT == 1)
240 if (dm->support_ic_type == ODM_RTL8822B) {
241 odm_set_bb_reg(dm, R_0xc08, BIT(21) | BIT(20) | BIT(19), rx_ant_idx_path_a); /*@default RX antenna*/
242 odm_set_mac_reg(dm, R_0x6d8, BIT(2) | BIT(1) | BIT(0), rx_ant_idx_path_a); /*@default response TX antenna*/
243 }
244 #endif
245
246 #if (RTL8197F_SUPPORT == 1)
247 if (dm->support_ic_type == ODM_RTL8197F) {
248 }
249 #endif
250
251 /*@jj add 20170822*/
252 #if (RTL8192F_SUPPORT == 1)
253 if (dm->support_ic_type == ODM_RTL8192F) {
254 }
255 #endif
256 cumi_smtant_table->rx_default_ant_idx[0] = rx_ant_idx_path_a;
257 }
258
259 /*path-B*/
260 if (cumi_smtant_table->rx_default_ant_idx[1] != rx_ant_idx_path_b) {
261 #if (RTL8822B_SUPPORT == 1)
262 if (dm->support_ic_type == ODM_RTL8822B) {
263 odm_set_bb_reg(dm, R_0xe08, BIT(21) | BIT(20) | BIT(19), rx_ant_idx_path_b); /*@default antenna*/
264 odm_set_mac_reg(dm, R_0x6d8, BIT(5) | BIT(4) | BIT(3), rx_ant_idx_path_b); /*@default response TX antenna*/
265 }
266 #endif
267
268 #if (RTL8197F_SUPPORT == 1)
269 if (dm->support_ic_type == ODM_RTL8197F) {
270 }
271 #endif
272
273 /*@jj add 20170822*/
274 #if (RTL8192F_SUPPORT == 1)
275 if (dm->support_ic_type == ODM_RTL8192F) {
276 }
277 #endif
278 cumi_smtant_table->rx_default_ant_idx[1] = rx_ant_idx_path_b;
279 }
280 }
281
phydm_cumitek_smt_ant_debug(void * dm_void,char input[][16],u32 * _used,char * output,u32 * _out_len)282 void phydm_cumitek_smt_ant_debug(
283 void *dm_void,
284 char input[][16],
285 u32 *_used,
286 char *output,
287 u32 *_out_len)
288 {
289 struct dm_struct *dm = (struct dm_struct *)dm_void;
290 struct smt_ant *smtant_table = &dm->smtant_table;
291 struct smt_ant_cumitek *cumi_smtant_table = &dm->smtant_table.cumi_smtant_table;
292 u32 used = *_used;
293 u32 out_len = *_out_len;
294 char help[] = "-h";
295 u32 dm_value[10] = {0};
296 u8 i;
297
298 PHYDM_SSCANF(input[1], DCMD_DECIMAL, &dm_value[0]);
299
300 if (strcmp(input[1], help) == 0) {
301 PDM_SNPF(out_len, used, output + used, out_len - used,
302 "{1} {PathA rx_ant_idx} {pathB rx_ant_idx}\n");
303 PDM_SNPF(out_len, used, output + used, out_len - used,
304 "{2} {PathA tx_ant_idx} {pathB tx_ant_idx} {macid}\n");
305 PDM_SNPF(out_len, used, output + used, out_len - used,
306 "{3} {PathA mapping table} {PathB mapping table}\n");
307 PDM_SNPF(out_len, used, output + used, out_len - used,
308 "{4} {txdesc_mode 0:3bit, 1:2bit}\n");
309
310 } else if (dm_value[0] == 1) { /*@fix rx_idle pattern*/
311
312 PHYDM_SSCANF(input[2], DCMD_DECIMAL, &dm_value[1]);
313 PHYDM_SSCANF(input[3], DCMD_DECIMAL, &dm_value[2]);
314
315 phydm_cumitek_smt_rx_default_ant_update(dm, (u8)dm_value[1], (u8)dm_value[2]);
316 PDM_SNPF(out_len, used, output + used, out_len - used,
317 "RX Ant{A, B}={%d, %d}\n", dm_value[1], dm_value[2]);
318
319 } else if (dm_value[0] == 2) { /*@fix tx pattern*/
320
321 for (i = 1; i < 4; i++) {
322 if (input[i + 1])
323 PHYDM_SSCANF(input[i + 1], DCMD_DECIMAL, &dm_value[i]);
324 }
325
326 PDM_SNPF(out_len, used, output + used, out_len - used,
327 "STA[%d] TX Ant{A, B}={%d, %d}\n", dm_value[3],
328 dm_value[1], dm_value[2]);
329 phydm_cumitek_smt_tx_ant_update(dm, (u8)dm_value[1], (u8)dm_value[2], (u8)dm_value[3]);
330
331 } else if (dm_value[0] == 3) {
332 u8 table_path_a[8] = {0};
333 u8 table_path_b[8] = {0};
334
335 for (i = 1; i < 4; i++) {
336 if (input[i + 1])
337 PHYDM_SSCANF(input[i + 1], DCMD_HEX, &dm_value[i]);
338 }
339
340 PDM_SNPF(out_len, used, output + used, out_len - used,
341 "Set Path-AB mapping table={%d, %d}\n", dm_value[1],
342 dm_value[2]);
343
344 for (i = 0; i < 8; i++) {
345 table_path_a[i] = (u8)((dm_value[1] >> (4 * i)) & 0xf);
346 table_path_b[i] = (u8)((dm_value[2] >> (4 * i)) & 0xf);
347 }
348
349 PDM_SNPF(out_len, used, output + used, out_len - used,
350 "Ant_Table_A[7:0]={0x%x, 0x%x, 0x%x, 0x%x, 0x%x, 0x%x, 0x%x, 0x%x}\n",
351 table_path_a[7], table_path_a[6], table_path_a[5],
352 table_path_a[4], table_path_a[3], table_path_a[2],
353 table_path_a[1], table_path_a[0]);
354 PDM_SNPF(out_len, used, output + used, out_len - used,
355 "Ant_Table_B[7:0]={0x%x, 0x%x, 0x%x, 0x%x, 0x%x, 0x%x, 0x%x, 0x%x}\n",
356 table_path_b[7], table_path_b[6], table_path_b[5],
357 table_path_b[4], table_path_b[3], table_path_b[2],
358 table_path_b[1], table_path_b[0]);
359
360 phydm_cumitek_smt_ant_mapping_table_8822b(dm, &table_path_a[0], &table_path_b[0]);
361
362 } else if (dm_value[0] == 4) {
363 smtant_table->tx_desc_mode = (u8)dm_value[1];
364 odm_set_mac_reg(dm, R_0x604, BIT(25), (u32)smtant_table->tx_desc_mode);
365 }
366 *_used = used;
367 *_out_len = out_len;
368 }
369
370 #endif
371
372 #if (defined(CONFIG_HL_SMART_ANTENNA))
373 #ifdef CONFIG_HL_SMART_ANTENNA_TYPE2
374
375 #if (RTL8822B_SUPPORT == 1)
phydm_hl_smart_ant_type2_init_8822b(void * dm_void)376 void phydm_hl_smart_ant_type2_init_8822b(
377 void *dm_void)
378 {
379 struct dm_struct *dm = (struct dm_struct *)dm_void;
380 struct smt_ant_honbo *sat_tab = &dm->dm_sat_table;
381 struct phydm_fat_struct *fat_tab = &dm->dm_fat_table;
382 u8 j;
383 u8 rfu_codeword_table_init_2g[SUPPORT_BEAM_SET_PATTERN_NUM][MAX_PATH_NUM_8822B] = {
384 {1, 1}, /*@0*/
385 {1, 2},
386 {2, 1},
387 {2, 2},
388 {4, 0},
389 {5, 0},
390 {6, 0},
391 {7, 0},
392 {8, 0}, /*@8*/
393 {9, 0},
394 {0xa, 0},
395 {0xb, 0},
396 {0xc, 0},
397 {0xd, 0},
398 {0xe, 0},
399 {0xf, 0}};
400 u8 rfu_codeword_table_init_5g[SUPPORT_BEAM_SET_PATTERN_NUM][MAX_PATH_NUM_8822B] = {
401 #if 1
402 {9, 1}, /*@0*/
403 {9, 9},
404 {1, 9},
405 {9, 6},
406 {2, 1},
407 {2, 9},
408 {9, 2},
409 {2, 2}, /*@8*/
410 {6, 1},
411 {6, 9},
412 {2, 9},
413 {2, 2},
414 {6, 2},
415 {6, 6},
416 {2, 6},
417 {1, 1}
418 #else
419 {1, 1}, /*@0*/
420 {9, 1},
421 {9, 9},
422 {1, 9},
423 {1, 2},
424 {9, 2},
425 {9, 6},
426 {1, 6},
427 {2, 1}, /*@8*/
428 {6, 1},
429 {6, 9},
430 {2, 9},
431 {2, 2},
432 {6, 2},
433 {6, 6},
434 {2, 6}
435 #endif
436 };
437
438 PHYDM_DBG(dm, DBG_ANT_DIV,
439 "***RTK 8822B SmartAnt_Init: Hong-Bo SmrtAnt Type2]\n");
440
441 /* @---------------------------------------- */
442 /* @GPIO 0-1 for Beam control */
443 /* reg0x66[2:0]=0 */
444 /* reg0x44[25:24] = 0 */
445 /* reg0x44[23:16] enable_output for P_GPIO[7:0] */
446 /* reg0x44[15:8] output_value for P_GPIO[7:0] */
447 /* reg0x40[1:0] = 0 GPIO function */
448 /* @------------------------------------------ */
449
450 odm_move_memory(dm, sat_tab->rfu_codeword_table_2g, rfu_codeword_table_init_2g, (SUPPORT_BEAM_SET_PATTERN_NUM * MAX_PATH_NUM_8822B));
451 odm_move_memory(dm, sat_tab->rfu_codeword_table_5g, rfu_codeword_table_init_5g, (SUPPORT_BEAM_SET_PATTERN_NUM * MAX_PATH_NUM_8822B));
452
453 /*@GPIO setting*/
454 odm_set_mac_reg(dm, R_0x64, (BIT(18) | BIT(17) | BIT(16)), 0);
455 odm_set_mac_reg(dm, R_0x44, BIT(25) | BIT(24), 0); /*@config P_GPIO[3:2] to data port*/
456 odm_set_mac_reg(dm, R_0x44, BIT(17) | BIT(16), 0x3); /*@enable_output for P_GPIO[3:2]*/
457 #if 0
458 /*odm_set_mac_reg(dm, R_0x44, BIT(9)|BIT(8), 0);*/ /*P_GPIO[3:2] output value*/
459 #endif
460 odm_set_mac_reg(dm, R_0x40, BIT(1) | BIT(0), 0); /*@GPIO function*/
461
462 /*@Hong_lin smart antenna HW setting*/
463 sat_tab->rfu_protocol_type = 2;
464 sat_tab->rfu_protocol_delay_time = 45;
465
466 sat_tab->rfu_codeword_total_bit_num = 16; /*@max=32bit*/
467 sat_tab->rfu_each_ant_bit_num = 4;
468
469 sat_tab->total_beam_set_num = 4;
470 sat_tab->total_beam_set_num_2g = 4;
471 sat_tab->total_beam_set_num_5g = 8;
472
473 #if DEV_BUS_TYPE == RT_SDIO_INTERFACE
474 if (dm->support_interface == ODM_ITRF_SDIO)
475 sat_tab->latch_time = 100; /*@mu sec*/
476 #endif
477 #if DEV_BUS_TYPE == RT_USB_INTERFACE
478 if (dm->support_interface == ODM_ITRF_USB)
479 sat_tab->latch_time = 100; /*@mu sec*/
480 #endif
481 sat_tab->pkt_skip_statistic_en = 0;
482
483 sat_tab->ant_num = 2;
484 sat_tab->ant_num_total = MAX_PATH_NUM_8822B;
485 sat_tab->first_train_ant = MAIN_ANT;
486
487 sat_tab->fix_beam_pattern_en = 0;
488 sat_tab->decision_holding_period = 0;
489
490 /*@beam training setting*/
491 sat_tab->pkt_counter = 0;
492 sat_tab->per_beam_training_pkt_num = 10;
493
494 /*set default beam*/
495 sat_tab->fast_training_beam_num = 0;
496 sat_tab->pre_fast_training_beam_num = sat_tab->fast_training_beam_num;
497
498 for (j = 0; j < SUPPORT_BEAM_SET_PATTERN_NUM; j++) {
499 sat_tab->beam_set_avg_rssi_pre[j] = 0;
500 sat_tab->beam_set_train_val_diff[j] = 0;
501 sat_tab->beam_set_train_cnt[j] = 0;
502 }
503 phydm_set_rfu_beam_pattern_type2(dm);
504 fat_tab->fat_state = FAT_BEFORE_LINK_STATE;
505 }
506 #endif
507
phydm_construct_hb_rfu_codeword_type2(void * dm_void,u32 beam_set_idx)508 u32 phydm_construct_hb_rfu_codeword_type2(
509 void *dm_void,
510 u32 beam_set_idx)
511 {
512 struct dm_struct *dm = (struct dm_struct *)dm_void;
513 struct smt_ant_honbo *sat_tab = &dm->dm_sat_table;
514 u32 sync_codeword = 0x7f;
515 u32 codeword = 0;
516 u32 data_tmp = 0;
517 u32 i;
518
519 for (i = 0; i < sat_tab->ant_num_total; i++) {
520 if (*dm->band_type == ODM_BAND_5G)
521 data_tmp = sat_tab->rfu_codeword_table_5g[beam_set_idx][i];
522 else
523 data_tmp = sat_tab->rfu_codeword_table_2g[beam_set_idx][i];
524
525 codeword |= (data_tmp << (i * sat_tab->rfu_each_ant_bit_num));
526 }
527
528 codeword = (codeword << 8) | sync_codeword;
529
530 return codeword;
531 }
532
phydm_update_beam_pattern_type2(void * dm_void,u32 codeword,u32 codeword_length)533 void phydm_update_beam_pattern_type2(
534 void *dm_void,
535 u32 codeword,
536 u32 codeword_length)
537 {
538 struct dm_struct *dm = (struct dm_struct *)dm_void;
539 struct smt_ant_honbo *sat_tab = &dm->dm_sat_table;
540 u8 i;
541 boolean beam_ctrl_signal;
542 u32 one = 0x1;
543 u32 reg44_tmp_p, reg44_tmp_n, reg44_ori;
544 u8 devide_num = 4;
545
546 PHYDM_DBG(dm, DBG_ANT_DIV, "Set codeword = ((0x%x))\n", codeword);
547
548 reg44_ori = odm_get_mac_reg(dm, R_0x44, MASKDWORD);
549 reg44_tmp_p = reg44_ori;
550 #if 0
551 /*PHYDM_DBG(dm, DBG_ANT_DIV, "reg44_ori =0x%x\n", reg44_ori);*/
552 #endif
553
554 /*@devide_num = (sat_tab->rfu_protocol_type == 2) ? 8 : 4;*/
555
556 for (i = 0; i <= (codeword_length - 1); i++) {
557 beam_ctrl_signal = (boolean)((codeword & BIT(i)) >> i);
558
559 #if 1
560 if (dm->debug_components & DBG_ANT_DIV) {
561 if (i == (codeword_length - 1))
562 pr_debug("%d ]\n", beam_ctrl_signal);
563 else if (i == 0)
564 pr_debug("Start sending codeword[1:%d] ---> [ %d ", codeword_length, beam_ctrl_signal);
565 else if ((i % devide_num) == (devide_num - 1))
566 pr_debug("%d | ", beam_ctrl_signal);
567 else
568 pr_debug("%d ", beam_ctrl_signal);
569 }
570 #endif
571
572 if (dm->support_ic_type == ODM_RTL8821) {
573 #if (RTL8821A_SUPPORT == 1)
574 reg44_tmp_p = reg44_ori & (~(BIT(11) | BIT(10))); /*@clean bit 10 & 11*/
575 reg44_tmp_p |= ((1 << 11) | (beam_ctrl_signal << 10));
576 reg44_tmp_n = reg44_ori & (~(BIT(11) | BIT(10)));
577
578 #if 0
579 /*PHYDM_DBG(dm, DBG_ANT_DIV, "reg44_tmp_p =(( 0x%x )), reg44_tmp_n = (( 0x%x ))\n", reg44_tmp_p, reg44_tmp_n);*/
580 #endif
581 odm_set_mac_reg(dm, R_0x44, MASKDWORD, reg44_tmp_p);
582 odm_set_mac_reg(dm, R_0x44, MASKDWORD, reg44_tmp_n);
583 #endif
584 }
585 #if (RTL8822B_SUPPORT == 1)
586 else if (dm->support_ic_type == ODM_RTL8822B) {
587 if (sat_tab->rfu_protocol_type == 2) {
588 reg44_tmp_p = reg44_tmp_p & ~(BIT(8)); /*@clean bit 8*/
589 reg44_tmp_p = reg44_tmp_p ^ BIT(9); /*@get new clk high/low, exclusive-or*/
590
591 reg44_tmp_p |= (beam_ctrl_signal << 8);
592
593 odm_set_mac_reg(dm, R_0x44, MASKDWORD, reg44_tmp_p);
594 ODM_delay_us(sat_tab->rfu_protocol_delay_time);
595 #if 0
596 /*PHYDM_DBG(dm, DBG_ANT_DIV, "reg44 =(( 0x%x )), reg44[9:8] = ((%x)), beam_ctrl_signal =((%x))\n", reg44_tmp_p, ((reg44_tmp_p & 0x300)>>8), beam_ctrl_signal);*/
597 #endif
598
599 } else {
600 reg44_tmp_p = reg44_ori & (~(BIT(9) | BIT(8))); /*@clean bit 9 & 8*/
601 reg44_tmp_p |= ((1 << 9) | (beam_ctrl_signal << 8));
602 reg44_tmp_n = reg44_ori & (~(BIT(9) | BIT(8)));
603
604 #if 0
605 /*PHYDM_DBG(dm, DBG_ANT_DIV, "reg44_tmp_p =(( 0x%x )), reg44_tmp_n = (( 0x%x ))\n", reg44_tmp_p, reg44_tmp_n); */
606 #endif
607 odm_set_mac_reg(dm, R_0x44, MASKDWORD, reg44_tmp_p);
608 ODM_delay_us(10);
609 odm_set_mac_reg(dm, R_0x44, MASKDWORD, reg44_tmp_n);
610 ODM_delay_us(10);
611 }
612 }
613 #endif
614 }
615 }
616
phydm_update_rx_idle_beam_type2(void * dm_void)617 void phydm_update_rx_idle_beam_type2(
618 void *dm_void)
619 {
620 struct dm_struct *dm = (struct dm_struct *)dm_void;
621 struct phydm_fat_struct *fat_tab = &dm->dm_fat_table;
622 struct smt_ant_honbo *sat_tab = &dm->dm_sat_table;
623 u32 i;
624
625 sat_tab->update_beam_codeword = phydm_construct_hb_rfu_codeword_type2(dm, sat_tab->rx_idle_beam_set_idx);
626 PHYDM_DBG(dm, DBG_ANT_DIV,
627 "[ Update Rx-Idle-Beam ] BeamSet idx = ((%d))\n",
628 sat_tab->rx_idle_beam_set_idx);
629
630 #if DEV_BUS_TYPE == RT_PCI_INTERFACE
631 if (dm->support_interface == ODM_ITRF_PCIE)
632 phydm_update_beam_pattern_type2(dm, sat_tab->update_beam_codeword, sat_tab->rfu_codeword_total_bit_num);
633 #endif
634 #if DEV_BUS_TYPE == RT_USB_INTERFACE || DEV_BUS_TYPE == RT_SDIO_INTERFACE
635 if (dm->support_interface == ODM_ITRF_USB || dm->support_interface == ODM_ITRF_SDIO)
636 odm_schedule_work_item(&sat_tab->hl_smart_antenna_workitem);
637 #if 0
638 /*odm_stall_execution(1);*/
639 #endif
640 #endif
641
642 sat_tab->pre_codeword = sat_tab->update_beam_codeword;
643 }
644
phydm_hl_smt_ant_dbg_type2(void * dm_void,char input[][16],u32 * _used,char * output,u32 * _out_len)645 void phydm_hl_smt_ant_dbg_type2(
646 void *dm_void,
647 char input[][16],
648 u32 *_used,
649 char *output,
650 u32 *_out_len
651 )
652 {
653 struct dm_struct *dm = (struct dm_struct *)dm_void;
654 struct smt_ant_honbo *sat_tab = &dm->dm_sat_table;
655 u32 used = *_used;
656 u32 out_len = *_out_len;
657 u32 one = 0x1;
658 u32 codeword_length = sat_tab->rfu_codeword_total_bit_num;
659 u32 beam_ctrl_signal, i;
660 u8 devide_num = 4;
661 char help[] = "-h";
662 u32 dm_value[10] = {0};
663
664 PHYDM_SSCANF(input[1], DCMD_DECIMAL, &dm_value[0]);
665 PHYDM_SSCANF(input[2], DCMD_DECIMAL, &dm_value[1]);
666 PHYDM_SSCANF(input[3], DCMD_DECIMAL, &dm_value[2]);
667 PHYDM_SSCANF(input[4], DCMD_DECIMAL, &dm_value[3]);
668 PHYDM_SSCANF(input[5], DCMD_DECIMAL, &dm_value[4]);
669
670 if (strcmp(input[1], help) == 0) {
671 PDM_SNPF(out_len, used, output + used, out_len - used,
672 " 1 {fix_en} {codeword(Hex)}\n");
673 PDM_SNPF(out_len, used, output + used, out_len - used,
674 " 3 {Fix_training_num_en} {Per_beam_training_pkt_num} {Decision_holding_period}\n");
675 PDM_SNPF(out_len, used, output + used, out_len - used,
676 " 5 {0:show, 1:2G, 2:5G} {beam_num} {idxA(Hex)} {idxB(Hex)}\n");
677 PDM_SNPF(out_len, used, output + used, out_len - used,
678 " 7 {0:show, 1:2G, 2:5G} {total_beam_set_num}\n");
679 PDM_SNPF(out_len, used, output + used, out_len - used,
680 " 8 {0:show, 1:set} {RFU delay time(us)}\n");
681
682 } else if (dm_value[0] == 1) { /*@fix beam pattern*/
683
684 sat_tab->fix_beam_pattern_en = dm_value[1];
685
686 if (sat_tab->fix_beam_pattern_en == 1) {
687 PHYDM_SSCANF(input[3], DCMD_HEX, &dm_value[2]);
688 sat_tab->fix_beam_pattern_codeword = dm_value[2];
689
690 if (sat_tab->fix_beam_pattern_codeword > (one << codeword_length)) {
691 PHYDM_DBG(dm, DBG_ANT_DIV,
692 "[ SmartAnt ] Codeword overflow, Current codeword is ((0x%x)), and should be less than ((%d))bit\n",
693 sat_tab->fix_beam_pattern_codeword,
694 codeword_length);
695
696 (sat_tab->fix_beam_pattern_codeword) &= 0xffffff;
697
698 PHYDM_DBG(dm, DBG_ANT_DIV,
699 "[ SmartAnt ] Auto modify to (0x%x)\n",
700 sat_tab->fix_beam_pattern_codeword);
701 }
702
703 sat_tab->update_beam_codeword = sat_tab->fix_beam_pattern_codeword;
704
705 /*@---------------------------------------------------------*/
706 PDM_SNPF(out_len, used, output + used, out_len - used,
707 "Fix Beam Pattern\n");
708
709 /*@devide_num = (sat_tab->rfu_protocol_type == 2) ? 8 : 4;*/
710
711 for (i = 0; i <= (codeword_length - 1); i++) {
712 beam_ctrl_signal = (boolean)((sat_tab->update_beam_codeword & BIT(i)) >> i);
713
714 if (i == (codeword_length - 1))
715 PDM_SNPF(out_len, used,
716 output + used,
717 out_len - used,
718 "%d]\n",
719 beam_ctrl_signal);
720 else if (i == 0)
721 PDM_SNPF(out_len, used,
722 output + used,
723 out_len - used,
724 "Send Codeword[1:%d] to RFU -> [%d",
725 sat_tab->rfu_codeword_total_bit_num,
726 beam_ctrl_signal);
727 else if ((i % devide_num) == (devide_num - 1))
728 PDM_SNPF(out_len, used,
729 output + used,
730 out_len - used, "%d|",
731 beam_ctrl_signal);
732 else
733 PDM_SNPF(out_len, used,
734 output + used,
735 out_len - used, "%d",
736 beam_ctrl_signal);
737 }
738 /*@---------------------------------------------------------*/
739
740 #if DEV_BUS_TYPE == RT_PCI_INTERFACE
741 if (dm->support_interface == ODM_ITRF_PCIE)
742 phydm_update_beam_pattern_type2(dm, sat_tab->update_beam_codeword, sat_tab->rfu_codeword_total_bit_num);
743 #endif
744 #if DEV_BUS_TYPE == RT_USB_INTERFACE || DEV_BUS_TYPE == RT_SDIO_INTERFACE
745 if (dm->support_interface == ODM_ITRF_USB || dm->support_interface == ODM_ITRF_SDIO)
746 odm_schedule_work_item(&sat_tab->hl_smart_antenna_workitem);
747 #if 0
748 /*odm_stall_execution(1);*/
749 #endif
750 #endif
751 } else if (sat_tab->fix_beam_pattern_en == 0)
752 PDM_SNPF(out_len, used, output + used, out_len - used,
753 "[ SmartAnt ] Smart Antenna: Enable\n");
754
755 } else if (dm_value[0] == 2) { /*set latch time*/
756
757 sat_tab->latch_time = dm_value[1];
758 PHYDM_DBG(dm, DBG_ANT_DIV, "[ SmartAnt ] latch_time =0x%x\n",
759 sat_tab->latch_time);
760 } else if (dm_value[0] == 3) {
761 sat_tab->fix_training_num_en = dm_value[1];
762
763 if (sat_tab->fix_training_num_en == 1) {
764 sat_tab->per_beam_training_pkt_num = (u8)dm_value[2];
765 sat_tab->decision_holding_period = (u8)dm_value[3];
766
767 PDM_SNPF(out_len, used, output + used, out_len - used,
768 "[SmtAnt] Fix_train_en = (( %d )), train_pkt_num = (( %d )), holding_period = (( %d )),\n",
769 sat_tab->fix_training_num_en,
770 sat_tab->per_beam_training_pkt_num,
771 sat_tab->decision_holding_period);
772
773 } else if (sat_tab->fix_training_num_en == 0) {
774 PDM_SNPF(out_len, used, output + used, out_len - used,
775 "[ SmartAnt ] AUTO per_beam_training_pkt_num\n");
776 }
777 } else if (dm_value[0] == 4) {
778 #if 0
779 if (dm_value[1] == 1) {
780 sat_tab->ant_num = 1;
781 sat_tab->first_train_ant = MAIN_ANT;
782
783 } else if (dm_value[1] == 2) {
784 sat_tab->ant_num = 1;
785 sat_tab->first_train_ant = AUX_ANT;
786
787 } else if (dm_value[1] == 3) {
788 sat_tab->ant_num = 2;
789 sat_tab->first_train_ant = MAIN_ANT;
790 }
791
792 PDM_SNPF((output + used, out_len - used,
793 "[ SmartAnt ] Set ant Num = (( %d )), first_train_ant = (( %d ))\n",
794 sat_tab->ant_num, (sat_tab->first_train_ant - 1)));
795 #endif
796 } else if (dm_value[0] == 5) { /*set beam set table*/
797
798 PHYDM_SSCANF(input[4], DCMD_HEX, &dm_value[3]);
799 PHYDM_SSCANF(input[5], DCMD_HEX, &dm_value[4]);
800
801 if (dm_value[1] == 1) { /*@2G*/
802 if (dm_value[2] < SUPPORT_BEAM_SET_PATTERN_NUM) {
803 sat_tab->rfu_codeword_table_2g[dm_value[2]][0] = (u8)dm_value[3];
804 sat_tab->rfu_codeword_table_2g[dm_value[2]][1] = (u8)dm_value[4];
805 PDM_SNPF(out_len, used, output + used,
806 out_len - used,
807 "[SmtAnt] Set 2G Table[%d] = [A:0x%x, B:0x%x]\n",
808 dm_value[2], dm_value[3], dm_value[4]);
809 }
810
811 } else if (dm_value[1] == 2) { /*@5G*/
812 if (dm_value[2] < SUPPORT_BEAM_SET_PATTERN_NUM) {
813 sat_tab->rfu_codeword_table_5g[dm_value[2]][0] = (u8)dm_value[3];
814 sat_tab->rfu_codeword_table_5g[dm_value[2]][1] = (u8)dm_value[4];
815 PDM_SNPF(out_len, used, output + used,
816 out_len - used,
817 "[SmtAnt] Set5G Table[%d] = [A:0x%x, B:0x%x]\n",
818 dm_value[2], dm_value[3], dm_value[4]);
819 }
820 } else if (dm_value[1] == 0) {
821 PDM_SNPF(out_len, used, output + used, out_len - used,
822 "[SmtAnt] 2G Beam Table==============>\n");
823 for (i = 0; i < sat_tab->total_beam_set_num_2g; i++) {
824 PDM_SNPF(out_len, used, output + used,
825 out_len - used,
826 "2G Table[%d] = [A:0x%x, B:0x%x]\n", i,
827 sat_tab->rfu_codeword_table_2g[i][0],
828 sat_tab->rfu_codeword_table_2g[i][1]);
829 }
830 PDM_SNPF(out_len, used, output + used, out_len - used,
831 "[SmtAnt] 5G Beam Table==============>\n");
832 for (i = 0; i < sat_tab->total_beam_set_num_5g; i++) {
833 PDM_SNPF(out_len, used, output + used,
834 out_len - used,
835 "5G Table[%d] = [A:0x%x, B:0x%x]\n", i,
836 sat_tab->rfu_codeword_table_5g[i][0],
837 sat_tab->rfu_codeword_table_5g[i][1]);
838 }
839 }
840
841 } else if (dm_value[0] == 6) {
842 #if 0
843 if (dm_value[1] == 0) {
844 if (dm_value[2] < SUPPORT_BEAM_SET_PATTERN_NUM) {
845 sat_tab->rfu_codeword_table_5g[dm_value[2] ][0] = (u8)dm_value[3];
846 sat_tab->rfu_codeword_table_5g[dm_value[2] ][1] = (u8)dm_value[4];
847 PDM_SNPF((output + used, out_len - used,
848 "[SmtAnt] Set5G Table[%d] = [A:0x%x, B:0x%x]\n",
849 dm_value[2], dm_value[3],
850 dm_value[4]));
851 }
852 } else {
853 for (i = 0; i < sat_tab->total_beam_set_num_5g; i++) {
854 PDM_SNPF((output + used, out_len - used,
855 "[SmtAnt] Read 5G Table[%d] = [A:0x%x, B:0x%x]\n",
856 i,
857 sat_tab->rfu_codeword_table_5g[i][0],
858 sat_tab->rfu_codeword_table_5g[i][1]));
859 }
860 }
861 #endif
862 } else if (dm_value[0] == 7) {
863 if (dm_value[1] == 1) {
864 sat_tab->total_beam_set_num_2g = (u8)(dm_value[2]);
865 PDM_SNPF(out_len, used, output + used, out_len - used,
866 "[ SmartAnt ] total_beam_set_num_2g = ((%d))\n",
867 sat_tab->total_beam_set_num_2g);
868
869 } else if (dm_value[1] == 2) {
870 sat_tab->total_beam_set_num_5g = (u8)(dm_value[2]);
871 PDM_SNPF(out_len, used, output + used, out_len - used,
872 "[ SmartAnt ] total_beam_set_num_5g = ((%d))\n",
873 sat_tab->total_beam_set_num_5g);
874 } else if (dm_value[1] == 0) {
875 PDM_SNPF(out_len, used, output + used, out_len - used,
876 "[ SmartAnt ] Show total_beam_set_num{2g,5g} = {%d,%d}\n",
877 sat_tab->total_beam_set_num_2g,
878 sat_tab->total_beam_set_num_5g);
879 }
880
881 } else if (dm_value[0] == 8) {
882 if (dm_value[1] == 1) {
883 sat_tab->rfu_protocol_delay_time = (u16)(dm_value[2]);
884 PDM_SNPF(out_len, used, output + used, out_len - used,
885 "[SmtAnt] Set rfu_protocol_delay_time = ((%d))\n",
886 sat_tab->rfu_protocol_delay_time);
887 } else if (dm_value[1] == 0) {
888 PDM_SNPF(out_len, used, output + used, out_len - used,
889 "[SmtAnt] Read rfu_protocol_delay_time = ((%d))\n",
890 sat_tab->rfu_protocol_delay_time);
891 }
892 }
893
894 *_used = used;
895 *_out_len = out_len;
896 }
897
phydm_set_rfu_beam_pattern_type2(void * dm_void)898 void phydm_set_rfu_beam_pattern_type2(
899 void *dm_void)
900 {
901 struct dm_struct *dm = (struct dm_struct *)dm_void;
902 struct smt_ant_honbo *sat_tab = &dm->dm_sat_table;
903
904 if (dm->ant_div_type != HL_SW_SMART_ANT_TYPE2)
905 return;
906
907 PHYDM_DBG(dm, DBG_ANT_DIV, "Training beam_set index = (( 0x%x ))\n",
908 sat_tab->fast_training_beam_num);
909 sat_tab->update_beam_codeword = phydm_construct_hb_rfu_codeword_type2(dm, sat_tab->fast_training_beam_num);
910
911 #if DEV_BUS_TYPE == RT_PCI_INTERFACE
912 if (dm->support_interface == ODM_ITRF_PCIE)
913 phydm_update_beam_pattern_type2(dm, sat_tab->update_beam_codeword, sat_tab->rfu_codeword_total_bit_num);
914 #endif
915 #if DEV_BUS_TYPE == RT_USB_INTERFACE || DEV_BUS_TYPE == RT_SDIO_INTERFACE
916 if (dm->support_interface == ODM_ITRF_USB || dm->support_interface == ODM_ITRF_SDIO)
917 odm_schedule_work_item(&sat_tab->hl_smart_antenna_workitem);
918 #if 0
919 /*odm_stall_execution(1);*/
920 #endif
921 #endif
922 }
923
phydm_fast_ant_training_hl_smart_antenna_type2(void * dm_void)924 void phydm_fast_ant_training_hl_smart_antenna_type2(
925 void *dm_void)
926 {
927 struct dm_struct *dm = (struct dm_struct *)dm_void;
928 struct smt_ant_honbo *sat_tab = &dm->dm_sat_table;
929 struct phydm_fat_struct *fat_tab = &dm->dm_fat_table;
930 struct sw_antenna_switch *dm_swat_table = &dm->dm_swat_table;
931 u32 codeword = 0;
932 u8 i = 0, j = 0;
933 u8 avg_rssi_tmp;
934 u8 avg_rssi_tmp_ma;
935 u8 max_beam_ant_rssi = 0;
936 u8 rssi_target_beam = 0, target_beam_max_rssi = 0;
937 u8 evm1ss_target_beam = 0, evm2ss_target_beam = 0;
938 u32 target_beam_max_evm1ss = 0, target_beam_max_evm2ss = 0;
939 u32 beam_tmp;
940 u8 per_beam_val_diff_tmp = 0, training_pkt_num_offset;
941 u32 avg_evm2ss[2] = {0}, avg_evm2ss_sum = 0;
942 u32 avg_evm1ss = 0;
943 u32 beam_path_evm_2ss_cnt_all = 0; /*sum of all 2SS-pattern cnt*/
944 u32 beam_path_evm_1ss_cnt_all = 0; /*sum of all 1SS-pattern cnt*/
945 u8 decision_type;
946
947 if (!dm->is_linked) {
948 PHYDM_DBG(dm, DBG_ANT_DIV, "[No Link!!!]\n");
949
950 if (fat_tab->is_become_linked == true) {
951 sat_tab->decision_holding_period = 0;
952 PHYDM_DBG(dm, DBG_ANT_DIV, "Link->no Link\n");
953 fat_tab->fat_state = FAT_BEFORE_LINK_STATE;
954 PHYDM_DBG(dm, DBG_ANT_DIV,
955 "change to (( %d )) FAT_state\n",
956 fat_tab->fat_state);
957 fat_tab->is_become_linked = dm->is_linked;
958 }
959 return;
960
961 } else {
962 if (fat_tab->is_become_linked == false) {
963 PHYDM_DBG(dm, DBG_ANT_DIV, "[Linked !!!]\n");
964
965 fat_tab->fat_state = FAT_PREPARE_STATE;
966 PHYDM_DBG(dm, DBG_ANT_DIV,
967 "change to (( %d )) FAT_state\n",
968 fat_tab->fat_state);
969
970 /*sat_tab->fast_training_beam_num = 0;*/
971 /*phydm_set_rfu_beam_pattern_type2(dm);*/
972
973 fat_tab->is_become_linked = dm->is_linked;
974 }
975 }
976
977 #if 0
978 /*PHYDM_DBG(dm, DBG_ANT_DIV, "HL Smart ant Training: state (( %d ))\n", fat_tab->fat_state);*/
979 #endif
980
981 /* @[DECISION STATE] */
982 /*@=======================================================================================*/
983 if (fat_tab->fat_state == FAT_DECISION_STATE) {
984 PHYDM_DBG(dm, DBG_ANT_DIV, "[ 3. In Decision state]\n");
985
986 /*@compute target beam in each antenna*/
987
988 for (j = 0; j < (sat_tab->total_beam_set_num); j++) {
989 /*@[Decision1: RSSI]-------------------------------------------------------------------*/
990 if (sat_tab->statistic_pkt_cnt[j] == 0) { /*@if new RSSI = 0 -> MA_RSSI-=2*/
991 avg_rssi_tmp = sat_tab->beam_set_avg_rssi_pre[j];
992 avg_rssi_tmp = (avg_rssi_tmp >= 2) ? (avg_rssi_tmp - 2) : avg_rssi_tmp;
993 avg_rssi_tmp_ma = avg_rssi_tmp;
994 } else {
995 avg_rssi_tmp = (u8)((sat_tab->beam_set_rssi_avg_sum[j]) / (sat_tab->statistic_pkt_cnt[j]));
996 avg_rssi_tmp_ma = (avg_rssi_tmp + sat_tab->beam_set_avg_rssi_pre[j]) >> 1;
997 }
998
999 sat_tab->beam_set_avg_rssi_pre[j] = avg_rssi_tmp;
1000
1001 if (avg_rssi_tmp > target_beam_max_rssi) {
1002 rssi_target_beam = j;
1003 target_beam_max_rssi = avg_rssi_tmp;
1004 }
1005
1006 /*@[Decision2: EVM 2ss]-------------------------------------------------------------------*/
1007 if (sat_tab->beam_path_evm_2ss_cnt[j] != 0) {
1008 avg_evm2ss[0] = sat_tab->beam_path_evm_2ss_sum[j][0] / sat_tab->beam_path_evm_2ss_cnt[j];
1009 avg_evm2ss[1] = sat_tab->beam_path_evm_2ss_sum[j][1] / sat_tab->beam_path_evm_2ss_cnt[j];
1010 avg_evm2ss_sum = avg_evm2ss[0] + avg_evm2ss[1];
1011 beam_path_evm_2ss_cnt_all += sat_tab->beam_path_evm_2ss_cnt[j];
1012
1013 sat_tab->beam_set_avg_evm_2ss_pre[j] = (u8)avg_evm2ss_sum;
1014 }
1015
1016 if (avg_evm2ss_sum > target_beam_max_evm2ss) {
1017 evm2ss_target_beam = j;
1018 target_beam_max_evm2ss = avg_evm2ss_sum;
1019 }
1020
1021 /*@[Decision3: EVM 1ss]-------------------------------------------------------------------*/
1022 if (sat_tab->beam_path_evm_1ss_cnt[j] != 0) {
1023 avg_evm1ss = sat_tab->beam_path_evm_1ss_sum[j] / sat_tab->beam_path_evm_1ss_cnt[j];
1024 beam_path_evm_1ss_cnt_all += sat_tab->beam_path_evm_1ss_cnt[j];
1025
1026 sat_tab->beam_set_avg_evm_1ss_pre[j] = (u8)avg_evm1ss;
1027 }
1028
1029 if (avg_evm1ss > target_beam_max_evm1ss) {
1030 evm1ss_target_beam = j;
1031 target_beam_max_evm1ss = avg_evm1ss;
1032 }
1033
1034 PHYDM_DBG(dm, DBG_ANT_DIV,
1035 "Beam[%d] Pkt_cnt=(( %d )), avg{MA,rssi}={%d, %d}, EVM1={%d}, EVM2={%d, %d, %d}\n",
1036 j, sat_tab->statistic_pkt_cnt[j],
1037 avg_rssi_tmp_ma, avg_rssi_tmp, avg_evm1ss,
1038 avg_evm2ss[0], avg_evm2ss[1], avg_evm2ss_sum);
1039
1040 /*reset counter value*/
1041 sat_tab->beam_set_rssi_avg_sum[j] = 0;
1042 sat_tab->beam_path_rssi_sum[j][0] = 0;
1043 sat_tab->beam_path_rssi_sum[j][1] = 0;
1044 sat_tab->statistic_pkt_cnt[j] = 0;
1045
1046 sat_tab->beam_path_evm_2ss_sum[j][0] = 0;
1047 sat_tab->beam_path_evm_2ss_sum[j][1] = 0;
1048 sat_tab->beam_path_evm_2ss_cnt[j] = 0;
1049
1050 sat_tab->beam_path_evm_1ss_sum[j] = 0;
1051 sat_tab->beam_path_evm_1ss_cnt[j] = 0;
1052 }
1053
1054 /*@[Joint Decision]-------------------------------------------------------------------*/
1055 PHYDM_DBG(dm, DBG_ANT_DIV,
1056 "--->1.[RSSI] Target Beam(( %d )) RSSI_max=((%d))\n",
1057 rssi_target_beam, target_beam_max_rssi);
1058 PHYDM_DBG(dm, DBG_ANT_DIV,
1059 "--->2.[Evm2SS] Target Beam(( %d )) EVM2SS_max=((%d))\n",
1060 evm2ss_target_beam, target_beam_max_evm2ss);
1061 PHYDM_DBG(dm, DBG_ANT_DIV,
1062 "--->3.[Evm1SS] Target Beam(( %d )) EVM1SS_max=((%d))\n",
1063 evm1ss_target_beam, target_beam_max_evm1ss);
1064
1065 if (target_beam_max_rssi <= 10) {
1066 sat_tab->rx_idle_beam_set_idx = rssi_target_beam;
1067 decision_type = 1;
1068 } else {
1069 if (beam_path_evm_2ss_cnt_all != 0) {
1070 sat_tab->rx_idle_beam_set_idx = evm2ss_target_beam;
1071 decision_type = 2;
1072 } else if (beam_path_evm_1ss_cnt_all != 0) {
1073 sat_tab->rx_idle_beam_set_idx = evm1ss_target_beam;
1074 decision_type = 3;
1075 } else {
1076 sat_tab->rx_idle_beam_set_idx = rssi_target_beam;
1077 decision_type = 1;
1078 }
1079 }
1080
1081 PHYDM_DBG(dm, DBG_ANT_DIV,
1082 "---> Decision_type=((%d)), Final Target Beam(( %d ))\n",
1083 decision_type, sat_tab->rx_idle_beam_set_idx);
1084
1085 /*@Calculate packet counter offset*/
1086 for (j = 0; j < (sat_tab->total_beam_set_num); j++) {
1087 if (decision_type == 1) {
1088 per_beam_val_diff_tmp = target_beam_max_rssi - sat_tab->beam_set_avg_rssi_pre[j];
1089
1090 } else if (decision_type == 2) {
1091 per_beam_val_diff_tmp = ((u8)target_beam_max_evm2ss - sat_tab->beam_set_avg_evm_2ss_pre[j]) >> 1;
1092 } else if (decision_type == 3) {
1093 per_beam_val_diff_tmp = (u8)target_beam_max_evm1ss - sat_tab->beam_set_avg_evm_1ss_pre[j];
1094 }
1095 sat_tab->beam_set_train_val_diff[j] = per_beam_val_diff_tmp;
1096 PHYDM_DBG(dm, DBG_ANT_DIV,
1097 "Beam_Set[%d]: diff= ((%d))\n", j,
1098 per_beam_val_diff_tmp);
1099 }
1100
1101 /*set beam in each antenna*/
1102 phydm_update_rx_idle_beam_type2(dm);
1103 fat_tab->fat_state = FAT_PREPARE_STATE;
1104 }
1105 /* @[TRAINING STATE] */
1106 else if (fat_tab->fat_state == FAT_TRAINING_STATE) {
1107 PHYDM_DBG(dm, DBG_ANT_DIV, "[ 2. In Training state]\n");
1108
1109 PHYDM_DBG(dm, DBG_ANT_DIV,
1110 "curr_beam_idx = (( %d )), pre_beam_idx = (( %d ))\n",
1111 sat_tab->fast_training_beam_num,
1112 sat_tab->pre_fast_training_beam_num);
1113
1114 if (sat_tab->fast_training_beam_num > sat_tab->pre_fast_training_beam_num)
1115
1116 sat_tab->force_update_beam_en = 0;
1117
1118 else {
1119 sat_tab->force_update_beam_en = 1;
1120
1121 sat_tab->pkt_counter = 0;
1122 beam_tmp = sat_tab->fast_training_beam_num;
1123 if (sat_tab->fast_training_beam_num >= ((u32)sat_tab->total_beam_set_num - 1)) {
1124 PHYDM_DBG(dm, DBG_ANT_DIV,
1125 "[Timeout Update] Beam_num (( %d )) -> (( decision ))\n",
1126 sat_tab->fast_training_beam_num);
1127 fat_tab->fat_state = FAT_DECISION_STATE;
1128 phydm_fast_ant_training_hl_smart_antenna_type2(dm);
1129
1130 } else {
1131 sat_tab->fast_training_beam_num++;
1132
1133 PHYDM_DBG(dm, DBG_ANT_DIV,
1134 "[Timeout Update] Beam_num (( %d )) -> (( %d ))\n",
1135 beam_tmp,
1136 sat_tab->fast_training_beam_num);
1137 phydm_set_rfu_beam_pattern_type2(dm);
1138 fat_tab->fat_state = FAT_TRAINING_STATE;
1139 }
1140 }
1141 sat_tab->pre_fast_training_beam_num = sat_tab->fast_training_beam_num;
1142 PHYDM_DBG(dm, DBG_ANT_DIV, "Update Pre_Beam =(( %d ))\n",
1143 sat_tab->pre_fast_training_beam_num);
1144 }
1145 /* @[Prepare state] */
1146 /*@=======================================================================================*/
1147 else if (fat_tab->fat_state == FAT_PREPARE_STATE) {
1148 PHYDM_DBG(dm, DBG_ANT_DIV, "\n\n[ 1. In Prepare state]\n");
1149
1150 if (dm->pre_traffic_load == dm->traffic_load) {
1151 if (sat_tab->decision_holding_period != 0) {
1152 PHYDM_DBG(dm, DBG_ANT_DIV,
1153 "Holding_period = (( %d )), return!!!\n",
1154 sat_tab->decision_holding_period);
1155 sat_tab->decision_holding_period--;
1156 return;
1157 }
1158 }
1159
1160 /* Set training packet number*/
1161 if (sat_tab->fix_training_num_en == 0) {
1162 switch (dm->traffic_load) {
1163 case TRAFFIC_HIGH:
1164 sat_tab->per_beam_training_pkt_num = 8;
1165 sat_tab->decision_holding_period = 2;
1166 break;
1167 case TRAFFIC_MID:
1168 sat_tab->per_beam_training_pkt_num = 6;
1169 sat_tab->decision_holding_period = 3;
1170 break;
1171 case TRAFFIC_LOW:
1172 sat_tab->per_beam_training_pkt_num = 3; /*ping 60000*/
1173 sat_tab->decision_holding_period = 4;
1174 break;
1175 case TRAFFIC_ULTRA_LOW:
1176 sat_tab->per_beam_training_pkt_num = 1;
1177 sat_tab->decision_holding_period = 6;
1178 break;
1179 default:
1180 break;
1181 }
1182 }
1183
1184 PHYDM_DBG(dm, DBG_ANT_DIV,
1185 "TrafficLoad = (( %d )), Fix_beam = (( %d )), per_beam_training_pkt_num = (( %d )), decision_holding_period = ((%d))\n",
1186 dm->traffic_load, sat_tab->fix_training_num_en,
1187 sat_tab->per_beam_training_pkt_num,
1188 sat_tab->decision_holding_period);
1189
1190 /*@Beam_set number*/
1191 if (*dm->band_type == ODM_BAND_5G) {
1192 sat_tab->total_beam_set_num = sat_tab->total_beam_set_num_5g;
1193 PHYDM_DBG(dm, DBG_ANT_DIV, "5G beam_set num = ((%d))\n",
1194 sat_tab->total_beam_set_num);
1195 } else {
1196 sat_tab->total_beam_set_num = sat_tab->total_beam_set_num_2g;
1197 PHYDM_DBG(dm, DBG_ANT_DIV, "2G beam_set num = ((%d))\n",
1198 sat_tab->total_beam_set_num);
1199 }
1200
1201 for (j = 0; j < (sat_tab->total_beam_set_num); j++) {
1202 training_pkt_num_offset = sat_tab->beam_set_train_val_diff[j];
1203
1204 if (sat_tab->per_beam_training_pkt_num > training_pkt_num_offset)
1205 sat_tab->beam_set_train_cnt[j] = sat_tab->per_beam_training_pkt_num - training_pkt_num_offset;
1206 else
1207 sat_tab->beam_set_train_cnt[j] = 1;
1208
1209 PHYDM_DBG(dm, DBG_ANT_DIV,
1210 "Beam_Set[ %d ] training_pkt_offset = ((%d)), training_pkt_num = ((%d))\n",
1211 j, sat_tab->beam_set_train_val_diff[j],
1212 sat_tab->beam_set_train_cnt[j]);
1213 }
1214
1215 sat_tab->pre_beacon_counter = sat_tab->beacon_counter;
1216 sat_tab->update_beam_idx = 0;
1217 sat_tab->pkt_counter = 0;
1218
1219 sat_tab->fast_training_beam_num = 0;
1220 phydm_set_rfu_beam_pattern_type2(dm);
1221 sat_tab->pre_fast_training_beam_num = sat_tab->fast_training_beam_num;
1222 fat_tab->fat_state = FAT_TRAINING_STATE;
1223 }
1224 }
1225
1226 #if (DM_ODM_SUPPORT_TYPE == ODM_WIN)
1227
phydm_beam_switch_workitem_callback(void * context)1228 void phydm_beam_switch_workitem_callback(
1229 void *context)
1230 {
1231 void *adapter = (void *)context;
1232 HAL_DATA_TYPE *hal_data = GET_HAL_DATA(((PADAPTER)adapter));
1233 struct dm_struct *dm = &hal_data->DM_OutSrc;
1234 struct smt_ant_honbo *sat_tab = &dm->dm_sat_table;
1235
1236 #if DEV_BUS_TYPE != RT_PCI_INTERFACE
1237 sat_tab->pkt_skip_statistic_en = 1;
1238 #endif
1239 PHYDM_DBG(dm, DBG_ANT_DIV,
1240 "[ SmartAnt ] Beam Switch Workitem Callback, pkt_skip_statistic_en = (( %d ))\n",
1241 sat_tab->pkt_skip_statistic_en);
1242
1243 phydm_update_beam_pattern_type2(dm, sat_tab->update_beam_codeword, sat_tab->rfu_codeword_total_bit_num);
1244
1245 #if DEV_BUS_TYPE != RT_PCI_INTERFACE
1246 #if 0
1247 /*odm_stall_execution(sat_tab->latch_time);*/
1248 #endif
1249 sat_tab->pkt_skip_statistic_en = 0;
1250 #endif
1251 PHYDM_DBG(dm, DBG_ANT_DIV,
1252 "pkt_skip_statistic_en = (( %d )), latch_time = (( %d ))\n",
1253 sat_tab->pkt_skip_statistic_en, sat_tab->latch_time);
1254 }
1255
phydm_beam_decision_workitem_callback(void * context)1256 void phydm_beam_decision_workitem_callback(
1257 void *context)
1258 {
1259 void *adapter = (void *)context;
1260 HAL_DATA_TYPE *hal_data = GET_HAL_DATA(((PADAPTER)adapter));
1261 struct dm_struct *dm = &hal_data->DM_OutSrc;
1262
1263 PHYDM_DBG(dm, DBG_ANT_DIV,
1264 "[ SmartAnt ] Beam decision Workitem Callback\n");
1265 phydm_fast_ant_training_hl_smart_antenna_type2(dm);
1266 }
1267 #endif
1268
phydm_process_rssi_for_hb_smtant_type2(void * dm_void,void * phy_info_void,void * pkt_info_void,u8 rssi_avg)1269 void phydm_process_rssi_for_hb_smtant_type2(
1270 void *dm_void,
1271 void *phy_info_void,
1272 void *pkt_info_void,
1273 u8 rssi_avg)
1274 {
1275 struct dm_struct *dm = (struct dm_struct *)dm_void;
1276 struct phydm_phyinfo_struct *phy_info = (struct phydm_phyinfo_struct *)phy_info_void;
1277 struct phydm_perpkt_info_struct *pktinfo = (struct phydm_perpkt_info_struct *)pkt_info_void;
1278 struct phydm_fat_struct *fat_tab = &dm->dm_fat_table;
1279 struct smt_ant_honbo *sat_tab = &dm->dm_sat_table;
1280 u8 train_pkt_number;
1281 u32 beam_tmp;
1282 u8 rx_power_ant0 = phy_info->rx_mimo_signal_strength[0];
1283 u8 rx_power_ant1 = phy_info->rx_mimo_signal_strength[1];
1284 u8 rx_evm_ant0 = phy_info->rx_mimo_evm_dbm[0];
1285 u8 rx_evm_ant1 = phy_info->rx_mimo_evm_dbm[1];
1286
1287 /*@[Beacon]*/
1288 if (pktinfo->is_packet_beacon) {
1289 sat_tab->beacon_counter++;
1290 PHYDM_DBG(dm, DBG_ANT_DIV,
1291 "MatchBSSID_beacon_counter = ((%d))\n",
1292 sat_tab->beacon_counter);
1293
1294 if (sat_tab->beacon_counter >= sat_tab->pre_beacon_counter + 2) {
1295 sat_tab->update_beam_idx++;
1296 PHYDM_DBG(dm, DBG_ANT_DIV,
1297 "pre_beacon_counter = ((%d)), pkt_counter = ((%d)), update_beam_idx = ((%d))\n",
1298 sat_tab->pre_beacon_counter,
1299 sat_tab->pkt_counter,
1300 sat_tab->update_beam_idx);
1301
1302 sat_tab->pre_beacon_counter = sat_tab->beacon_counter;
1303 sat_tab->pkt_counter = 0;
1304 }
1305 }
1306 /*@[data]*/
1307 else if (pktinfo->is_packet_to_self) {
1308 if (sat_tab->pkt_skip_statistic_en == 0) {
1309 PHYDM_DBG(dm, DBG_ANT_DIV,
1310 "ID[%d] pkt_cnt=((%d)): Beam_set = ((%d)), RSSI{A,B,avg} = {%d, %d, %d}\n",
1311 pktinfo->station_id, sat_tab->pkt_counter,
1312 sat_tab->fast_training_beam_num,
1313 rx_power_ant0, rx_power_ant1, rssi_avg);
1314
1315 PHYDM_DBG(dm, DBG_ANT_DIV,
1316 "Rate_ss = ((%d)), EVM{A,B} = {%d, %d}, RX Rate =",
1317 pktinfo->rate_ss, rx_evm_ant0, rx_evm_ant1);
1318 phydm_print_rate(dm, dm->rx_rate, DBG_ANT_DIV);
1319
1320 if (sat_tab->pkt_counter >= 1) /*packet skip count*/
1321 {
1322 sat_tab->beam_set_rssi_avg_sum[sat_tab->fast_training_beam_num] += rssi_avg;
1323 sat_tab->statistic_pkt_cnt[sat_tab->fast_training_beam_num]++;
1324
1325 sat_tab->beam_path_rssi_sum[sat_tab->fast_training_beam_num][0] += rx_power_ant0;
1326 sat_tab->beam_path_rssi_sum[sat_tab->fast_training_beam_num][1] += rx_power_ant1;
1327
1328 if (pktinfo->rate_ss == 2) {
1329 sat_tab->beam_path_evm_2ss_sum[sat_tab->fast_training_beam_num][0] += rx_evm_ant0;
1330 sat_tab->beam_path_evm_2ss_sum[sat_tab->fast_training_beam_num][1] += rx_evm_ant1;
1331 sat_tab->beam_path_evm_2ss_cnt[sat_tab->fast_training_beam_num]++;
1332 } else {
1333 sat_tab->beam_path_evm_1ss_sum[sat_tab->fast_training_beam_num] += rx_evm_ant0;
1334 sat_tab->beam_path_evm_1ss_cnt[sat_tab->fast_training_beam_num]++;
1335 }
1336 }
1337
1338 sat_tab->pkt_counter++;
1339
1340 train_pkt_number = sat_tab->beam_set_train_cnt[sat_tab->fast_training_beam_num];
1341
1342 if (sat_tab->pkt_counter >= train_pkt_number) {
1343 sat_tab->update_beam_idx++;
1344 PHYDM_DBG(dm, DBG_ANT_DIV,
1345 "pre_beacon_counter = ((%d)), Update_new_beam = ((%d))\n",
1346 sat_tab->pre_beacon_counter,
1347 sat_tab->update_beam_idx);
1348
1349 sat_tab->pre_beacon_counter = sat_tab->beacon_counter;
1350 sat_tab->pkt_counter = 0;
1351 }
1352 }
1353 }
1354
1355 if (sat_tab->update_beam_idx > 0) {
1356 sat_tab->update_beam_idx = 0;
1357
1358 if (sat_tab->fast_training_beam_num >= ((u32)sat_tab->total_beam_set_num - 1)) {
1359 fat_tab->fat_state = FAT_DECISION_STATE;
1360
1361 #if DEV_BUS_TYPE == RT_PCI_INTERFACE
1362 if (dm->support_interface == ODM_ITRF_PCIE)
1363 phydm_fast_ant_training_hl_smart_antenna_type2(dm); /*@go to make decision*/
1364 #endif
1365 #if DEV_BUS_TYPE == RT_USB_INTERFACE || DEV_BUS_TYPE == RT_SDIO_INTERFACE
1366 if (dm->support_interface == ODM_ITRF_USB || dm->support_interface == ODM_ITRF_SDIO)
1367 odm_schedule_work_item(&sat_tab->hl_smart_antenna_decision_workitem);
1368 #endif
1369
1370 } else {
1371 beam_tmp = sat_tab->fast_training_beam_num;
1372 sat_tab->fast_training_beam_num++;
1373 PHYDM_DBG(dm, DBG_ANT_DIV,
1374 "Update Beam_num (( %d )) -> (( %d ))\n",
1375 beam_tmp, sat_tab->fast_training_beam_num);
1376 phydm_set_rfu_beam_pattern_type2(dm);
1377 sat_tab->pre_fast_training_beam_num = sat_tab->fast_training_beam_num;
1378
1379 fat_tab->fat_state = FAT_TRAINING_STATE;
1380 }
1381 }
1382 }
1383 #endif
1384
1385 #if (defined(CONFIG_HL_SMART_ANTENNA_TYPE1))
1386
phydm_hl_smart_ant_type1_init_8821a(void * dm_void)1387 void phydm_hl_smart_ant_type1_init_8821a(
1388 void *dm_void)
1389 {
1390 struct dm_struct *dm = (struct dm_struct *)dm_void;
1391 struct smt_ant_honbo *sat_tab = &dm->dm_sat_table;
1392 struct phydm_fat_struct *fat_tab = &dm->dm_fat_table;
1393 u32 value32;
1394
1395 PHYDM_DBG(dm, DBG_ANT_DIV,
1396 "***8821A SmartAnt_Init => ant_div_type=[Hong-Lin Smart ant Type1]\n");
1397
1398 #if 0
1399 /* @---------------------------------------- */
1400 /* @GPIO 2-3 for Beam control */
1401 /* reg0x66[2]=0 */
1402 /* reg0x44[27:26] = 0 */
1403 /* reg0x44[23:16] enable_output for P_GPIO[7:0] */
1404 /* reg0x44[15:8] output_value for P_GPIO[7:0] */
1405 /* reg0x40[1:0] = 0 GPIO function */
1406 /* @------------------------------------------ */
1407 #endif
1408
1409 /*@GPIO setting*/
1410 odm_set_mac_reg(dm, R_0x64, BIT(18), 0);
1411 odm_set_mac_reg(dm, R_0x44, BIT(27) | BIT(26), 0);
1412 odm_set_mac_reg(dm, R_0x44, BIT(19) | BIT(18), 0x3); /*@enable_output for P_GPIO[3:2]*/
1413 #if 0
1414 /*odm_set_mac_reg(dm, R_0x44, BIT(11)|BIT(10), 0);*/ /*output value*/
1415 #endif
1416 odm_set_mac_reg(dm, R_0x40, BIT(1) | BIT(0), 0); /*@GPIO function*/
1417
1418 /*@Hong_lin smart antenna HW setting*/
1419 sat_tab->rfu_codeword_total_bit_num = 24; /*@max=32*/
1420 sat_tab->rfu_each_ant_bit_num = 4;
1421 sat_tab->beam_patten_num_each_ant = 4;
1422
1423 #if DEV_BUS_TYPE == RT_SDIO_INTERFACE
1424 sat_tab->latch_time = 100; /*@mu sec*/
1425 #elif DEV_BUS_TYPE == RT_USB_INTERFACE
1426 sat_tab->latch_time = 100; /*@mu sec*/
1427 #endif
1428 sat_tab->pkt_skip_statistic_en = 0;
1429
1430 sat_tab->ant_num = 1; /*@max=8*/
1431 sat_tab->ant_num_total = NUM_ANTENNA_8821A;
1432 sat_tab->first_train_ant = MAIN_ANT;
1433
1434 sat_tab->rfu_codeword_table[0] = 0x0;
1435 sat_tab->rfu_codeword_table[1] = 0x4;
1436 sat_tab->rfu_codeword_table[2] = 0x8;
1437 sat_tab->rfu_codeword_table[3] = 0xc;
1438
1439 sat_tab->rfu_codeword_table_5g[0] = 0x1;
1440 sat_tab->rfu_codeword_table_5g[1] = 0x2;
1441 sat_tab->rfu_codeword_table_5g[2] = 0x4;
1442 sat_tab->rfu_codeword_table_5g[3] = 0x8;
1443
1444 sat_tab->fix_beam_pattern_en = 0;
1445 sat_tab->decision_holding_period = 0;
1446
1447 /*@beam training setting*/
1448 sat_tab->pkt_counter = 0;
1449 sat_tab->per_beam_training_pkt_num = 10;
1450
1451 /*set default beam*/
1452 sat_tab->fast_training_beam_num = 0;
1453 sat_tab->pre_fast_training_beam_num = sat_tab->fast_training_beam_num;
1454 phydm_set_all_ant_same_beam_num(dm);
1455
1456 fat_tab->fat_state = FAT_BEFORE_LINK_STATE;
1457
1458 odm_set_bb_reg(dm, R_0xca4, MASKDWORD, 0x01000100);
1459 odm_set_bb_reg(dm, R_0xca8, MASKDWORD, 0x01000100);
1460
1461 /*@[BB] FAT setting*/
1462 odm_set_bb_reg(dm, R_0xc08, BIT(18) | BIT(17) | BIT(16), sat_tab->ant_num);
1463 odm_set_bb_reg(dm, R_0xc08, BIT(31), 0); /*@increase ant num every FAT period 0:+1, 1+2*/
1464 odm_set_bb_reg(dm, R_0x8c4, BIT(2) | BIT(1), 1); /*@change cca antenna timming threshold if no CCA occurred: 0:200ms / 1:100ms / 2:no use / 3: 300*/
1465 odm_set_bb_reg(dm, R_0x8c4, BIT(0), 1); /*@FAT_watchdog_en*/
1466
1467 value32 = odm_get_mac_reg(dm, R_0x7b4, MASKDWORD);
1468 odm_set_mac_reg(dm, R_0x7b4, MASKDWORD, value32 | (BIT(16) | BIT(17))); /*Reg7B4[16]=1 enable antenna training */
1469 /*Reg7B4[17]=1 enable match MAC addr*/
1470 odm_set_mac_reg(dm, R_0x7b4, 0xFFFF, 0); /*@Match MAC ADDR*/
1471 odm_set_mac_reg(dm, R_0x7b0, MASKDWORD, 0);
1472 }
1473
phydm_construct_hl_beam_codeword(void * dm_void,u32 * beam_pattern_idx,u32 ant_num)1474 u32 phydm_construct_hl_beam_codeword(
1475 void *dm_void,
1476 u32 *beam_pattern_idx,
1477 u32 ant_num)
1478 {
1479 struct dm_struct *dm = (struct dm_struct *)dm_void;
1480 struct smt_ant_honbo *sat_tab = &dm->dm_sat_table;
1481 u32 codeword = 0;
1482 u32 data_tmp;
1483 u32 i;
1484 u32 break_counter = 0;
1485
1486 if (ant_num < 8) {
1487 for (i = 0; i < (sat_tab->ant_num_total); i++) {
1488 #if 0
1489 /*PHYDM_DBG(dm,DBG_ANT_DIV, "beam_pattern_num[%x] = %x\n",i,beam_pattern_num[i] );*/
1490 #endif
1491 if ((i < (sat_tab->first_train_ant - 1)) || break_counter >= sat_tab->ant_num) {
1492 data_tmp = 0;
1493 } else {
1494 break_counter++;
1495
1496 if (beam_pattern_idx[i] == 0) {
1497 if (*dm->band_type == ODM_BAND_5G)
1498 data_tmp = sat_tab->rfu_codeword_table_5g[0];
1499 else
1500 data_tmp = sat_tab->rfu_codeword_table[0];
1501
1502 } else if (beam_pattern_idx[i] == 1) {
1503 if (*dm->band_type == ODM_BAND_5G)
1504 data_tmp = sat_tab->rfu_codeword_table_5g[1];
1505 else
1506 data_tmp = sat_tab->rfu_codeword_table[1];
1507
1508 } else if (beam_pattern_idx[i] == 2) {
1509 if (*dm->band_type == ODM_BAND_5G)
1510 data_tmp = sat_tab->rfu_codeword_table_5g[2];
1511 else
1512 data_tmp = sat_tab->rfu_codeword_table[2];
1513
1514 } else if (beam_pattern_idx[i] == 3) {
1515 if (*dm->band_type == ODM_BAND_5G)
1516 data_tmp = sat_tab->rfu_codeword_table_5g[3];
1517 else
1518 data_tmp = sat_tab->rfu_codeword_table[3];
1519 }
1520 }
1521
1522 codeword |= (data_tmp << (i * 4));
1523 }
1524 }
1525
1526 return codeword;
1527 }
1528
phydm_update_beam_pattern(void * dm_void,u32 codeword,u32 codeword_length)1529 void phydm_update_beam_pattern(
1530 void *dm_void,
1531 u32 codeword,
1532 u32 codeword_length)
1533 {
1534 struct dm_struct *dm = (struct dm_struct *)dm_void;
1535 struct smt_ant_honbo *sat_tab = &dm->dm_sat_table;
1536 u8 i;
1537 boolean beam_ctrl_signal;
1538 u32 one = 0x1;
1539 u32 reg44_tmp_p, reg44_tmp_n, reg44_ori;
1540 u8 devide_num = 4;
1541
1542 PHYDM_DBG(dm, DBG_ANT_DIV, "[ SmartAnt ] Set Beam Pattern =0x%x\n",
1543 codeword);
1544
1545 reg44_ori = odm_get_mac_reg(dm, R_0x44, MASKDWORD);
1546 reg44_tmp_p = reg44_ori;
1547 #if 0
1548 /*PHYDM_DBG(dm, DBG_ANT_DIV, "reg44_ori =0x%x\n", reg44_ori);*/
1549 #endif
1550
1551 devide_num = (sat_tab->rfu_protocol_type == 2) ? 6 : 4;
1552
1553 for (i = 0; i <= (codeword_length - 1); i++) {
1554 beam_ctrl_signal = (boolean)((codeword & BIT(i)) >> i);
1555
1556 if (dm->debug_components & DBG_ANT_DIV) {
1557 if (i == (codeword_length - 1))
1558 pr_debug("%d ]\n", beam_ctrl_signal);
1559 else if (i == 0)
1560 pr_debug("Send codeword[1:%d] ---> [ %d ", codeword_length, beam_ctrl_signal);
1561 else if ((i % devide_num) == (devide_num - 1))
1562 pr_debug("%d | ", beam_ctrl_signal);
1563 else
1564 pr_debug("%d ", beam_ctrl_signal);
1565 }
1566
1567 if (dm->support_ic_type == ODM_RTL8821) {
1568 #if (RTL8821A_SUPPORT == 1)
1569 reg44_tmp_p = reg44_ori & (~(BIT(11) | BIT(10))); /*@clean bit 10 & 11*/
1570 reg44_tmp_p |= ((1 << 11) | (beam_ctrl_signal << 10));
1571 reg44_tmp_n = reg44_ori & (~(BIT(11) | BIT(10)));
1572
1573 #if 0
1574 /*PHYDM_DBG(dm, DBG_ANT_DIV, "reg44_tmp_p =(( 0x%x )), reg44_tmp_n = (( 0x%x ))\n", reg44_tmp_p, reg44_tmp_n);*/
1575 #endif
1576 odm_set_mac_reg(dm, R_0x44, MASKDWORD, reg44_tmp_p);
1577 odm_set_mac_reg(dm, R_0x44, MASKDWORD, reg44_tmp_n);
1578 #endif
1579 }
1580 #if (RTL8822B_SUPPORT == 1)
1581 else if (dm->support_ic_type == ODM_RTL8822B) {
1582 if (sat_tab->rfu_protocol_type == 2) {
1583 reg44_tmp_p = reg44_tmp_p & ~(BIT(8)); /*@clean bit 8*/
1584 reg44_tmp_p = reg44_tmp_p ^ BIT(9); /*@get new clk high/low, exclusive-or*/
1585
1586 reg44_tmp_p |= (beam_ctrl_signal << 8);
1587
1588 odm_set_mac_reg(dm, R_0x44, MASKDWORD, reg44_tmp_p);
1589 ODM_delay_us(10);
1590 #if 0
1591 /*PHYDM_DBG(dm, DBG_ANT_DIV, "reg44 =(( 0x%x )), reg44[9:8] = ((%x)), beam_ctrl_signal =((%x))\n", reg44_tmp_p, ((reg44_tmp_p & 0x300)>>8), beam_ctrl_signal);*/
1592 #endif
1593
1594 } else {
1595 reg44_tmp_p = reg44_ori & (~(BIT(9) | BIT(8))); /*@clean bit 9 & 8*/
1596 reg44_tmp_p |= ((1 << 9) | (beam_ctrl_signal << 8));
1597 reg44_tmp_n = reg44_ori & (~(BIT(9) | BIT(8)));
1598
1599 #if 0
1600 /*PHYDM_DBG(dm, DBG_ANT_DIV, "reg44_tmp_p =(( 0x%x )), reg44_tmp_n = (( 0x%x ))\n", reg44_tmp_p, reg44_tmp_n); */
1601 #endif
1602 odm_set_mac_reg(dm, R_0x44, MASKDWORD, reg44_tmp_p);
1603 ODM_delay_us(10);
1604 odm_set_mac_reg(dm, R_0x44, MASKDWORD, reg44_tmp_n);
1605 ODM_delay_us(10);
1606 }
1607 }
1608 #endif
1609 }
1610 }
1611
phydm_update_rx_idle_beam(void * dm_void)1612 void phydm_update_rx_idle_beam(
1613 void *dm_void)
1614 {
1615 struct dm_struct *dm = (struct dm_struct *)dm_void;
1616 struct phydm_fat_struct *fat_tab = &dm->dm_fat_table;
1617 struct smt_ant_honbo *sat_tab = &dm->dm_sat_table;
1618 u32 i;
1619
1620 sat_tab->update_beam_codeword = phydm_construct_hl_beam_codeword(dm,
1621 &sat_tab->rx_idle_beam[0],
1622 sat_tab->ant_num);
1623 PHYDM_DBG(dm, DBG_ANT_DIV,
1624 "Set target beam_pattern codeword = (( 0x%x ))\n",
1625 sat_tab->update_beam_codeword);
1626
1627 for (i = 0; i < (sat_tab->ant_num); i++)
1628 PHYDM_DBG(dm, DBG_ANT_DIV,
1629 "[ Update Rx-Idle-Beam ] RxIdleBeam[%d] =%d\n", i,
1630 sat_tab->rx_idle_beam[i]);
1631
1632 #if DEV_BUS_TYPE == RT_PCI_INTERFACE
1633 if (dm->support_interface == ODM_ITRF_PCIE)
1634 phydm_update_beam_pattern(dm, sat_tab->update_beam_codeword, sat_tab->rfu_codeword_total_bit_num);
1635 #endif
1636 #if DEV_BUS_TYPE == RT_USB_INTERFACE || DEV_BUS_TYPE == RT_SDIO_INTERFACE
1637 if (dm->support_interface == ODM_ITRF_USB || dm->support_interface == ODM_ITRF_SDIO)
1638 odm_schedule_work_item(&sat_tab->hl_smart_antenna_workitem);
1639 #if 0
1640 /*odm_stall_execution(1);*/
1641 #endif
1642 #endif
1643
1644 sat_tab->pre_codeword = sat_tab->update_beam_codeword;
1645 }
1646
phydm_hl_smart_ant_debug(void * dm_void,char input[][16],u32 * _used,char * output,u32 * _out_len)1647 void phydm_hl_smart_ant_debug(
1648 void *dm_void,
1649 char input[][16],
1650 u32 *_used,
1651 char *output,
1652 u32 *_out_len)
1653 {
1654 struct dm_struct *dm = (struct dm_struct *)dm_void;
1655 struct smt_ant_honbo *sat_tab = &dm->dm_sat_table;
1656 u32 used = *_used;
1657 u32 out_len = *_out_len;
1658 u32 one = 0x1;
1659 u32 codeword_length = sat_tab->rfu_codeword_total_bit_num;
1660 u32 beam_ctrl_signal, i;
1661 u8 devide_num = 4;
1662
1663 if (dm_value[0] == 1) { /*@fix beam pattern*/
1664
1665 sat_tab->fix_beam_pattern_en = dm_value[1];
1666
1667 if (sat_tab->fix_beam_pattern_en == 1) {
1668 sat_tab->fix_beam_pattern_codeword = dm_value[2];
1669
1670 if (sat_tab->fix_beam_pattern_codeword > (one << codeword_length)) {
1671 PHYDM_DBG(dm, DBG_ANT_DIV,
1672 "[ SmartAnt ] Codeword overflow, Current codeword is ((0x%x)), and should be less than ((%d))bit\n",
1673 sat_tab->fix_beam_pattern_codeword,
1674 codeword_length);
1675
1676 (sat_tab->fix_beam_pattern_codeword) &= 0xffffff;
1677
1678 PHYDM_DBG(dm, DBG_ANT_DIV,
1679 "[ SmartAnt ] Auto modify to (0x%x)\n",
1680 sat_tab->fix_beam_pattern_codeword);
1681 }
1682
1683 sat_tab->update_beam_codeword = sat_tab->fix_beam_pattern_codeword;
1684
1685 /*@---------------------------------------------------------*/
1686 PDM_SNPF(out_len, used, output + used, out_len - used,
1687 "Fix Beam Pattern\n");
1688
1689 devide_num = (sat_tab->rfu_protocol_type == 2) ? 6 : 4;
1690
1691 for (i = 0; i <= (codeword_length - 1); i++) {
1692 beam_ctrl_signal = (boolean)((sat_tab->update_beam_codeword & BIT(i)) >> i);
1693
1694 if (i == (codeword_length - 1))
1695 PDM_SNPF(out_len, used,
1696 output + used,
1697 out_len - used,
1698 "%d]\n",
1699 beam_ctrl_signal);
1700 else if (i == 0)
1701 PDM_SNPF(out_len, used,
1702 output + used,
1703 out_len - used,
1704 "Send Codeword[1:24] to RFU -> [%d",
1705 beam_ctrl_signal);
1706 else if ((i % devide_num) == (devide_num - 1))
1707 PDM_SNPF(out_len, used,
1708 output + used,
1709 out_len - used, "%d|",
1710 beam_ctrl_signal);
1711 else
1712 PDM_SNPF(out_len, used,
1713 output + used,
1714 out_len - used, "%d",
1715 beam_ctrl_signal);
1716 }
1717 /*@---------------------------------------------------------*/
1718
1719 #if DEV_BUS_TYPE == RT_PCI_INTERFACE
1720 if (dm->support_interface == ODM_ITRF_PCIE)
1721 phydm_update_beam_pattern(dm, sat_tab->update_beam_codeword, sat_tab->rfu_codeword_total_bit_num);
1722 #endif
1723 #if DEV_BUS_TYPE == RT_USB_INTERFACE || DEV_BUS_TYPE == RT_SDIO_INTERFACE
1724 if (dm->support_interface == ODM_ITRF_USB || dm->support_interface == ODM_ITRF_SDIO)
1725 odm_schedule_work_item(&sat_tab->hl_smart_antenna_workitem);
1726 #if 0
1727 /*odm_stall_execution(1);*/
1728 #endif
1729 #endif
1730 } else if (sat_tab->fix_beam_pattern_en == 0)
1731 PDM_SNPF(out_len, used, output + used, out_len - used,
1732 "[ SmartAnt ] Smart Antenna: Enable\n");
1733
1734 } else if (dm_value[0] == 2) { /*set latch time*/
1735
1736 sat_tab->latch_time = dm_value[1];
1737 PHYDM_DBG(dm, DBG_ANT_DIV, "[ SmartAnt ] latch_time =0x%x\n",
1738 sat_tab->latch_time);
1739 } else if (dm_value[0] == 3) {
1740 sat_tab->fix_training_num_en = dm_value[1];
1741
1742 if (sat_tab->fix_training_num_en == 1) {
1743 sat_tab->per_beam_training_pkt_num = (u8)dm_value[2];
1744 sat_tab->decision_holding_period = (u8)dm_value[3];
1745
1746 PDM_SNPF(out_len, used, output + used, out_len - used,
1747 "[SmartAnt][Dbg] Fix_train_en = (( %d )), train_pkt_num = (( %d )), holding_period = (( %d )),\n",
1748 sat_tab->fix_training_num_en,
1749 sat_tab->per_beam_training_pkt_num,
1750 sat_tab->decision_holding_period);
1751
1752 } else if (sat_tab->fix_training_num_en == 0) {
1753 PDM_SNPF(out_len, used, output + used, out_len - used,
1754 "[ SmartAnt ] AUTO per_beam_training_pkt_num\n");
1755 }
1756 } else if (dm_value[0] == 4) {
1757 if (dm_value[1] == 1) {
1758 sat_tab->ant_num = 1;
1759 sat_tab->first_train_ant = MAIN_ANT;
1760
1761 } else if (dm_value[1] == 2) {
1762 sat_tab->ant_num = 1;
1763 sat_tab->first_train_ant = AUX_ANT;
1764
1765 } else if (dm_value[1] == 3) {
1766 sat_tab->ant_num = 2;
1767 sat_tab->first_train_ant = MAIN_ANT;
1768 }
1769
1770 PDM_SNPF(out_len, used, output + used, out_len - used,
1771 "[ SmartAnt ] Set ant Num = (( %d )), first_train_ant = (( %d ))\n",
1772 sat_tab->ant_num, (sat_tab->first_train_ant - 1));
1773 } else if (dm_value[0] == 5) {
1774 if (dm_value[1] <= 3) {
1775 sat_tab->rfu_codeword_table[dm_value[1]] = dm_value[2];
1776 PDM_SNPF(out_len, used, output + used, out_len - used,
1777 "[ SmartAnt ] Set Beam_2G: (( %d )), RFU codeword table = (( 0x%x ))\n",
1778 dm_value[1], dm_value[2]);
1779 } else {
1780 for (i = 0; i < 4; i++) {
1781 PDM_SNPF(out_len, used, output + used,
1782 out_len - used,
1783 "[ SmartAnt ] Show Beam_2G: (( %d )), RFU codeword table = (( 0x%x ))\n",
1784 i, sat_tab->rfu_codeword_table[i]);
1785 }
1786 }
1787 } else if (dm_value[0] == 6) {
1788 if (dm_value[1] <= 3) {
1789 sat_tab->rfu_codeword_table_5g[dm_value[1]] = dm_value[2];
1790 PDM_SNPF(out_len, used, output + used, out_len - used,
1791 "[ SmartAnt ] Set Beam_5G: (( %d )), RFU codeword table = (( 0x%x ))\n",
1792 dm_value[1], dm_value[2]);
1793 } else {
1794 for (i = 0; i < 4; i++) {
1795 PDM_SNPF(out_len, used, output + used,
1796 out_len - used,
1797 "[ SmartAnt ] Show Beam_5G: (( %d )), RFU codeword table = (( 0x%x ))\n",
1798 i, sat_tab->rfu_codeword_table_5g[i]);
1799 }
1800 }
1801 } else if (dm_value[0] == 7) {
1802 if (dm_value[1] <= 4) {
1803 sat_tab->beam_patten_num_each_ant = dm_value[1];
1804 PDM_SNPF(out_len, used, output + used, out_len - used,
1805 "[ SmartAnt ] Set Beam number = (( %d ))\n",
1806 sat_tab->beam_patten_num_each_ant);
1807 } else {
1808 PDM_SNPF(out_len, used, output + used, out_len - used,
1809 "[ SmartAnt ] Show Beam number = (( %d ))\n",
1810 sat_tab->beam_patten_num_each_ant);
1811 }
1812 }
1813 *_used = used;
1814 *_out_len = out_len;
1815 }
1816
phydm_set_all_ant_same_beam_num(void * dm_void)1817 void phydm_set_all_ant_same_beam_num(
1818 void *dm_void)
1819 {
1820 struct dm_struct *dm = (struct dm_struct *)dm_void;
1821 struct smt_ant_honbo *sat_tab = &dm->dm_sat_table;
1822
1823 if (dm->ant_div_type == HL_SW_SMART_ANT_TYPE1) { /*@2ant for 8821A*/
1824
1825 sat_tab->rx_idle_beam[0] = sat_tab->fast_training_beam_num;
1826 sat_tab->rx_idle_beam[1] = sat_tab->fast_training_beam_num;
1827 }
1828
1829 sat_tab->update_beam_codeword = phydm_construct_hl_beam_codeword(dm,
1830 &sat_tab->rx_idle_beam[0],
1831 sat_tab->ant_num);
1832
1833 PHYDM_DBG(dm, DBG_ANT_DIV,
1834 "[ SmartAnt ] Set all ant beam_pattern: codeword = (( 0x%x ))\n",
1835 sat_tab->update_beam_codeword);
1836
1837 #if DEV_BUS_TYPE == RT_PCI_INTERFACE
1838 if (dm->support_interface == ODM_ITRF_PCIE)
1839 phydm_update_beam_pattern(dm, sat_tab->update_beam_codeword, sat_tab->rfu_codeword_total_bit_num);
1840 #endif
1841 #if DEV_BUS_TYPE == RT_USB_INTERFACE || DEV_BUS_TYPE == RT_SDIO_INTERFACE
1842 if (dm->support_interface == ODM_ITRF_USB || dm->support_interface == ODM_ITRF_SDIO)
1843 odm_schedule_work_item(&sat_tab->hl_smart_antenna_workitem);
1844 /*odm_stall_execution(1);*/
1845 #endif
1846 }
1847
odm_fast_ant_training_hl_smart_antenna_type1(void * dm_void)1848 void odm_fast_ant_training_hl_smart_antenna_type1(
1849 void *dm_void)
1850 {
1851 struct dm_struct *dm = (struct dm_struct *)dm_void;
1852 struct smt_ant_honbo *sat_tab = &dm->dm_sat_table;
1853 struct phydm_fat_struct *fat_tab = &dm->dm_fat_table;
1854 struct sw_antenna_switch *dm_swat_table = &dm->dm_swat_table;
1855 u32 codeword = 0, i, j;
1856 u32 target_ant;
1857 u32 avg_rssi_tmp, avg_rssi_tmp_ma;
1858 u32 target_ant_beam_max_rssi[SUPPORT_RF_PATH_NUM] = {0};
1859 u32 max_beam_ant_rssi = 0;
1860 u32 target_ant_beam[SUPPORT_RF_PATH_NUM] = {0};
1861 u32 beam_tmp;
1862 u8 next_ant;
1863 u32 rssi_sorting_seq[SUPPORT_BEAM_PATTERN_NUM] = {0};
1864 u32 rank_idx_seq[SUPPORT_BEAM_PATTERN_NUM] = {0};
1865 u32 rank_idx_out[SUPPORT_BEAM_PATTERN_NUM] = {0};
1866 u8 per_beam_rssi_diff_tmp = 0, training_pkt_num_offset;
1867 u32 break_counter = 0;
1868 u32 used_ant;
1869
1870 if (!dm->is_linked) {
1871 PHYDM_DBG(dm, DBG_ANT_DIV, "[No Link!!!]\n");
1872
1873 if (fat_tab->is_become_linked == true) {
1874 PHYDM_DBG(dm, DBG_ANT_DIV, "Link->no Link\n");
1875 fat_tab->fat_state = FAT_BEFORE_LINK_STATE;
1876 odm_ant_div_on_off(dm, ANTDIV_OFF, ANT_PATH_A);
1877 odm_tx_by_tx_desc_or_reg(dm, TX_BY_REG);
1878 PHYDM_DBG(dm, DBG_ANT_DIV,
1879 "change to (( %d )) FAT_state\n",
1880 fat_tab->fat_state);
1881
1882 fat_tab->is_become_linked = dm->is_linked;
1883 }
1884 return;
1885
1886 } else {
1887 if (fat_tab->is_become_linked == false) {
1888 PHYDM_DBG(dm, DBG_ANT_DIV, "[Linked !!!]\n");
1889
1890 fat_tab->fat_state = FAT_PREPARE_STATE;
1891 PHYDM_DBG(dm, DBG_ANT_DIV,
1892 "change to (( %d )) FAT_state\n",
1893 fat_tab->fat_state);
1894
1895 #if 0
1896 /*sat_tab->fast_training_beam_num = 0;*/
1897 /*phydm_set_all_ant_same_beam_num(dm);*/
1898 #endif
1899
1900 fat_tab->is_become_linked = dm->is_linked;
1901 }
1902 }
1903
1904 if (!(*fat_tab->p_force_tx_by_desc)) {
1905 if (dm->is_one_entry_only == true)
1906 odm_tx_by_tx_desc_or_reg(dm, TX_BY_REG);
1907 else
1908 odm_tx_by_tx_desc_or_reg(dm, TX_BY_DESC);
1909 }
1910
1911 #if 0
1912 /*PHYDM_DBG(dm, DBG_ANT_DIV, "HL Smart ant Training: state (( %d ))\n", fat_tab->fat_state);*/
1913 #endif
1914
1915 /* @[DECISION STATE] */
1916 /*@=======================================================================================*/
1917 if (fat_tab->fat_state == FAT_DECISION_STATE) {
1918 PHYDM_DBG(dm, DBG_ANT_DIV, "[ 3. In Decision state]\n");
1919 phydm_fast_training_enable(dm, FAT_OFF);
1920
1921 break_counter = 0;
1922 /*@compute target beam in each antenna*/
1923 for (i = (sat_tab->first_train_ant - 1); i < sat_tab->ant_num_total; i++) {
1924 for (j = 0; j < (sat_tab->beam_patten_num_each_ant); j++) {
1925 if (sat_tab->pkt_rssi_cnt[i][j] == 0) {
1926 avg_rssi_tmp = sat_tab->pkt_rssi_pre[i][j];
1927 avg_rssi_tmp = (avg_rssi_tmp >= 2) ? (avg_rssi_tmp - 2) : avg_rssi_tmp;
1928 avg_rssi_tmp_ma = avg_rssi_tmp;
1929 } else {
1930 avg_rssi_tmp = (sat_tab->pkt_rssi_sum[i][j]) / (sat_tab->pkt_rssi_cnt[i][j]);
1931 avg_rssi_tmp_ma = (avg_rssi_tmp + sat_tab->pkt_rssi_pre[i][j]) >> 1;
1932 }
1933
1934 rssi_sorting_seq[j] = avg_rssi_tmp;
1935 sat_tab->pkt_rssi_pre[i][j] = avg_rssi_tmp;
1936
1937 PHYDM_DBG(dm, DBG_ANT_DIV,
1938 "ant[%d], Beam[%d]: pkt_cnt=(( %d )), avg_rssi_MA=(( %d )), avg_rssi=(( %d ))\n",
1939 i, j, sat_tab->pkt_rssi_cnt[i][j],
1940 avg_rssi_tmp_ma, avg_rssi_tmp);
1941
1942 if (avg_rssi_tmp > target_ant_beam_max_rssi[i]) {
1943 target_ant_beam[i] = j;
1944 target_ant_beam_max_rssi[i] = avg_rssi_tmp;
1945 }
1946
1947 /*reset counter value*/
1948 sat_tab->pkt_rssi_sum[i][j] = 0;
1949 sat_tab->pkt_rssi_cnt[i][j] = 0;
1950 }
1951 sat_tab->rx_idle_beam[i] = target_ant_beam[i];
1952 PHYDM_DBG(dm, DBG_ANT_DIV,
1953 "---------> Target of ant[%d]: Beam_num-(( %d )) RSSI= ((%d))\n",
1954 i, target_ant_beam[i],
1955 target_ant_beam_max_rssi[i]);
1956
1957 #if 0
1958 /*sorting*/
1959 /*@
1960 PHYDM_DBG(dm, DBG_ANT_DIV, "[Pre]rssi_sorting_seq = [%d, %d, %d, %d]\n", rssi_sorting_seq[0], rssi_sorting_seq[1], rssi_sorting_seq[2], rssi_sorting_seq[3]);
1961 */
1962
1963 /*phydm_seq_sorting(dm, &rssi_sorting_seq[0], &rank_idx_seq[0], &rank_idx_out[0], SUPPORT_BEAM_PATTERN_NUM);*/
1964
1965 /*@
1966 PHYDM_DBG(dm, DBG_ANT_DIV, "[Post]rssi_sorting_seq = [%d, %d, %d, %d]\n", rssi_sorting_seq[0], rssi_sorting_seq[1], rssi_sorting_seq[2], rssi_sorting_seq[3]);
1967 PHYDM_DBG(dm, DBG_ANT_DIV, "[Post]rank_idx_seq = [%d, %d, %d, %d]\n", rank_idx_seq[0], rank_idx_seq[1], rank_idx_seq[2], rank_idx_seq[3]);
1968 PHYDM_DBG(dm, DBG_ANT_DIV, "[Post]rank_idx_out = [%d, %d, %d, %d]\n", rank_idx_out[0], rank_idx_out[1], rank_idx_out[2], rank_idx_out[3]);
1969 */
1970 #endif
1971
1972 if (target_ant_beam_max_rssi[i] > max_beam_ant_rssi) {
1973 target_ant = i;
1974 max_beam_ant_rssi = target_ant_beam_max_rssi[i];
1975 #if
1976 /*PHYDM_DBG(dm, DBG_ANT_DIV, "Target of ant = (( %d )) max_beam_ant_rssi = (( %d ))\n",
1977 target_ant, max_beam_ant_rssi);*/
1978 #endif
1979 }
1980 break_counter++;
1981 if (break_counter >= sat_tab->ant_num)
1982 break;
1983 }
1984
1985 #ifdef CONFIG_FAT_PATCH
1986 break_counter = 0;
1987 for (i = (sat_tab->first_train_ant - 1); i < sat_tab->ant_num_total; i++) {
1988 for (j = 0; j < (sat_tab->beam_patten_num_each_ant); j++) {
1989 per_beam_rssi_diff_tmp = (u8)(max_beam_ant_rssi - sat_tab->pkt_rssi_pre[i][j]);
1990 sat_tab->beam_train_rssi_diff[i][j] = per_beam_rssi_diff_tmp;
1991
1992 PHYDM_DBG(dm, DBG_ANT_DIV,
1993 "ant[%d], Beam[%d]: RSSI_diff= ((%d))\n",
1994 i, j, per_beam_rssi_diff_tmp);
1995 }
1996 break_counter++;
1997 if (break_counter >= sat_tab->ant_num)
1998 break;
1999 }
2000 #endif
2001
2002 if (target_ant == 0)
2003 target_ant = MAIN_ANT;
2004 else if (target_ant == 1)
2005 target_ant = AUX_ANT;
2006
2007 if (sat_tab->ant_num > 1) {
2008 /* @[ update RX ant ]*/
2009 odm_update_rx_idle_ant(dm, (u8)target_ant);
2010
2011 /* @[ update TX ant ]*/
2012 odm_update_tx_ant(dm, (u8)target_ant, (fat_tab->train_idx));
2013 }
2014
2015 /*set beam in each antenna*/
2016 phydm_update_rx_idle_beam(dm);
2017
2018 odm_ant_div_on_off(dm, ANTDIV_ON, ANT_PATH_A);
2019 fat_tab->fat_state = FAT_PREPARE_STATE;
2020 return;
2021 }
2022 /* @[TRAINING STATE] */
2023 else if (fat_tab->fat_state == FAT_TRAINING_STATE) {
2024 PHYDM_DBG(dm, DBG_ANT_DIV, "[ 2. In Training state]\n");
2025
2026 PHYDM_DBG(dm, DBG_ANT_DIV,
2027 "fat_beam_n = (( %d )), pre_fat_beam_n = (( %d ))\n",
2028 sat_tab->fast_training_beam_num,
2029 sat_tab->pre_fast_training_beam_num);
2030
2031 if (sat_tab->fast_training_beam_num > sat_tab->pre_fast_training_beam_num)
2032
2033 sat_tab->force_update_beam_en = 0;
2034
2035 else {
2036 sat_tab->force_update_beam_en = 1;
2037
2038 sat_tab->pkt_counter = 0;
2039 beam_tmp = sat_tab->fast_training_beam_num;
2040 if (sat_tab->fast_training_beam_num >= (sat_tab->beam_patten_num_each_ant - 1)) {
2041 PHYDM_DBG(dm, DBG_ANT_DIV,
2042 "[Timeout Update] Beam_num (( %d )) -> (( decision ))\n",
2043 sat_tab->fast_training_beam_num);
2044 fat_tab->fat_state = FAT_DECISION_STATE;
2045 odm_fast_ant_training_hl_smart_antenna_type1(dm);
2046
2047 } else {
2048 sat_tab->fast_training_beam_num++;
2049
2050 PHYDM_DBG(dm, DBG_ANT_DIV,
2051 "[Timeout Update] Beam_num (( %d )) -> (( %d ))\n",
2052 beam_tmp,
2053 sat_tab->fast_training_beam_num);
2054 phydm_set_all_ant_same_beam_num(dm);
2055 fat_tab->fat_state = FAT_TRAINING_STATE;
2056 }
2057 }
2058 sat_tab->pre_fast_training_beam_num = sat_tab->fast_training_beam_num;
2059 PHYDM_DBG(dm, DBG_ANT_DIV,
2060 "[prepare state] Update Pre_Beam =(( %d ))\n",
2061 sat_tab->pre_fast_training_beam_num);
2062 }
2063 /* @[Prepare state] */
2064 /*@=======================================================================================*/
2065 else if (fat_tab->fat_state == FAT_PREPARE_STATE) {
2066 PHYDM_DBG(dm, DBG_ANT_DIV, "\n\n[ 1. In Prepare state]\n");
2067
2068 if (dm->pre_traffic_load == dm->traffic_load) {
2069 if (sat_tab->decision_holding_period != 0) {
2070 PHYDM_DBG(dm, DBG_ANT_DIV,
2071 "Holding_period = (( %d )), return!!!\n",
2072 sat_tab->decision_holding_period);
2073 sat_tab->decision_holding_period--;
2074 return;
2075 }
2076 }
2077
2078 /* Set training packet number*/
2079 if (sat_tab->fix_training_num_en == 0) {
2080 switch (dm->traffic_load) {
2081 case TRAFFIC_HIGH:
2082 sat_tab->per_beam_training_pkt_num = 8;
2083 sat_tab->decision_holding_period = 2;
2084 break;
2085 case TRAFFIC_MID:
2086 sat_tab->per_beam_training_pkt_num = 6;
2087 sat_tab->decision_holding_period = 3;
2088 break;
2089 case TRAFFIC_LOW:
2090 sat_tab->per_beam_training_pkt_num = 3; /*ping 60000*/
2091 sat_tab->decision_holding_period = 4;
2092 break;
2093 case TRAFFIC_ULTRA_LOW:
2094 sat_tab->per_beam_training_pkt_num = 1;
2095 sat_tab->decision_holding_period = 6;
2096 break;
2097 default:
2098 break;
2099 }
2100 }
2101 PHYDM_DBG(dm, DBG_ANT_DIV,
2102 "Fix_training_en = (( %d )), training_pkt_num_base = (( %d )), holding_period = ((%d))\n",
2103 sat_tab->fix_training_num_en,
2104 sat_tab->per_beam_training_pkt_num,
2105 sat_tab->decision_holding_period);
2106
2107 #ifdef CONFIG_FAT_PATCH
2108 break_counter = 0;
2109 for (i = (sat_tab->first_train_ant - 1); i < sat_tab->ant_num_total; i++) {
2110 for (j = 0; j < (sat_tab->beam_patten_num_each_ant); j++) {
2111 per_beam_rssi_diff_tmp = sat_tab->beam_train_rssi_diff[i][j];
2112 training_pkt_num_offset = per_beam_rssi_diff_tmp;
2113
2114 if (sat_tab->per_beam_training_pkt_num > training_pkt_num_offset)
2115 sat_tab->beam_train_cnt[i][j] = sat_tab->per_beam_training_pkt_num - training_pkt_num_offset;
2116 else
2117 sat_tab->beam_train_cnt[i][j] = 1;
2118
2119 PHYDM_DBG(dm, DBG_ANT_DIV,
2120 "ant[%d]: Beam_num-(( %d )) training_pkt_num = ((%d))\n",
2121 i, j, sat_tab->beam_train_cnt[i][j]);
2122 }
2123 break_counter++;
2124 if (break_counter >= sat_tab->ant_num)
2125 break;
2126 }
2127
2128 phydm_fast_training_enable(dm, FAT_OFF);
2129 sat_tab->pre_beacon_counter = sat_tab->beacon_counter;
2130 sat_tab->update_beam_idx = 0;
2131
2132 if (*dm->band_type == ODM_BAND_5G) {
2133 PHYDM_DBG(dm, DBG_ANT_DIV, "Set 5G ant\n");
2134 /*used_ant = (sat_tab->first_train_ant == MAIN_ANT) ? AUX_ANT : MAIN_ANT;*/
2135 used_ant = sat_tab->first_train_ant;
2136 } else {
2137 PHYDM_DBG(dm, DBG_ANT_DIV, "Set 2.4G ant\n");
2138 used_ant = sat_tab->first_train_ant;
2139 }
2140
2141 odm_update_rx_idle_ant(dm, (u8)used_ant);
2142
2143 #else
2144 /* Set training MAC addr. of target */
2145 odm_set_next_mac_addr_target(dm);
2146 phydm_fast_training_enable(dm, FAT_ON);
2147 #endif
2148
2149 odm_ant_div_on_off(dm, ANTDIV_OFF, ANT_PATH_A);
2150 sat_tab->pkt_counter = 0;
2151 sat_tab->fast_training_beam_num = 0;
2152 phydm_set_all_ant_same_beam_num(dm);
2153 sat_tab->pre_fast_training_beam_num = sat_tab->fast_training_beam_num;
2154 fat_tab->fat_state = FAT_TRAINING_STATE;
2155 }
2156 }
2157
2158 #if (DM_ODM_SUPPORT_TYPE == ODM_WIN)
2159
phydm_beam_switch_workitem_callback(void * context)2160 void phydm_beam_switch_workitem_callback(
2161 void *context)
2162 {
2163 void *adapter = (void *)context;
2164 HAL_DATA_TYPE *hal_data = GET_HAL_DATA(((PADAPTER)adapter));
2165 struct dm_struct *dm = &hal_data->DM_OutSrc;
2166 struct smt_ant_honbo *sat_tab = &dm->dm_sat_table;
2167
2168 #if DEV_BUS_TYPE != RT_PCI_INTERFACE
2169 sat_tab->pkt_skip_statistic_en = 1;
2170 #endif
2171 PHYDM_DBG(dm, DBG_ANT_DIV,
2172 "[ SmartAnt ] Beam Switch Workitem Callback, pkt_skip_statistic_en = (( %d ))\n",
2173 sat_tab->pkt_skip_statistic_en);
2174
2175 phydm_update_beam_pattern(dm, sat_tab->update_beam_codeword, sat_tab->rfu_codeword_total_bit_num);
2176
2177 #if DEV_BUS_TYPE != RT_PCI_INTERFACE
2178 #if 0
2179 /*odm_stall_execution(sat_tab->latch_time);*/
2180 #endif
2181 sat_tab->pkt_skip_statistic_en = 0;
2182 #endif
2183 PHYDM_DBG(dm, DBG_ANT_DIV,
2184 "pkt_skip_statistic_en = (( %d )), latch_time = (( %d ))\n",
2185 sat_tab->pkt_skip_statistic_en, sat_tab->latch_time);
2186 }
2187
phydm_beam_decision_workitem_callback(void * context)2188 void phydm_beam_decision_workitem_callback(
2189 void *context)
2190 {
2191 void *adapter = (void *)context;
2192 HAL_DATA_TYPE *hal_data = GET_HAL_DATA(((PADAPTER)adapter));
2193 struct dm_struct *dm = &hal_data->DM_OutSrc;
2194
2195 PHYDM_DBG(dm, DBG_ANT_DIV,
2196 "[ SmartAnt ] Beam decision Workitem Callback\n");
2197 odm_fast_ant_training_hl_smart_antenna_type1(dm);
2198 }
2199 #endif
2200
2201 #endif /*@#ifdef CONFIG_HL_SMART_ANTENNA_TYPE1*/
2202
2203 #endif /*@#ifdef CONFIG_HL_SMART_ANTENNA*/
2204
phydm_smt_ant_config(void * dm_void)2205 void phydm_smt_ant_config(
2206 void *dm_void)
2207 {
2208 struct dm_struct *dm = (struct dm_struct *)dm_void;
2209 struct smt_ant *smtant_table = &dm->smtant_table;
2210
2211 #if (defined(CONFIG_CUMITEK_SMART_ANTENNA))
2212
2213 dm->support_ability |= ODM_BB_SMT_ANT;
2214 smtant_table->smt_ant_vendor = SMTANT_CUMITEK;
2215 smtant_table->smt_ant_type = 1;
2216 #if (RTL8822B_SUPPORT == 1)
2217 dm->rfe_type = SMTANT_TMP_RFE_TYPE;
2218 #endif
2219 #elif (defined(CONFIG_HL_SMART_ANTENNA))
2220
2221 dm->support_ability |= ODM_BB_SMT_ANT;
2222 smtant_table->smt_ant_vendor = SMTANT_HON_BO;
2223
2224 #ifdef CONFIG_HL_SMART_ANTENNA_TYPE1
2225 smtant_table->smt_ant_type = 1;
2226 #endif
2227
2228 #ifdef CONFIG_HL_SMART_ANTENNA_TYPE2
2229 smtant_table->smt_ant_type = 2;
2230 #endif
2231 #endif
2232
2233 PHYDM_DBG(dm, DBG_SMT_ANT,
2234 "[SmtAnt Config] Vendor=((%d)), Smt_ant_type =((%d))\n",
2235 smtant_table->smt_ant_vendor, smtant_table->smt_ant_type);
2236 }
2237
phydm_smt_ant_init(void * dm_void)2238 void phydm_smt_ant_init(void *dm_void)
2239 {
2240 struct dm_struct *dm = (struct dm_struct *)dm_void;
2241 struct smt_ant *smtant_table = &dm->smtant_table;
2242
2243 phydm_smt_ant_config(dm);
2244
2245 if (smtant_table->smt_ant_vendor == SMTANT_CUMITEK) {
2246 #if (defined(CONFIG_CUMITEK_SMART_ANTENNA))
2247 #if (RTL8822B_SUPPORT == 1)
2248 if (dm->support_ic_type == ODM_RTL8822B)
2249 phydm_cumitek_smt_ant_init_8822b(dm);
2250 #endif
2251
2252 #if (RTL8197F_SUPPORT == 1)
2253 if (dm->support_ic_type == ODM_RTL8197F)
2254 phydm_cumitek_smt_ant_init_8197f(dm);
2255 #endif
2256 /*@jj add 20170822*/
2257 #if (RTL8192F_SUPPORT == 1)
2258 if (dm->support_ic_type == ODM_RTL8192F)
2259 phydm_cumitek_smt_ant_init_8192f(dm);
2260 #endif
2261 #endif /*@#if (defined(CONFIG_CUMITEK_SMART_ANTENNA))*/
2262
2263 } else if (smtant_table->smt_ant_vendor == SMTANT_HON_BO) {
2264 #if (defined(CONFIG_HL_SMART_ANTENNA))
2265 #ifdef CONFIG_HL_SMART_ANTENNA_TYPE1
2266 if (dm->support_ic_type == ODM_RTL8821)
2267 phydm_hl_smart_ant_type1_init_8821a(dm);
2268 #endif
2269
2270 #ifdef CONFIG_HL_SMART_ANTENNA_TYPE2
2271 if (dm->support_ic_type == ODM_RTL8822B)
2272 phydm_hl_smart_ant_type2_init_8822b(dm);
2273 #endif
2274 #endif /*@#if (defined(CONFIG_HL_SMART_ANTENNA))*/
2275 }
2276 }
2277 #endif
2278