1 // Copyright (C) 2022 Beken Corporation 2 // 3 // Licensed under the Apache License, Version 2.0 (the "License"); 4 // you may not use this file except in compliance with the License. 5 // You may obtain a copy of the License at 6 // 7 // http://www.apache.org/licenses/LICENSE-2.0 8 // 9 // Unless required by applicable law or agreed to in writing, software 10 // distributed under the License is distributed on an "AS IS" BASIS, 11 // WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 12 // See the License for the specific language governing permissions and 13 // limitations under the License. 14 15 #pragma once 16 17 #include "hal_config.h" 18 #include "qspi_hw.h" 19 #include "qspi_ll.h" 20 #include <driver/hal/hal_qspi_types.h> 21 22 #ifdef __cplusplus 23 extern "C" { 24 #endif 25 26 typedef struct { 27 qspi_hw_t *hw; 28 qspi_unit_t id; 29 } qspi_hal_t; 30 31 #define qspi_hal_enable_ge1_rx(hal) qspi_ll_enable_ge1_rx((hal)->hw) 32 #define qspi_hal_disable_ge1_rx(hal) qspi_ll_disable_ge1_rx((hal)->hw) 33 #define qspi_hal_enable_ge1_tx(hal) qspi_ll_enable_ge1_tx((hal)->hw) 34 #define qspi_hal_disable_ge1_tx(hal) qspi_ll_disable_ge1_tx((hal)->hw) 35 #define qspi_hal_enable_ge0_rx(hal) qspi_ll_enable_ge0_rx((hal)->hw) 36 #define qspi_hal_disable_ge0_rx(hal) qspi_ll_disable_ge0_rx((hal)->hw) 37 #define qspi_hal_enable_ge0_tx(hal) qspi_ll_enable_ge0_tx((hal)->hw) 38 #define qspi_hal_disable_ge0_tx(hal) qspi_ll_disable_ge0_tx((hal)->hw) 39 40 #define qspi_hal_start_sw_op(hal) qspi_ll_start_sw_op((hal)->hw) 41 #define qspi_hal_stop_sw_op(hal) qspi_ll_stop_sw_op((hal)->hw) 42 #define qspi_hal_clear_sw_op_int(hal) qspi_ll_clear_sw_op_int((hal)->hw) 43 44 #define qspi_hal_set_clk_div(hal, clk_div) qspi_ll_set_clk_div((hal)->hw, clk_div) 45 46 #define qspi_hal_get_interrupt_status_before_mask(hal) qspi_ll_get_interrupt_status_before_mask((hal)->hw) 47 #define qspi_hal_get_interrupt_status_after_mask(hal) qspi_ll_get_interrupt_status_after_mask((hal)->hw) 48 #define qspi_hal_clear_interrupt_status(hal, status) qspi_ll_clear_interrupt_status((hal)->hw, status) 49 #define qspi_hal_is_sw_op_int_triggered(hal, status) qspi_ll_is_sw_op_int_triggered((hal)->hw, status) 50 51 #define qspi_hal_init_common(hal) qspi_ll_init_common((hal)->hw) 52 #define qspi_hal_deinit_common(hal) qspi_ll_deinit_common((hal)->hw) 53 54 bk_err_t qspi_hal_init(qspi_hal_t *hal); 55 bool qspi_hal_is_cur_sw_op_write_data(void); 56 bool qspi_hal_is_cur_sw_op_read_data(void); 57 bk_err_t qspi_hal_command(qspi_hal_t *hal, const qspi_cmd_t *cmd); 58 bk_err_t qspi_hal_direct_write(uint32_t base_addr, const void *data, uint32_t size); 59 bk_err_t qspi_hal_direct_read(uint32_t base_addr, void *data, uint32_t size); 60 bk_err_t qspi_hal_io_write(qspi_hal_t *hal, const void *data, uint32_t size); 61 bk_err_t qspi_hal_io_read(qspi_hal_t *hal, void *data, uint32_t size); 62 63 #if CFG_HAL_DEBUG_QSPI 64 void qspi_struct_dump(void); 65 #else 66 #define qspi_struct_dump() 67 #endif 68 69 #ifdef __cplusplus 70 } 71 #endif 72