1 /****************************************************************************** 2 * Copyright (c) 2022 Telink Semiconductor (Shanghai) Co., Ltd. ("TELINK") 3 * All rights reserved. 4 * 5 * Licensed under the Apache License, Version 2.0 (the "License"); 6 * you may not use this file except in compliance with the License. 7 * You may obtain a copy of the License at 8 * 9 * http://www.apache.org/licenses/LICENSE-2.0 10 * 11 * Unless required by applicable law or agreed to in writing, software 12 * distributed under the License is distributed on an "AS IS" BASIS, 13 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 14 * See the License for the specific language governing permissions and 15 * limitations under the License. 16 * 17 *****************************************************************************/ 18 #pragma once 19 20 #include "../sys.h" 21 22 /******************************* pke registers: 0x110000 ******************************/ 23 24 #define REG_PKE_BASE 0x110000 25 26 #define reg_pke_ctrl REG_ADDR32(REG_PKE_BASE + 0x00) 27 enum { 28 FLD_PKE_CTRL_START = BIT(0), 29 FLD_PKE_CTRL_STOP = BIT(16), 30 }; 31 32 #define reg_pke_conf REG_ADDR32(REG_PKE_BASE + 0x04) 33 typedef enum { 34 FLD_PKE_CONF_IRQ_EN = BIT(8), 35 FLD_PKE_CONF_PARTIAL_RADIX = BIT_RNG(16, 23), 36 FLD_PKE_CONF_BASE_RADIX = BIT_RNG(24, 26), 37 } pke_conf_e; 38 39 #define reg_pke_mc_ptr REG_ADDR32(REG_PKE_BASE + 0x10) 40 41 #define reg_pke_stat REG_ADDR32(REG_PKE_BASE + 0x20) 42 typedef enum { 43 FLD_PKE_STAT_DONE = BIT(0), 44 } pke_status_e; 45 46 #define reg_pke_rt_code REG_ADDR32(REG_PKE_BASE + 0x24) 47 enum { 48 FLD_PKE_RT_CODE_STOP_LOG = BIT_RNG(0, 3), 49 }; 50 51 #define reg_pke_exe_conf REG_ADDR32(REG_PKE_BASE + 0x50) 52 enum { 53 FLD_PKE_EXE_CONF_IAFF_R0 = BIT(0), 54 FLD_PKE_EXE_CONF_IMON_R0 = BIT(1), 55 FLD_PKE_EXE_CONF_IAFF_R1 = BIT(2), 56 FLD_PKE_EXE_CONF_IMON_R1 = BIT(3), 57 FLD_PKE_EXE_CONF_OAFF = BIT(4), 58 FLD_PKE_EXE_CONF_OMON = BIT(5), 59 FLD_PKE_EXE_CONF_ME_SCA_EN = BIT_RNG(8, 9), 60 }; 61