1 // Copyright (C) 2022 Beken Corporation
2 //
3 // Licensed under the Apache License, Version 2.0 (the "License");
4 // you may not use this file except in compliance with the License.
5 // You may obtain a copy of the License at
6 //
7 // http://www.apache.org/licenses/LICENSE-2.0
8 //
9 // Unless required by applicable law or agreed to in writing, software
10 // distributed under the License is distributed on an "AS IS" BASIS,
11 // WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
12 // See the License for the specific language governing permissions and
13 // limitations under the License.
14
15 #include "sys_hal.h"
16 #include "sys_driver.h"
17 #include "sys_driver_common.h"
18
sys_drv_enter_deep_sleep(void * param)19 void sys_drv_enter_deep_sleep(void *param)
20 {
21 uint32_t int_level = rtos_disable_int();
22 sys_hal_enter_deep_sleep(param);
23 rtos_enable_int(int_level);
24 }
25
sys_drv_enter_normal_sleep(uint32_t peri_clk)26 void sys_drv_enter_normal_sleep(uint32_t peri_clk)
27 {
28 uint32_t int_level = rtos_disable_int();
29 sys_hal_enter_normal_sleep(peri_clk);
30 rtos_enable_int(int_level);
31 }
32
sys_drv_enter_normal_wakeup()33 void sys_drv_enter_normal_wakeup()
34 {
35 uint32_t int_level = rtos_disable_int();
36 sys_hal_enter_normal_wakeup();
37 rtos_enable_int(int_level);
38 }
39
sys_drv_enter_low_voltage()40 void sys_drv_enter_low_voltage()
41 {
42 uint32_t int_level = rtos_disable_int();
43 sys_hal_enter_low_voltage();
44 rtos_enable_int(int_level);
45 }
46
47 /*for low power function start*/
sys_drv_module_power_ctrl(power_module_name_t module,power_module_state_t power_state)48 void sys_drv_module_power_ctrl(power_module_name_t module, power_module_state_t power_state)
49 {
50 uint32_t int_level = rtos_disable_int();
51 sys_hal_module_power_ctrl(module,power_state);
52 rtos_enable_int(int_level);
53 }
54
sys_drv_module_RF_power_ctrl(module_name_t module,power_module_state_t power_state)55 void sys_drv_module_RF_power_ctrl (module_name_t module, power_module_state_t power_state)
56 {
57 uint32_t int_level = rtos_disable_int();
58 sys_hal_module_RF_power_ctrl (module, power_state);
59 rtos_enable_int(int_level);
60 }
61
sys_drv_core_bus_clock_ctrl(high_clock_module_name_t core,uint32_t clksel,uint32_t clkdiv,high_clock_module_name_t bus,uint32_t bus_clksel,uint32_t bus_clkdiv)62 void sys_drv_core_bus_clock_ctrl(high_clock_module_name_t core, uint32_t clksel, uint32_t clkdiv, high_clock_module_name_t bus, uint32_t bus_clksel, uint32_t bus_clkdiv)
63 {
64 uint32_t int_level = rtos_disable_int();
65 sys_hal_core_bus_clock_ctrl(core, clksel, clkdiv, bus, bus_clksel, bus_clkdiv);
66 rtos_enable_int(int_level);
67 }
68
sys_drv_cpu0_main_int_ctrl(dev_clk_pwr_ctrl_t clock_state)69 void sys_drv_cpu0_main_int_ctrl(dev_clk_pwr_ctrl_t clock_state)
70 {
71 uint32_t int_level = rtos_disable_int();
72 sys_hal_cpu0_main_int_ctrl(clock_state);
73 rtos_enable_int(int_level);
74 }
75
sys_drv_cpu1_main_int_ctrl(dev_clk_pwr_ctrl_t clock_state)76 void sys_drv_cpu1_main_int_ctrl(dev_clk_pwr_ctrl_t clock_state)
77 {
78 uint32_t int_level = rtos_disable_int();
79 sys_hal_cpu1_main_int_ctrl(clock_state);
80 rtos_enable_int(int_level);
81 }
82
sys_drv_set_cpu1_boot_address_offset(uint32_t address_offset)83 void sys_drv_set_cpu1_boot_address_offset(uint32_t address_offset)
84 {
85 uint32_t int_level = rtos_disable_int();
86 sys_hal_set_cpu1_boot_address_offset(address_offset);
87 rtos_enable_int(int_level);
88 }
89
sys_drv_set_cpu1_reset(uint32_t reset_value)90 void sys_drv_set_cpu1_reset(uint32_t reset_value)
91 {
92 uint32_t int_level = rtos_disable_int();
93 /* 1:reset release, means cpu1 start to run; 0:reset means cpu1 at reset status */
94 sys_hal_set_cpu1_reset(reset_value);
95 rtos_enable_int(int_level);
96 }
97
sys_drv_enable_mac_wakeup_source()98 void sys_drv_enable_mac_wakeup_source()
99 {
100 uint32_t int_level = rtos_disable_int();
101
102 sys_hal_enable_mac_wakeup_source();
103
104 rtos_enable_int(int_level);
105 }
106
sys_drv_enable_bt_wakeup_source()107 void sys_drv_enable_bt_wakeup_source()
108 {
109 uint32_t int_level = rtos_disable_int();
110 sys_hal_enable_bt_wakeup_source();
111 rtos_enable_int(int_level);
112 }
113
sys_drv_all_modules_clk_div_set(clk_div_reg_e reg,uint32_t value)114 void sys_drv_all_modules_clk_div_set(clk_div_reg_e reg, uint32_t value)
115 {
116 sys_hal_all_modules_clk_div_set( reg, value);
117 }
118
sys_drv_all_modules_clk_div_get(clk_div_reg_e reg)119 uint32_t sys_drv_all_modules_clk_div_get(clk_div_reg_e reg)
120 {
121 return sys_hal_all_modules_clk_div_get(reg);
122 }
123
sys_drv_wakeup_interrupt_clear(wakeup_source_t interrupt_source)124 void sys_drv_wakeup_interrupt_clear(wakeup_source_t interrupt_source)
125 {
126 //sys_hal_wakeup_interrupt_clear(interrupt_source);
127 }
128
sys_drv_wakeup_interrupt_set(wakeup_source_t interrupt_source)129 void sys_drv_wakeup_interrupt_set(wakeup_source_t interrupt_source)
130 {
131
132 }
133
sys_drv_touch_wakeup_enable(uint8_t index)134 void sys_drv_touch_wakeup_enable(uint8_t index)
135 {
136 uint32_t int_level = rtos_disable_int();
137 sys_hal_touch_wakeup_enable(index);
138 rtos_enable_int(int_level);
139 }
140
sys_drv_usb_wakeup_enable(uint8_t index)141 void sys_drv_usb_wakeup_enable(uint8_t index)
142 {
143 sys_hal_usb_wakeup_enable(index);
144 }
145
sys_drv_cpu_clk_div_set(uint32_t core_index,uint32_t value)146 void sys_drv_cpu_clk_div_set(uint32_t core_index, uint32_t value)
147 {
148 sys_hal_cpu_clk_div_set(core_index,value);
149 }
150
sys_drv_cpu_clk_div_get(uint32_t core_index)151 uint32_t sys_drv_cpu_clk_div_get(uint32_t core_index)
152 {
153 return sys_hal_cpu_clk_div_get(core_index);
154 }
155
sys_drv_low_power_hardware_init()156 void sys_drv_low_power_hardware_init()
157 {
158 sys_hal_low_power_hardware_init();
159 }
160
sys_drv_lp_vol_set(uint32_t value)161 int32 sys_drv_lp_vol_set(uint32_t value)
162 {
163 int32 ret = 0;
164 ret = sys_hal_lp_vol_set(value);
165 return ret;
166 }
167
sys_drv_lp_vol_get()168 uint32_t sys_drv_lp_vol_get()
169 {
170 return sys_hal_lp_vol_get();
171 }
172 /*for low power function end*/
173
174 /*wake up control start*/
175 //sys_ctrl CMD: CMD_ARM_WAKEUP_ENABLE
sys_drv_arm_wakeup_enable(uint32_t param)176 void sys_drv_arm_wakeup_enable(uint32_t param)
177 {
178 uint32_t int_level = rtos_disable_int();
179
180 sys_hal_arm_wakeup_enable(param);
181
182 rtos_enable_int(int_level);
183 }
184
185 //sys_ctrl CMD: CMD_ARM_WAKEUP_DISABLE
sys_drv_arm_wakeup_disable(uint32_t param)186 void sys_drv_arm_wakeup_disable(uint32_t param)
187 {
188 uint32_t int_level = rtos_disable_int();
189
190 sys_hal_arm_wakeup_disable(param);
191
192 rtos_enable_int(int_level);
193 }
194
195 //sys_ctrl CMD: CMD_GET_ARM_WAKEUP
sys_drv_get_arm_wakeup(void)196 uint32_t sys_drv_get_arm_wakeup(void)
197 {
198 int32 ret = 0;
199 uint32_t int_level = rtos_disable_int();
200
201 ret = sys_hal_get_arm_wakeup();
202 rtos_enable_int(int_level);
203
204 return ret;
205 }
sys_drv_module_power_state_get(power_module_name_t module)206 int32 sys_drv_module_power_state_get(power_module_name_t module)
207 {
208 return sys_hal_module_power_state_get(module);
209 }
210
211 /*wake up control end*/
212
213