1 // Copyright (C) 2022 Beken Corporation 2 // 3 // Licensed under the Apache License, Version 2.0 (the "License"); 4 // you may not use this file except in compliance with the License. 5 // You may obtain a copy of the License at 6 // 7 // http://www.apache.org/licenses/LICENSE-2.0 8 // 9 // Unless required by applicable law or agreed to in writing, software 10 // distributed under the License is distributed on an "AS IS" BASIS, 11 // WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 12 // See the License for the specific language governing permissions and 13 // limitations under the License. 14 15 #pragma once 16 17 #include "hal_config.h" 18 #include "uart_hw.h" 19 #include "uart_ll.h" 20 #include <driver/hal/hal_uart_types.h> 21 22 #ifdef __cplusplus 23 extern "C" { 24 #endif 25 26 typedef struct { 27 uart_hw_t *hw; 28 uart_unit_t id; 29 } uart_hal_t; 30 31 #define UART_HAL_ATE_ID (UART_LL_ATE_ID) 32 33 #define UART_HAL_ATE_REUSE_PIN (UART_LL_ATE_REUSE_PIN) //RE-USE for ATE 34 35 #define uart_hal_enable_tx_interrupt(hal, id) uart_ll_enable_tx_interrupt((hal)->hw, id) 36 #define uart_hal_disable_tx_interrupt(hal, id) uart_ll_disable_tx_interrupt((hal)->hw, id) 37 #define uart_hal_enable_rx_interrupt(hal, id) uart_ll_enable_rx_interrupt((hal)->hw, id) 38 #define uart_hal_disable_rx_interrupt(hal, id) uart_ll_disable_rx_interrupt((hal)->hw, id) 39 #define uart_hal_get_interrupt_status(hal, id) uart_ll_get_interrupt_status((hal)->hw, id) 40 #define uart_hal_clear_interrupt_status(hal, id, status) uart_ll_clear_interrupt_status((hal)->hw, id, status) 41 #define uart_hal_clear_id_interrupt_status(hal, id) uart_ll_clear_id_interrupt_status((hal)->hw, id) 42 #define uart_hal_clear_id_tx_interrupt_status(hal, id) uart_ll_clear_id_tx_interrupt_status((hal)->hw, id) 43 #define uart_hal_clear_id_rx_interrupt_status(hal, id) uart_ll_clear_id_rx_interrupt_status((hal)->hw, id) 44 45 #define uart_hal_get_int_enable_status(hal, id) uart_ll_get_int_enable_status((hal)->hw, id) 46 #define uart_hal_is_rx_interrupt_triggered(hal, id, status) uart_ll_is_rx_interrupt_triggered((hal)->hw, id, status) 47 #define uart_hal_is_tx_interrupt_triggered(hal, id, status) uart_ll_is_tx_interrupt_triggered((hal)->hw, id, status) 48 #define uart_hal_is_rx_recv_fini_int_triggered(hal, id, status) uart_ll_is_rx_recv_fini_int_triggered((hal)->hw, id, status) 49 #define uart_hal_is_rx_parity_err_int_triggered(hal, id, status) uart_ll_is_rx_parity_err_int_triggered((hal)->hw, id, status) 50 51 #define uart_hal_disable_tx(hal, id) uart_ll_disable_tx((hal)->hw, id) 52 #define uart_hal_disable_rx(hal, id) uart_ll_disable_rx((hal)->hw, id) 53 #define uart_hal_set_tx_enable(hal, id, enable) uart_ll_set_tx_enable((hal)->hw, id, enable) 54 #define uart_hal_set_rx_enable(hal, id, enable) uart_ll_set_rx_enable((hal)->hw, id, enable) 55 56 #define uart_hal_set_data_bits(hal, id, data_bits) uart_ll_set_data_bits((hal)->hw, id, data_bits) 57 #define uart_hal_set_stop_bits(hal, id, stop_bits) uart_ll_set_stop_bits((hal)->hw, id, stop_bits) 58 #define uart_hal_reset_config_to_default(hal, id) uart_ll_reset_config_to_default((hal)->hw, id) 59 #define uart_hal_set_frame_mode(hal, id, mode) uart_ll_set_frame_mode((hal)->hw, id, mode) 60 #define uart_hal_set_tx_fifo_threshold(hal, id, value) uart_ll_set_tx_fifo_threshold((hal)->hw, id, value) 61 #define uart_hal_set_rx_fifo_threshold(hal, id, value) uart_ll_set_rx_fifo_threshold((hal)->hw, id, value) 62 #define uart_hal_set_rx_stop_detect_time(hal, id, value) uart_ll_set_rx_stop_detect_time((hal)->hw, id, value) 63 64 #define uart_hal_get_tx_fifo_cnt(hal, id) uart_ll_get_tx_fifo_cnt((hal)->hw, id) 65 #define uart_hal_get_rx_fifo_cnt(hal, id) uart_ll_get_rx_fifo_cnt((hal)->hw, id) 66 #define uart_hal_is_tx_fifo_full(hal, id) uart_ll_is_tx_fifo_full((hal)->hw, id) 67 #define uart_hal_is_tx_fifo_empty(hal, id) uart_ll_is_tx_fifo_empty((hal)->hw, id) 68 #define uart_hal_is_rx_fifo_full(hal, id) uart_ll_is_rx_fifo_full((hal)->hw, id) 69 #define uart_hal_is_rx_fifo_empty(hal, id) uart_ll_is_rx_fifo_empty((hal)->hw, id) 70 #define uart_hal_is_fifo_write_ready(hal, id) uart_ll_is_fifo_write_ready((hal)->hw, id) 71 #define uart_hal_is_fifo_read_ready(hal, id) uart_ll_is_fifo_read_ready((hal)->hw, id) 72 73 #define uart_hal_enable_flow_control(hal, id) uart_ll_enable_flow_control((hal)->hw, id) 74 #define uart_hal_disable_flow_control(hal, id) uart_ll_disable_flow_control((hal)->hw, id) 75 #define uart_hal_is_flow_control_enabled(hal, id) uart_ll_is_flow_control_enabled((hal)->hw, id) 76 77 #define uart_hal_write_byte(hal, id, data) uart_ll_write_byte((hal)->hw, id, data) 78 #define uart_hal_read_byte(hal, id) uart_ll_read_byte((hal)->hw, id) 79 #define uart_hal_get_tx_pin(id) uart_ll_get_tx_pin(id) 80 #define uart_hal_get_rx_pin(id) uart_ll_get_rx_pin(id) 81 #define uart_hal_get_cts_pin(id) uart_ll_get_cts_pin(id) 82 #define uart_hal_get_rts_pin(id) uart_ll_get_rts_pin(id) 83 84 #define uart_hal_wait_tx_over() uart_ll_wait_tx_over() 85 //#define uart_hal_get_ate_id() uart_ll_ate_uart_id() 86 87 bk_err_t uart_hal_init(uart_hal_t *hal); 88 bk_err_t uart_hal_init_uart(uart_hal_t *hal, uart_id_t id, const uart_config_t *config); 89 bk_err_t uart_hal_start_common(uart_hal_t *hal, uart_id_t id); 90 bk_err_t uart_hal_stop_common(uart_hal_t *hal, uart_id_t id); 91 bk_err_t uart_hal_flush_fifo(uart_hal_t *hal, uart_id_t id); 92 bk_err_t uart_hal_set_baud_rate(uart_hal_t *hal, uart_id_t id, uint32_t sclk, uint32_t baud_rate); 93 bk_err_t uart_hal_set_parity(uart_hal_t *hal, uart_id_t id, uart_parity_t parity); 94 bk_err_t uart_hal_set_hw_flow_ctrl(uart_hal_t *hal, uart_id_t id, uint8_t rx_threshold); 95 bk_err_t uart_hal_disable_hw_flow_ctrl(uart_hal_t *hal, uart_id_t id); 96 97 #if CFG_HAL_DEBUG_UART 98 void uart_struct_dump(uart_id_t id); 99 #else 100 #define uart_struct_dump(id) 101 #endif 102 103 #ifdef __cplusplus 104 } 105 #endif 106 107