1 /*
2 * A V4L2 driver for nvp6158c yuv cameras.
3 *
4 * Copyright (c) 2019 by Allwinnertech Co., Ltd. http://www.allwinnertech.com
5 *
6 * Authors: Zheng Zequn<zequnzheng@allwinnertech.com>
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
11 */
12 #include <linux/string.h>
13 #include <linux/delay.h>
14 #include "common.h"
15 #include "video_auto_detect.h"
16 #include "video.h"
17 #include "../sensor_helper.h"
18
19 #define ACC_GAIN_NORMAL 0
20 #define ACC_GAIN_DEBUG 1
21 #define SENSOR_NAME "nvp6158"
22
23 extern int chip_nvp6158_id[4];
24 extern unsigned int nvp6158_iic_addr[4];
25
26 NC_VIVO_CH_FORMATDEF arrVfcType[0x100] = {
27 /* 0x00 */AHD20_SD_H960_2EX_Btype_NT, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
28 /* 0x10 */AHD20_SD_H960_2EX_Btype_PAL, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
29 /* 0x20 */AHD20_720P_30P_EX_Btype, AHD20_720P_25P_EX_Btype, AHD20_720P_60P, AHD20_720P_50P, 0,
30 /* 0x25 */TVI_HD_30P_EX, TVI_HD_25P_EX, TVI_HD_60P, TVI_HD_50P, TVI_HD_B_30P_EX, TVI_HD_B_25P_EX,
31 /* 0x2B */CVI_HD_30P_EX, CVI_HD_25P_EX, CVI_HD_60P, CVI_HD_50P, 0,
32 /* 0x30 */AHD20_1080P_30P, AHD20_1080P_25P, 0, TVI_FHD_30P, TVI_FHD_25P, CVI_FHD_30P, CVI_FHD_25P, 0, 0, 0, 0, 0, 0, 0, 0, 0,
33 /* 0x40 */AHD30_3M_30P, AHD30_3M_25P, AHD30_3M_18P, 0, TVI_3M_18P, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, TVI_4M_15P,
34 /* 0x50 */AHD30_4M_30P, AHD30_4M_25P, AHD30_4M_15P, 0, CVI_4M_30P, CVI_4M_25P, 0, TVI_4M_30P, TVI_4M_25P, TVI_4M_15P, 0, 0, 0, 0, 0, 0,
35 /* 0x60 */AHD30_8M_X_30P, AHD30_8M_X_25P, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
36 /* 0x70 */AHD30_5M_20P, AHD30_5M_12_5P, AHD30_5_3M_20P, TVI_5M_12_5P, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
37 /* 0x80 */AHD30_8M_15P, AHD30_8M_7_5P, AHD30_8M_12_5P, CVI_8M_15P, CVI_8M_12_5P, TVI_8M_15P, TVI_8M_12_5P, 0, 0, 0, 0, 0, 0, 0, 0, 0,
38 /* 0x90 */AHD30_6M_18P, AHD30_6M_20P, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
39 /* 0xA0 */
40 };
41
42 NC_VIVO_CH_FORMATDEF arrVfcType_ahd[0x100] = {
43 /* 0x00 */AHD20_SD_H960_2EX_Btype_NT, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
44 /* 0x10 */AHD20_SD_H960_2EX_Btype_PAL, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
45 /* 0x20 */AHD20_720P_30P_EX_Btype, AHD20_720P_25P_EX_Btype, AHD20_720P_60P, AHD20_720P_50P, 0,
46 /* 0x25 */0, 0, 0, 0, 0, 0,
47 /* 0x2B */AHD20_720P_30P_EX_Btype, AHD20_720P_25P_EX_Btype, AHD20_720P_60P, AHD20_720P_50P, 0,
48 /* 0x30 */AHD20_1080P_30P, AHD20_1080P_25P, 0, 0, 0, AHD20_1080P_30P, AHD20_1080P_25P, 0, 0, 0, 0, 0, 0, 0, 0, 0,
49 /* 0x40 */AHD30_3M_30P, AHD30_3M_25P, AHD30_3M_18P, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
50 /* 0x50 */AHD30_4M_30P, AHD30_4M_25P, AHD30_4M_15P, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
51 /* 0x60 */AHD30_8M_X_30P, AHD30_8M_X_25P, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
52 /* 0x70 */AHD30_5M_20P, AHD30_5M_12_5P, AHD30_5_3M_20P, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
53 /* 0x80 */AHD30_8M_15P, AHD30_8M_7_5P, AHD30_8M_12_5P, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
54 /* 0x90 */AHD30_6M_18P, AHD30_6M_20P, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
55 /* 0xA0 */
56 };
57
58 NC_VIVO_CH_FORMATDEF arrVfcType_cvi[0x100] = {
59 /* 0x00 */AHD20_SD_H960_2EX_Btype_NT, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
60 /* 0x10 */AHD20_SD_H960_2EX_Btype_PAL, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
61 /* 0x20 */CVI_HD_30P_EX, CVI_HD_25P_EX, CVI_HD_60P, CVI_HD_50P, 0,
62 /* 0x25 */0, 0, 0, 0, 0, 0,
63 /* 0x2B */CVI_HD_30P_EX, CVI_HD_25P_EX, CVI_HD_60P, CVI_HD_50P, 0,
64 /* 0x30 */CVI_FHD_30P, CVI_FHD_25P, 0, 0, 0, CVI_FHD_30P, CVI_FHD_25P, 0, 0, 0, 0, 0, 0, 0, 0, 0,
65 /* 0x40 */0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
66 /* 0x50 */0, 0, 0, 0, CVI_4M_30P, CVI_4M_25P, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
67 /* 0x60 */0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
68 /* 0x70 */CVI_5M_20P, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
69 /* 0x80 */0, 0, 0, CVI_8M_15P, CVI_8M_12_5P, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
70 /* 0x90 */0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
71 /* 0xA0 */
72 };
73
74 NC_VIVO_CH_FORMATDEF arrVfcType_tvi[0x100] = {
75 /* 0x00 */AHD20_SD_H960_2EX_Btype_NT, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
76 /* 0x10 */AHD20_SD_H960_2EX_Btype_PAL, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
77 /* 0x20 */0, 0, 0, 0, 0,
78 /* 0x25 */TVI_HD_30P_EX, TVI_HD_25P_EX, TVI_HD_60P, TVI_HD_50P, TVI_HD_B_30P_EX, TVI_HD_B_25P_EX,
79 /* 0x2B */TVI_4M_15P, 0, 0, 0, 0,
80 /* 0x30 */0, 0, 0, TVI_FHD_30P, TVI_FHD_25P, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
81 /* 0x40 */0, 0, 0, 0, TVI_3M_18P, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, TVI_4M_15P,
82 /* 0x50 */0, 0, 0, 0, 0, 0, 0, TVI_4M_30P, TVI_4M_25P, TVI_4M_15P, 0, 0, 0, 0, 0, 0,
83 /* 0x60 */0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
84 /* 0x70 */TVI_5M_20P, 0, 0, TVI_5M_12_5P, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
85 /* 0x80 */0, 0, 0, TVI_8M_15P, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
86 /* 0x90 */0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
87 /* 0xA0 */
88 };
89
90 NC_VIVO_CH_FORMATDEF arrVfcType_raptor4[0x100] = {
91 /* 0x00 */AHD20_SD_H960_2EX_Btype_NT,
92 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
93 /* 0x10 */ AHD20_SD_H960_2EX_Btype_PAL,
94 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
95 /* 0x20 */AHD20_720P_30P_EX_Btype, AHD20_720P_25P_EX_Btype, AHD20_720P_60P, AHD20_720P_50P,
96 0,
97 /* 0x25 */TVI_HD_30P_EX, TVI_HD_25P_EX, TVI_HD_60P, TVI_HD_50P, TVI_HD_B_30P_EX, TVI_HD_B_25P_EX,
98 /* 0x2B */CVI_HD_30P_EX, CVI_HD_25P_EX, CVI_HD_60P, CVI_HD_50P,
99 0,
100 /* 0x30 */AHD20_1080P_30P, AHD20_1080P_25P,
101 0,
102 /* 0x33 */TVI_FHD_30P, TVI_FHD_25P,
103 /* 0x35 */CVI_FHD_30P, CVI_FHD_25P,
104 0,
105 /* 0x38 */AHD20_1080P_60P, AHD20_1080P_50P,
106 /* 0x3A */TVI_FHD_60P, TVI_FHD_50P,
107 /* 0x3C */AHD20_1080P_15P_EX, AHD20_1080P_12_5P_EX,
108 0, 0,
109 /* 0x40 */AHD30_3M_30P, AHD30_3M_25P, AHD30_3M_18P,
110 0,
111 /* 0x44 */TVI_3M_18P,
112 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
113 /* 0x50 */AHD30_4M_30P, AHD30_4M_25P, AHD30_4M_15P,
114 0,
115 /* 0x54 */CVI_4M_30P, CVI_4M_25P,
116 0,
117 /* 0x57 */TVI_4M_30P, TVI_4M_25P, TVI_4M_15P,
118 0, 0, 0, 0, 0, 0,
119 /* 0x60 */AHD30_8M_X_30P, AHD30_8M_X_25P, 0,
120 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
121 /* 0x70 */AHD30_5M_20P, AHD30_5M_12_5P, AHD30_5_3M_20P,
122 /* 0x73 */TVI_5M_12_5P, TVI_5M_20P,
123 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
124 /* 0x80 */AHD30_8M_15P, AHD30_8M_7_5P, AHD30_8M_12_5P, CVI_8M_15P, CVI_8M_12_5P, TVI_8M_15P, TVI_8M_12_5P,
125 0, 0, 0, 0, 0, 0, 0, 0, 0,
126 /* 0x90 */AHD30_6M_18P, AHD30_6M_20P,
127 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
128 /* 0xA0 */AHD20_960P_30P, AHD20_960P_25P, AHD20_960P_60P, AHD20_960P_50P,
129 };
130
131 /* unsigned char current_fmt[16] = {NVP6158_DET_MODE_AUTO, NVP6158_DET_MODE_AUTO, NVP6158_DET_MODE_AUTO, NVP6158_DET_MODE_AUTO}; */
132 extern unsigned char det_mode[16];
NC_VD_AUTO_VFCtoFMTDEF(unsigned char ch,unsigned char VFC)133 NC_VIVO_CH_FORMATDEF NC_VD_AUTO_VFCtoFMTDEF(unsigned char ch, unsigned char VFC)
134 {
135 if ((chip_nvp6158_id[ch/4] == NVP6168C_R0_ID) || (chip_nvp6158_id[ch/4] == NVP6168_R0_ID))
136 return arrVfcType_raptor4[VFC];
137 else {
138 if (det_mode[ch] == NVP6158_DET_MODE_AUTO)
139 return arrVfcType[VFC];
140 else if (det_mode[ch] == NVP6158_DET_MODE_CVI)
141 return arrVfcType_cvi[VFC];
142 else if (det_mode[ch] == NVP6158_DET_MODE_TVI)
143 return arrVfcType_tvi[VFC];
144 else
145 return arrVfcType_ahd[VFC];
146 }
147 }
148
_video_input_auto_detect_vafe_set(video_input_auto_detect * vin_auto_det)149 void _video_input_auto_detect_vafe_set(video_input_auto_detect *vin_auto_det)
150 {
151 unsigned char val_1x7A;
152 unsigned char val_5678x00;
153 unsigned char val_5678x01;
154 unsigned char val_5678x58;
155 unsigned char val_5678x59;
156 unsigned char val_5678x5B;
157 unsigned char val_5678x5C;
158
159 gpio_i2c_write(nvp6158_iic_addr[vin_auto_det->devnum], 0xFF, 0x01);
160 val_1x7A = gpio_i2c_read(nvp6158_iic_addr[vin_auto_det->devnum], 0x7A);
161 val_1x7A |= (1 << vin_auto_det->ch);
162 gpio_i2c_write(nvp6158_iic_addr[vin_auto_det->devnum], 0x7A, val_1x7A);
163
164 gpio_i2c_write(nvp6158_iic_addr[vin_auto_det->devnum], 0xFF, 0x00);
165 //B0 0x00/1/2/3 gain[4], powerdown[0]
166 gpio_i2c_write(nvp6158_iic_addr[vin_auto_det->devnum], 0x00 + vin_auto_det->ch, ((vin_auto_det->vafe.gain & 0x01) << 4) |
167 (vin_auto_det->vafe.powerdown & 0x01));
168
169 gpio_i2c_write(nvp6158_iic_addr[vin_auto_det->devnum], 0xFF, 0x01);
170 gpio_i2c_write(nvp6158_iic_addr[vin_auto_det->devnum], 0x84 + vin_auto_det->ch, 0x00);
171
172 /* B5/6/7/8 */
173 gpio_i2c_write(nvp6158_iic_addr[vin_auto_det->devnum], 0xFF, 0x05 + vin_auto_det->ch);
174
175 /* B5/6/7/8 0x01 spd[2], lpf_back_band[1:0] */
176 val_5678x00 = gpio_i2c_read(nvp6158_iic_addr[vin_auto_det->devnum], 0x00);
177 val_5678x00 &= ~(0xF << 4);
178 val_5678x00 |= vin_auto_det->vafe.spd << 4;
179
180 gpio_i2c_write(nvp6158_iic_addr[vin_auto_det->devnum], 0x00, val_5678x00);
181
182 val_5678x01 = ((vin_auto_det->vafe.ctrlreg << 6) | (vin_auto_det->vafe.ctrlibs << 4) | (vin_auto_det->vafe.adcspd << 2) | (vin_auto_det->vafe.clplevel));
183 gpio_i2c_write(nvp6158_iic_addr[vin_auto_det->devnum], 0x01, val_5678x01);
184
185 /* B5/6/7/8 0x58 eq_band[7:4], lpf_front_band[1:0] */
186 val_5678x58 = ((vin_auto_det->vafe.eq_band << 4) | (vin_auto_det->vafe.lpf_front_band));
187 gpio_i2c_write(nvp6158_iic_addr[vin_auto_det->devnum], 0x58, val_5678x58);
188
189 /* B5/6/7/8 0x5B ref_vol[1:0] */
190 val_5678x59 = ((vin_auto_det->vafe.clpmode << 7) | (vin_auto_det->vafe.f_lpf_bypass << 4) | (vin_auto_det->vafe.clproff << 3) | (vin_auto_det->vafe.b_lpf_bypass));
191 gpio_i2c_write(nvp6158_iic_addr[vin_auto_det->devnum], 0x59, val_5678x59);
192
193 val_5678x5B = ((vin_auto_det->vafe.duty << 4) | (vin_auto_det->vafe.ref_vol));
194 gpio_i2c_write(nvp6158_iic_addr[vin_auto_det->devnum], 0x5B, val_5678x5B);
195
196 val_5678x5C = ((vin_auto_det->vafe.lpf_back_band << 4) | (vin_auto_det->vafe.clk_sel << 3) | (vin_auto_det->vafe.eq_gainsel));
197 gpio_i2c_write(nvp6158_iic_addr[vin_auto_det->devnum], 0x5C, val_5678x5C);
198 }
199
video_input_manual_mode_set(video_input_manual_mode * vin_manual_det)200 void video_input_manual_mode_set(video_input_manual_mode *vin_manual_det)
201 {
202 unsigned char val_0x30;
203 unsigned char val_0x31;
204 unsigned char val_0x32;
205
206 unsigned char val_1x7A;
207
208 unsigned char val_9x44;
209 /* B13 0x30 AUTO_FMT_SET_EN_2[3:0], AUTO_FMT_SET_EN [3:0] */
210 /* B13 0x31 AUTO_FMT_SET_EN_4[3:0], AUTO_FMT_SET_EN_3 [3:0] */
211 /* B13 0x32 [RESERVED], NOVIDEO_VFC_INIT_EN[3:0] */
212
213 gpio_i2c_write(nvp6158_iic_addr[vin_manual_det->dev_num], 0xFF, 0x01);
214 val_1x7A = gpio_i2c_read(nvp6158_iic_addr[vin_manual_det->dev_num], 0x7A);
215 val_1x7A &= ~(1 << vin_manual_det->ch);
216 val_1x7A |= (1 << vin_manual_det->ch);
217 gpio_i2c_write(nvp6158_iic_addr[vin_manual_det->dev_num], 0x7A, val_1x7A);
218
219 gpio_i2c_write(nvp6158_iic_addr[vin_manual_det->dev_num], 0xFF, 0x00);
220 gpio_i2c_write(nvp6158_iic_addr[vin_manual_det->dev_num], 0x23 + (vin_manual_det->ch*4), 0x41);
221
222 gpio_i2c_write(nvp6158_iic_addr[vin_manual_det->dev_num], 0xFF, 0x13);
223 val_0x30 = gpio_i2c_read(nvp6158_iic_addr[vin_manual_det->dev_num], 0x30);
224 val_0x31 = gpio_i2c_read(nvp6158_iic_addr[vin_manual_det->dev_num], 0x31);
225 val_0x32 = gpio_i2c_read(nvp6158_iic_addr[vin_manual_det->dev_num], 0x32);
226
227 val_0x30 &= (~(1 << (vin_manual_det->ch + 4)) & (~(1 << vin_manual_det->ch)));
228 val_0x31 &= (~(1 << (vin_manual_det->ch + 4)) & (~(1 << vin_manual_det->ch)));
229 val_0x32 &= (~(1 << vin_manual_det->ch));
230
231 gpio_i2c_write(nvp6158_iic_addr[vin_manual_det->dev_num], 0x30, val_0x30);
232 gpio_i2c_write(nvp6158_iic_addr[vin_manual_det->dev_num], 0x31, val_0x31);
233 gpio_i2c_write(nvp6158_iic_addr[vin_manual_det->dev_num], 0x32, val_0x32);
234
235 gpio_i2c_write(nvp6158_iic_addr[vin_manual_det->dev_num], 0xFF, 0x05 + vin_manual_det->ch);
236 /* B5/6/7/8 0xB9 HAFC_LPF_SEL[7:6] GAIN1[5:4] GAIN2[3:0] */
237 gpio_i2c_write(nvp6158_iic_addr[vin_manual_det->dev_num], 0xB9, 0xB2);
238
239
240 /* EXT PN VALUE Disable */
241 gpio_i2c_write(nvp6158_iic_addr[vin_manual_det->dev_num], 0xFF, 0x09);
242 val_9x44 = gpio_i2c_read(nvp6158_iic_addr[vin_manual_det->dev_num], 0x44);
243 val_9x44 &= ~(1 << vin_manual_det->ch);
244 gpio_i2c_write(nvp6158_iic_addr[vin_manual_det->dev_num], 0x44, val_9x44);
245 }
246
nvp6168_video_input_manual_mode_set(video_input_manual_mode * vin_manual_det)247 void nvp6168_video_input_manual_mode_set(video_input_manual_mode *vin_manual_det)
248 {
249 unsigned char val_1x7A;
250 unsigned char val_9x44;
251
252 gpio_i2c_write(nvp6158_iic_addr[vin_manual_det->dev_num], 0xFF, 0x01);
253 val_1x7A = gpio_i2c_read(nvp6158_iic_addr[vin_manual_det->dev_num], 0x7A);
254 val_1x7A &= ~(1 << vin_manual_det->ch);
255 val_1x7A |= (1 << vin_manual_det->ch);
256 gpio_i2c_write(nvp6158_iic_addr[vin_manual_det->dev_num], 0x7A, val_1x7A);
257
258 gpio_i2c_write(nvp6158_iic_addr[vin_manual_det->dev_num], 0xFF, 0x13);
259 gpio_i2c_write(nvp6158_iic_addr[vin_manual_det->dev_num], 0x30, 0x00);
260 gpio_i2c_write(nvp6158_iic_addr[vin_manual_det->dev_num], 0x70, 0x00);
261
262 gpio_i2c_write(nvp6158_iic_addr[vin_manual_det->dev_num], 0xFF, 0x05 + vin_manual_det->ch);
263 gpio_i2c_write(nvp6158_iic_addr[vin_manual_det->dev_num], 0xB9, 0x72);
264
265 gpio_i2c_write(nvp6158_iic_addr[vin_manual_det->dev_num], 0xFF, 0x09);
266 val_9x44 = gpio_i2c_read(nvp6158_iic_addr[vin_manual_det->dev_num], 0x44);
267 val_9x44 &= ~(1 << vin_manual_det->ch);
268 gpio_i2c_write(nvp6158_iic_addr[vin_manual_det->dev_num], 0x44, val_9x44);
269 }
270
video_input_auto_detect_set(video_input_auto_detect * vin_auto_det)271 void video_input_auto_detect_set(video_input_auto_detect *vin_auto_det)
272 {
273 unsigned char val_0x30;
274 unsigned char val_0x31;
275 unsigned char val_0x32;
276
277 vin_auto_det->vafe.powerdown = 0x00;
278 vin_auto_det->vafe.gain = 0x01;
279 vin_auto_det->vafe.spd = 0x0d;
280 vin_auto_det->vafe.ctrlreg = 0x01;
281 vin_auto_det->vafe.ctrlibs = 0x02;
282 vin_auto_det->vafe.adcspd = 0x00;
283 vin_auto_det->vafe.clplevel = 0x02;
284 vin_auto_det->vafe.eq_band = 0x00;
285 vin_auto_det->vafe.lpf_front_band = 0x07;
286 vin_auto_det->vafe.clpmode = 0x00;
287 vin_auto_det->vafe.f_lpf_bypass = 0x01;
288 vin_auto_det->vafe.clproff = 0x00;
289 vin_auto_det->vafe.b_lpf_bypass = 0x00;
290 vin_auto_det->vafe.duty = 0x04;
291 vin_auto_det->vafe.ref_vol = 0x03;
292 vin_auto_det->vafe.lpf_back_band = 0x07;
293 vin_auto_det->vafe.clk_sel = 0x01;
294 vin_auto_det->vafe.eq_gainsel = 0x07;
295
296 vin_auto_det->d_cmp = 0x3f;
297 vin_auto_det->slice_level = 0x5a;
298 vin_auto_det->stable_mode_1 = 0x04;
299 vin_auto_det->stable_mode_2 = 0x00;
300 vin_auto_det->novid_det = 0x41;
301
302 _video_input_auto_detect_vafe_set(vin_auto_det);
303
304 gpio_i2c_write(nvp6158_iic_addr[vin_auto_det->devnum], 0xFF, 0x05 + vin_auto_det->ch);
305
306 /* B5/6/7/8 0x03 Digital Clamp */
307 gpio_i2c_write(nvp6158_iic_addr[vin_auto_det->devnum], 0x03, vin_auto_det->d_cmp);
308 /* B5/6/7/8 0x08 Slice Level */
309 gpio_i2c_write(nvp6158_iic_addr[vin_auto_det->devnum], 0x08, vin_auto_det->slice_level);
310 /* B5/6/7/8 0xB9 HAFC_LPF_SEL[7:6] GAIN1[5:4] GAIN2[3:0] */
311 gpio_i2c_write(nvp6158_iic_addr[vin_auto_det->devnum], 0xB9, 0x72);
312
313 /* B5/6/7/8 0xCA ADV_V_DELAY_AD[4] ADV_V_DELAY_ON[0] */
314 gpio_i2c_write(nvp6158_iic_addr[vin_auto_det->devnum], 0xCA, 0x10);
315
316 /* B13 0x30 AUTO_FMT_SET_EN_2[3:0], AUTO_FMT_SET_EN [3:0] */
317 /* B13 0x31 AUTO_FMT_SET_EN_4[3:0], AUTO_FMT_SET_EN_3 [3:0] */
318 /* B13 0x32 [RESERVED], NOVIDEO_VFC_INIT_EN[3:0] */
319
320 gpio_i2c_write(nvp6158_iic_addr[vin_auto_det->devnum], 0xFF, 0x13);
321 val_0x30 = gpio_i2c_read(nvp6158_iic_addr[vin_auto_det->devnum], 0x30);
322 val_0x31 = gpio_i2c_read(nvp6158_iic_addr[vin_auto_det->devnum], 0x31);
323 val_0x32 = gpio_i2c_read(nvp6158_iic_addr[vin_auto_det->devnum], 0x32);
324 val_0x30 |= ((1 << (vin_auto_det->ch + 4)) | (1 << vin_auto_det->ch));
325 val_0x31 |= ((1 << (vin_auto_det->ch + 4)) | (1 << vin_auto_det->ch));
326 val_0x32 |= ((1 << vin_auto_det->ch) & 0xF);
327 gpio_i2c_write(nvp6158_iic_addr[vin_auto_det->devnum], 0x30, val_0x30);
328 gpio_i2c_write(nvp6158_iic_addr[vin_auto_det->devnum], 0x31, val_0x31);
329 gpio_i2c_write(nvp6158_iic_addr[vin_auto_det->devnum], 0x32, val_0x32);
330 gpio_i2c_write(nvp6158_iic_addr[vin_auto_det->devnum], 0x36, 0x0A);
331 gpio_i2c_write(nvp6158_iic_addr[vin_auto_det->devnum], 0x37, 0x82);
332
333 gpio_i2c_write(nvp6158_iic_addr[vin_auto_det->devnum], 0xFF, 0x00);
334 gpio_i2c_write(nvp6158_iic_addr[vin_auto_det->devnum], 0x81+vin_auto_det->ch, 0x0A);
335 gpio_i2c_write(nvp6158_iic_addr[vin_auto_det->devnum], 0x85+vin_auto_det->ch, 0x02);
336
337 /* B13 */
338 gpio_i2c_write(nvp6158_iic_addr[vin_auto_det->devnum], 0xFF, 0x13);
339 /* B13 0x00 Stable Mode set */
340 gpio_i2c_write(nvp6158_iic_addr[vin_auto_det->devnum], 0x00, vin_auto_det->stable_mode_1);
341 /* B13 0x01 Stable Mode Set */
342 gpio_i2c_write(nvp6158_iic_addr[vin_auto_det->devnum], 0x01, ((vin_auto_det->stable_mode_2) & 0x3));
343 /* B13 0x40 VFC_EQ_BAND_SEL[7:4] VFC_LPF_F_SEL[1:0] */
344 gpio_i2c_write(nvp6158_iic_addr[vin_auto_det->devnum], 0x40, 0x07);
345 /* B13 0x41 VFC_REF_VTG */
346 gpio_i2c_write(nvp6158_iic_addr[vin_auto_det->devnum], 0x41, 0x01);
347 /* B13 0x42 VFC_D_CMP_SET */
348 gpio_i2c_write(nvp6158_iic_addr[vin_auto_det->devnum], 0x42, 0x3F);
349 /* B13 0x43 VFC_SLICE_VALUE */
350 gpio_i2c_write(nvp6158_iic_addr[vin_auto_det->devnum], 0x43, 0x5A);
351 /* B13 0x44 VFC_SLICE_MD2 */
352 gpio_i2c_write(nvp6158_iic_addr[vin_auto_det->devnum], 0x44, 0x30);
353 /* B13 0x45 VFC_CONTROL_MODES */
354 gpio_i2c_write(nvp6158_iic_addr[vin_auto_det->devnum], 0x45, 0xEE);
355 /* B13 0x46 VFC_GDF_FIX_COEFF */
356 gpio_i2c_write(nvp6158_iic_addr[vin_auto_det->devnum], 0x46, 0xC6);
357 /* B13 0x47 VFC_DFE_REF_SEL_OLD[4] VFC_DFE_REF_SEL_NEW[0] */
358 gpio_i2c_write(nvp6158_iic_addr[vin_auto_det->devnum], 0x47, 0x00);
359 /* B13 0x48 VFC_D_BLK_CNT_NEW[[7:4] VFC_HAFC_BYPASS_NEW[1] VFC_UPDN_SEL[0] */
360 gpio_i2c_write(nvp6158_iic_addr[vin_auto_det->devnum], 0x48, 0x80);
361 /* B13 0x49 VFC_OLD_WPD_ON[4] VFC_NEW_WPD_ON[0] */
362 gpio_i2c_write(nvp6158_iic_addr[vin_auto_det->devnum], 0x49, 0x00);
363 /* B13 0x4A VFC_D_CMP_FZ_OLD[4] VFC_D_CMP_FZ_NEW[1] */
364 gpio_i2c_write(nvp6158_iic_addr[vin_auto_det->devnum], 0x4A, 0x11);
365 /* B13 0x4B VFC_AUTO_GNOS_MODE */
366 gpio_i2c_write(nvp6158_iic_addr[vin_auto_det->devnum], 0x4B, 0x7F);
367 /* B13 0x4C VFC_AUTO_SYNC_MODE */
368 gpio_i2c_write(nvp6158_iic_addr[vin_auto_det->devnum], 0x4C, 0x00);
369 /* B13 0x4D VFC_HAFC_BYPASS[7] ??? [6:0] */
370 gpio_i2c_write(nvp6158_iic_addr[vin_auto_det->devnum], 0x4D, 0xB9);
371 /* B13 0x4E VFC_VAFE_B_LPF_SEL[6:4] VFC_VAFE_CKSEL[3] VFC_VAFE_EQ_GAIN_SEL[2:0] */
372 gpio_i2c_write(nvp6158_iic_addr[vin_auto_det->devnum], 0x4E, 0x78);
373 /* B13 0x4F VFC_VAFE_CTRL_RES[7:6] VFC_VAFE_IBS_CTRL[5:4] VFC_VAFE_SPD[2] VFC_VAFE_CLP_LEVEL[1:0] */
374 gpio_i2c_write(nvp6158_iic_addr[vin_auto_det->devnum], 0x4F, 0x62);
375
376 /* B0 0x23/0x27/0x2B/0x2F No Video Detect */
377 gpio_i2c_write(nvp6158_iic_addr[vin_auto_det->devnum], 0xFF, 0x0);
378 gpio_i2c_write(nvp6158_iic_addr[vin_auto_det->devnum], 0x23 + ((vin_auto_det->ch) * 4), vin_auto_det->novid_det);
379
380 /* clock set */
381 gpio_i2c_write(nvp6158_iic_addr[vin_auto_det->devnum], 0xFF, 0x1);
382 gpio_i2c_write(nvp6158_iic_addr[vin_auto_det->devnum], 0x84 + vin_auto_det->ch, 0x00);
383 gpio_i2c_write(nvp6158_iic_addr[vin_auto_det->devnum], 0x8c + vin_auto_det->ch, 0x55);
384
385 }
386
nvp6168_video_input_auto_detect_set(video_input_auto_detect * vin_auto_det)387 void nvp6168_video_input_auto_detect_set(video_input_auto_detect *vin_auto_det)
388 {
389 gpio_i2c_write(nvp6158_iic_addr[vin_auto_det->devnum], 0xFF, 0x13);
390
391 gpio_i2c_write(nvp6158_iic_addr[vin_auto_det->devnum], 0x12, 0x04);
392 gpio_i2c_write(nvp6158_iic_addr[vin_auto_det->devnum], 0x2E, 0x10);
393 gpio_i2c_write(nvp6158_iic_addr[vin_auto_det->devnum], 0x30, 0x7f);
394 gpio_i2c_write(nvp6158_iic_addr[vin_auto_det->devnum], 0x31, 0xff);
395 gpio_i2c_write(nvp6158_iic_addr[vin_auto_det->devnum], 0x32, 0xff);
396 gpio_i2c_write(nvp6158_iic_addr[vin_auto_det->devnum], 0x33, 0xff);
397 gpio_i2c_write(nvp6158_iic_addr[vin_auto_det->devnum], 0x77, 0xff);
398 gpio_i2c_write(nvp6158_iic_addr[vin_auto_det->devnum], 0x3a, 0xff);
399 gpio_i2c_write(nvp6158_iic_addr[vin_auto_det->devnum], 0x3b, 0xff);
400 gpio_i2c_write(nvp6158_iic_addr[vin_auto_det->devnum], 0x3c, 0xff);
401 gpio_i2c_write(nvp6158_iic_addr[vin_auto_det->devnum], 0x3d, 0xff);
402 gpio_i2c_write(nvp6158_iic_addr[vin_auto_det->devnum], 0x3e, 0xff);
403 gpio_i2c_write(nvp6158_iic_addr[vin_auto_det->devnum], 0x3f, 0xff);
404 gpio_i2c_write(nvp6158_iic_addr[vin_auto_det->devnum], 0x70, 0xf0);
405 gpio_i2c_write(nvp6158_iic_addr[vin_auto_det->devnum], 0x72, 0x05);
406 gpio_i2c_write(nvp6158_iic_addr[vin_auto_det->devnum], 0x7A, 0x10);
407 gpio_i2c_write(nvp6158_iic_addr[vin_auto_det->devnum], 0x61, 0x0A);
408 gpio_i2c_write(nvp6158_iic_addr[vin_auto_det->devnum], 0x62, 0x02);
409 gpio_i2c_write(nvp6158_iic_addr[vin_auto_det->devnum], 0x60, 0x01);
410 gpio_i2c_write(nvp6158_iic_addr[vin_auto_det->devnum], 0x60, 0x00);
411 gpio_i2c_write(nvp6158_iic_addr[vin_auto_det->devnum], 0x07, 0x47);
412 gpio_i2c_write(nvp6158_iic_addr[vin_auto_det->devnum], 0x59, 0x24);
413
414 gpio_i2c_write(nvp6158_iic_addr[vin_auto_det->devnum], 0x01, 0x0c);
415 gpio_i2c_write(nvp6158_iic_addr[vin_auto_det->devnum], 0x2f, 0xc8);
416
417 gpio_i2c_write(nvp6158_iic_addr[vin_auto_det->devnum], 0x73, 0x23);
418
419 gpio_i2c_write(nvp6158_iic_addr[vin_auto_det->devnum], 0xff, 0x09);
420 gpio_i2c_write(nvp6158_iic_addr[vin_auto_det->devnum], 0x96, 0x03);
421 gpio_i2c_write(nvp6158_iic_addr[vin_auto_det->devnum], 0xB6, 0x03);
422 gpio_i2c_write(nvp6158_iic_addr[vin_auto_det->devnum], 0xD6, 0x03);
423 gpio_i2c_write(nvp6158_iic_addr[vin_auto_det->devnum], 0xF6, 0x03);
424 }
425
video_input_vfc_read(video_input_vfc * vin_vfc)426 void video_input_vfc_read(video_input_vfc *vin_vfc)
427 {
428 gpio_i2c_write(nvp6158_iic_addr[vin_vfc->devnum], 0xFF, 0x13);
429 vin_vfc->vfc = gpio_i2c_read(nvp6158_iic_addr[vin_vfc->devnum], 0xF0 + vin_vfc->ch);
430 }
431
nvp6168_video_input_vfc_read(video_input_vfc * vin_vfc)432 void nvp6168_video_input_vfc_read(video_input_vfc *vin_vfc)
433 {
434 gpio_i2c_write(nvp6158_iic_addr[vin_vfc->devnum], 0xFF, 0x05 + vin_vfc->ch);
435 vin_vfc->vfc = gpio_i2c_read(nvp6158_iic_addr[vin_vfc->devnum], 0xF0);
436 }
437
video_input_novid_read(video_input_novid * vin_novid)438 void video_input_novid_read(video_input_novid *vin_novid)
439 {
440 unsigned char val_0xA8;
441
442 gpio_i2c_write(nvp6158_iic_addr[vin_novid->devnum], 0xFF, 0x00);
443 val_0xA8 = gpio_i2c_read(nvp6158_iic_addr[vin_novid->devnum], 0xA8);
444
445 vin_novid->novid = (((val_0xA8 >> vin_novid->ch) & 0x1)) ;
446 }
447
448
video_input_no_video_set(video_input_novid * auto_novid)449 void video_input_no_video_set(video_input_novid *auto_novid)
450 {
451 unsigned char val_13x30;
452 unsigned char val_13x31;
453 unsigned char val_13x32;
454 unsigned char val_9x44;
455 unsigned char val_1x7A;
456
457 gpio_i2c_write(nvp6158_iic_addr[auto_novid->devnum], 0xFF, 0x00);
458 gpio_i2c_write(nvp6158_iic_addr[auto_novid->devnum], 0x21 + (auto_novid->ch * 4), 0x82);
459 gpio_i2c_write(nvp6158_iic_addr[auto_novid->devnum], 0x23 + (auto_novid->ch * 4), 0x41);
460
461 gpio_i2c_write(nvp6158_iic_addr[auto_novid->devnum], 0xFF, 0x09);
462 gpio_i2c_write(nvp6158_iic_addr[auto_novid->devnum], 0x80 + (auto_novid->ch * 0x20), 0x00);
463 gpio_i2c_write(nvp6158_iic_addr[auto_novid->devnum], 0x81 + (auto_novid->ch * 0x20), 0x00);
464
465 gpio_i2c_write(nvp6158_iic_addr[auto_novid->devnum], 0xFF, 0x0A+auto_novid->ch/2);
466 gpio_i2c_write(nvp6158_iic_addr[auto_novid->devnum], 0x3D + ((auto_novid->ch%2) * 0x80), 0x00);
467 gpio_i2c_write(nvp6158_iic_addr[auto_novid->devnum], 0x3C + ((auto_novid->ch%2) * 0x80), 0x00);
468
469 gpio_i2c_write(nvp6158_iic_addr[auto_novid->devnum], 0xFF, 0x05 + auto_novid->ch);
470 gpio_i2c_write(nvp6158_iic_addr[auto_novid->devnum], 0x2C, 0x00);
471 gpio_i2c_write(nvp6158_iic_addr[auto_novid->devnum], 0x01, 0x62);
472
473 /* Before 08/28 */
474 /* gpio_i2c_write(nvp6158_iic_addr[auto_novid->devnum], 0x58, 0x07); */
475 /* gpio_i2c_write(nvp6158_iic_addr[auto_novid->devnum], 0x5C, 0x78); */
476 /* After 08/28 */
477 gpio_i2c_write(nvp6158_iic_addr[auto_novid->devnum], 0x47, 0xEE);
478 gpio_i2c_write(nvp6158_iic_addr[auto_novid->devnum], 0x50, 0xc6); /* recovery to std value. */
479 gpio_i2c_write(nvp6158_iic_addr[auto_novid->devnum], 0x58, 0x47);
480 gpio_i2c_write(nvp6158_iic_addr[auto_novid->devnum], 0x5C, 0x7f);
481 gpio_i2c_write(nvp6158_iic_addr[auto_novid->devnum], 0x6E, 0x00); /*VBLK default setting */
482 gpio_i2c_write(nvp6158_iic_addr[auto_novid->devnum], 0x6F, 0x00);
483 /* Low-Poass Filter (LPF) Bypass Enable Bank5/6/7/8 0x59 */
484 gpio_i2c_write(nvp6158_iic_addr[auto_novid->devnum], 0x59, 0x10);
485
486 gpio_i2c_write(nvp6158_iic_addr[auto_novid->devnum], 0xB8, 0xB9);
487 gpio_i2c_write(nvp6158_iic_addr[auto_novid->devnum], 0xB9, 0xB2);
488
489 gpio_i2c_write(nvp6158_iic_addr[auto_novid->devnum], 0xFF, 0x13);
490 gpio_i2c_write(nvp6158_iic_addr[auto_novid->devnum], 0x43, 0x5a);
491
492 val_13x30 = gpio_i2c_read(nvp6158_iic_addr[auto_novid->devnum], 0x30);
493 val_13x31 = gpio_i2c_read(nvp6158_iic_addr[auto_novid->devnum], 0x31);
494 val_13x32 = gpio_i2c_read(nvp6158_iic_addr[auto_novid->devnum], 0x32);
495 val_13x30 |= ((1 << (auto_novid->ch + 4)) | (1 << auto_novid->ch));
496 val_13x31 |= ((1 << (auto_novid->ch + 4)) | (1 << auto_novid->ch));
497 val_13x32 |= ((1 << auto_novid->ch) & 0xF);
498 gpio_i2c_write(nvp6158_iic_addr[auto_novid->devnum], 0x30, val_13x30);
499 gpio_i2c_write(nvp6158_iic_addr[auto_novid->devnum], 0x31, val_13x31);
500 gpio_i2c_write(nvp6158_iic_addr[auto_novid->devnum], 0x32, val_13x32);
501
502 /* disable Bank11 0x00, if before setting format TVI 5M 20P when onvideo */
503 gpio_i2c_write(nvp6158_iic_addr[auto_novid->devnum], 0xFF, 0x11);
504 gpio_i2c_write(nvp6158_iic_addr[auto_novid->devnum], 0x00 + (auto_novid->ch * 0x20), 0x00);
505
506 gpio_i2c_write(nvp6158_iic_addr[auto_novid->devnum], 0xFF, 0x09);
507 val_9x44 = gpio_i2c_read(nvp6158_iic_addr[auto_novid->devnum], 0x44);
508 val_9x44 |= (1 << auto_novid->ch);
509 gpio_i2c_write(nvp6158_iic_addr[auto_novid->devnum], 0x50 + (auto_novid->ch*4), 0x30);
510 gpio_i2c_write(nvp6158_iic_addr[auto_novid->devnum], 0x51 + (auto_novid->ch*4), 0x6F);
511 gpio_i2c_write(nvp6158_iic_addr[auto_novid->devnum], 0x52 + (auto_novid->ch*4), 0x67);
512 gpio_i2c_write(nvp6158_iic_addr[auto_novid->devnum], 0x53 + (auto_novid->ch*4), 0x48);
513 gpio_i2c_write(nvp6158_iic_addr[auto_novid->devnum], 0x44, val_9x44);
514
515 gpio_i2c_write(nvp6158_iic_addr[auto_novid->devnum], 0xFF, 0x00);
516 gpio_i2c_write(nvp6158_iic_addr[auto_novid->devnum], 0x81+auto_novid->ch, 0x0A);
517 gpio_i2c_write(nvp6158_iic_addr[auto_novid->devnum], 0x85+auto_novid->ch, 0x02);
518 /* clock set */
519 gpio_i2c_write(nvp6158_iic_addr[auto_novid->devnum], 0xFF, 0x01);
520 gpio_i2c_write(nvp6158_iic_addr[auto_novid->devnum], 0x84 + auto_novid->ch, 0x00);
521 gpio_i2c_write(nvp6158_iic_addr[auto_novid->devnum], 0x8c + auto_novid->ch, 0x55);
522 val_1x7A = gpio_i2c_read(nvp6158_iic_addr[auto_novid->devnum], 0x7A);
523 val_1x7A |= (1 << auto_novid->ch);
524 gpio_i2c_write(nvp6158_iic_addr[auto_novid->devnum], 0x7A, val_1x7A);
525 }
526
nvp6168_video_input_no_video_set(video_input_novid * auto_novid)527 void nvp6168_video_input_no_video_set(video_input_novid *auto_novid)
528 {
529 gpio_i2c_write(nvp6158_iic_addr[auto_novid->devnum], 0xFF, 0x00);
530 gpio_i2c_write(nvp6158_iic_addr[auto_novid->devnum], 0x21 + (auto_novid->ch * 4), 0x82);
531 gpio_i2c_write(nvp6158_iic_addr[auto_novid->devnum], 0x23 + (auto_novid->ch * 4), 0x41);
532
533 gpio_i2c_write(nvp6158_iic_addr[auto_novid->devnum], 0xFF, 0x09);
534 gpio_i2c_write(nvp6158_iic_addr[auto_novid->devnum], 0x80 + (auto_novid->ch * 0x20), 0x00);
535 gpio_i2c_write(nvp6158_iic_addr[auto_novid->devnum], 0x81 + (auto_novid->ch * 0x20), 0x00);
536
537 gpio_i2c_write(nvp6158_iic_addr[auto_novid->devnum], 0xff, (auto_novid->ch < 2 ? 0x0a : 0x0b));
538 gpio_i2c_write(nvp6158_iic_addr[auto_novid->devnum], 0x3d + (auto_novid->ch%2 * 0x80), 0x00);
539 gpio_i2c_write(nvp6158_iic_addr[auto_novid->devnum], 0x3c + (auto_novid->ch%2 * 0x80), 0x00);
540
541 gpio_i2c_write(nvp6158_iic_addr[auto_novid->devnum], 0xFF, 0x05 + auto_novid->ch);
542 gpio_i2c_write(nvp6158_iic_addr[auto_novid->devnum], 0x01, 0x62);
543 gpio_i2c_write(nvp6158_iic_addr[auto_novid->devnum], 0x2C, 0x00);
544 gpio_i2c_write(nvp6158_iic_addr[auto_novid->devnum], 0x50, 0xc6);
545 gpio_i2c_write(nvp6158_iic_addr[auto_novid->devnum], 0x58, 0x47);
546 gpio_i2c_write(nvp6158_iic_addr[auto_novid->devnum], 0x59, 0x10);
547 gpio_i2c_write(nvp6158_iic_addr[auto_novid->devnum], 0x5C, 0x7f);
548 gpio_i2c_write(nvp6158_iic_addr[auto_novid->devnum], 0xB8, 0xB8);
549 gpio_i2c_write(nvp6158_iic_addr[auto_novid->devnum], 0xB9, 0x72);
550 gpio_i2c_write(nvp6158_iic_addr[auto_novid->devnum], 0x6E, 0x00); /* VBLK default setting */
551 gpio_i2c_write(nvp6158_iic_addr[auto_novid->devnum], 0x6F, 0x00);
552
553 gpio_i2c_write(nvp6158_iic_addr[auto_novid->devnum], 0xFF, 0x11);
554 gpio_i2c_write(nvp6158_iic_addr[auto_novid->devnum], 0x00 + (auto_novid->ch * 0x20), 0x00);
555 }
556
video_input_cable_dist_read(video_input_cable_dist * vin_cable_dist)557 void video_input_cable_dist_read(video_input_cable_dist *vin_cable_dist)
558 {
559 gpio_i2c_write(nvp6158_iic_addr[vin_cable_dist->devnum], 0xFF, 0x13);
560
561 /* B13 0xA0 [3:0] Cable Distance Value */
562 vin_cable_dist->dist = gpio_i2c_read(nvp6158_iic_addr[vin_cable_dist->devnum], 0xA0 + vin_cable_dist->ch) & 0xF;
563 }
564
565
566
video_input_sam_val_read(video_input_sam_val * vin_sam_val)567 void video_input_sam_val_read(video_input_sam_val *vin_sam_val)
568 {
569 unsigned char val1, val2;
570
571 /* Channel Change Sequence */
572 gpio_i2c_write(nvp6158_iic_addr[vin_sam_val->devnum], 0xFF, 0x13);
573 gpio_i2c_write(nvp6158_iic_addr[vin_sam_val->devnum], 0x2B, vin_sam_val->ch);
574
575 gpio_i2c_write(nvp6158_iic_addr[vin_sam_val->devnum], 0xFF, 0x13); /* + vin_sam_val->ch); */
576 /*B13 0xC9 [7:0] SAM Value */
577 val1 = gpio_i2c_read(nvp6158_iic_addr[vin_sam_val->devnum], 0xC9) ;
578 /*B13 0xC8 [9:8] SAM Value */
579 val2 = gpio_i2c_read(nvp6158_iic_addr[vin_sam_val->devnum], 0xC8) & 0x3;
580
581 vin_sam_val->sam_val = ((val2 << 8) | val1);
582 }
583
video_input_hsync_accum_read(video_input_hsync_accum * vin_hsync_accum)584 void video_input_hsync_accum_read(video_input_hsync_accum *vin_hsync_accum)
585 {
586 unsigned char val01, val02, val03, val04;
587 unsigned char val11, val12, val13, val14;
588
589 unsigned char h_lock;
590 unsigned int val_1;
591 unsigned int val_2;
592 unsigned int val_result;
593
594 gpio_i2c_write(nvp6158_iic_addr[vin_hsync_accum->devnum], 0xFF, 0x00);
595 h_lock = (gpio_i2c_read(nvp6158_iic_addr[vin_hsync_accum->devnum], 0xE2) >> vin_hsync_accum->ch) & 0x1;
596
597 vin_hsync_accum->h_lock = h_lock;
598
599 gpio_i2c_write(nvp6158_iic_addr[vin_hsync_accum->devnum], 0xFF, 0x13);
600 gpio_i2c_write(nvp6158_iic_addr[vin_hsync_accum->devnum], 0x2B, vin_hsync_accum->ch);
601
602
603 gpio_i2c_write(nvp6158_iic_addr[vin_hsync_accum->devnum], 0xFF, 0x13); /* + vin_sam_val->ch */
604
605 /* B13 0xB4 [ 7:0] Hsync Accumulation Value */
606 val01 = gpio_i2c_read(nvp6158_iic_addr[vin_hsync_accum->devnum], 0xD0);/* 170214 0xB4 -> 0xD0 Fix */
607 /* B13 0xB5 [15:8] Hsync Accumulation Value */
608 val02 = gpio_i2c_read(nvp6158_iic_addr[vin_hsync_accum->devnum], 0xD1);/* 170214 0xB5 -> 0xD1 Fix */
609 /* B13 0xB6 [23:16] Hsync Accumulation Value */
610 val03 = gpio_i2c_read(nvp6158_iic_addr[vin_hsync_accum->devnum], 0xD2);/* 170214 0xB6 -> 0xD2 Fix */
611 /* B13 0xB7 [31:24] Hsync Accumulation Value */
612 val04 = gpio_i2c_read(nvp6158_iic_addr[vin_hsync_accum->devnum], 0xD3);/* 170214 0xB7 -> 0xD3 Fix */
613
614 /* B13 0xB4 [ 7:0] Hsync Accumulation Value */
615 val11 = gpio_i2c_read(nvp6158_iic_addr[vin_hsync_accum->devnum], 0xD4);/* 170214 0xB8 -> 0xD4 Fix */
616 /* B13 0xB5 [15:8] Hsync Accumulation Value */
617 val12 = gpio_i2c_read(nvp6158_iic_addr[vin_hsync_accum->devnum], 0xD5);/* 170214 0xB9 -> 0xD5 Fix */
618 /* B13 0xB6 [23:16] Hsync Accumulation Value */
619 val13 = gpio_i2c_read(nvp6158_iic_addr[vin_hsync_accum->devnum], 0xD6);/* 170214 0xBA -> 0xD6 Fix */
620 /* B13 0xB7 [31:24] Hsync Accumulation Value */
621 val14 = gpio_i2c_read(nvp6158_iic_addr[vin_hsync_accum->devnum], 0xD7);/* 170214 0xBB -> 0xD7 Fix */
622
623 val_1 = ((val04 << 24) | (val03 << 16) | (val02 << 8) | val01);
624 val_2 = ((val14 << 24) | (val13 << 16) | (val12 << 8) | val11);
625
626 val_result = val_1 - val_2;
627
628 vin_hsync_accum->hsync_accum_val1 = val_1;
629 vin_hsync_accum->hsync_accum_val2 = val_2;
630 vin_hsync_accum->hsync_accum_result = val_result;
631 }
632
nvp6168_get_eq_read_cnt(unsigned char devnum,unsigned char ch)633 static int nvp6168_get_eq_read_cnt(unsigned char devnum, unsigned char ch)
634 {
635 unsigned char vfc;
636 int ret = 50;
637
638 gpio_i2c_write(nvp6158_iic_addr[devnum], 0xFF, 0x05 + ch);
639 vfc = gpio_i2c_read(nvp6158_iic_addr[devnum], 0xF0);
640
641 switch (vfc) {
642 /* 25fps, 3frame=120ms */
643 case 0x10:
644 case 0x21:
645 case 0x26:
646 case 0x2A:
647 case 0x2C:
648 case 0x31:
649 case 0x34:
650 case 0x36:
651 case 0x41:
652 case 0x51:
653 case 0x55:
654 case 0x58:
655 case 0x61:
656 case 0xA1:
657 case 0xA5:
658 ret = 24;
659 break;
660
661 /* 30fps, 3frame=100ms */
662 case 0x00:
663 case 0x20:
664 case 0x25:
665 case 0x29:
666 case 0x2B:
667 case 0x30:
668 case 0x33:
669 case 0x35:
670 case 0x40:
671 case 0x50:
672 case 0x54:
673 case 0x57:
674 case 0x60:
675 case 0xA0:
676 case 0xA4:
677 ret = 20;
678 break;
679
680 // 50fps, 3frame=60ms */
681 case 0x23:
682 case 0x28:
683 case 0x2E:
684 case 0x39:
685 case 0x3B:
686 case 0xA3:
687 case 0xA7:
688 ret = 12;
689 break;
690
691 /* 60fps, 3frame=50ms */
692 case 0x22:
693 case 0x27:
694 case 0x2D:
695 case 0x38:
696 case 0x3A:
697 case 0xA2:
698 case 0xA6:
699 ret = 10;
700 break;
701
702 // 20fps, 3frame=150ms */
703 case 0x70:
704 case 0x72:
705 case 0x74:
706 ret = 30;
707 break;
708
709 /* 18fps, 3frame=167ms */
710 case 0x42:
711 case 0x44:
712 case 0x90:
713 ret = 34;
714 break;
715
716 /* 15fps, 3frame=200ms */
717 case 0x3C:
718 case 0x52:
719 case 0x59:
720 case 0x80:
721 case 0x83:
722 case 0x85:
723 ret = 40;
724 break;
725
726 /* 12.5fps, 3frame=240ms */
727 case 0x3D:
728 case 0x71:
729 case 0x73:
730 case 0x82:
731 case 0x84:
732 case 0x86:
733 ret = 48;
734 break;
735
736 /* 7.5fps, 3frame=400ms */
737 case 0x81:
738 ret = 80;
739 break;
740
741 default:
742 break;
743 }
744
745 return ret;
746 }
747
nvp6168_video_input_hsync_accum_read(video_input_hsync_accum * vin_hsync_accum)748 void nvp6168_video_input_hsync_accum_read(video_input_hsync_accum *vin_hsync_accum)
749 {
750 unsigned char val01, val02, val03, val04;
751 unsigned char val11, val12, val13, val14;
752
753 unsigned int val_1 = 0;
754 unsigned int val_2 = 0;
755 unsigned int val_result;
756
757 static unsigned int pre_val_1;
758 static unsigned int pre_val_2;
759
760 unsigned char rst_reg = 1<<vin_hsync_accum->ch;
761 unsigned char vfc, video_loss;
762 int read_cnt = 0, total_cnt;
763 video_input_novid s_auto_novid;
764
765 total_cnt = nvp6168_get_eq_read_cnt(vin_hsync_accum->devnum, vin_hsync_accum->ch);
766
767 gpio_i2c_write(nvp6158_iic_addr[vin_hsync_accum->devnum], 0xFF, 0x13);
768 gpio_i2c_write(nvp6158_iic_addr[vin_hsync_accum->devnum], 0x2B, vin_hsync_accum->ch);
769
770 while (read_cnt < total_cnt) {
771 gpio_i2c_write(nvp6158_iic_addr[vin_hsync_accum->devnum], 0xFF, 0x00);
772 video_loss = gpio_i2c_read(nvp6158_iic_addr[vin_hsync_accum->devnum], 0xA8);
773 video_loss = (((video_loss >> vin_hsync_accum->ch) & 0x1)) ;
774
775 gpio_i2c_write(nvp6158_iic_addr[vin_hsync_accum->devnum], 0xFF, 0x05 + vin_hsync_accum->ch);
776 vfc = gpio_i2c_read(nvp6158_iic_addr[vin_hsync_accum->devnum], 0xF0);
777
778 if ((video_loss == 1) && (vfc == 0xFF)) {
779 sensor_dbg("[%s] CH:%d, video_loss:%02X, vfc:0x%X \r\n", __func__, vin_hsync_accum->ch, video_loss, vfc);
780 vin_hsync_accum->hsync_accum_val1 = 0;
781 vin_hsync_accum->hsync_accum_val2 = 0;
782 vin_hsync_accum->hsync_accum_result = 0xffffffff;
783 s_auto_novid.ch = vin_hsync_accum->ch;
784 s_auto_novid.devnum = vin_hsync_accum->devnum;
785 nvp6168_video_input_no_video_set(&s_auto_novid);
786 return;
787 }
788
789 gpio_i2c_write(nvp6158_iic_addr[vin_hsync_accum->devnum], 0xFF, 0x13);
790 /* B13 0xB4 [ 7:0] Hsync Accumulation Value */
791 val01 = gpio_i2c_read(nvp6158_iic_addr[vin_hsync_accum->devnum], 0xD0); /* 170214 0xB4 -> 0xD0 Fix */
792 /* B13 0xB5 [15:8] Hsync Accumulation Value */
793 val02 = gpio_i2c_read(nvp6158_iic_addr[vin_hsync_accum->devnum], 0xD1); /* 170214 0xB5 -> 0xD1 Fix */
794 /* B13 0xB6 [23:16] Hsync Accumulation Value */
795 val03 = gpio_i2c_read(nvp6158_iic_addr[vin_hsync_accum->devnum], 0xD2); /* 170214 0xB6 -> 0xD2 Fix */
796 /* B13 0xB7 [31:24] Hsync Accumulation Value */
797 val04 = gpio_i2c_read(nvp6158_iic_addr[vin_hsync_accum->devnum], 0xD3); /* 170214 0xB7 -> 0xD3 Fix */
798
799 /* B13 0xB4 [ 7:0] Hsync Accumulation Value */
800 val11 = gpio_i2c_read(nvp6158_iic_addr[vin_hsync_accum->devnum], 0xD4); /* 170214 0xB8 -> 0xD4 Fix */
801 /* B13 0xB5 [15:8] Hsync Accumulation Value */
802 val12 = gpio_i2c_read(nvp6158_iic_addr[vin_hsync_accum->devnum], 0xD5); /* 170214 0xB9 -> 0xD5 Fix */
803 /* B13 0xB6 [23:16] Hsync Accumulation Value */
804 val13 = gpio_i2c_read(nvp6158_iic_addr[vin_hsync_accum->devnum], 0xD6); /* 170214 0xBA -> 0xD6 Fix */
805 /* B13 0xB7 [31:24] Hsync Accumulation Value */
806 val14 = gpio_i2c_read(nvp6158_iic_addr[vin_hsync_accum->devnum], 0xD7); /* 170214 0xBB -> 0xD7 Fix */
807
808 val_1 = ((val04 << 24) | (val03 << 16) | (val02 << 8) | val01);
809 val_2 = ((val14 << 24) | (val13 << 16) | (val12 << 8) | val11);
810
811 /* sensor_dbg("[%s] CH:%d, video_loss:%02X, vfc:0x%X val1:%08X / val2:%08X \r\n", __func__, vin_hsync_accum->ch, video_loss, vfc, val_1, val_2); */
812
813 if ((val_1 != 0) && (val_2 != 0)) {
814 if ((pre_val_1 != val_1) || (pre_val_2 != val_2)) {
815 gpio_i2c_write(nvp6158_iic_addr[vin_hsync_accum->devnum], 0x7A, rst_reg);
816 gpio_i2c_write(nvp6158_iic_addr[vin_hsync_accum->devnum], 0x7A, 0x10);
817 pre_val_1 = val_1;
818 pre_val_2 = val_2;
819 break;
820 }
821 }
822 msleep(10);
823 read_cnt++;
824 }
825 val_result = val_1 - val_2;
826
827 vin_hsync_accum->hsync_accum_val1 = val_1;
828 vin_hsync_accum->hsync_accum_val2 = val_2;
829 vin_hsync_accum->hsync_accum_result = val_result;
830 }
831
video_input_agc_val_read(video_input_agc_val * vin_agc_val)832 void video_input_agc_val_read(video_input_agc_val *vin_agc_val)
833 {
834 unsigned char agc_lock;
835
836 gpio_i2c_write(nvp6158_iic_addr[vin_agc_val->devnum], 0xFF, 0x00);
837 agc_lock = (gpio_i2c_read(nvp6158_iic_addr[vin_agc_val->devnum], 0xE0) >> vin_agc_val->ch) & 0x1;
838
839 vin_agc_val->agc_lock = agc_lock;
840
841 gpio_i2c_write(nvp6158_iic_addr[vin_agc_val->devnum], 0xFF, 0x13);
842 gpio_i2c_write(nvp6158_iic_addr[vin_agc_val->devnum], 0x2B, vin_agc_val->ch);
843
844 gpio_i2c_write(nvp6158_iic_addr[vin_agc_val->devnum], 0xFF, 0x13); /* + vin_sam_val->ch); */
845
846 /* B13 0xB8 [ 7:0] Hsync Accumulation Value */
847 vin_agc_val->agc_val = gpio_i2c_read(nvp6158_iic_addr[vin_agc_val->devnum], 0xC4); /* 170213 0xA9 -> 0xC5 // 170310 0xC5 -> 0xC4 */
848 }
849
video_input_fsc_val_read(video_input_fsc_val * vin_fsc_val)850 void video_input_fsc_val_read(video_input_fsc_val *vin_fsc_val)
851 {
852 unsigned char val01, val02, val03, val04;
853 unsigned char val11, val12, val13, val14;
854 unsigned char val21, val22, val23, val24;
855
856 unsigned int val_1, val_2, val_final;
857
858 /* Channel Change Sequence */
859 gpio_i2c_write(nvp6158_iic_addr[vin_fsc_val->devnum], 0xFF, 0x13);
860 gpio_i2c_write(nvp6158_iic_addr[vin_fsc_val->devnum], 0x2B, vin_fsc_val->ch);
861
862 gpio_i2c_write(nvp6158_iic_addr[vin_fsc_val->devnum], 0xFF, 0x13);
863
864 /* B13 0xB4 [ 7:0] r_fsc_line_diff_sts */
865 val01 = gpio_i2c_read(nvp6158_iic_addr[vin_fsc_val->devnum], 0xB4);
866 /* B13 0xB5 [15:8] r_fsc_line_diff_sts */
867 val02 = gpio_i2c_read(nvp6158_iic_addr[vin_fsc_val->devnum], 0xB5);
868 /* B13 0xB6 [23:16] r_fsc_line_diff_sts */
869 val03 = gpio_i2c_read(nvp6158_iic_addr[vin_fsc_val->devnum], 0xB6);
870 /* B13 0xB7 [31:24] r_fsc_line_diff_sts */
871 val04 = gpio_i2c_read(nvp6158_iic_addr[vin_fsc_val->devnum], 0xB7);
872
873 /* B13 0xB4 [ 7:0] r_fsc_line2_diff_sts */
874 val11 = gpio_i2c_read(nvp6158_iic_addr[vin_fsc_val->devnum], 0xB8);
875 /* B13 0xB5 [15:8] r_fsc_line2_diff_sts */
876 val12 = gpio_i2c_read(nvp6158_iic_addr[vin_fsc_val->devnum], 0xB9);
877 /* B13 0xB6 [23:16] r_fsc_line2_diff_sts */
878 val13 = gpio_i2c_read(nvp6158_iic_addr[vin_fsc_val->devnum], 0xBA);
879 /* B13 0xB7 [31:24] r_fsc_line2_diff_sts */
880 val14 = gpio_i2c_read(nvp6158_iic_addr[vin_fsc_val->devnum], 0xBB);
881
882 /* B13 0xB4 [ 7:0] r_fsc_line_diff_final */
883 val21 = gpio_i2c_read(nvp6158_iic_addr[vin_fsc_val->devnum], 0xBC);
884 /* B13 0xB5 [15:8] r_fsc_line_diff_final */
885 val22 = gpio_i2c_read(nvp6158_iic_addr[vin_fsc_val->devnum], 0xBD);
886 /* B13 0xB6 [23:16] r_fsc_line_diff_final */
887 val23 = gpio_i2c_read(nvp6158_iic_addr[vin_fsc_val->devnum], 0xBE);
888 /* B13 0xB7 [31:24] r_fsc_line_diff_final */
889 val24 = gpio_i2c_read(nvp6158_iic_addr[vin_fsc_val->devnum], 0xBF);
890
891
892 val_1 = ((val04 << 24) | (val03 << 16) | (val02 << 8) | val01);
893 val_2 = ((val14 << 24) | (val13 << 16) | (val12 << 8) | val11);
894 val_final = ((val24 << 24) | (val23 << 16) | (val22 << 8) | val21);
895
896 vin_fsc_val->fsc_val1 = val_1;
897 vin_fsc_val->fsc_val2 = val_2;
898 vin_fsc_val->fsc_final = val_final;
899 }
900
901 /* 170420 RAPTOR3 DR2 DEMO ONLY */
video_input_aeq_val_set(video_input_aeq_set * vin_aeq_val)902 void video_input_aeq_val_set(video_input_aeq_set *vin_aeq_val) /* 170214 aeq value set */
903 {
904 /*
905 if (vin_aeq_val->aeq_val == 0x00)
906 {
907 gpio_i2c_write(nvp6158_iic_addr[chip_num], 0xFF, 0x05 + vin_aeq_val->ch);
908
909 gpio_i2c_write(nvp6158_iic_addr[chip_num], 0x58, 0x03);
910 gpio_i2c_write(nvp6158_iic_addr[chip_num], 0x59, 0x00);
911 }
912
913 else if (vin_aeq_val->aeq_val == 0x02)
914 {
915 gpio_i2c_write(nvp6158_iic_addr[chip_num], 0xFF, 0x05 + vin_aeq_val->ch);
916
917 gpio_i2c_write(nvp6158_iic_addr[chip_num], 0x58, 0xD3);
918 gpio_i2c_write(nvp6158_iic_addr[chip_num], 0x59, 0x11);
919 }
920 */
921 }
922
923 /* 170420 RAPTOR3 DR2 DEMO ONLY */
video_input_deq_val_set(video_input_deq_set * vin_deq_val)924 void video_input_deq_val_set(video_input_deq_set *vin_deq_val) /* 170214 deq value set */
925 {
926 /*
927 // B9 0x80/0xA0/0xC0/0xE0 [3:0]
928 // if (vin_deq_val->deq_val == 0x00)
929 // {
930 // gpio_i2c_write(nvp6158_iic_addr[chip_num], 0xFF, 0x09);
931 //
932 // gpio_i2c_write(nvp6158_iic_addr[chip_num], 0x80 + ((vin_deq_val->ch)*0x20), 0x00);
933 // gpio_i2c_write(nvp6158_iic_addr[chip_num], 0x84 + ((vin_deq_val->ch)*0x20), 0x21);
934 // gpio_i2c_write(nvp6158_iic_addr[chip_num], 0x85 + ((vin_deq_val->ch)*0x20), 0x60);
935 // gpio_i2c_write(nvp6158_iic_addr[chip_num], 0x86 + ((vin_deq_val->ch)*0x20), 0xF6);
936 // gpio_i2c_write(nvp6158_iic_addr[chip_num], 0x87 + ((vin_deq_val->ch)*0x20), 0x20);
937 // gpio_i2c_write(nvp6158_iic_addr[chip_num], 0x88 + ((vin_deq_val->ch)*0x20), 0x00);
938 // gpio_i2c_write(nvp6158_iic_addr[chip_num], 0x89 + ((vin_deq_val->ch)*0x20), 0xDC);
939 // gpio_i2c_write(nvp6158_iic_addr[chip_num], 0x8a + ((vin_deq_val->ch)*0x20), 0x02);
940 //
941 // gpio_i2c_write(nvp6158_iic_addr[chip_num], 0xFF, 0x00);
942 // gpio_i2c_write(nvp6158_iic_addr[chip_num], 0x30, 0x18);
943 // gpio_i2c_write(nvp6158_iic_addr[chip_num], 0x3C, 0x90);
944 // }
945 // else if (vin_deq_val->deq_val == 0x02)
946 // {
947 // gpio_i2c_write(nvp6158_iic_addr[chip_num], 0xFF, 0x09);
948 //
949 // gpio_i2c_write(nvp6158_iic_addr[chip_num], 0x80 + ((vin_deq_val->ch)*0x20), 0xA7);
950 // gpio_i2c_write(nvp6158_iic_addr[chip_num], 0x84 + ((vin_deq_val->ch)*0x20), 0x21);
951 // gpio_i2c_write(nvp6158_iic_addr[chip_num], 0x85 + ((vin_deq_val->ch)*0x20), 0x60);
952 // gpio_i2c_write(nvp6158_iic_addr[chip_num], 0x86 + ((vin_deq_val->ch)*0x20), 0xF6);
953 // gpio_i2c_write(nvp6158_iic_addr[chip_num], 0x87 + ((vin_deq_val->ch)*0x20), 0x20);
954 // gpio_i2c_write(nvp6158_iic_addr[chip_num], 0x88 + ((vin_deq_val->ch)*0x20), 0x00);
955 // gpio_i2c_write(nvp6158_iic_addr[chip_num], 0x89 + ((vin_deq_val->ch)*0x20), 0xDC);
956 // gpio_i2c_write(nvp6158_iic_addr[chip_num], 0x8a + ((vin_deq_val->ch)*0x20), 0x02);
957 //
958 // gpio_i2c_write(nvp6158_iic_addr[chip_num], 0xFF, 0x00);
959 // gpio_i2c_write(nvp6158_iic_addr[chip_num], 0x30, 0x16);
960 // }
961
962 // val = gpio_i2c_read(nvp6158_iic_addr[chip_num], 0x80 + ((vin_deq_val->ch)*0x20));
963 // val = (vin_deq_val->deq_val & 0xF) | val;
964 //
965 // gpio_i2c_write(nvp6158_iic_addr[chip_num], 0x80 + ((vin_deq_val->ch)*0x20), val);
966 */
967 }
968
video_input_acc_gain_val_read(video_input_acc_gain_val * vin_acc_gain)969 void video_input_acc_gain_val_read(video_input_acc_gain_val *vin_acc_gain) // 170215 acc gain read
970 {
971 unsigned char val1, val2;
972
973 if (vin_acc_gain->func_sel == ACC_GAIN_NORMAL) {
974
975 gpio_i2c_write(nvp6158_iic_addr[vin_acc_gain->devnum], 0xFF, 0x05 + vin_acc_gain->ch);
976
977 val1 = gpio_i2c_read(nvp6158_iic_addr[vin_acc_gain->devnum], 0xE2) & 0x7; /* B5 0xE2 acc gain [10:8] */
978 val2 = gpio_i2c_read(nvp6158_iic_addr[vin_acc_gain->devnum], 0xE3); /* B5 0xE3 acc gain [7:0] */
979 } else if (vin_acc_gain->func_sel == ACC_GAIN_DEBUG) { /* DEBUG */
980 gpio_i2c_write(nvp6158_iic_addr[vin_acc_gain->devnum], 0xFF, 0x00);
981 val1 = 0;
982 val2 = gpio_i2c_read(nvp6158_iic_addr[vin_acc_gain->devnum], 0xD8 + vin_acc_gain->ch); /* B13 0xC6 acc gain [9:8] */
983 } else {
984 gpio_i2c_write(nvp6158_iic_addr[vin_acc_gain->devnum], 0xFF, 0x05);
985
986 val1 = gpio_i2c_read(nvp6158_iic_addr[vin_acc_gain->devnum], 0xE2) & 0x7; /* B5 0xE2 acc gain [10:8] */
987 val2 = gpio_i2c_read(nvp6158_iic_addr[vin_acc_gain->devnum], 0xE3); /* B5 0xE3 acc gain [7:0] */
988 }
989
990 vin_acc_gain->acc_gain_val = val1 << 8 | val2;
991 }
992
video_output_data_out_mode_set(video_output_data_out_mode * vo_data_out_mode)993 void video_output_data_out_mode_set(video_output_data_out_mode *vo_data_out_mode)
994 {
995 unsigned char temp_val = 0x0;
996
997 /* Show/Hide mode is using register Bank 0 0x7A, 7B */
998 /* CH2 CH1 CH4 CH3 */
999 /* 0x7A [7 : 4][3 : 0] 0x7B [7 : 4][3 : 0] */
1000 gpio_i2c_write(nvp6158_iic_addr[vo_data_out_mode->devnum], 0xFF, 0x00);
1001
1002 switch (vo_data_out_mode->ch) {
1003 case CH1:
1004 case CH2:
1005 temp_val = gpio_i2c_read(nvp6158_iic_addr[vo_data_out_mode->devnum], 0x7A);
1006 break;
1007 case CH3:
1008 case CH4:
1009 temp_val = gpio_i2c_read(nvp6158_iic_addr[vo_data_out_mode->devnum], 0x7B);
1010 break;
1011 }
1012
1013 switch (vo_data_out_mode->ch) {
1014 case CH1:
1015 case CH3:
1016 temp_val = ((temp_val & 0xF0) | (vo_data_out_mode->set_val & 0xF));
1017 break;
1018 case CH2:
1019 case CH4:
1020 temp_val = ((temp_val & 0x0F) | ((vo_data_out_mode->set_val & 0xF) << 4));
1021 break;
1022 }
1023
1024 /* sensor_dbg("[%s:%s] : %s >>>> temp_val [ %x ]\n", __FILE__, __LINE__, __FUNCTION__,temp_val); */
1025 switch (vo_data_out_mode->ch) {
1026 case CH1:
1027 case CH2:
1028 gpio_i2c_write(nvp6158_iic_addr[vo_data_out_mode->devnum], 0x7A, temp_val);
1029 break;
1030 case CH3:
1031 case CH4:
1032 gpio_i2c_write(nvp6158_iic_addr[vo_data_out_mode->devnum], 0x7B, temp_val);
1033 break;
1034 }
1035 }
1036
1037
__IsOver3MRTVideoFormat(decoder_dev_ch_info_s * decoder_info)1038 unsigned char __IsOver3MRTVideoFormat(decoder_dev_ch_info_s *decoder_info)
1039 {
1040 unsigned char ret = 0;
1041
1042 if ((decoder_info->fmt_def == AHD30_3M_30P) ||
1043 (decoder_info->fmt_def == AHD30_3M_25P) ||
1044 (decoder_info->fmt_def == AHD30_4M_30P) ||
1045 (decoder_info->fmt_def == AHD30_4M_25P) ||
1046 (decoder_info->fmt_def == AHD30_5M_20P) ||
1047 (decoder_info->fmt_def == AHD30_5_3M_20P) ||
1048 (decoder_info->fmt_def == AHD30_6M_18P) ||
1049 (decoder_info->fmt_def == AHD30_6M_20P) ||
1050 (decoder_info->fmt_def == AHD30_8M_12_5P) ||
1051 (decoder_info->fmt_def == AHD30_8M_15P) ||
1052 (decoder_info->fmt_def == TVI_4M_30P) ||
1053 (decoder_info->fmt_def == TVI_4M_25P) ||
1054 (decoder_info->fmt_def == TVI_5M_20P) ||
1055 (decoder_info->fmt_def == TVI_8M_12_5P) ||
1056 (decoder_info->fmt_def == TVI_8M_15P) ||
1057 (decoder_info->fmt_def == CVI_4M_25P) ||
1058 (decoder_info->fmt_def == CVI_4M_30P) ||
1059 (decoder_info->fmt_def == CVI_5M_20P) ||
1060 (decoder_info->fmt_def == CVI_8M_15P) ||
1061 (decoder_info->fmt_def == CVI_8M_12_5P))
1062 ret = 1;
1063
1064 return ret; /* 0:Over 3M RT, 1:other formation */
1065 }
1066
1067 unsigned char s_only_onetime_run[32] = {0, };
video_input_onvideo_set(decoder_dev_ch_info_s * decoder_info)1068 void video_input_onvideo_set(decoder_dev_ch_info_s *decoder_info)
1069 {
1070 unsigned char format_3M_RT;
1071
1072 sensor_dbg("onvideo_set dev_num[%x] ch_num[%x] fmt_def[%d]\n", decoder_info->devnum, decoder_info->ch, decoder_info->fmt_def);
1073
1074
1075
1076 /* after 09/12 */
1077 format_3M_RT = __IsOver3MRTVideoFormat(decoder_info);
1078
1079 if (format_3M_RT) {
1080 /* DECI_FILTER_ON */
1081 gpio_i2c_write(nvp6158_iic_addr[decoder_info->devnum], 0xFF, 0x05 + decoder_info->ch);
1082 gpio_i2c_write(nvp6158_iic_addr[decoder_info->devnum], 0x50, 0x76);
1083 } else {
1084 /* DECI_FILTER_OFF */
1085 gpio_i2c_write(nvp6158_iic_addr[decoder_info->devnum], 0xFF, 0x05 + decoder_info->ch);
1086 gpio_i2c_write(nvp6158_iic_addr[decoder_info->devnum], 0x50, 0xc6);
1087 }
1088
1089
1090 if (decoder_info->fmt_def == CVI_HD_30P ||
1091 decoder_info->fmt_def == CVI_HD_30P_EX ||
1092 decoder_info->fmt_def == AHD20_720P_30P ||
1093 decoder_info->fmt_def == AHD20_720P_30P_EX ||
1094 decoder_info->fmt_def == AHD20_720P_30P_EX_Btype) {
1095 /* meant to remove pre-connection issue. 07.31 */
1096 if (s_only_onetime_run[decoder_info->ch + 4 * decoder_info->devnum] == 0) {
1097 video_input_vafe_reset(decoder_info);
1098 s_only_onetime_run[decoder_info->ch + 4 * decoder_info->devnum] = 1;
1099 }
1100 } else {
1101 if (s_only_onetime_run[decoder_info->ch + 4 * decoder_info->devnum] == 0)
1102 s_only_onetime_run[decoder_info->ch + 4 * decoder_info->devnum] = 1;
1103 }
1104
1105 }
1106
nvp6168_video_input_onvideo_set(decoder_dev_ch_info_s * decoder_info)1107 void nvp6168_video_input_onvideo_set(decoder_dev_ch_info_s *decoder_info)
1108 {
1109 /* unsigned char format_3M_RT; */
1110 unsigned char ch = decoder_info->ch % 4;
1111 unsigned char devnum = decoder_info->devnum;
1112 unsigned char val_9x44;
1113 unsigned char set_done = 0xF0;
1114
1115 sensor_dbg("onvideo_set dev_num[%x] ch_num[%x] fmt_def[%d]", decoder_info->devnum, decoder_info->ch, decoder_info->fmt_def);
1116
1117 gpio_i2c_write(nvp6158_iic_addr[devnum], 0xFF, 0x09);
1118 val_9x44 = gpio_i2c_read(nvp6158_iic_addr[devnum], 0x44);
1119 val_9x44 &= ~(1 << ch);
1120 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x44, val_9x44);
1121
1122 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x50 + (ch*4), 0x30);
1123 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x51 + (ch*4), 0x6F);
1124 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x52 + (ch*4), 0x67);
1125 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x53 + (ch*4), 0x48);
1126
1127 gpio_i2c_write(nvp6158_iic_addr[devnum], 0xFF, 0x11);
1128 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x00 + (ch*0x20), 0x00);
1129
1130 gpio_i2c_write(nvp6158_iic_addr[devnum], 0xFF, 0x13);
1131 set_done |= gpio_i2c_read(nvp6158_iic_addr[devnum], 0x70);
1132 set_done |= (1<<ch);
1133 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x70, set_done);
1134
1135 set_done = gpio_i2c_read(nvp6158_iic_addr[devnum], 0x71);
1136 set_done |= (1<<ch);
1137 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x71, set_done);
1138 }
1139
video_input_onvideo_check_data(video_input_vfc * vin_vfc)1140 void video_input_onvideo_check_data(video_input_vfc *vin_vfc)
1141 {
1142 unsigned char val_5678xF0;
1143 gpio_i2c_write(nvp6158_iic_addr[vin_vfc->devnum], 0xFF, 0x05 + vin_vfc->ch);
1144 val_5678xF0 = gpio_i2c_read(nvp6158_iic_addr[vin_vfc->devnum], 0xF0);
1145 vin_vfc->vfc = val_5678xF0;
1146 }
1147
video_input_auto_ch_sw_rst(decoder_dev_ch_info_s * decoder_info)1148 void video_input_auto_ch_sw_rst(decoder_dev_ch_info_s *decoder_info)
1149 {
1150 unsigned char val_1x97;
1151 /* Software Reset */
1152 gpio_i2c_write(nvp6158_iic_addr[decoder_info->devnum], 0xFF, 0x01);
1153 val_1x97 = gpio_i2c_read(nvp6158_iic_addr[decoder_info->devnum], 0x97);
1154 val_1x97 &= ~(1 << decoder_info->ch);
1155 gpio_i2c_write(nvp6158_iic_addr[decoder_info->devnum], 0x97, val_1x97);
1156 msleep(10);
1157 val_1x97 = gpio_i2c_read(nvp6158_iic_addr[decoder_info->devnum], 0x97);
1158 val_1x97 |= (1 << decoder_info->ch);
1159 gpio_i2c_write(nvp6158_iic_addr[decoder_info->devnum], 0x97, val_1x97);
1160
1161 sensor_dbg("[DRV] Decoder CH[%d] Software Reset done\n", decoder_info->ch);
1162 }
1163
video_input_vafe_reset(decoder_dev_ch_info_s * decoder_info)1164 void video_input_vafe_reset(decoder_dev_ch_info_s *decoder_info)
1165 {
1166 unsigned char val_0x00;
1167 gpio_i2c_write(nvp6158_iic_addr[decoder_info->devnum], 0xFF, 0x00);
1168 val_0x00 = gpio_i2c_read(nvp6158_iic_addr[decoder_info->devnum], 0x00 + decoder_info->ch);
1169 _SET_BIT(val_0x00, 0);
1170 gpio_i2c_write(nvp6158_iic_addr[decoder_info->devnum], 0x00 + decoder_info->ch, val_0x00);
1171 msleep(10);
1172 _CLE_BIT(val_0x00, 0);
1173 gpio_i2c_write(nvp6158_iic_addr[decoder_info->devnum], 0x00 + decoder_info->ch, val_0x00);
1174 sensor_dbg("[DRV] AFE CH:[%d] Reset done\n", decoder_info->ch);
1175 }
1176
video_input_manual_agc_stable_endi(decoder_dev_ch_info_s * decoder_info,int endi)1177 void video_input_manual_agc_stable_endi(decoder_dev_ch_info_s *decoder_info, int endi)
1178 {
1179 gpio_i2c_write(nvp6158_iic_addr[decoder_info->devnum], 0xFF, 0x05+decoder_info->ch);
1180 if (endi == 1) {
1181 gpio_i2c_write(nvp6158_iic_addr[decoder_info->devnum], 0x82, 0xff);
1182 sensor_dbg("[DRV] MANUAL AGC STABLE ENABLE CH:[%d]\n", decoder_info->ch);
1183 } else {
1184 gpio_i2c_write(nvp6158_iic_addr[decoder_info->devnum], 0x82, 0x00);
1185 sensor_dbg("[DRV] MANUAL AGC STABLE ENABLE CH:[%d]\n", decoder_info->ch);
1186 }
1187 }
1188
video_input_vafe_control(decoder_dev_ch_info_s * decoder_info,int cmd)1189 void video_input_vafe_control(decoder_dev_ch_info_s *decoder_info, int cmd)
1190 {
1191 unsigned char val_0x00;
1192
1193 gpio_i2c_write(nvp6158_iic_addr[decoder_info->devnum], 0xFF, 0x00);
1194
1195 if (cmd == 0) {
1196 val_0x00 = gpio_i2c_read(nvp6158_iic_addr[decoder_info->devnum], 0x00 + decoder_info->ch);
1197 _SET_BIT(val_0x00, 0);
1198 gpio_i2c_write(nvp6158_iic_addr[decoder_info->devnum], 0x00 + decoder_info->ch, val_0x00);
1199
1200 sensor_dbg("[DRV] [Ch:%d] AFE Power Down ... \n", decoder_info->ch);
1201
1202 msleep(10);
1203 } else if (cmd == 1) {
1204 val_0x00 = gpio_i2c_read(nvp6158_iic_addr[decoder_info->devnum], 0x00 + decoder_info->ch);
1205 _CLE_BIT(val_0x00, 0);
1206 gpio_i2c_write(nvp6158_iic_addr[decoder_info->devnum], 0x00 + decoder_info->ch, val_0x00);
1207
1208 sensor_dbg("[DRV] [Ch:%d] AFE Power Up ... \n", decoder_info->ch);
1209
1210 msleep(10);
1211 }
1212 }
1213
__s_max_min_exclude_avg_func(unsigned int * input_arry,int cnt)1214 unsigned int __s_max_min_exclude_avg_func(unsigned int *input_arry, int cnt)
1215 {
1216 unsigned int max, min, sum = 0, result = 0;
1217 unsigned int ii;
1218
1219 max = input_arry[0];
1220 min = input_arry[0];
1221
1222 for (ii = 0; ii < cnt; ii++) {
1223 max = max > input_arry[ii] ? max : input_arry[ii];
1224 min = min > input_arry[ii] ? input_arry[ii] : min;
1225
1226 sum += input_arry[ii];
1227 }
1228
1229 result = sum - (max + min);
1230
1231 if (result == 0)
1232 return 0;
1233 else
1234 result /= (cnt - 2);
1235
1236 return result;
1237 }
1238
__s_distinguish_5M_ahd_tvi_func(unsigned int * input_arry,int cnt)1239 unsigned int __s_distinguish_5M_ahd_tvi_func(unsigned int *input_arry, int cnt)
1240 {
1241 unsigned int chk1, chk2;
1242 unsigned int max, max_idx = 0;
1243 unsigned int calc_array[10][10] = { {0, 0}, };
1244 unsigned int need_update = 0;
1245 unsigned int find_idx = 0;
1246 unsigned int ii, ij;
1247 unsigned int inner_idx = 0;
1248
1249 chk1 = input_arry[0];
1250
1251 for (ii = 0; ii < cnt; ii++) {
1252 chk2 = input_arry[ii];
1253
1254 if (chk1 == chk2) {
1255 calc_array[0][inner_idx] += 1;
1256 calc_array[1][inner_idx] = chk1;
1257 } else if (chk1 != chk2) {
1258 for (ij = 0; ij < ii; ij++) {
1259 if (calc_array[1][ij] == chk2) {
1260 find_idx = ij;
1261 calc_array[0][find_idx] += 1;
1262 calc_array[1][find_idx] = chk2;
1263 need_update = 0;
1264 break;
1265 }
1266 need_update = 1;
1267 }
1268
1269 if (need_update) {
1270 inner_idx += 1;
1271 calc_array[0][inner_idx] += 1;
1272 calc_array[1][inner_idx] = chk2;
1273 }
1274 }
1275
1276 chk1 = chk2;
1277 }
1278
1279 max = calc_array[0][0];
1280
1281 for (ii = 0; ii < cnt; ii++) {
1282 if (max < calc_array[0][ii]) {
1283 max_idx = ii;
1284 max = calc_array[0][ii];
1285 }
1286 }
1287
1288
1289 for (ii = 0; ii < cnt; ii++)
1290 sensor_dbg("[DRV] [ idx %d ] [ num %d ] [ val %x ]\n", ii, calc_array[0][ii], calc_array[1][ii]);
1291
1292 sensor_dbg("[DRV] [ max_idx : %d ]\n", max_idx);
1293 sensor_dbg("[DRV] [ inner_idx : %d ]\n", inner_idx);
1294
1295 return calc_array[1][max_idx];
1296 }
1297
1298
video_input_ahd_tvi_distinguish(decoder_dev_ch_info_s * decoder_info)1299 void video_input_ahd_tvi_distinguish(decoder_dev_ch_info_s *decoder_info)
1300 {
1301 unsigned char ch = decoder_info->ch;
1302 unsigned char devnum = decoder_info->devnum;
1303 unsigned char fmtdef = decoder_info->fmt_def;
1304 unsigned char ii;
1305 unsigned int check_point;
1306
1307 unsigned char check_time = 10;
1308
1309
1310 #if 1
1311 unsigned int B5xF5_F4[10];
1312
1313 gpio_i2c_write(nvp6158_iic_addr[devnum], 0xFF, 0x05 + ch);
1314
1315 for (ii = 0; ii < check_time; ii++) {
1316 msleep(100);
1317 B5xF5_F4[ii] = (gpio_i2c_read(nvp6158_iic_addr[devnum], 0xF5) << 8) | gpio_i2c_read(nvp6158_iic_addr[devnum], 0xF4);
1318 sensor_dbg("[DRV] [Ch:%d] %d time B5xF3_F4 : %x \n", ch, ii, B5xF5_F4[ii]);
1319 }
1320
1321 check_point = __s_distinguish_5M_ahd_tvi_func(B5xF5_F4, check_time);
1322
1323 if (fmtdef == AHD30_5M_20P) {
1324 if ((check_point & 0xfff) == 0x7c2) {
1325 decoder_info->fmt_def = TVI_5M_20P;
1326 sensor_dbg("[DRV] [Ch:%d] Get Format : AHD 5M 20P, Change Format : TVI 5M 20P\n", decoder_info->ch);
1327 } else if ((check_point & 0xfff) == 0x7c4) {
1328 decoder_info->fmt_def = CVI_5M_20P;
1329 sensor_dbg("[DRV] [Ch:%d] Get Format : AHD 5M 20P, Change Format : CVI 5M 20P\n", decoder_info->ch);
1330 } else {
1331 sensor_dbg("[DRV] [Ch:%d] Get Format : AHD 5M 20P, Not Change Format\n", decoder_info->ch);
1332 }
1333 } else if (fmtdef == 0x2B) {
1334 if ((check_point & 0xfff) >= 0x673) {
1335 decoder_info->fmt_def = TVI_4M_15P;
1336 sensor_dbg("[DRV] [Ch:%d] Get Format : AHD 4M15P #0P, Change Format : TVI 4M 15P\n", decoder_info->ch);
1337 }
1338 } else
1339 decoder_info->fmt_def = fmtdef;
1340
1341
1342 #else
1343 unsigned int B5xE8_E9[10] = {0,};
1344 unsigned int B5xEA_EB[10] = {0,};
1345
1346 gpio_i2c_write(nvp6158_iic_addr[devnum], 0xFF, 0x05 + ch);
1347
1348
1349 for (ii = 0; ii < check_time; ii++) {
1350 msleep(10);
1351 B5xE8_E9[ii] = (gpio_i2c_read(nvp6158_iic_addr[devnum], 0xE8) << 8) | gpio_i2c_read(nvp6158_iic_addr[devnum], 0xE9);
1352 B5xEA_EB[ii] = (gpio_i2c_read(nvp6158_iic_addr[devnum], 0xEA) << 8) | gpio_i2c_read(nvp6158_iic_addr[devnum], 0xEB);
1353 sensor_dbg("[DRV] [Ch:%d] %d time 0xE8_0xE9 : %x \n", decoder_info->ch, ii, B5xE8_E9[ii]);
1354 sensor_dbg("[DRV] [Ch:%d] %d time 0xEA_0xEB : %x \n", decoder_info->ch, ii, B5xEA_EB[ii]);
1355 }
1356
1357 check_point1 = __s_max_min_exclude_avg_func(B5xE8_E9, check_time);
1358 check_point2 = __s_max_min_exclude_avg_func(B5xEA_EB, check_time);
1359
1360 sensor_dbg("[DRV] [Ch:%d] AVG 0xE8_0xE9 : %x \n", decoder_info->ch, check_point1);
1361 sensor_dbg("[DRV] [Ch:%d] AVG 0xEA_0xEB : %x \n", decoder_info->ch, check_point2);
1362
1363 if ((check_point1 < 0x30) && (check_point2 < 0x30)) {
1364 if (fmtdef == AHD30_5M_20P) {
1365 decoder_info->fmt_def = TVI_5M_20P;
1366
1367 sensor_dbg("[DRV] [Ch:%d] Get Format : AHD 5M 20P, Change Format : TVI 5M 20P\n", decoder_info->ch);
1368 } else if (fmtdef == AHD30_3M_30P) { /* Not Yet Support , only add item */
1369 decoder_info->fmt_def = TVI_4M_15P;
1370
1371 sensor_dbg("[DRV] [Ch:%d] Get Format : AHD 3M #0P, Change Format : TVI 4M 15P\n", decoder_info->ch);
1372 } else
1373 decoder_info->fmt_def = fmtdef;
1374 } else
1375 decoder_info->fmt_def = fmtdef;
1376 #endif
1377 }
1378
nvp6168_video_input_cvi_tvi_5M20p_distinguish(decoder_dev_ch_info_s * decoder_info)1379 void nvp6168_video_input_cvi_tvi_5M20p_distinguish(decoder_dev_ch_info_s *decoder_info)
1380 {
1381 unsigned char ch = decoder_info->ch;
1382 unsigned char devnum = decoder_info->devnum;
1383 /*unsigned char fmtdef = decoder_info->fmt_def; */
1384 unsigned char ii;
1385 unsigned int check_point;
1386
1387 unsigned char check_time = 10;
1388
1389
1390 unsigned int B5xF5_F4[10];
1391
1392 gpio_i2c_write(nvp6158_iic_addr[devnum], 0xFF, 0x05 + ch);
1393
1394 for (ii = 0; ii < check_time; ii++) {
1395 msleep(100);
1396 B5xF5_F4[ii] = (gpio_i2c_read(nvp6158_iic_addr[devnum], 0xF5) << 8) | gpio_i2c_read(nvp6158_iic_addr[devnum], 0xF4);
1397 sensor_dbg("[DRV] [Ch:%d] %d time B5xF3_F4 : %x \n", ch, ii, B5xF5_F4[ii]);
1398 }
1399
1400 check_point = __s_distinguish_5M_ahd_tvi_func(B5xF5_F4, check_time);
1401
1402 if ((check_point & 0xfff) == 0x7c4) {
1403 decoder_info->fmt_def = CVI_5M_20P;
1404 sensor_dbg("[DRV] [Ch:%d] Get Format : AHD 5M 20P, Change Format : CVI 5M 20P\n", decoder_info->ch);
1405 } else {
1406 decoder_info->fmt_def = TVI_5M_20P;
1407 sensor_dbg("[DRV] [Ch:%d] Get Format : AHD 5M 20P, Change Format : TVI 5M 20P\n", decoder_info->ch);
1408 }
1409
1410 }
1411
1412
__s_distinguish_8M_cvi_tvi_func(unsigned int * input_arry,int cnt)1413 unsigned int __s_distinguish_8M_cvi_tvi_func(unsigned int *input_arry, int cnt)
1414 {
1415 unsigned int chk1, chk2;
1416 unsigned int max, max_idx = 0;
1417 unsigned int calc_array[10][10] = { {0, 0}, };
1418 unsigned int need_update = 0;
1419 unsigned int find_idx = 0;
1420 unsigned int ii, ij;
1421 unsigned int inner_idx = 0;
1422
1423 chk1 = input_arry[0];
1424
1425 for (ii = 0; ii < cnt; ii++) {
1426 chk2 = input_arry[ii];
1427
1428 if (chk1 == chk2) {
1429 calc_array[0][inner_idx] += 1;
1430 calc_array[1][inner_idx] = chk1;
1431 } else if (chk1 != chk2) {
1432 for (ij = 0; ij < ii; ij++) {
1433 if (calc_array[1][ij] == chk2) {
1434 find_idx = ij;
1435 calc_array[0][find_idx] += 1;
1436 calc_array[1][find_idx] = chk2;
1437 need_update = 0;
1438 break;
1439 }
1440 need_update = 1;
1441 }
1442
1443 if (need_update) {
1444 inner_idx += 1;
1445 calc_array[0][inner_idx] += 1;
1446 calc_array[1][inner_idx] = chk2;
1447 }
1448 }
1449
1450 chk1 = chk2;
1451 }
1452
1453 max = calc_array[0][0];
1454
1455 for (ii = 0; ii < cnt; ii++) {
1456 if (max < calc_array[0][ii]) {
1457 max_idx = ii;
1458 max = calc_array[0][ii];
1459 }
1460 }
1461
1462
1463 for (ii = 0; ii < cnt; ii++)
1464 sensor_dbg("[DRV] [ idx %d ] [ num %d ] [ val %x ]\n", ii, calc_array[0][ii], calc_array[1][ii]);
1465
1466 sensor_dbg("[DRV] [ max_idx : %d ]\n", max_idx);
1467 sensor_dbg("[DRV] [ inner_idx : %d ]\n", inner_idx);
1468
1469 return calc_array[1][max_idx];
1470 }
1471
1472
video_input_cvi_tvi_distinguish(decoder_dev_ch_info_s * decoder_info)1473 void video_input_cvi_tvi_distinguish(decoder_dev_ch_info_s *decoder_info)
1474 {
1475 unsigned char ch = decoder_info->ch;
1476 unsigned char devnum = decoder_info->devnum;
1477 unsigned char fmtdef = decoder_info->fmt_def;
1478 unsigned char ii;
1479 unsigned int check_point;
1480
1481 unsigned char check_time = 10;
1482
1483 unsigned int B13xAB[10];
1484
1485 gpio_i2c_write(nvp6158_iic_addr[devnum], 0xFF, 0x13);
1486 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x2B, ch % 4);
1487
1488 for (ii = 0; ii < check_time; ii++) {
1489 msleep(100);
1490 B13xAB[ii] = gpio_i2c_read(nvp6158_iic_addr[devnum], 0xAB);
1491 sensor_dbg("[DRV] [Ch:%d] %d time B13xAB : %x \n", ch, ii, B13xAB[ii]);
1492 }
1493
1494 check_point = __s_distinguish_8M_cvi_tvi_func(B13xAB, check_time);
1495
1496 if (fmtdef == CVI_8M_15P || fmtdef == CVI_8M_12_5P) {
1497 if ((check_point & 0xff) > 0x1A) {
1498 if (fmtdef == CVI_8M_12_5P) {
1499 decoder_info->fmt_def = TVI_8M_12_5P;
1500 sensor_dbg("[DRV] [Ch:%d] Get Format : CVI 8M 12_5P, Change Format : TVI 8M 12_5P\n", decoder_info->ch);
1501 } else {
1502 decoder_info->fmt_def = TVI_8M_15P;
1503 sensor_dbg("[DRV] [Ch:%d] Get Format : CVI 8M 15P, Change Format : TVI 8M 15P\n", decoder_info->ch);
1504 }
1505 } else
1506 sensor_dbg("[DRV] [Ch:%d] Get Format : CVI 8M, Not Change Format\n", decoder_info->ch);
1507 } else
1508 decoder_info->fmt_def = fmtdef;
1509 }
1510
__s_distinguish_ahd_nrt_func(unsigned int * input_arry,int cnt)1511 unsigned int __s_distinguish_ahd_nrt_func(unsigned int *input_arry, int cnt)
1512 {
1513 unsigned int chk1, chk2;
1514 unsigned int max, max_idx = 0;
1515 unsigned int calc_array[10][10] = { {0, 0}, };
1516 unsigned int need_update = 0;
1517 unsigned int find_idx = 0;
1518 unsigned int ii, ij;
1519 unsigned int inner_idx = 0;
1520
1521 chk1 = input_arry[0];
1522
1523 for (ii = 0; ii < cnt; ii++) {
1524 chk2 = input_arry[ii];
1525
1526 if (chk1 == chk2) {
1527 calc_array[0][inner_idx] += 1;
1528 calc_array[1][inner_idx] = chk1;
1529 } else if (chk1 != chk2) {
1530 for (ij = 0; ij < ii; ij++) {
1531 if (calc_array[1][ij] == chk2) {
1532 find_idx = ij;
1533 calc_array[0][find_idx] += 1;
1534 calc_array[1][find_idx] = chk2;
1535 need_update = 0;
1536 break;
1537 }
1538 need_update = 1;
1539 }
1540
1541 if (need_update) {
1542 inner_idx += 1;
1543 calc_array[0][inner_idx] += 1;
1544 calc_array[1][inner_idx] = chk2;
1545 }
1546 }
1547
1548 chk1 = chk2;
1549 }
1550
1551 max = calc_array[0][0];
1552
1553 for (ii = 0; ii < cnt; ii++) {
1554 if (max < calc_array[0][ii]) {
1555 max_idx = ii;
1556 max = calc_array[0][ii];
1557 }
1558 }
1559
1560
1561 for (ii = 0; ii < cnt; ii++)
1562 sensor_dbg("[DRV] [ idx %d ] [ num %d ] [ val %x ]\n", ii, calc_array[0][ii], calc_array[1][ii]);
1563
1564 sensor_dbg("[DRV] [ max_idx : %d ]\n", max_idx);
1565 sensor_dbg("[DRV] [ inner_idx : %d ]\n", inner_idx);
1566
1567 return calc_array[1][max_idx];
1568 }
1569
1570
video_input_ahd_nrt_distinguish(decoder_dev_ch_info_s * decoder_info)1571 void video_input_ahd_nrt_distinguish(decoder_dev_ch_info_s *decoder_info)
1572 {
1573 unsigned char ch = decoder_info->ch;
1574 unsigned char devnum = decoder_info->devnum;
1575 unsigned char ii;
1576 unsigned int check_point;
1577
1578 unsigned char check_time = 10;
1579
1580 unsigned int B5xF3[10];
1581
1582 gpio_i2c_write(nvp6158_iic_addr[devnum], 0xFF, 0x05 + ch);
1583
1584 for (ii = 0; ii < check_time; ii++) {
1585 msleep(30);
1586 B5xF3[ii] = gpio_i2c_read(nvp6158_iic_addr[devnum], 0xF3);
1587 sensor_dbg("[DRV] [Ch:%d] %d time B5xF3 : %x \n", ch, ii, B5xF3[ii]);
1588 }
1589
1590 check_point = __s_distinguish_ahd_nrt_func(B5xF3, check_time);
1591
1592 if ((check_point & 0xff) == 0x14) {
1593 decoder_info->fmt_def = AHD20_1080P_12_5P_EX;
1594 sensor_dbg("[DRV] [Ch:%d] Get Format : AHD 1080P 12.5P\n", decoder_info->ch);
1595 } else if ((check_point & 0xff) == 0x11) {
1596 decoder_info->fmt_def = AHD20_1080P_15P_EX;
1597 sensor_dbg("[DRV] [Ch:%d] Get Format : AHD 1080P 15P\n", decoder_info->ch);
1598 } else {
1599 decoder_info->fmt_def = NC_VIVO_CH_FORMATDEF_UNKNOWN;
1600 sensor_dbg("[DRV] [Ch:%d] Get Format : Unknown Format \n", decoder_info->ch);
1601 }
1602 }
1603
__s_distinguish_2M_cvi_ahd_func(unsigned int * input_arry,int cnt)1604 unsigned int __s_distinguish_2M_cvi_ahd_func(unsigned int *input_arry, int cnt)
1605 {
1606 unsigned int chk1, chk2;
1607 unsigned int max, max_idx = 0;
1608 unsigned int calc_array[10][10] = { {0, 0}, };
1609 unsigned int need_update = 0;
1610 unsigned int find_idx = 0;
1611 unsigned int ii, ij;
1612 unsigned int inner_idx = 0;
1613
1614 chk1 = input_arry[0];
1615
1616 for (ii = 0; ii < cnt; ii++) {
1617 chk2 = input_arry[ii];
1618
1619 if (chk1 == chk2) {
1620 calc_array[0][inner_idx] += 1;
1621 calc_array[1][inner_idx] = chk1;
1622 } else if (chk1 != chk2) {
1623 for (ij = 0; ij < ii; ij++) {
1624 if (calc_array[1][ij] == chk2) {
1625 find_idx = ij;
1626 calc_array[0][find_idx] += 1;
1627 calc_array[1][find_idx] = chk2;
1628 need_update = 0;
1629 break;
1630 }
1631 need_update = 1;
1632 }
1633
1634 if (need_update) {
1635 inner_idx += 1;
1636 calc_array[0][inner_idx] += 1;
1637 calc_array[1][inner_idx] = chk2;
1638 }
1639 }
1640
1641 chk1 = chk2;
1642 }
1643
1644 max = calc_array[0][0];
1645
1646 for (ii = 0; ii < cnt; ii++) {
1647 if (max < calc_array[0][ii]) {
1648 max_idx = ii;
1649 max = calc_array[0][ii];
1650 }
1651 }
1652
1653
1654 for (ii = 0; ii < cnt; ii++)
1655 sensor_dbg("[DRV] [ idx %d ] [ num %d ] [ val %x ]\n", ii, calc_array[0][ii], calc_array[1][ii]);
1656
1657 sensor_dbg("[DRV] [ max_idx : %d ]\n", max_idx);
1658 sensor_dbg("[DRV] [ inner_idx : %d ]\n", inner_idx);
1659
1660 return calc_array[1][max_idx];
1661 }
1662
1663
video_input_cvi_ahd_1080p_distinguish(decoder_dev_ch_info_s * decoder_info)1664 void video_input_cvi_ahd_1080p_distinguish(decoder_dev_ch_info_s *decoder_info)
1665 {
1666 unsigned char ch = decoder_info->ch;
1667 unsigned char devnum = decoder_info->devnum;
1668 unsigned char fmtdef = decoder_info->fmt_def;
1669 unsigned char ii;
1670 unsigned int check_point;
1671
1672 unsigned char check_time = 10;
1673
1674 unsigned int B13xAB[10];
1675
1676 gpio_i2c_write(nvp6158_iic_addr[devnum], 0xFF, 0x13);
1677 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x2B, ch % 4);
1678
1679 for (ii = 0; ii < check_time; ii++) {
1680 msleep(100);
1681 B13xAB[ii] = gpio_i2c_read(nvp6158_iic_addr[devnum], 0xAB);
1682 sensor_dbg("[DRV] [Ch:%d] %d time B13xAB : %x \n", ch, ii, B13xAB[ii]);
1683 }
1684
1685 check_point = __s_distinguish_2M_cvi_ahd_func(B13xAB, check_time);
1686
1687 if (fmtdef == CVI_FHD_25P) {
1688 if ((check_point & 0xff) <= 0x09) {
1689 decoder_info->fmt_def = AHD20_1080P_25P;
1690 sensor_dbg("[DRV] [Ch:%d] Get Format : CVI 2M 25P, Change Format : AHD 2M 25P\n", decoder_info->ch);
1691 } else
1692 sensor_dbg("[DRV] [Ch:%d] Get Format : CVI 2M, Not Change Format\n", decoder_info->ch);
1693 } else
1694 decoder_info->fmt_def = fmtdef;
1695 }
1696
1697
1698