1 /*
2 * Copyright (c) 2023 HPMicro
3 *
4 * SPDX-License-Identifier: BSD-3-Clause
5 *
6 */
7
8 #ifndef HPM_QEO_DRV_H
9 #define HPM_QEO_DRV_H
10
11 #include "hpm_common.h"
12 #include "hpm_qeo_regs.h"
13 /**
14 * @brief QEO driver APIs
15 * @defgroup qeo_interface QEO driver APIs
16 * @ingroup qeo_interface
17 * @{
18 */
19
20 typedef enum {
21 qeo_wave_cosine = 0,
22 qeo_wave_saddle = 1,
23 qeo_wave_abs_cosine = 2,
24 qeo_wave_saw = 3,
25 } qeo_wave_type_t;
26
27 typedef enum {
28 qeo_wave_above_max_limit_max_val = 0,
29 qeo_wave_above_max_limit_zero = 1,
30 qeo_wave_above_max_limit_max_level0_val = 2,
31
32 qeo_wave_high_area_limit_max_val = 0,
33 qeo_wave_high_area_limit_max_level0_val = 1,
34
35 qeo_wave_low_area_limit_zero = 0,
36 qeo_wave_low_area_limit_min_level1_val = 1,
37
38 qeo_wave_below_min_limit_zero = 0,
39 qeo_wave_below_min_limit_max_val = 1,
40 qeo_wave_below_min_limit_min_level1_val = 2,
41 } qeo_wave_limit_t;
42
43 typedef struct {
44 uint8_t above_max_limit;
45 uint8_t high_area0_limit;
46 uint8_t high_area1_limit;
47 uint8_t low_area0_limit;
48 uint8_t low_area1_limit;
49 uint8_t below_min_limit;
50 } qeo_wave_limit_config_t;
51
52 typedef struct {
53 qeo_wave_limit_config_t wave0;
54 qeo_wave_limit_config_t wave1;
55 qeo_wave_limit_config_t wave2;
56 uint8_t wave_type;
57 uint8_t saddle_type;
58 } qeo_wave_mode_t;
59
60 typedef enum {
61 qeo_abz_output_abz = 0, /*< A and B are orthogonal signals, Z is zero pulse */
62 qeo_abz_output_pulse_revise = 1, /*< A is speed pulse, B is directional pulse, Z not used */
63 qeo_abz_output_up_down = 2, /*< A is forward pulse, B is reverse pusle, Z not used */
64 qeo_abz_output_three_phase = 3, /*< A/B/Z are 3-phase orthogonal pulse */
65 } qeo_abz_type_t;
66
67 /* take effect when output type is qeo_abz_output_abz */
68 typedef enum {
69 qeo_z_pulse_25_percent = 0,
70 qeo_z_pulse_75_percent = 1,
71 qeo_z_pulse_100_percent = 2,
72 } qeo_z_pulse_period_t;
73
74 typedef struct {
75 bool z_inv_pol;
76 bool b_inv_pol;
77 bool a_inv_pol;
78 uint8_t output_type; /*!< @ref qeo_abz_type_t */
79 uint8_t z_pulse_period; /*!< @ref qeo_z_pulse_period_t */
80 } qeo_abz_mode_t;
81
82 typedef enum {
83 qeo_pwm_output_force_0 = 2,
84 qeo_pwm_output_force_1 = 3,
85 qeo_pwm_output_not_force = 0,
86 } qeo_pwm_force_output_t;
87
88 typedef enum {
89 qeo_pwm_safety_output_0 = 0,
90 qeo_pwm_safety_output_1 = 1,
91 qeo_pwm_safety_output_highz = 2,
92 } qeo_pwm_safety_output_t;
93
94 typedef struct {
95 uint8_t pwm0_output; /*!< @ref qeo_pwm_force_output_t */
96 uint8_t pwm1_output;
97 uint8_t pwm2_output;
98 uint8_t pwm3_output;
99 uint8_t pwm4_output;
100 uint8_t pwm5_output;
101 uint8_t pwm6_output;
102 uint8_t pwm7_output;
103 } qeo_pwm_phase_output_table_t;
104
105 typedef struct {
106 uint8_t pwm0_output; /*!< @ref qeo_pwm_safety_output_t */
107 uint8_t pwm1_output;
108 uint8_t pwm2_output;
109 uint8_t pwm3_output;
110 uint8_t pwm4_output;
111 uint8_t pwm5_output;
112 uint8_t pwm6_output;
113 uint8_t pwm7_output;
114 } qeo_pwm_safety_output_table_t;
115
116 typedef struct {
117 uint8_t phase_num;
118 bool shield_hardware_trig_safety;
119 bool revise_pairs_output;
120 } qeo_pwm_mode_t;
121
122 #ifdef __cplusplus
123 extern "C" {
124 #endif
125
126 /* WAVE API */
127 /**
128 * @brief QEO set resolution lines for wave mode
129 * @param [in] base QEO base address
130 * @param [in] lines resolution lines
131 */
qeo_wave_set_resolution_lines(QEO_Type * base,uint32_t lines)132 static inline void qeo_wave_set_resolution_lines(QEO_Type *base, uint32_t lines)
133 {
134 base->WAVE.RESOLUTION = QEO_WAVE_RESOLUTION_LINES_SET(lines);
135 }
136
137 /**
138 * @brief QEO set output type for wave mode
139 * @param [in] base QEO base address
140 * @param [in] type qeo_wave_type_t
141 */
qeo_wave_set_output_type(QEO_Type * base,qeo_wave_type_t type)142 static inline void qeo_wave_set_output_type(QEO_Type *base, qeo_wave_type_t type)
143 {
144 base->WAVE.MODE = (base->WAVE.MODE & ~QEO_WAVE_MODE_WAVES_OUTPUT_TYPE_MASK) | QEO_WAVE_MODE_WAVES_OUTPUT_TYPE_SET(type);
145 }
146
147 /**
148 * @brief QEO set saddle type for wave mode
149 * @param [in] base QEO base address
150 * @param [in] standard true for standard saddle, false for triangular wave stacking
151 */
qeo_wave_set_saddle_type(QEO_Type * base,bool standard)152 static inline void qeo_wave_set_saddle_type(QEO_Type *base, bool standard)
153 {
154 if (standard) {
155 base->WAVE.MODE &= ~QEO_WAVE_MODE_SADDLE_TYPE_MASK;
156 } else {
157 base->WAVE.MODE |= QEO_WAVE_MODE_SADDLE_TYPE_MASK;
158 }
159 }
160
161 /**
162 * @brief QEO set phase shift for wave mode
163 * @param [in] base QEO base address
164 * @param [in] index wave index(0/1/2)
165 * @param [in] angle left shift angle
166 */
qeo_wave_set_phase_shift(QEO_Type * base,uint8_t index,double angle)167 static inline void qeo_wave_set_phase_shift(QEO_Type *base, uint8_t index, double angle)
168 {
169 assert((angle >= 0) && (angle <= 360));
170 uint32_t val = (uint32_t)(angle * 0x10000U / 360);
171 base->WAVE.PHASE_SHIFT[index] = QEO_WAVE_PHASE_SHIFT_VAL_SET(val);
172 }
173
174 /**
175 * @brief QEO enable vd vq inject for wave mode
176 * @param [in] base QEO base address
177 * @param [in] index wave index(0/1/2)
178 * @param [in] vd_val vd value
179 * @param [in] vq_val vq value
180 */
qeo_wave_enable_vd_vq_inject(QEO_Type * base,uint8_t index,int32_t vd_val,int32_t vq_val)181 static inline void qeo_wave_enable_vd_vq_inject(QEO_Type *base, uint8_t index, int32_t vd_val, int32_t vq_val)
182 {
183 (void) vd_val;
184 assert(index < 3);
185 base->WAVE.MODE |= (1U << (QEO_WAVE_MODE_EN_WAVE0_VD_VQ_INJECT_MASK + index));
186 base->WAVE.VD_VQ_INJECT[index] = QEO_WAVE_VD_VQ_INJECT_VQ_VAL_SET(vq_val) | QEO_WAVE_VD_VQ_INJECT_VD_VAL_SET(vq_val);
187 }
188
189 /**
190 * @brief QEO disable vd vq inject for wave mode
191 * @param [in] base QEO base address
192 * @param [in] index wave index(0/1/2)
193 */
qeo_wave_disable_vd_vq_inject(QEO_Type * base,uint8_t index)194 static inline void qeo_wave_disable_vd_vq_inject(QEO_Type *base, uint8_t index)
195 {
196 assert(index < 3);
197 base->WAVE.MODE &= ~(1U << (QEO_WAVE_MODE_EN_WAVE0_VD_VQ_INJECT_MASK + index));
198 }
199
200 /**
201 * @brief QEO load vd vq inject value for wave mode
202 * @param [in] base QEO base address
203 */
qeo_wave_load_vd_vq(QEO_Type * base)204 static inline void qeo_wave_load_vd_vq(QEO_Type *base)
205 {
206 base->WAVE.VD_VQ_LOAD = QEO_WAVE_VD_VQ_LOAD_LOAD_MASK;
207 }
208
209 /**
210 * @brief QEO enable amplitude for wave mode
211 * @param [in] base QEO base address
212 * @param [in] index wave index(0/1/2)
213 * @param [in] amp amplitude value
214 */
qeo_wave_enable_amplitude(QEO_Type * base,uint8_t index,double amp)215 static inline void qeo_wave_enable_amplitude(QEO_Type *base, uint8_t index, double amp)
216 {
217 assert(amp > 0);
218 uint32_t val = (uint32_t)(amp * (1U << 12U));
219 base->WAVE.AMPLITUDE[index] = QEO_WAVE_AMPLITUDE_EN_SCAL_MASK | QEO_WAVE_AMPLITUDE_AMP_VAL_SET(val);
220 }
221
222 /**
223 * @brief QEO disable amplitude for wave mode
224 * @param [in] base QEO base address
225 * @param [in] index wave index(0/1/2)
226 */
qeo_wave_disable_amplitude(QEO_Type * base,uint8_t index)227 static inline void qeo_wave_disable_amplitude(QEO_Type *base, uint8_t index)
228 {
229 base->WAVE.AMPLITUDE[index] &= ~QEO_WAVE_AMPLITUDE_EN_SCAL_MASK;
230 }
231
232 /**
233 * @brief QEO set mid point shift for wave mode
234 * @param [in] base QEO base address
235 * @param [in] index wave index(0/1/2)
236 * @param [in] shift mid point shift value
237 */
qeo_wave_set_mid_point_shift(QEO_Type * base,uint8_t index,double shift)238 static inline void qeo_wave_set_mid_point_shift(QEO_Type *base, uint8_t index, double shift)
239 {
240 int32_t val = (int32_t)(shift * (1U << 27U));
241 base->WAVE.MID_POINT[index] = QEO_WAVE_MID_POINT_VAL_SET(val);
242 }
243
244 /**
245 * @brief QEO set max limmit for wave mode
246 * @param [in] base QEO base address
247 * @param [in] index wave index(0/1/2)
248 * @param [in] limit0 limit0 value
249 * @param [in] limit1 limit1 value
250 */
qeo_wave_set_max_limit(QEO_Type * base,uint8_t index,uint32_t limit0,uint32_t limit1)251 static inline void qeo_wave_set_max_limit(QEO_Type *base, uint8_t index, uint32_t limit0, uint32_t limit1)
252 {
253 base->WAVE.LIMIT[index].MAX = QEO_WAVE_LIMIT_MAX_LIMIT0_SET(limit0) | QEO_WAVE_LIMIT_MAX_LIMIT1_SET(limit1);
254 }
255
256 /**
257 * @brief QEO set min limmit for wave mode
258 * @param [in] base QEO base address
259 * @param [in] index wave index(0/1/2)
260 * @param [in] limit0 limit0 value
261 * @param [in] limit1 limit1 value
262 */
qeo_wave_set_min_limit(QEO_Type * base,uint8_t index,uint32_t limit0,uint32_t limit1)263 static inline void qeo_wave_set_min_limit(QEO_Type *base, uint8_t index, uint32_t limit0, uint32_t limit1)
264 {
265 base->WAVE.LIMIT[index].MIN = QEO_WAVE_LIMIT_MIN_LIMIT0_SET(limit0) | QEO_WAVE_LIMIT_MIN_LIMIT1_SET(limit1);
266 }
267
268 /**
269 * @brief QEO set deadzone shift for wave mode
270 * @param [in] base QEO base address
271 * @param [in] index wave index(0/1/2)
272 * @param [in] shift deadzone shift value
273 */
qeo_wave_set_deadzone_shift(QEO_Type * base,uint8_t index,int16_t shift)274 static inline void qeo_wave_set_deadzone_shift(QEO_Type *base, uint8_t index, int16_t shift)
275 {
276 base->WAVE.DEADZONE_SHIFT[index] = QEO_WAVE_DEADZONE_SHIFT_VAL_SET(shift);
277 }
278
279 /**
280 * @brief QEO get wave output value
281 * @param [in] base QEO base address
282 * @param [in] index wave index(0/1/2)
283 * @retval wave output value
284 */
qeo_get_wave_output_val(QEO_Type * base,uint8_t index)285 static inline uint16_t qeo_get_wave_output_val(QEO_Type *base, uint8_t index)
286 {
287 if (index == 0) {
288 return QEO_DEBUG0_WAVE0_GET(base->DEBUG0);
289 } else if (index == 1) {
290 return QEO_DEBUG0_WAVE1_GET(base->DEBUG0);
291 } else if (index == 2) {
292 return QEO_DEBUG1_WAVE2_GET(base->DEBUG1);
293 }
294 return 0;
295 }
296
297 /**
298 * @brief QEO wave get defalut mode config
299 * @param [in] base QEO base address
300 * @param [in] config qeo_wave_mode_t
301 */
302 void qeo_wave_get_default_mode_config(QEO_Type *base, qeo_wave_mode_t *config);
303
304 /**
305 * @brief QEO wave config mode
306 * @param [in] base QEO base address
307 * @param [in] config qeo_wave_mode_t
308 */
309 void qeo_wave_config_mode(QEO_Type *base, qeo_wave_mode_t *config);
310
311 /* ABZ API */
312 /**
313 * @brief QEO set resolution lines for ABZ mode
314 * @param [in] base QEO base address
315 * @param [in] lines resolution lines
316 */
qeo_abz_set_resolution_lines(QEO_Type * base,uint32_t lines)317 static inline void qeo_abz_set_resolution_lines(QEO_Type *base, uint32_t lines)
318 {
319 base->ABZ.RESOLUTION = QEO_ABZ_RESOLUTION_LINES_SET(lines);
320 }
321
322 /**
323 * @brief QEO set phase shift for ABZ mode
324 * @param [in] base QEO base address
325 * @param [in] index ABZ index(0/1/2)
326 * @param [in] angle left shift angle
327 */
qeo_abz_set_phase_shift(QEO_Type * base,uint8_t index,double angle)328 static inline void qeo_abz_set_phase_shift(QEO_Type *base, uint8_t index, double angle)
329 {
330 assert((angle >= 0) && (angle <= 360));
331 uint32_t val = (uint32_t)(angle * 0x10000U / 360);
332 base->ABZ.PHASE_SHIFT[index] = QEO_ABZ_PHASE_SHIFT_VAL_SET(val);
333 }
334
335 /**
336 * @brief QEO set max frequency for ABZ mode
337 * @param [in] base QEO base address
338 * @param [in] src_freq QEO(MOTO system) frequency
339 * @param [in] freq abz signal frequency (A pulse frequency)
340 * @retval status_success or status_invalid_argument
341 */
342 hpm_stat_t qeo_abz_set_max_frequency(QEO_Type *base, uint32_t src_freq, uint32_t freq);
343
344 /**
345 * @brief QEO set wdog frequency for ABZ mode
346 * @param [in] base QEO base address
347 * @param [in] src_freq QEO(MOTO system) frequency
348 * @param [in] freq wdog frequency
349 * @retval status_success or status_invalid_argument
350 */
351 hpm_stat_t qeo_abz_set_wdog_frequency(QEO_Type *base, uint32_t src_freq, uint32_t freq);
352
353 /**
354 * @brief QEO disable wdog for ABZ mode
355 * @param [in] base QEO base address
356 */
qeo_abz_disable_wdog(QEO_Type * base)357 static inline void qeo_abz_disable_wdog(QEO_Type *base)
358 {
359 base->ABZ.MODE &= ~QEO_ABZ_MODE_EN_WDOG_MASK;
360 }
361
362 /**
363 * @brief QEO config reverse edge for ABZ mode
364 * @param [in] base QEO base address
365 * @param [in] speed_pulse_negedge true for reverse edge point speed pulse's negedge
366 * false for reverse edge point between speed pulse's posedge and negedge, min period dedicated by the num line_width
367 *
368 * @note take effect when ABZ work on qeo_abz_output_pulse_revise mode
369 */
qeo_abz_config_reverse_edge(QEO_Type * base,bool speed_pulse_negedge)370 static inline void qeo_abz_config_reverse_edge(QEO_Type *base, bool speed_pulse_negedge)
371 {
372 if (speed_pulse_negedge) {
373 base->ABZ.MODE |= QEO_ABZ_MODE_REVERSE_EDGE_TYPE_MASK;
374 } else {
375 base->ABZ.MODE &= ~QEO_ABZ_MODE_REVERSE_EDGE_TYPE_MASK;
376 }
377 }
378
379 /**
380 * @brief QEO sync position for ABZ mode
381 * @param [in] base QEO base address
382 * @param [in] lines ABZ line counter
383 * @param [in] sync_pos the position value to be synchronized
384 */
385 void qeo_abz_position_sync(QEO_Type *base, uint32_t lines, uint32_t sync_pos);
386
387 /**
388 * @brief QEO ABZ get default mode config
389 * @param [in] base QEO base address
390 * @param [in] config qeo_abz_mode_t
391 */
392 void qeo_abz_get_default_mode_config(QEO_Type *base, qeo_abz_mode_t *config);
393
394 /**
395 * @brief QEO ABZ config mode
396 * @param [in] base QEO base address
397 * @param [in] config qeo_abz_mode_t
398 */
399 void qeo_abz_config_mode(QEO_Type *base, qeo_abz_mode_t *config);
400
401 /* PWM API */
402 /**
403 * @brief QEO set resolution lines for PWM mode
404 * @param [in] base QEO base address
405 * @param [in] lines resolution lines
406 */
qeo_pwm_set_resolution_lines(QEO_Type * base,uint32_t lines)407 static inline void qeo_pwm_set_resolution_lines(QEO_Type *base, uint32_t lines)
408 {
409 base->PWM.RESOLUTION = QEO_PWM_RESOLUTION_LINES_SET(lines);
410 }
411
412 /**
413 * @brief QEO set phase shift for PWM mode
414 * @param [in] base QEO base address
415 * @param [in] index PWM index(0/1/2/3)
416 * @param [in] angle left shift angle
417 */
qeo_pwm_set_phase_shift(QEO_Type * base,uint8_t index,double angle)418 static inline void qeo_pwm_set_phase_shift(QEO_Type *base, uint8_t index, double angle)
419 {
420 assert((angle >= 0) && (angle <= 360));
421 uint32_t val = (uint32_t)(angle * 0x10000U / 360);
422 base->PWM.PHASE_SHIFT[index] = QEO_PWM_PHASE_SHIFT_VAL_SET(val);
423 }
424
425 /**
426 * @brief QEO PWM check if it is triggered by hardware to enter safety mode
427 *
428 * @note This bit is only valid if the hardware trigger source has not been cleared
429 *
430 * @param [in] base QEO base address
431 * @retval true or false
432 */
qeo_pwm_check_hardware_trig_safety(QEO_Type * base)433 static inline bool qeo_pwm_check_hardware_trig_safety(QEO_Type *base)
434 {
435 return ((base->STATUS & QEO_STATUS_PWM_SAFETY_MASK) != 0) ? true : false;
436 }
437
438 /**
439 * @brief QEO PWM select phase table
440 * @param [in] base QEO base address
441 * @param [in] positive true for using positive phase table, false for using negative phase table
442 */
qeo_pwm_select_phase_table(QEO_Type * base,bool positive)443 static inline void qeo_pwm_select_phase_table(QEO_Type *base, bool positive)
444 {
445 if (positive) {
446 base->PWM.MODE &= ~QEO_PWM_MODE_REVISE_UP_DN_MASK;
447 } else {
448 base->PWM.MODE |= QEO_PWM_MODE_REVISE_UP_DN_MASK;
449 }
450 }
451
452 /**
453 * @brief QEO PWM enter safety mode by software
454 *
455 * @note call qeo_pwm_software_exit_safety to exit safety mode
456 *
457 * @param [in] base QEO base address
458 */
qeo_pwm_software_enter_safety(QEO_Type * base)459 static inline void qeo_pwm_software_enter_safety(QEO_Type *base)
460 {
461 base->PWM.MODE |= QEO_PWM_MODE_PWM_ENTER_SAFETY_MODE_MASK;
462 }
463
464 /**
465 * @brief QEO PWM exit safety mode by software
466 * @param [in] base QEO base address
467 */
qeo_pwm_software_exit_safety(QEO_Type * base)468 static inline void qeo_pwm_software_exit_safety(QEO_Type *base)
469 {
470 base->PWM.MODE &= ~QEO_PWM_MODE_PWM_ENTER_SAFETY_MODE_MASK;
471 }
472
473 /**
474 * @brief QEO PWM get default mode config
475 * @param [in] base QEO base address
476 * @param [in] config qeo_pwm_mode_t
477 */
478 void qeo_pwm_get_default_mode_config(QEO_Type *base, qeo_pwm_mode_t *config);
479
480 /**
481 * @brief QEO PWM config mode
482 * @param [in] base QEO base address
483 * @param [in] config qeo_pwm_mode_t
484 */
485 void qeo_pwm_config_mode(QEO_Type *base, qeo_pwm_mode_t *config);
486
487 /**
488 * @brief QEO PWM get default safety table
489 * @param [in] base QEO base address
490 * @param [in] table qeo_pwm_safety_output_table_t
491 */
492 void qeo_pwm_get_default_safety_table_config(QEO_Type *base, qeo_pwm_safety_output_table_t *table);
493
494 /**
495 * @brief QEO PWM get default phase table
496 * @param [in] base QEO base address
497 * @param [in] table qeo_pwm_phase_output_table_t
498 */
499 void qeo_pwm_get_default_phase_table_config(QEO_Type *base, qeo_pwm_phase_output_table_t *table);
500
501 /**
502 * @brief QEO PWM config safety table
503 * @param [in] base QEO base address
504 * @param [in] table qeo_pwm_safety_output_table_t
505 */
506 void qeo_pwm_config_safety_table(QEO_Type *base, qeo_pwm_safety_output_table_t *table);
507
508 /**
509 * @brief QEO PWM onfig phase table
510 * @param [in] base QEO base address
511 * @param [in] table qeo_pwm_phase_output_table_t
512 */
513 void qeo_pwm_config_phase_table(QEO_Type *base, uint8_t index, qeo_pwm_phase_output_table_t *table);
514
515 /**
516 * @brief QEO enable software position inject
517 * @param [in] base QEO base address
518 */
qeo_enable_software_position_inject(QEO_Type * base)519 static inline void qeo_enable_software_position_inject(QEO_Type *base)
520 {
521 base->POSTION_SEL |= QEO_POSTION_SEL_POSTION_SEL_MASK;
522 }
523
524 /**
525 * @brief QEO software inject position
526 * @param [in] base QEO base address
527 * @param [in] base position value
528 */
qeo_software_position_inject(QEO_Type * base,uint32_t position)529 static inline void qeo_software_position_inject(QEO_Type *base, uint32_t position)
530 {
531 base->POSTION_SOFTWARE = QEO_POSTION_SOFTWARE_POSTION_SOFTWAVE_SET(position);
532 }
533
534 /**
535 * @brief QEO disable software position inject, QEO will using position from hardware
536 * @param [in] base QEO base address
537 */
qeo_disable_software_position_inject(QEO_Type * base)538 static inline void qeo_disable_software_position_inject(QEO_Type *base)
539 {
540 base->POSTION_SEL &= ~QEO_POSTION_SEL_POSTION_SEL_MASK;
541 }
542
543 /**
544 * @brief QEO check calculate finish status
545 * @param [in] base QEO base address
546 * @retval true or false
547 */
qeo_check_calculate_finish(QEO_Type * base)548 static inline bool qeo_check_calculate_finish(QEO_Type *base)
549 {
550 return (QEO_DEBUG1_QEO_FINISH_GET(base->DEBUG1) != 0) ? true : false;
551 }
552
553 #ifdef __cplusplus
554 }
555 #endif
556 /**
557 * @}
558 */
559 #endif /* HPM_QEO_DRV_H */
560