1 2 /* 3 * combo common header file 4 * 5 * Copyright (c) 2017 by Allwinnertech Co., Ltd. http://www.allwinnertech.com 6 * 7 * Authors: Zhao Wei <zhaowei@allwinnertech.com> 8 * 9 * This program is free software; you can redistribute it and/or modify 10 * it under the terms of the GNU General Public License version 2 as 11 * published by the Free Software Foundation. 12 */ 13 14 15 #ifndef __COMBO_COMMON__H__ 16 #define __COMBO_COMMON__H__ 17 18 #include "combo_rx/combo_rx_reg.h" 19 20 /* 21 * The combo interface. 22 */ 23 24 #define V4L2_MBUS_SUBLVDS 7 25 #define V4L2_MBUS_HISPI 8 26 27 #define V4L2_MBUS_SUBLVDS_1_LANE (1 << 0) 28 #define V4L2_MBUS_SUBLVDS_2_LANE (1 << 1) 29 #define V4L2_MBUS_SUBLVDS_3_LANE (1 << 2) 30 #define V4L2_MBUS_SUBLVDS_4_LANE (1 << 3) 31 #define V4L2_MBUS_SUBLVDS_5_LANE (1 << 4) 32 #define V4L2_MBUS_SUBLVDS_6_LANE (1 << 5) 33 #define V4L2_MBUS_SUBLVDS_7_LANE (1 << 6) 34 #define V4L2_MBUS_SUBLVDS_8_LANE (1 << 7) 35 #define V4L2_MBUS_SUBLVDS_9_LANE (1 << 8) 36 #define V4L2_MBUS_SUBLVDS_10_LANE (1 << 9) 37 #define V4L2_MBUS_SUBLVDS_11_LANE (1 << 10) 38 #define V4L2_MBUS_SUBLVDS_12_LANE (1 << 11) 39 40 /*flag to open combo terminal resistance*/ 41 #define CMB_TERMINAL_RES (0x80) 42 43 /*flag of phya offset*/ 44 #define CMB_PHYA_OFFSET0 (0x00) 45 #define CMB_PHYA_OFFSET1 (0x10) 46 #define CMB_PHYA_OFFSET2 (0x20) 47 #define CMB_PHYA_OFFSET3 (0x30) 48 49 enum combo_mipi_mode { 50 MIPI_NORMAL_MODE, 51 MIPI_VC_WDR_MODE, 52 MIPI_DOL_WDR_MODE, 53 }; 54 55 enum combo_lvds_mode { 56 LVDS_NORMAL_MODE, 57 LVDS_4CODE_WDR_MODE, 58 LVDS_5CODE_WDR_MODE, 59 }; 60 61 enum combo_hispi_mode { 62 HISPI_NORMAL_MODE, 63 HISPI_WDR_MODE, 64 }; 65 66 enum isp_wdr_mode { 67 ISP_NORMAL_MODE, 68 ISP_DOL_WDR_MODE, 69 ISP_COMANDING_MODE, 70 ISP_SEHDR_MODE, 71 }; 72 73 enum sensor_lp_mode { 74 SENSOR_LP_CONTINUOUS, 75 SENSOR_LP_DISCONTINUOUS, 76 }; 77 78 struct combo_wdr_cfg { 79 unsigned int line_code_mode;/*0:HiSPI SOF/EOF/SOL/EOL 1:SAV-EAV*/ 80 unsigned int pix_lsb;/*0:MSB,1:LSB*/ 81 unsigned int line_cnt;/*when in WDR mode,this reg can extent frame valid signal by set 1,2,3,4*/ 82 83 unsigned int wdr_fid_mode_sel;/*0:1bit 1:2bits*/ 84 unsigned int wdr_fid_map_en;/*bit12:FID0 bit13:FID1 bit14:FID2 bit15:FID3*/ 85 unsigned int wdr_fid0_map_sel; 86 unsigned int wdr_fid1_map_sel; 87 unsigned int wdr_fid2_map_sel; 88 unsigned int wdr_fid3_map_sel; 89 90 unsigned int wdr_en_multi_ch; 91 unsigned int wdr_ch0_height; 92 unsigned int wdr_ch1_height; 93 unsigned int wdr_ch2_height; 94 unsigned int wdr_ch3_height; 95 96 unsigned int wdr_eof_fild; 97 unsigned int wdr_sof_fild; 98 unsigned int code_mask; 99 }; 100 101 #endif /*__COMBO_COMMON__H__*/ 102