1 /* 2 * Allwinner SoCs display driver. 3 * 4 * Copyright (C) 2016 Allwinner. 5 * 6 * This file is licensed under the terms of the GNU General Public 7 * License version 2. This program is licensed "as is" without any 8 * warranty of any kind, whether express or implied. 9 */ 10 11 #ifndef __BSP_DISPLAY_H__ 12 #define __BSP_DISPLAY_H__ 13 14 #include "disp_private.h" 15 16 struct sunxi_disp_source_ops { 17 int (*sunxi_lcd_delay_ms)(unsigned int ms); 18 int (*sunxi_lcd_delay_us)(unsigned int us); 19 int (*sunxi_lcd_tcon_enable)(unsigned int scree_id); 20 int (*sunxi_lcd_tcon_disable)(unsigned int scree_id); 21 int (*sunxi_lcd_cpu_write)(u32 sel, u32 index, u32 data); 22 int (*sunxi_lcd_cpu_write_index)(unsigned int scree_id, 23 unsigned int index); 24 int (*sunxi_lcd_cpu_write_data)(unsigned int scree_id, 25 unsigned int data); 26 int (*sunxi_lcd_cpu_set_auto_mode)(unsigned int scree_id); 27 int (*sunxi_lcd_dsi_dcs_write)(unsigned int scree_id, 28 unsigned char command, 29 unsigned char *para, 30 unsigned int para_num); 31 int (*sunxi_lcd_dsi_gen_write)(unsigned int scree_id, 32 unsigned char command, 33 unsigned char *para, 34 unsigned int para_num); 35 int (*sunxi_lcd_dsi_clk_enable)(u32 screen_id, u32 en); 36 s32 (*sunxi_lcd_dsi_gen_short_read)(u32 sel, u8 *para_p, u8 para_num, 37 u8 *result); 38 s32 (*sunxi_lcd_dsi_dcs_read)(u32 sel, u8 cmd, u8 *result, u32 *num_p); 39 s32 (*sunxi_lcd_dsi_set_max_ret_size)(u32 sel, u32 size); 40 int (*sunxi_lcd_dsi_mode_switch)(unsigned int scree_id, 41 u32 cmd_en, u32 lp_en); 42 int (*sunxi_lcd_backlight_enable)(unsigned int screen_id); 43 int (*sunxi_lcd_backlight_disable)(unsigned int screen_id); 44 int (*sunxi_lcd_pwm_enable)(unsigned int screen_id); 45 int (*sunxi_lcd_pwm_disable)(unsigned int screen_id); 46 int (*sunxi_lcd_power_enable)(unsigned int screen_id, 47 unsigned int pwr_id); 48 int (*sunxi_lcd_power_disable)(unsigned int screen_id, 49 unsigned int pwr_id); 50 int (*sunxi_lcd_set_panel_funs)(char *drv_name, 51 struct disp_lcd_panel_fun *lcd_cfg); 52 int (*sunxi_lcd_pin_cfg)(unsigned int screen_id, unsigned int bon); 53 int (*sunxi_lcd_gpio_set_value)(unsigned int screen_id, 54 unsigned int io_index, u32 value); 55 int (*sunxi_lcd_gpio_set_direction)(unsigned int screen_id, 56 unsigned int io_index, 57 u32 direction); 58 }; 59 60 s32 bsp_disp_init(struct disp_bsp_init_para *para); 61 s32 bsp_disp_exit(u32 mode); 62 s32 bsp_disp_open(void); 63 s32 bsp_disp_close(void); 64 s32 bsp_disp_feat_get_num_screens(void); 65 s32 bsp_disp_feat_get_num_channels(u32 disp); 66 s32 bsp_disp_feat_get_num_layers(u32 screen_id); 67 s32 bsp_disp_feat_get_num_layers_by_chn(u32 disp, u32 chn); 68 s32 bsp_disp_feat_is_supported_output_types(u32 screen_id, u32 output_type); 69 s32 bsp_disp_get_screen_physical_width(u32 disp); 70 s32 bsp_disp_get_screen_physical_height(u32 disp); 71 s32 bsp_disp_get_screen_width(u32 disp); 72 s32 bsp_disp_get_screen_height(u32 disp); 73 s32 bsp_disp_get_screen_width_from_output_type(u32 disp, u32 output_type, 74 u32 output_mode); 75 s32 bsp_disp_get_screen_height_from_output_type(u32 disp, u32 output_type, 76 u32 output_mode); 77 s32 bsp_disp_get_lcd_registered(u32 disp); 78 s32 bsp_disp_get_hdmi_registered(void); 79 s32 bsp_disp_get_output_type(u32 disp); 80 s32 bsp_disp_device_switch(int disp, enum disp_output_type output_type, 81 enum disp_output_type mode); 82 s32 bsp_disp_device_set_config(int disp, struct disp_device_config *config); 83 84 #ifdef CONFIG_EINK_PANEL_USED 85 s32 bsp_disp_eink_update(struct disp_eink_manager *manager, 86 struct disp_layer_config_inner *config, 87 unsigned int layer_num, enum eink_update_mode mode, 88 struct area_info *update_area); 89 90 s32 bsp_disp_eink_set_temperature(struct disp_eink_manager *manager, 91 unsigned int temp); 92 s32 bsp_disp_eink_get_temperature(struct disp_eink_manager *manager); 93 s32 bsp_disp_eink_op_skip(struct disp_eink_manager *manager, unsigned int en); 94 #endif 95 96 s32 bsp_disp_set_hdmi_func(struct disp_device_func *func); 97 s32 bsp_disp_hdmi_check_support_mode(u32 disp, enum disp_output_type mode); 98 s32 bsp_disp_hdmi_set_detect(bool hpd); 99 s32 bsp_disp_sync_with_hw(struct disp_bsp_init_para *para); 100 101 /*s32 bsp_disp_check_device_enabled(struct disp_bsp_init_para *para);*/ 102 s32 bsp_disp_get_fps(u32 disp); 103 s32 bsp_disp_get_health_info(u32 disp, struct disp_health_info *info); 104 s32 bsp_disp_set_edp_func(struct disp_tv_func *func); 105 106 /* lcd */ 107 s32 bsp_disp_lcd_set_panel_funs(char *name, struct disp_lcd_panel_fun *lcd_cfg); 108 s32 bsp_disp_lcd_backlight_enable(u32 disp); 109 s32 bsp_disp_lcd_backlight_disable(u32 disp); 110 s32 bsp_disp_lcd_pwm_enable(u32 disp); 111 s32 bsp_disp_lcd_pwm_disable(u32 disp); 112 s32 bsp_disp_lcd_power_enable(u32 disp, u32 power_id); 113 s32 bsp_disp_lcd_power_disable(u32 disp, u32 power_id); 114 s32 bsp_disp_lcd_set_bright(u32 disp, u32 bright); 115 s32 bsp_disp_lcd_get_bright(u32 disp); 116 s32 bsp_disp_lcd_tcon_enable(u32 disp); 117 s32 bsp_disp_lcd_tcon_disable(u32 disp); 118 s32 bsp_disp_lcd_pin_cfg(u32 disp, u32 en); 119 s32 bsp_disp_lcd_gpio_set_value(u32 disp, u32 io_index, u32 value); 120 s32 bsp_disp_lcd_gpio_set_direction(u32 disp, unsigned int io_index, 121 u32 direction); 122 struct disp_lcd_flow *bsp_disp_lcd_get_open_flow(u32 disp); 123 struct disp_lcd_flow *bsp_disp_lcd_get_close_flow(u32 disp); 124 s32 bsp_disp_get_panel_info(u32 disp, struct disp_panel_para *info); 125 126 s32 bsp_disp_vsync_event_enable(u32 disp, bool enable); 127 s32 bsp_disp_shadow_protect(u32 disp, bool protect); 128 129 s32 disp_delay_ms(u32 ms); 130 s32 disp_delay_us(u32 us); 131 132 s32 bsp_disp_tv_suspend(void); /* for test tv suspend */ 133 s32 bsp_disp_tv_resume(void); 134 extern s32 dsi_dcs_wr(u32 sel, u8 cmd, u8 *para_p, u32 para_num); 135 extern s32 dsi_gen_wr(u32 sel, u8 cmd, u8 *para_p, u32 para_num); 136 extern s32 dsi_clk_enable(u32 sel, u32 en); 137 s32 bsp_disp_lcd_dsi_clk_enable(u32 disp, u32 en); 138 s32 bsp_disp_lcd_dsi_dcs_wr(u32 disp, u8 command, u8 *para, u32 para_num); 139 s32 bsp_disp_lcd_dsi_gen_wr(u32 disp, u8 command, u8 *para, u32 para_num); 140 s32 bsp_disp_lcd_dsi_mode_switch(u32 screen_id, u32 cmd_en, u32 lp_en); 141 s32 bsp_disp_lcd_dsi_dcs_read(u32 sel, u8 cmd, u8 *result, u32 *num_p); 142 s32 bsp_disp_lcd_set_max_ret_size(u32 sel, u32 size); 143 s32 bsp_disp_lcd_dsi_gen_short_read(u32 sel, u8 *para_p, u8 para_num, 144 u8 *result); 145 146 extern struct disp_manager *disp_get_layer_manager(u32 disp); 147 148 int bsp_disp_get_fb_info(unsigned int disp, struct disp_layer_info *info); 149 int bsp_disp_get_display_size(u32 disp, unsigned int *width, 150 unsigned int *height); 151 152 #ifdef CONFIG_DEVFREQ_DRAM_FREQ_IN_VSYNC 153 /* dramfreq interface */ 154 s32 bsp_disp_get_vb_time(void); 155 s32 bsp_disp_get_next_vb_time(void); 156 s32 bsp_disp_is_in_vb(void); 157 #endif 158 159 #endif 160