1 /**
2 ******************************************************************************
3 * @file stm32mp1xx_hal_exti.c
4 * @author MCD Application Team
5 * @brief EXTI HAL module driver.
6 * This file provides firmware functions to manage the following
7 * functionalities of the General Purpose Input/Output (EXTI) peripheral:
8 * + Initialization and de-initialization functions
9 * + IO operation functions
10 *
11 @verbatim
12 ==============================================================================
13 ##### EXTI Peripheral features #####
14 ==============================================================================
15 [..]
16 (+) Each Exti line can be configured within this driver.
17
18 (+) Exti line can be configured in 3 different modes
19 (++) Interrupt
20 (++) Event
21 (++) Both of them
22
23 (+) Configurable Exti lines can be configured with 3 different triggers
24 (++) Rising
25 (++) Falling
26 (++) Both of them
27
28 (+) When set in interrupt mode, configurable Exti lines have two diffenrents
29 interrupt pending registers which allow to distinguish which transition
30 occurs:
31 (++) Rising edge pending interrupt
32 (++) Falling
33
34 (+) Exti lines 0 to 15 are linked to gpio pin number 0 to 15. Gpio port can
35 be selected throught multiplexer.
36
37 ##### How to use this driver #####
38 ==============================================================================
39 [..]
40
41 (#) Configure the configurable EXTI line using HAL_EXTI_SetConfigLine().
42 NOTE: in addition HAL_EXTI_SetInterruptAndEventMask shall be used
43 to configure interrupt and events mask of this configurable line
44 (++) Choose the interrupt line number by setting "Line" member from
45 EXTI_ConfigTypeDef structure.
46 (++) Configure the interrupt and/or event mode using "Mode" member from
47 EXTI_ConfigTypeDef structure.
48 (++) For configurable lines, configure rising and/or falling trigger
49 "Trigger" member from EXTI_ConfigTypeDef structure.
50 (++) For Exti lines linked to gpio, choose gpio port using "GPIOSel"
51 member from GPIO_InitTypeDef structure.
52
53 (#) Get current Exti configuration of a dedicated line using
54 HAL_EXTI_GetConfigLine().
55 (++) Provide exiting handle as parameter.
56 (++) Provide pointer on EXTI_ConfigTypeDef structure as second parameter.
57
58 (#) Clear Exti configuration of a dedicated line using HAL_EXTI_GetConfigLine().
59 (++) Provide exiting handle as parameter.
60
61 (#) Register callback to treat Exti interrupts using HAL_EXTI_RegisterCallback().
62 (++) Provide exiting handle as first parameter.
63 (++) Provide which callback will be registered using one value from
64 EXTI_CallbackIDTypeDef.
65 (++) Provide callback function pointer.
66
67 (#) Get interrupt pending bit using HAL_EXTI_GetPending().
68
69 (#) Clear interrupt pending bit using HAL_EXTI_GetPending().
70
71 (#) Generate software interrupt using HAL_EXTI_GenerateSWI().
72
73 @endverbatim
74 ******************************************************************************
75 * @attention
76 *
77 * <h2><center>© Copyright (c) 2019 STMicroelectronics.
78 * All rights reserved.</center></h2>
79 *
80 * This software component is licensed by ST under BSD 3-Clause license,
81 * the "License"; You may not use this file except in compliance with the
82 * License. You may obtain a copy of the License at:
83 * opensource.org/licenses/BSD-3-Clause
84 *
85 ******************************************************************************
86 */
87
88 /* Includes ------------------------------------------------------------------*/
89 #include "stm32mp1xx_hal.h"
90
91 /** @addtogroup STM32MP1xx_HAL_Driver
92 * @{
93 */
94
95 /** @addtogroup EXTI
96 * @{
97 */
98 /** MISRA C:2012 deviation rule has been granted for following rule:
99 * Rule-18.1_b - Medium: Array `EXTICR' 1st subscript interval [0,7] may be out
100 * of bounds [0,3] in following API :
101 * HAL_EXTI_SetConfigLine
102 * HAL_EXTI_GetConfigLine
103 * HAL_EXTI_ClearConfigLine
104 */
105
106 /* Private typedef -----------------------------------------------------------*/
107 /* Private defines ------------------------------------------------------------*/
108 /** @defgroup EXTI_Private_Constants EXTI Private Constants
109 * @{
110 */
111 #define EXTI_MODE_C1 0x10u
112 #define EXTI_MODE_C2 0x20u
113 #define EXTI_MODE_INTERRUPT 0x01u
114 #define EXTI_MODE_EVENT 0x02u
115 #define EXTI_MODE_OFFSET 0x04u /* 0x10: offset between CPU IMR/EMR registers */
116 #define EXTI_CONFIG_OFFSET 0x08u /* 0x20: offset between CPU Rising/Falling configuration registers */
117 /**
118 * @}
119 */
120
121 /* Private macros ------------------------------------------------------------*/
122 /* Private variables ---------------------------------------------------------*/
123 /* Private function prototypes -----------------------------------------------*/
124 /* Exported functions --------------------------------------------------------*/
125
126 /** @addtogroup EXTI_Exported_Functions
127 * @{
128 */
129
130 /** @addtogroup EXTI_Exported_Functions_Group1
131 * @brief Configuration functions
132 *
133 @verbatim
134 ===============================================================================
135 ##### Configuration functions #####
136 ===============================================================================
137
138 @endverbatim
139 * @{
140 */
141
142 /**
143 * @brief Set configuration except Interrupt and Event mask of a dedicated Exti line.
144 * It is relevant only for configurable events.
145 * @param hexti Exti handle.
146 * @param pExtiConfig Pointer on EXTI configuration to be set.
147 * @retval HAL Status.
148 */
HAL_EXTI_SetConfigLine(EXTI_HandleTypeDef * hexti,EXTI_ConfigTypeDef * pExtiConfig)149 HAL_StatusTypeDef HAL_EXTI_SetConfigLine(EXTI_HandleTypeDef *hexti, EXTI_ConfigTypeDef *pExtiConfig)
150 {
151 __IO uint32_t *regaddr;
152 uint32_t regval;
153 uint32_t linepos;
154 uint32_t maskline;
155 uint32_t offset;
156
157 /* Check null pointer */
158 if ((hexti == 0) || (pExtiConfig == 0))
159 {
160 return HAL_ERROR;
161 }
162
163 /* Assign line number to handle */
164 hexti->Line = pExtiConfig->Line;
165
166 /* compute line register offset and line mask */
167 offset = ((pExtiConfig->Line & EXTI_REG_MASK) >> EXTI_REG_SHIFT);
168 linepos = (pExtiConfig->Line & EXTI_PIN_MASK);
169 maskline = (1uL << linepos);
170
171 /* Configure triggers for configurable lines */
172 if ((pExtiConfig->Line & EXTI_CONFIG) != 0x00u)
173 {
174 /* Configure rising trigger */
175 regaddr = (&EXTI->RTSR1 + (EXTI_CONFIG_OFFSET * offset));
176 regval = *regaddr;
177
178 /* Mask or set line */
179 if ((pExtiConfig->Trigger & EXTI_TRIGGER_RISING) != 0x00u)
180 {
181 regval |= maskline;
182 }
183 else
184 {
185 regval &= ~maskline;
186 }
187
188 /* Store rising trigger mode */
189 *regaddr = regval;
190
191 /* Configure falling trigger */
192 regaddr = (&EXTI->FTSR1 + (EXTI_CONFIG_OFFSET * offset));
193 regval = *regaddr;
194
195 /* Mask or set line */
196 if ((pExtiConfig->Trigger & EXTI_TRIGGER_FALLING) != 0x00u)
197 {
198 regval |= maskline;
199 }
200 else
201 {
202 regval &= ~maskline;
203 }
204
205 /* Store falling trigger mode */
206 *regaddr = regval;
207
208 /* Configure gpio port selection in case of gpio exti line */
209 if ((pExtiConfig->Line & EXTI_GPIO) == EXTI_GPIO)
210 {
211
212 regval = EXTI->EXTICR[linepos >> 2u];
213 regval &= ~(EXTI_EXTICR1_EXTI0 << (EXTI_EXTICR1_EXTI1_Pos * (linepos & 0x03u)));
214 regval |= (pExtiConfig->GPIOSel << (EXTI_EXTICR1_EXTI1_Pos * (linepos & 0x03u)));
215 EXTI->EXTICR[linepos >> 2u] = regval;
216 }
217 }
218
219 /*Set Interrupt And Event Mask for Core 1 if configuration for Core 1 given into parameter mode */
220 if ((pExtiConfig->Mode & EXTI_MODE_C1) != 0x00u)
221 {
222 regaddr = (&EXTI->C1IMR1 + (EXTI_MODE_OFFSET * offset));
223
224 regval = *regaddr;
225
226 /* Mask or set line */
227 if ((pExtiConfig->Mode & EXTI_MODE_INTERRUPT) != 0x00u)
228 {
229 regval |= maskline;
230 }
231 else
232 {
233 regval &= ~maskline;
234 }
235
236 /* Store interrupt mode */
237 *regaddr = regval;
238
239 /* The event mode cannot be configured if the line does not support it */
240
241 regaddr = (&EXTI->C1EMR1 + (EXTI_MODE_OFFSET * offset));
242
243 regval = *regaddr;
244
245 /* Mask or set line */
246 if ((pExtiConfig->Mode & EXTI_MODE_EVENT) != 0x00u)
247 {
248 regval |= maskline;
249 }
250 else
251 {
252 regval &= ~maskline;
253 }
254
255 /* Store event mode */
256 *regaddr = regval;
257 }
258
259 /*Set Interrupt And Event Mask for Core 2 if configuration for Core 2 given into parameter mode */
260 if ((pExtiConfig->Mode & EXTI_MODE_C2) != 0x00u)
261 {
262 regaddr = (&EXTI->C2IMR1 + (EXTI_MODE_OFFSET * offset));
263
264 regval = *regaddr;
265
266 /* Mask or set line */
267 if ((pExtiConfig->Mode & EXTI_MODE_INTERRUPT) != 0x00u)
268 {
269 regval |= maskline;
270 }
271 else
272 {
273 regval &= ~maskline;
274 }
275
276 /* Store interrupt mode */
277 *regaddr = regval;
278
279 /* The event mode cannot be configured if the line does not support it */
280
281 regaddr = (&EXTI->C2EMR1 + (EXTI_MODE_OFFSET * offset));
282
283 regval = *regaddr;
284
285 /* Mask or set line */
286 if ((pExtiConfig->Mode & EXTI_MODE_EVENT) != 0x00u)
287 {
288 regval |= maskline;
289 }
290 else
291 {
292 regval &= ~maskline;
293 }
294
295 /* Store event mode */
296 *regaddr = regval;
297 }
298
299 return HAL_OK;
300 }
301
302
303 /**
304 * @brief Get configuration of a dedicated Exti line.
305 * @param hexti Exti handle.
306 * @param pExtiConfig Pointer on structure to store Exti configuration.
307 * @retval HAL Status.
308 */
HAL_EXTI_GetConfigLine(EXTI_HandleTypeDef * hexti,EXTI_ConfigTypeDef * pExtiConfig)309 HAL_StatusTypeDef HAL_EXTI_GetConfigLine(EXTI_HandleTypeDef *hexti, EXTI_ConfigTypeDef *pExtiConfig)
310 {
311 __IO uint32_t *regaddr;
312 uint32_t regval;
313 uint32_t linepos;
314 uint32_t maskline;
315 uint32_t offset;
316
317 /* Check 0 pointer */
318 if ((hexti == 0) || (pExtiConfig == 0))
319 {
320 return HAL_ERROR;
321 }
322
323 /* Store handle line number to configiguration structure */
324 pExtiConfig->Line = hexti->Line;
325
326 /* compute line register offset and line mask */
327 offset = ((pExtiConfig->Line & EXTI_REG_MASK) >> EXTI_REG_SHIFT);
328 linepos = (pExtiConfig->Line & EXTI_PIN_MASK);
329 maskline = (1uL << linepos);
330
331 /* 1] Get core 1 mode : interrupt */
332 regaddr = (&EXTI->C1IMR1 + (EXTI_MODE_OFFSET * offset));
333 regval = *regaddr;
334
335 /* Check if selected line is enable */
336 if ((regval & maskline) != 0x00u)
337 {
338 pExtiConfig->Mode = EXTI_MODE_C1_INTERRUPT;
339 }
340 else
341 {
342 pExtiConfig->Mode = EXTI_MODE_C1_NONE;
343 }
344
345 /* Get Core 1 mode : event */
346 regaddr = (&EXTI->C1EMR1 + (EXTI_MODE_OFFSET * offset));
347 regval = *regaddr;
348
349 /* Check if selected line is enable */
350 if ((regval & maskline) != 0x00u)
351 {
352 pExtiConfig->Mode |= EXTI_MODE_C1_EVENT;
353 }
354
355 /* Get core 2 mode : interrupt */
356 regaddr = (&EXTI->C2IMR1 + (EXTI_MODE_OFFSET * offset));
357 regval = *regaddr;
358
359 /* Check if selected line is enable */
360 if ((regval & maskline) != 0x00u)
361 {
362 pExtiConfig->Mode |= EXTI_MODE_C2_INTERRUPT;
363 }
364 else
365 {
366 pExtiConfig->Mode |= EXTI_MODE_C2_NONE;
367 }
368
369 /* Get Core 2 mode : event */
370 regaddr = (&EXTI->C2EMR1 + (EXTI_MODE_OFFSET * offset));
371 regval = *regaddr;
372
373 /* Check if selected line is enable */
374 if ((regval & maskline) != 0x00u)
375 {
376 pExtiConfig->Mode |= EXTI_MODE_C2_EVENT;
377 }
378
379 /* 2] Get trigger for configurable lines : rising */
380 if ((pExtiConfig->Line & EXTI_CONFIG) != 0x00u)
381 {
382 regaddr = (&EXTI->RTSR1 + (EXTI_CONFIG_OFFSET * offset));
383 regval = *regaddr;
384
385 /* Check if configuration of selected line is enable */
386 if ((regval & maskline) != 0x00u)
387 {
388 pExtiConfig->Trigger = EXTI_TRIGGER_RISING;
389 }
390 else
391 {
392 pExtiConfig->Trigger = EXTI_TRIGGER_NONE;
393 }
394
395 /* Get falling configuration */
396 regaddr = (&EXTI->FTSR1 + (EXTI_CONFIG_OFFSET * offset));
397 regval = *regaddr;
398
399 /* Check if configuration of selected line is enable */
400 if ((regval & maskline) != 0x00u)
401 {
402 pExtiConfig->Trigger |= EXTI_TRIGGER_FALLING;
403 }
404
405 /* Get Gpio port selection for gpio lines */
406 if ((pExtiConfig->Line & EXTI_GPIO) == EXTI_GPIO)
407 {
408
409
410 regval = EXTI->EXTICR[linepos >> 2u];
411 pExtiConfig->GPIOSel = ((regval << (EXTI_EXTICR1_EXTI1_Pos * (3uL - (linepos & 0x03u)))) >> 24);
412 }
413 else
414 {
415 pExtiConfig->GPIOSel = 0x00u;
416 }
417 }
418 else
419 {
420 pExtiConfig->Trigger = EXTI_TRIGGER_NONE;
421 pExtiConfig->GPIOSel = 0x00u;
422 }
423
424 return HAL_OK;
425 }
426
427
428 /**
429 * @brief Clear whole configuration of a dedicated Exti line.
430 * @param hexti Exti handle.
431 * @retval HAL Status.
432 */
HAL_EXTI_ClearConfigLine(EXTI_HandleTypeDef * hexti)433 HAL_StatusTypeDef HAL_EXTI_ClearConfigLine(EXTI_HandleTypeDef *hexti)
434 {
435 __IO uint32_t *regaddr;
436 uint32_t regval;
437 uint32_t linepos;
438 uint32_t maskline;
439 uint32_t offset;
440
441 /* Check 0 pointer */
442 if (hexti == 0)
443 {
444 return HAL_ERROR;
445 }
446
447 /* compute line register offset and line mask */
448 offset = ((hexti->Line & EXTI_REG_MASK) >> EXTI_REG_SHIFT);
449 linepos = (hexti->Line & EXTI_PIN_MASK);
450 maskline = (1uL << linepos);
451
452 /* 1] Clear interrupt mode */
453 regaddr = (&EXTI->C1IMR1 + (EXTI_MODE_OFFSET * offset));
454 regval = (*regaddr & ~maskline);
455 *regaddr = regval;
456
457 // regaddr = (&EXTI->C2IMR1 + (EXTI_MODE_OFFSET * offset));
458 // regval = (*regaddr & ~maskline);
459 // *regaddr = regval;
460
461 /* 2] Clear event mode */
462 regaddr = (&EXTI->C1EMR1 + (EXTI_MODE_OFFSET * offset));
463 regval = (*regaddr & ~maskline);
464 *regaddr = regval;
465
466 // regaddr = (&EXTI->C2EMR1 + (EXTI_MODE_OFFSET * offset));
467 // regval = (*regaddr & ~maskline);
468 // *regaddr = regval;
469
470 // /* 3] Clear triggers in case of configurable lines */
471 // if ((hexti->Line & EXTI_CONFIG) != 0x00u)
472 // {
473 // regaddr = (&EXTI->RTSR1 + (EXTI_CONFIG_OFFSET * offset));
474 // regval = (*regaddr & ~maskline);
475 // *regaddr = regval;
476
477 // regaddr = (&EXTI->FTSR1 + (EXTI_CONFIG_OFFSET * offset));
478 // regval = (*regaddr & ~maskline);
479 // *regaddr = regval;
480
481 // /* Get Gpio port selection for gpio lines */
482 // if ((hexti->Line & EXTI_GPIO) == EXTI_GPIO)
483 // {
484 // assert_param(IS_EXTI_GPIO_PIN(linepos));
485
486 // regval = EXTI->EXTICR[linepos >> 2u];
487 // regval &= ~(EXTI_EXTICR1_EXTI0 << (EXTI_EXTICR1_EXTI1_Pos * (linepos & 0x03u)));
488 // EXTI->EXTICR[linepos >> 2u] = regval;
489 // }
490 // }
491
492 return HAL_OK;
493 }
494
495 /**
496 * @brief Register callback for a dedicaated Exti line.
497 * @param hexti Exti handle.
498 * @param CallbackID User callback identifier.
499 * This parameter can be one of @arg @ref EXTI_CallbackIDTypeDef values.
500 * @param pPendingCbfn function pointer to be stored as callback.
501 * @retval HAL Status.
502 */
HAL_EXTI_RegisterCallback(EXTI_HandleTypeDef * hexti,EXTI_CallbackIDTypeDef CallbackID,void (* pPendingCbfn)(void))503 HAL_StatusTypeDef HAL_EXTI_RegisterCallback(EXTI_HandleTypeDef *hexti, EXTI_CallbackIDTypeDef CallbackID, void (*pPendingCbfn)(void))
504 {
505 HAL_StatusTypeDef status = HAL_OK;
506
507 switch (CallbackID)
508 {
509 case HAL_EXTI_COMMON_CB_ID:
510 hexti->RisingCallback = pPendingCbfn;
511 hexti->FallingCallback = pPendingCbfn;
512 break;
513
514 case HAL_EXTI_RISING_CB_ID:
515 hexti->RisingCallback = pPendingCbfn;
516 break;
517
518 case HAL_EXTI_FALLING_CB_ID:
519 hexti->FallingCallback = pPendingCbfn;
520 break;
521
522 default:
523 status = HAL_ERROR;
524 break;
525 }
526
527 return status;
528 }
529
530 /**
531 * @brief Store line number as handle private field.
532 * @param hexti Exti handle.
533 * @param ExtiLine Exti line number.
534 * This parameter can be from 0 to @ref EXTI_LINE_NB.
535 * @retval HAL Status.
536 */
HAL_EXTI_GetHandle(EXTI_HandleTypeDef * hexti,uint32_t ExtiLine)537 HAL_StatusTypeDef HAL_EXTI_GetHandle(EXTI_HandleTypeDef *hexti, uint32_t ExtiLine)
538 {
539 /* Check null pointer */
540 if (hexti == NULL)
541 {
542 return HAL_ERROR;
543 }
544 else
545 {
546 /* Store line number as handle private field */
547 hexti->Line = ExtiLine;
548
549 return HAL_OK;
550 }
551 }
552
553
554 /**
555 * @}
556 */
557
558 /** @addtogroup EXTI_Exported_Functions_Group2
559 * @brief EXTI IO functions.
560 *
561 @verbatim
562 ===============================================================================
563 ##### IO operation functions #####
564 ===============================================================================
565
566 @endverbatim
567 * @{
568 */
569
570 /**
571 * @brief Handle EXTI interrupt request.
572 * @param hexti Exti handle.
573 * @retval none.
574 */
HAL_EXTI_IRQHandler(EXTI_HandleTypeDef * hexti)575 void HAL_EXTI_IRQHandler(EXTI_HandleTypeDef *hexti)
576 {
577 __IO uint32_t *regaddr;
578 uint32_t regval;
579 uint32_t maskline;
580 uint32_t offset;
581
582 /* Compute line register offset and line mask */
583 offset = ((hexti->Line & EXTI_REG_MASK) >> EXTI_REG_SHIFT);
584 maskline = (1uL << (hexti->Line & EXTI_PIN_MASK));
585
586 /* Get rising edge pending bit */
587 regaddr = (&EXTI->RPR1 + (EXTI_CONFIG_OFFSET * offset));
588 regval = (*regaddr & maskline);
589
590 if (regval != 0x00u)
591 {
592 /* Clear pending bit */
593 *regaddr = maskline;
594
595 /* Call rising callback */
596 if (hexti->RisingCallback != 0)
597 {
598 hexti->RisingCallback();
599 }
600 }
601
602 /* Get falling edge pending bit */
603 regaddr = (&EXTI->FPR1 + (EXTI_CONFIG_OFFSET * offset));
604 regval = (*regaddr & maskline);
605
606 if (regval != 0x00u)
607 {
608 /* Clear pending bit */
609 *regaddr = maskline;
610
611 /* Call rising callback */
612 if (hexti->FallingCallback != 0)
613 {
614 hexti->FallingCallback();
615 }
616 }
617 }
618
619
620 /**
621 * @brief Get interrupt pending bit of a dedicated line.
622 * @param hexti Exti handle.
623 * @param Edge Specify which pending edge as to be checked.
624 * This parameter can be one of the following values:
625 * @arg @ref EXTI_TRIGGER_RISING
626 * @arg @ref EXTI_TRIGGER_FALLING
627 * @retval 1 if interrupt is pending else 0.
628 */
HAL_EXTI_GetPending(EXTI_HandleTypeDef * hexti,uint32_t Edge)629 uint32_t HAL_EXTI_GetPending(EXTI_HandleTypeDef *hexti, uint32_t Edge)
630 {
631 __IO uint32_t *regaddr;
632 uint32_t regval;
633 uint32_t linepos;
634 uint32_t maskline;
635 uint32_t offset;
636
637
638 /* compute line register offset and line mask */
639 offset = ((hexti->Line & EXTI_REG_MASK) >> EXTI_REG_SHIFT);
640 linepos = (hexti->Line & EXTI_PIN_MASK);
641 maskline = (1uL << linepos);
642
643 if (Edge != EXTI_TRIGGER_RISING)
644 {
645 /* Get falling edge pending bit */
646 regaddr = (&EXTI->FPR1 + (EXTI_CONFIG_OFFSET * offset));
647 }
648 else
649 {
650 /* Get rising edge pending bit */
651 regaddr = (&EXTI->RPR1 + (EXTI_CONFIG_OFFSET * offset));
652 }
653
654 /* return 1 if bit is set else 0 */
655 regval = ((*regaddr & maskline) >> linepos);
656 return regval;
657 }
658
659
660 /**
661 * @brief Clear interrupt pending bit of a dedicated line.
662 * @param hexti Exti handle.
663 * @param Edge Specify which pending edge as to be clear.
664 * This parameter can be one of the following values:
665 * @arg @ref EXTI_TRIGGER_RISING
666 * @arg @ref EXTI_TRIGGER_FALLING
667 * @retval None.
668 */
HAL_EXTI_ClearPending(EXTI_HandleTypeDef * hexti,uint32_t Edge)669 void HAL_EXTI_ClearPending(EXTI_HandleTypeDef *hexti, uint32_t Edge)
670 {
671 __IO uint32_t *regaddr;
672 uint32_t maskline;
673 uint32_t offset;
674
675 /* compute line register offset and line mask */
676 offset = ((hexti->Line & EXTI_REG_MASK) >> EXTI_REG_SHIFT);
677 maskline = (1uL << (hexti->Line & EXTI_PIN_MASK));
678
679 if (Edge != EXTI_TRIGGER_RISING)
680 {
681 /* Get falling edge pending register address */
682 regaddr = (&EXTI->FPR1 + (EXTI_CONFIG_OFFSET * offset));
683 }
684 else
685 {
686 /* Get falling edge pending register address */
687 regaddr = (&EXTI->RPR1 + (EXTI_CONFIG_OFFSET * offset));
688 }
689
690 /* Clear Pending bit */
691 *regaddr = maskline;
692 }
693
694
695 /**
696 * @brief Generate a software interrupt for a dedicated line.
697 * @param hexti Exti handle.
698 * @retval None.
699 */
HAL_EXTI_GenerateSWI(EXTI_HandleTypeDef * hexti)700 void HAL_EXTI_GenerateSWI(EXTI_HandleTypeDef *hexti)
701 {
702 __IO uint32_t *regaddr;
703 uint32_t maskline;
704 uint32_t offset;
705
706 /* compute line register offset and line mask */
707 offset = ((hexti->Line & EXTI_REG_MASK) >> EXTI_REG_SHIFT);
708 maskline = (1uL << (hexti->Line & EXTI_PIN_MASK));
709
710 regaddr = (&EXTI->SWIER1 + (EXTI_CONFIG_OFFSET * offset));
711 *regaddr = maskline;
712 }
713
714
715 /**
716 * @}
717 */
718
719 /**
720 * @}
721 */
722
723 /**
724 * @}
725 */
726
727 /**
728 * @}
729 */
730
731 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
732