1 // Copyright (C) 2022 Beken Corporation 2 // 3 // Licensed under the Apache License, Version 2.0 (the "License"); 4 // you may not use this file except in compliance with the License. 5 // You may obtain a copy of the License at 6 // 7 // http://www.apache.org/licenses/LICENSE-2.0 8 // 9 // Unless required by applicable law or agreed to in writing, software 10 // distributed under the License is distributed on an "AS IS" BASIS, 11 // WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 12 // See the License for the specific language governing permissions and 13 // limitations under the License. 14 15 #pragma once 16 17 #ifdef __cplusplus 18 extern "C" { 19 #endif 20 21 #include "bk_arm_arch.h" 22 23 #define PS_USE_GPIO_TRACE 0 24 25 #if (CONFIG_SOC_BK7231) 26 #define PS_MAC_DBG_GPIO (0x0802800 +(10*4)) 27 #define PS_RF_DBG_GPIO (0x0802800 +(14*4)) 28 #define PS_HWUP_DBG_GPIO (0x0802800 +(15*4)) 29 #define PS_BCN_DBG_GPIO (0x0802800 +(11*4)) 30 #define PS_HWDOWN_DBG_GPIO (0x0802800 +(17*4)) 31 #define PS_TM_DBG_GPIO (0x0802800 +(16*4)) 32 #elif (CONFIG_SOC_BK7231U) 33 #define PS_MAC_DBG_GPIO (0x0802800 +(23*4)) 34 #define PS_RF_DBG_GPIO (0x0802800 +(22*4)) 35 #define PS_HWUP_DBG_GPIO (0x0802800 +(21*4)) 36 #define PS_BCN_DBG_GPIO (0x0802800 +(2*4)) 37 #define PS_HWDOWN_DBG_GPIO (0x0802800 +(20*4)) 38 #define PS_TM_DBG_GPIO (0x0802800 +(3*4)) 39 #elif (CONFIG_SOC_BK7231N) || (CONFIG_SOC_BK7236A) || (CONFIG_SOC_BK7256XX) 40 #define PS_MAC_DBG_GPIO (0x0802800 +(6*4)) 41 #define PS_RF_DBG_GPIO (0x0802800 +(7*4)) 42 #define PS_HWUP_DBG_GPIO (0x0802800 +(8*4)) 43 #define PS_BCN_DBG_GPIO (0x0802800 +(9*4)) 44 #define PS_HWDOWN_DBG_GPIO (0x0802800 +(20*4)) 45 #define PS_TM_DBG_GPIO (0x0802800 +(21*4)) 46 #elif (CONFIG_SOC_BK7251) || (CONFIG_SOC_BK7271) 47 #define PS_MAC_DBG_GPIO (0x0802800 +(27*4)) 48 #define PS_RF_DBG_GPIO (0x0802800 +(22*4)) 49 #define PS_HWUP_DBG_GPIO (0x0802800 +(23*4)) 50 #define PS_BCN_DBG_GPIO (0x0802800 +(30*4)) 51 #define PS_HWDOWN_DBG_GPIO (0x0802800 +(20*4)) 52 #define PS_TM_DBG_GPIO (0x0802800 +(21*4)) 53 #endif 54 55 #if PS_USE_GPIO_TRACE 56 #define PS_DEBUG_RF_OUT (REG_WRITE(PS_RF_DBG_GPIO, 0x00)) 57 #define PS_DEBUG_HWUP_OUT (REG_WRITE(PS_HWUP_DBG_GPIO, 0x00)) 58 #define PS_DEBUG_MAC_OUT (REG_WRITE(PS_MAC_DBG_GPIO, 0x00)) 59 #define PS_DEBUG_BCN_OUT (REG_WRITE(PS_BCN_DBG_GPIO, 0x00)) 60 #define PS_DEBUG_HWDOWN_OUT (REG_WRITE(PS_HWDOWN_DBG_GPIO, 0x00)) 61 #define PS_DEBUG_TM_OUT (REG_WRITE(PS_TM_DBG_GPIO, 0x00)) 62 63 #define PS_DEBUG_RF_TRIGER (REG_WRITE(PS_RF_DBG_GPIO,(REG_READ(PS_RF_DBG_GPIO))^(0x2))) 64 #define PS_DEBUG_BCN_TRIGER (REG_WRITE(PS_BCN_DBG_GPIO,(REG_READ(PS_BCN_DBG_GPIO))^(0x2))) 65 #define PS_DEBUG_MAC_TRIGER (REG_WRITE(PS_MAC_DBG_GPIO,(REG_READ(PS_MAC_DBG_GPIO))^(0x2))) 66 #define PS_DEBUG_HWUP_TRIGER (REG_WRITE(PS_HWUP_DBG_GPIO,(REG_READ(PS_HWUP_DBG_GPIO))^(0x2))) 67 #define PS_DEBUG_HWDOWN_TRIGER (REG_WRITE(PS_HWDOWN_DBG_GPIO,(REG_READ(PS_HWDOWN_DBG_GPIO))^(0x2))) 68 #define PS_DEBUG_TM_TRIGER (REG_WRITE(PS_TM_DBG_GPIO,(REG_READ(PS_TM_DBG_GPIO))^(0x2))) 69 70 #else 71 #define PS_DEBUG_RF_OUT 72 #define PS_DEBUG_HWUP_OUT 73 #define PS_DEBUG_MAC_OUT 74 #define PS_DEBUG_BCN_OUT 75 #define PS_DEBUG_HWDOWN_OUT 76 #define PS_DEBUG_TM_OUT 77 #define PS_DEBUG_RF_TRIGER 78 #define PS_DEBUG_BCN_TRIGER 79 #define PS_DEBUG_MAC_TRIGER 80 #define PS_DEBUG_HWUP_TRIGER 81 #define PS_DEBUG_HWDOWN_TRIGER 82 #define PS_DEBUG_TM_TRIGER 83 #endif 84 85 #ifdef __cplusplus 86 } 87 #endif 88