1 // Copyright 2020 Espressif Systems (Shanghai) PTE LTD
2 //
3 // Licensed under the Apache License, Version 2.0 (the "License");
4 // you may not use this file except in compliance with the License.
5 // You may obtain a copy of the License at
6 //
7 // http://www.apache.org/licenses/LICENSE-2.0
8 //
9 // Unless required by applicable law or agreed to in writing, software
10 // distributed under the License is distributed on an "AS IS" BASIS,
11 // WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
12 // See the License for the specific language governing permissions and
13 // limitations under the License.
14
15 #include "sdkconfig.h"
16 #include "bootloader_console.h"
17 #include "soc/uart_periph.h"
18 #include "soc/uart_channel.h"
19 #include "soc/io_mux_reg.h"
20 #include "soc/gpio_periph.h"
21 #include "soc/gpio_sig_map.h"
22 #include "soc/rtc.h"
23 #include "hal/clk_gate_ll.h"
24 #include "hal/gpio_hal.h"
25 #if CONFIG_IDF_TARGET_ESP32S2
26 #include "esp32s2/rom/usb/cdc_acm.h"
27 #include "esp32s2/rom/usb/usb_common.h"
28 #elif CONFIG_IDF_TARGET_ESP32C3
29 #include "esp32c3/rom/ets_sys.h"
30 #endif
31 #include "esp_rom_gpio.h"
32 #include "esp_rom_uart.h"
33 #include "esp_rom_sys.h"
34 #include "esp_rom_caps.h"
35
36 #ifdef CONFIG_ESP_CONSOLE_UART_NONE
bootloader_console_init(void)37 void bootloader_console_init(void)
38 {
39 esp_rom_install_channel_putc(1, NULL);
40 esp_rom_install_channel_putc(2, NULL);
41 }
42 #endif // CONFIG_ESP_CONSOLE_UART_NONE
43
44 #ifdef CONFIG_ESP_CONSOLE_UART
bootloader_console_init(void)45 void bootloader_console_init(void)
46 {
47 const int uart_num = CONFIG_ESP_CONSOLE_UART_NUM;
48
49 #if !ESP_ROM_SUPPORT_MULTIPLE_UART
50 /* esp_rom_install_channel_put is not available unless multiple UARTs are supported */
51 esp_rom_install_uart_printf();
52 #else
53 esp_rom_install_channel_putc(1, esp_rom_uart_putc);
54 #endif
55
56 // Wait for UART FIFO to be empty.
57 esp_rom_uart_tx_wait_idle(0);
58
59 #if CONFIG_ESP_CONSOLE_UART_CUSTOM
60 // Some constants to make the following code less upper-case
61 const int uart_tx_gpio = CONFIG_ESP_CONSOLE_UART_TX_GPIO;
62 const int uart_rx_gpio = CONFIG_ESP_CONSOLE_UART_RX_GPIO;
63 // Switch to the new UART (this just changes UART number used for esp_rom_printf in ROM code).
64 #if ESP_ROM_SUPPORT_MULTIPLE_UART
65 esp_rom_uart_set_as_console(uart_num);
66 #endif
67 // If console is attached to UART1 or if non-default pins are used,
68 // need to reconfigure pins using GPIO matrix
69 if (uart_num != 0 ||
70 uart_tx_gpio != UART_NUM_0_TXD_DIRECT_GPIO_NUM ||
71 uart_rx_gpio != UART_NUM_0_RXD_DIRECT_GPIO_NUM) {
72 // Change default UART pins back to GPIOs
73 gpio_hal_iomux_func_sel(PERIPHS_IO_MUX_U0RXD_U, PIN_FUNC_GPIO);
74 gpio_hal_iomux_func_sel(PERIPHS_IO_MUX_U0TXD_U, PIN_FUNC_GPIO);
75 // Route GPIO signals to/from pins
76 const uint32_t tx_idx = uart_periph_signal[uart_num].tx_sig;
77 const uint32_t rx_idx = uart_periph_signal[uart_num].rx_sig;
78 PIN_INPUT_ENABLE(GPIO_PIN_MUX_REG[uart_rx_gpio]);
79 esp_rom_gpio_pad_pullup_only(uart_rx_gpio);
80 esp_rom_gpio_connect_out_signal(uart_tx_gpio, tx_idx, 0, 0);
81 esp_rom_gpio_connect_in_signal(uart_rx_gpio, rx_idx, 0);
82 // Enable the peripheral
83 periph_ll_enable_clk_clear_rst(PERIPH_UART0_MODULE + uart_num);
84 }
85 #endif // CONFIG_ESP_CONSOLE_UART_CUSTOM
86
87 // Set configured UART console baud rate
88 uint32_t clock_hz = rtc_clk_apb_freq_get();
89 #if ESP_ROM_UART_CLK_IS_XTAL
90 clock_hz = UART_CLK_FREQ_ROM; // From esp32-s3 on, UART clock source is selected to XTAL in ROM
91 #endif
92 esp_rom_uart_set_clock_baudrate(uart_num, clock_hz, CONFIG_ESP_CONSOLE_UART_BAUDRATE);
93 }
94 #endif // CONFIG_ESP_CONSOLE_UART
95
96 #ifdef CONFIG_ESP_CONSOLE_USB_CDC
97 /* Buffer for CDC data structures. No RX buffer allocated. */
98 static char s_usb_cdc_buf[ESP_ROM_CDC_ACM_WORK_BUF_MIN];
99
bootloader_console_init(void)100 void bootloader_console_init(void)
101 {
102 #ifdef CONFIG_IDF_TARGET_ESP32S2
103 /* ESP32-S2 specific patch to set the correct serial number in the descriptor.
104 * Later chips don't need this.
105 */
106 rom_usb_cdc_set_descriptor_patch();
107 #endif
108
109 esp_rom_uart_usb_acm_init(s_usb_cdc_buf, sizeof(s_usb_cdc_buf));
110 esp_rom_uart_set_as_console(ESP_ROM_UART_USB);
111 esp_rom_install_channel_putc(1, bootloader_console_write_char_usb);
112 }
113 #endif //CONFIG_ESP_CONSOLE_USB_CDC
114