1 /* 2 * Copyright (c) 2021 Chipsea Technologies (Shenzhen) Corp., Ltd. All rights reserved. 3 * Licensed under the Apache License, Version 2.0 (the "License"); 4 * you may not use this file except in compliance with the License. 5 * You may obtain a copy of the License at 6 * 7 * http://www.apache.org/licenses/LICENSE-2.0 8 * 9 * Unless required by applicable law or agreed to in writing, software 10 * distributed under the License is distributed on an "AS IS" BASIS, 11 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 12 * See the License for the specific language governing permissions and 13 * limitations under the License. 14 */ 15 #ifndef _CS1000LITE_GPIO_H_ 16 #define _CS1000LITE_GPIO_H_ 17 18 #include "chip.h" 19 20 /* ========================================================================== */ 21 /* ================ CS1000LITE_GPIO ================ */ 22 /* ========================================================================== */ 23 #define REG_CS1000LITE_GPIO_BASE 0x50011000 24 25 typedef struct { 26 __IO uint32_t VR; /* 0x000 (R/W) : Val Reg */ 27 __IO uint32_t MR; /* 0x004 (R/W) : Msk Reg */ 28 __IO uint32_t DR; /* 0x008 (R/W) : Dir Reg */ 29 __IO uint32_t TELR; /* 0x00C (R/W) : Trig Edg or Lvl Reg */ 30 __IO uint32_t TER; /* 0x010 (R/W) : Trig Edg Reg */ 31 __IO uint32_t TLR; /* 0x014 (R/W) : Trig Lvl Reg */ 32 __IO uint32_t ICR; /* 0x018 (R/W) : Int Ctrl Reg */ 33 __I uint32_t RESERVED0; /* 0x01C (R) : Reserved */ 34 __I uint32_t ISR; /* 0x020 (R) : Int Stat Reg */ 35 __O uint32_t IRR; /* 0x024 (W) : Int Rm Reg */ 36 __IO uint32_t TIR; /* 0x028 (R/W) : Trig In Reg */ 37 __IO uint32_t FR; /* 0x02C (R/W) : Fltr Reg */ 38 } HWP_CS1000LITE_GPIO_T; 39 40 static HWP_CS1000LITE_GPIO_T * const cs1000liteGpio = ((HWP_CS1000LITE_GPIO_T *)REG_CS1000LITE_GPIO_BASE); 41 42 #endif /* _CS1000LITE_GPIO_H_ */ 43