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1 /*
2  * Copyright (c) 2021 Chipsea Technologies (Shenzhen) Corp., Ltd. All rights reserved.
3  * Licensed under the Apache License, Version 2.0 (the "License");
4  * you may not use this file except in compliance with the License.
5  * You may obtain a copy of the License at
6  *
7  *     http://www.apache.org/licenses/LICENSE-2.0
8  *
9  * Unless required by applicable law or agreed to in writing, software
10  * distributed under the License is distributed on an "AS IS" BASIS,
11  * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
12  * See the License for the specific language governing permissions and
13  * limitations under the License.
14  */
15 #ifndef _CS1000LITE_MSADC_H_
16 #define _CS1000LITE_MSADC_H_
17 
18 #include "chip.h"
19 
20 // =============================================================================
21 //  MACROS
22 // =============================================================================
23 
24 // =============================================================================
25 //  TYPES
26 // =============================================================================
27 
28 // =============================================================================
29 // CS1000LITE_MSADC_T
30 // -----------------------------------------------------------------------------
31 ///
32 // =============================================================================
33 #define REG_CS1000LITE_MSADC_BASE 0x5001B000
34 
35 typedef struct {
36   __IO uint32_t                          cfg_msadc_mode;               //0x00000000
37   __IO uint32_t                          cfg_msadc_sw_ctrl0;           //0x00000004
38   __IO uint32_t                          cfg_msadc_sw_ctrl1;           //0x00000008
39   __IO uint32_t                          cfg_msadc_ana_ctrl0;          //0x0000000C
40   __IO uint32_t                          cfg_msadc_ro_acc;             //0x00000010
41   __IO uint32_t                          cfg_msadc_ro_test_acc_0;      //0x00000014
42   __IO uint32_t                          cfg_msadc_ro_test_acc_1;      //0x00000018
43   __IO uint32_t                          cfg_msadc_int_raw;            //0x0000001C
44   __IO uint32_t                          cfg_msadc_int_status;         //0x00000020
45   __IO uint32_t                          cfg_msadc_int_mask;           //0x00000024
46 } HWP_CS1000LITE_MSADC_T;
47 
48 static HWP_CS1000LITE_MSADC_T * const cs1000liteMsadc = ((HWP_CS1000LITE_MSADC_T *)REG_CS1000LITE_MSADC_BASE);
49 
50 
51 //cfg_msadc_mode
52 #define CS1000LITE_MSADC_CFG_MSADC_MODE (1<<0)
53 #define CS1000LITE_MSADC_CFG_MSADC_HW_TEST_CHANNEL (1<<1)
54 
55 //cfg_msadc_sw_ctrl0
56 #define CS1000LITE_MSADC_CFG_MSADC_SW_START_PULSE (1<<0)
57 #define CS1000LITE_MSADC_CFG_MSADC_SW_STOP_PULSE (1<<1)
58 #define CS1000LITE_MSADC_CFG_MSADC_SW_CLEAR_PULSE (1<<2)
59 
60 //cfg_msadc_sw_ctrl1
61 #define CS1000LITE_MSADC_CFG_MSADC_SW_MUX_BITS(n) (((n)&15)<<0)
62 #define CS1000LITE_MSADC_CFG_MSADC_TEST_0_MUX_BITS(n) (((n)&15)<<4)
63 #define CS1000LITE_MSADC_CFG_MSADC_TEST_1_MUX_BITS(n) (((n)&15)<<8)
64 #define CS1000LITE_MSADC_CFG_MSADC_WAIT_CNT(n) (((n)&15)<<12)
65 #define CS1000LITE_MSADC_CFG_MSADC_WINDOW(n) (((n)&0xFFF)<<16)
66 #define CS1000LITE_MSADC_CFG_MSADC_SW_DIFF_MODE (1<<28)
67 
68 //cfg_msadc_ana_ctrl0
69 #define CS1000LITE_MSADC_CFG_ANA_MSADC_CHNP_SEL (1<<0)
70 #define CS1000LITE_MSADC_CFG_ANA_MSADC_CMP_BIT (1<<1)
71 #define CS1000LITE_MSADC_CFG_ANA_MSADC_VBE_CAL_BIT(n) (((n)&0x7F)<<2)
72 #define CS1000LITE_MSADC_CFG_ANA_MSADC_TS_MODE (1<<9)
73 #define CS1000LITE_MSADC_CFG_ANA_MSADC_SDM_MODE (1<<10)
74 #define CS1000LITE_MSADC_CFG_ANA_MSADC_TEST_MODE (1<<11)
75 #define CS1000LITE_MSADC_CFG_ANA_MSADC_IBIAS_BIT(n) (((n)&7)<<12)
76 #define CS1000LITE_MSADC_CFG_ANA_MSADC_CHOP_EN (1<<15)
77 #define CS1000LITE_MSADC_CFG_ANA_MSADC_SDM_GAIN_BIT (1<<16)
78 #define CS1000LITE_MSADC_CFG_ANA_MSADC_DEM_EN(n) (((n)&3)<<17)
79 #define CS1000LITE_MSADC_CFG_ANA_MSADC_ADC_FF_EN (1<<19)
80 
81 //cfg_msadc_ro_acc
82 #define CS1000LITE_MSADC_RO_MSADC_DAT_ACC(n) (((n)&0x3FFFFF)<<0)
83 
84 //cfg_msadc_ro_test_acc_0
85 #define CS1000LITE_MSADC_RO_MSADC_TEST_ACC_0(n) (((n)&0x3FFFFF)<<0)
86 
87 //cfg_msadc_ro_test_acc_1
88 #define CS1000LITE_MSADC_RO_MSADC_TEST_ACC_1(n) (((n)&0x3FFFFF)<<0)
89 
90 //cfg_msadc_int_raw
91 #define CS1000LITE_MSADC_MASDC_INT_RAW (1<<0)
92 
93 //cfg_msadc_int_status
94 #define CS1000LITE_MSADC_MSADC_INT_STATUS (1<<0)
95 
96 //cfg_msadc_int_mask
97 #define CS1000LITE_MSADC_CFG_MSADC_INT_MASK (1<<0)
98 
99 #endif
100