1 // Copyright (C) 2022 Beken Corporation 2 // 3 // Licensed under the Apache License, Version 2.0 (the "License"); 4 // you may not use this file except in compliance with the License. 5 // You may obtain a copy of the License at 6 // 7 // http://www.apache.org/licenses/LICENSE-2.0 8 // 9 // Unless required by applicable law or agreed to in writing, software 10 // distributed under the License is distributed on an "AS IS" BASIS, 11 // WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 12 // See the License for the specific language governing permissions and 13 // limitations under the License. 14 15 #pragma once 16 17 #include <common/bk_err.h> 18 #include <driver/hal/hal_gpio_types.h> 19 20 #ifdef __cplusplus 21 extern "C" { 22 #endif 23 24 #define CONFIG_ADC_STATIS 1 25 26 27 /** 28 * @brief ADC defines 29 * @addtogroup bk_api_adc_defs ADC API group 30 * @{ 31 */ 32 //TODO fix it 33 #define ADC_ACURACY_10_BIT 0 34 #define ADC_ACURACY_12_BIT 1 35 36 #define ADC_READ_SEMAPHORE_WAIT_TIME 1000 //TODO fix it 37 38 #define ADC_SRC_DCO_CLK 120000000 39 #define ADC_SRC_DPLL_CLK 240000000 40 #define ADC_SRC_26M_CLK 26000000 41 #define ADC_SRC_32M_CLK 32000000 42 43 #define ADC_FIFO_LEVEL_MAX 32 44 45 46 /** 47 * @} 48 */ 49 50 51 /** 52 * @brief ADC enum defines 53 * @defgroup bk_api_adc_enum ADC enums 54 * @ingroup bk_api_adc 55 * @{ 56 */ 57 typedef enum { 58 ADC_SCLK_DCO = 0, /**< ADC source clock dco */ 59 ADC_SCLK_XTAL_26M, /**< ADC source clock xtal 26M */ 60 ADC_SCLK_DPLL, /**< ADC source clock dpll */ 61 ADC_SCLK_32M, /**< ADC source clock 32M */ 62 ADC_SCLK_NONE, /**< ADC has not such source clock*/ 63 } adc_src_clk_t; 64 65 typedef enum { 66 ADC_SLEEP_MODE = 0, /**< ADC sleep mode */ 67 ADC_SINGLE_STEP_MODE, /**< ADC single step mode */ 68 ADC_SOFTWARE_CONTRL_MODE, /**< ADC software control mode */ 69 ADC_CONTINUOUS_MODE,/**< ADC continuous mode */ 70 ADC_NONE_MODE, 71 } adc_mode_t; 72 73 typedef enum { 74 ADC_1 = 1, 75 ADC_2, 76 ADC_3, 77 ADC_4, 78 ADC_5, 79 ADC_6, 80 ADC_7, 81 ADC_8, 82 ADC_9, 83 ADC_10, 84 ADC_11, 85 ADC_12, 86 ADC_13, 87 ADC_MAX, 88 } adc_chan_t; 89 90 #if ADC_ACURACY_10_BIT 91 typedef enum { 92 ADC_SATURATE_MODE_NONE = 0, 93 ADC_SATURATE_MODE_0, 94 ADC_SATURATE_MODE_1, 95 } adc_saturate_mode_t; 96 #else 97 typedef enum { 98 ADC_SATURATE_MODE_NONE = 0, 99 ADC_SATURATE_MODE_0, 100 ADC_SATURATE_MODE_1, 101 ADC_SATURATE_MODE_2, 102 ADC_SATURATE_MODE_3, 103 } adc_saturate_mode_t; 104 #endif 105 106 /** 107 * @} 108 */ 109 110 /** 111 * @brief ADC struct defines 112 * @defgroup bk_api_adc_structs in ADC 113 * @ingroup bk_api_adc 114 * @{ 115 */ 116 117 typedef struct { 118 uint32_t clk; /**< ADC sample clock division: adc_clk=clk/[2*(pre_div +1)] */ 119 uint32_t sample_rate; /**< ADC sample rate, every period ouput 16 adc_clks in continuous mode period = (16+samp_rate)*adc_clk*/ 120 uint32_t adc_filter; /**< ADC filter: the output data rate = period/(adc_filter +1) */ 121 uint32_t steady_ctrl; /**< ADC steady_ctrl : steady time = (steady_ctrl +1)*8 adc_clk */ 122 adc_mode_t adc_mode; /**< ADC mode set */ 123 adc_src_clk_t src_clk; /**< ADC source clcok choose*/ 124 adc_chan_t chan; /**< ADC work channel*/ 125 adc_saturate_mode_t saturate_mode; /**< ADC saturate_mode*/ 126 uint32_t is_open; /**< ADC channel is open or not*/ 127 uint16_t *output_buf; /**< ADC channel output buffer*/ 128 int32_t output_buf_len; /**< ADC channel output buffer length*/ 129 } adc_config_t; 130 131 132 typedef struct { 133 adc_chan_t adc_chan; 134 gpio_id_t gpio_id; 135 gpio_dev_t gpio_dev; 136 } adc_gpio_map_t; 137 138 /** 139 * @} 140 */ 141 142 143 #ifdef __cplusplus 144 } 145 #endif 146 147