1 // Copyright (C) 2022 Beken Corporation 2 // 3 // Licensed under the Apache License, Version 2.0 (the "License"); 4 // you may not use this file except in compliance with the License. 5 // You may obtain a copy of the License at 6 // 7 // http://www.apache.org/licenses/LICENSE-2.0 8 // 9 // Unless required by applicable law or agreed to in writing, software 10 // distributed under the License is distributed on an "AS IS" BASIS, 11 // WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 12 // See the License for the specific language governing permissions and 13 // limitations under the License. 14 15 #pragma once 16 //#include <common/bk_include.h> 17 //#include <soc/soc.h> 18 //#include <soc/soc_port.h> 19 //#include "hal_config.h" 20 //#include <common/bk_err.h> 21 22 #ifdef __cplusplus 23 extern "C" { 24 #endif 25 26 #define DISP_INT_EN 1 /**< enable lcd cpu level int*/ 27 #define DSIP_DISCLK_ALWAYS_ON 0 /**< 0: bus clock open when module is select,1:bus clock always open*/ 28 29 30 #define LCD_X_PIXEL_1280 1280 31 #define LCD_Y_PIXEL_720 720 32 #define LCD_X_PIXEL_640 640 33 #define LCD_Y_PIXEL_480 480 34 #define LCD_X_PIXEL_480 480 35 #define LCD_Y_PIXEL_272 272 36 #define LCD_X_PIXEL_1024 1024 37 #define LCD_Y_PIXEL_600 600 38 39 /**< 480*272 RGB cfg*/ 40 #define RGB_HSYNC_BACK_PORCH 40 41 #define RGB_HSYNC_FRONT_PORCH 5 42 #define RGB_VSYNC_BACK_PORCH 8 43 #define RGB_VSYNC_FRONT_PORCH 8 44 45 #define RGB_720P_HSYNC_BACK_PORCH 45 46 #define RGB_720P_HSYNC_FRONT_PORCH 45 47 #define RGB_720P_VSYNC_BACK_PORCH 5 48 #define RGB_720P_VSYNC_FRONT_PORCH 5 49 50 #define HSYNC_BACK_LOW 2 51 #define VSYNC_BACK_LOW 2 52 53 /**< 8080 cfg*/ 54 #define VERIFY_1MS_COUNT 0x64 55 #define TIK_CNT 0x2 56 #define DATA_FIFO_WR_THRD 0x80 57 #define DATA_FIFO_RD_THRD 0x180 58 #define CMD_FIFO_WR_THRD 0x60 59 #define CMD_FIFO_RD_THRD 0 60 61 typedef enum { 62 CONTINUE_MODE = 0, 63 DISCONTINUE_MODE 64 } discontinue_mode; 65 66 67 68 typedef enum { 69 DISP_DIV_H_0 = 0, 70 DISP_DIV_H_1, 71 DISP_DIV_H_2, 72 DISP_DIV_H_3, 73 DISP_DIV_H_4, 74 DISP_DIV_H_5, 75 DISP_DIV_H_6, 76 DISP_DIV_H_7, 77 } disp_div_h_t; 78 79 typedef enum { 80 DISP_DIV_L_0 = 0, 81 DISP_DIV_L_1, 82 } disp_div_l_t; 83 84 typedef enum { 85 DISP_CLK_320M = 0, 86 DISP_CLK_120M, 87 88 } disp_core_clk_sel_t; 89 90 #ifdef __cplusplus 91 } 92 #endif 93 94