1 // Copyright 2015-2017 Espressif Systems (Shanghai) PTE LTD 2 // 3 // Licensed under the Apache License, Version 2.0 (the "License"); 4 // you may not use this file except in compliance with the License. 5 // You may obtain a copy of the License at 6 // 7 // http://www.apache.org/licenses/LICENSE-2.0 8 // 9 // Unless required by applicable law or agreed to in writing, software 10 // distributed under the License is distributed on an "AS IS" BASIS, 11 // WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 12 // See the License for the specific language governing permissions and 13 // limitations under the License. 14 15 16 /** 17 * @brief initialize cache invalid access interrupt 18 * 19 * This function enables cache invalid access interrupt source and connects it 20 * to interrupt input number ETS_MEMACCESS_ERR_INUM (see soc/soc.h). It is called 21 * from the startup code. 22 */ 23 void esp_cache_err_int_init(void); 24 25 26 /** 27 * @brief get the CPU which caused cache invalid access interrupt 28 * @return 29 * - PRO_CPU_NUM, if PRO_CPU has caused cache IA interrupt 30 * - APP_CPU_NUM, if APP_CPU has caused cache IA interrupt 31 * - (-1) otherwise 32 */ 33 int esp_cache_err_get_cpuid(void); 34