1 /* 2 * g2d_top_type/g2d_top_type.h 3 * 4 * Copyright (c) 2007-2019 Allwinnertech Co., Ltd. 5 * Author: zhengxiaobin <zhengxiaobin@allwinnertech.com> 6 * 7 * This software is licensed under the terms of the GNU General Public 8 * License version 2, as published by the Free Software Foundation, and 9 * may be copied, distributed, and modified under those terms. 10 * 11 * This program is distributed in the hope that it will be useful, 12 * but WITHOUT ANY WARRANTY; without even the implied warranty of 13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 14 * GNU General Public License for more details. 15 * 16 */ 17 #ifndef _G2D_TOP_TYPE_H 18 #define _G2D_TOP_TYPE_H 19 20 21 union g2d_sclk_gate { 22 unsigned int dwval; 23 struct { 24 unsigned int mixer_sclk_gate:1; 25 unsigned int rot_sclk_gate:1; 26 unsigned int res0:30; 27 } bits; 28 }; 29 30 union g2d_hclk_gate { 31 unsigned int dwval; 32 struct { 33 unsigned int mixer_hclk_gate:1; 34 unsigned int rot_hclk_gate:1; 35 unsigned int res0:30; 36 } bits; 37 }; 38 39 union g2d_ahb_reset { 40 unsigned int dwval; 41 struct { 42 unsigned int mixer_ahb_rst:1; 43 unsigned int rot_ahb_rst:1; 44 unsigned int res0:30; 45 } bits; 46 }; 47 48 union g2d_sclk_div { 49 unsigned int dwval; 50 struct { 51 unsigned int mixer_sclk_div:4; 52 unsigned int rot_sclk_div:4; 53 unsigned int res0:24; 54 } bits; 55 }; 56 57 union g2d_version { 58 unsigned int dwval; 59 struct { 60 unsigned int gsu_no:2; 61 unsigned int vsu_no:2; 62 unsigned int rtmx_no:1; 63 unsigned int res0:3; 64 unsigned int rot_no:1; 65 unsigned int res1:7; 66 unsigned int ip_version:16; 67 } bits; 68 }; 69 70 union g2d_rcq_irq_ctl { 71 unsigned int dwval; 72 struct { 73 unsigned int rcq_sel:1; 74 unsigned int res0:3; 75 unsigned int task_end_irq_en:1; 76 unsigned int res1:1; 77 unsigned int rcq_cfg_finish_irq_en:1; 78 unsigned int res2:25; 79 } bits; 80 }; 81 82 union g2d_rcq_status { 83 unsigned int dwval; 84 struct { 85 unsigned int task_end_irq:1; 86 unsigned int res0:1; 87 unsigned int cfg_finish_irq:1; 88 unsigned int res1:5; 89 unsigned int frame_cnt:8; 90 unsigned int res2:16; 91 } bits; 92 }; 93 94 union g2d_rcq_ctrl { 95 unsigned int dwval; 96 struct { 97 unsigned int update:1; 98 unsigned int res0:31; 99 } bits; 100 }; 101 102 union g2d_rcq_header_len { 103 unsigned int dwval; 104 struct { 105 unsigned int rcq_header_len:16; 106 unsigned int res0:16; 107 } bits; 108 }; 109 110 111 struct g2d_top_reg { 112 /*0x00*/ 113 union g2d_sclk_gate sclk_gate; 114 union g2d_hclk_gate hclk_gate; 115 union g2d_ahb_reset ahb_rst; 116 union g2d_sclk_div sclk_div; 117 /*0x10*/ 118 union g2d_version version; 119 unsigned int res0[3]; 120 /*0x20*/ 121 union g2d_rcq_irq_ctl rcq_irq_ctl; 122 union g2d_rcq_status rcq_status; 123 union g2d_rcq_ctrl rcq_ctrl; 124 unsigned int rcq_header_low_addr; 125 /*0x30*/ 126 unsigned int rcq_header_high_addr; 127 union g2d_rcq_header_len rcq_header_len; 128 }; 129 130 /*mixer global register define start*/ 131 union g2d_mxier_ctrl { 132 unsigned int dwval; 133 struct { 134 unsigned int res0:4; 135 unsigned int scan_order:2; 136 unsigned int res1:2; 137 unsigned int bist_en:1; 138 unsigned int res2:22; 139 unsigned int start:1; 140 } bits; 141 }; 142 143 union g2d_mixer_interrupt { 144 unsigned int dwval; 145 struct { 146 unsigned int mixer_irq:1; 147 unsigned int res0:3; 148 unsigned int finish_irq_en:1; 149 unsigned int res1:27; 150 } bits; 151 }; 152 153 struct g2d_mixer_glb_reg { 154 union g2d_mxier_ctrl mixer_ctrl; 155 union g2d_mixer_interrupt mixer_interrupt; 156 }; 157 /*mixer global register define end*/ 158 159 #endif /*End of file*/ 160