1 /** 2 **************************************************************************************** 3 * 4 * @file gr55xx_hal_xqspi.h 5 * @author BLE Driver Team 6 * @brief Header file containing functions prototypes of XQSPI HAL library. 7 * 8 **************************************************************************************** 9 * @attention 10 #####Copyright (c) 2019 GOODIX 11 All rights reserved. 12 13 Redistribution and use in source and binary forms, with or without 14 modification, are permitted provided that the following conditions are met: 15 * Redistributions of source code must retain the above copyright 16 notice, this list of conditions and the following disclaimer. 17 * Redistributions in binary form must reproduce the above copyright 18 notice, this list of conditions and the following disclaimer in the 19 documentation and/or other materials provided with the distribution. 20 * Neither the name of GOODIX nor the names of its contributors may be used 21 to endorse or promote products derived from this software without 22 specific prior written permission. 23 24 THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" 25 AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 26 IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 27 ARE DISCLAIMED. IN NO EVENT SHALL COPYRIGHT HOLDERS AND CONTRIBUTORS BE 28 LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 29 CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 30 SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 31 INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 32 CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 33 ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 34 POSSIBILITY OF SUCH DAMAGE. 35 **************************************************************************************** 36 */ 37 38 /** @addtogroup PERIPHERAL Peripheral Driver 39 * @{ 40 */ 41 42 /** @addtogroup HAL_DRIVER HAL Driver 43 * @{ 44 */ 45 46 /** @defgroup HAL_XQSPI XQSPI 47 * @brief XQSPI HAL module driver. 48 * @{ 49 */ 50 51 /* Define to prevent recursive inclusion -------------------------------------*/ 52 #ifndef __GR55xx_HAL_XQSPI_H__ 53 #define __GR55xx_HAL_XQSPI_H__ 54 55 /* Includes ------------------------------------------------------------------*/ 56 #include "gr55xx_ll_xqspi.h" 57 #include "gr55xx_hal_def.h" 58 59 #ifdef __cplusplus 60 extern "C" { 61 #endif 62 63 /* Exported types ------------------------------------------------------------*/ 64 /** @addtogroup HAL_XQSPI_ENUMERATIONS Enumerations 65 * @{ 66 */ 67 68 /** @defgroup HAL_XQSPI_state HAL XQSPI state 69 * @{ 70 */ 71 72 /** 73 * @brief HAL XQSPI State Enumerations definition 74 */ 75 typedef enum { 76 HAL_XQSPI_STATE_RESET = 0x00, /**< Peripheral not initialized */ 77 HAL_XQSPI_STATE_READY = 0x01, /**< Peripheral initialized and ready for use */ 78 HAL_XQSPI_STATE_BUSY = 0x02, /**< Peripheral in indirect mode and busy */ 79 HAL_XQSPI_STATE_BUSY_INDIRECT_TX = 0x12, /**< Peripheral in indirect mode with transmission ongoing */ 80 HAL_XQSPI_STATE_BUSY_INDIRECT_RX = 0x22, /**< Peripheral in indirect mode with reception ongoing */ 81 HAL_XQSPI_STATE_ABORT = 0x08, /**< Peripheral with abort request ongoing */ 82 HAL_XQSPI_STATE_ERROR = 0x04 /**< Peripheral in error */ 83 } hal_xqspi_state_t; 84 85 /** @} */ 86 87 /** @} */ 88 89 /** @addtogroup HAL_XQSPI_STRUCTURES Structures 90 * @{ 91 */ 92 93 /** @defgroup XQSPI_Configuration XQSPI Configuration 94 * @{ 95 */ 96 97 /** 98 * @brief XQSPI init Structure definition 99 */ 100 typedef struct _xqspi_init_t { 101 uint32_t work_mode; /**< Specifies the work mode for XQSPI. 102 This parameter can be a value of @ref XQSPI_Work_Mode */ 103 104 uint32_t cache_mode; /**< Specifies the cache mode for XIP mode. 105 This parameter can be a value of @ref XQSPI_Cache_Mode */ 106 107 uint32_t read_cmd; /**< Specifies the read command for transmit in XIP mode. 108 This parameter can be a value of @ref XQSPI_Read_CMD */ 109 110 uint32_t baud_rate; /**< Specifies the serial clock speed for transmit in both XIP and QSPI mode. 111 This parameter can be a value of @ref XQSPI_Baud_Rate */ 112 113 uint32_t clock_mode; /**< Specifies the Clock Mode. It indicates the level that clock takes between commands. 114 This parameter can be a value of @ref XQSPI_Clock_Mode */ 115 } xqspi_init_t; 116 /** @} */ 117 118 /** @defgroup XQSPI_handle XQSPI handle 119 * @{ 120 */ 121 122 /** 123 * @brief XQSPI handle Structure definition 124 */ 125 typedef struct _xqspi_handle_t { 126 xqspi_regs_t *p_instance; /**< XQSPI registers base address */ 127 128 xqspi_init_t init; /**< XQSPI communication parameters */ 129 130 uint8_t *p_tx_buffer; /**< Pointer to XQSPI Tx transfer Buffer */ 131 132 __IO uint32_t tx_xfer_size; /**< XQSPI Tx Transfer size */ 133 134 __IO uint32_t tx_xfer_count; /**< XQSPI Tx Transfer Counter */ 135 136 uint8_t *p_rx_buffer; /**< Pointer to XQSPI Rx transfer Buffer */ 137 138 __IO uint32_t rx_xfer_size; /**< XQSPI Rx Transfer size */ 139 140 __IO uint32_t rx_xfer_count; /**< XQSPI Rx Transfer Counter */ 141 142 __IO hal_lock_t lock; /**< Locking object */ 143 144 __IO hal_xqspi_state_t state; /**< XQSPI communication state */ 145 146 __IO uint32_t error_code; /**< XQSPI Error code */ 147 148 uint32_t retry; /**< Retry for the XQSPI flag access */ 149 } xqspi_handle_t; 150 /** @} */ 151 152 /** @defgroup XQSPI_Command XQSPI command 153 * @{ 154 */ 155 156 /** 157 * @brief XQSPI command Structure definition 158 */ 159 typedef struct _xqspi_command_t { 160 uint32_t inst; /**< Specifies the Instruction to be sent. 161 This parameter can be a value (8-bit) between 0x00 and 0xFF */ 162 163 uint32_t addr; /**< Specifies the Address to be sent. 164 (Size from 1 to 4 bytes according to AddressSize) 165 This parameter can be a value (32-bits) between 0x0 and 0xFFFFFFFF. */ 166 167 uint32_t inst_size; /**< Specifies the Instruction Size. 168 This parameter can be a value of @ref XQSPI_Instruction_Size */ 169 170 uint32_t addr_size; /**< Specifies the Address Size. 171 This parameter can be a value of @ref XQSPI_Address_Size */ 172 173 uint32_t dummy_cycles; /**< Specifies the Number of Dummy Cycles. 174 This parameter can be a number between 0 and 31 */ 175 176 uint32_t inst_addr_mode; /**< Specifies the Instruction and Address Mode. 177 This parameter can be a value of @ref XQSPI_Inst_Addr_Mode */ 178 179 uint32_t data_mode; /**< Specifies the Data Mode (used for dummy cycles and data phases). 180 This parameter can be a value of @ref XQSPI_Data_Mode */ 181 182 uint32_t length; /**< Specifies the number of data to transfer. (This is the number of bytes). 183 This parameter can be any value between 0 and 0xFFFFFFFF. 184 (0 means undefined length until end of memory) */ 185 } xqspi_command_t; 186 /** @} */ 187 188 /** @} */ 189 190 /** @addtogroup HAL_XQSPI_CALLBACK_STRUCTURES Callback Structures 191 * @{ 192 */ 193 194 /** @defgroup HAL_XQSPI_Callback Callback 195 * @{ 196 */ 197 198 /** 199 * @brief HAL_XQSPI Callback function definition 200 */ 201 202 typedef struct _hal_xqspi_callback { 203 void (*xqspi_msp_init)(xqspi_handle_t *p_xqspi); /**< XQSPI init MSP callback */ 204 void (*xqspi_msp_deinit)(xqspi_handle_t *p_xqspi); /**< XQSPI de-init MSP callback */ 205 } hal_xqspi_callback_t; 206 207 /** @} */ 208 209 /** @} */ 210 211 /** 212 * @defgroup HAL_XQSPI_MACRO Defines 213 * @{ 214 */ 215 216 /* Exported constants --------------------------------------------------------*/ 217 /** @defgroup XQSPI_Exported_Constants XQSPI Exported Constants 218 * @{ 219 */ 220 221 /** @defgroup XQSPI_Error_Code XQSPI Error Code 222 * @{ 223 */ 224 #define HAL_XQSPI_ERROR_NONE ((uint32_t)0x00000000) /**< No error */ 225 #define HAL_XQSPI_ERROR_TIMEOUT ((uint32_t)0x00000001) /**< Timeout error */ 226 #define HAL_XQSPI_ERROR_TRANSFER ((uint32_t)0x00000002) /**< Transfer error */ 227 #define HAL_XQSPI_ERROR_INVALID_PARAM ((uint32_t)0x00000008) /**< Invalid parameter error */ 228 /** @} */ 229 230 /** @defgroup XQSPI_Work_Mode XQSPI Work Mode 231 * @{ 232 */ 233 #define XQSPI_WORK_MODE_QSPI LL_XQSPI_MODE_QSPI /**< Work in QSPI mode */ 234 #define XQSPI_WORK_MODE_XIP LL_XQSPI_MODE_XIP /**< Work in XIP mode */ 235 /** @} */ 236 237 /** @defgroup XQSPI_Cache_Mode XQSPI Cache Mode in XIP mode 238 * @{ 239 */ 240 #define XQSPI_CACHE_MODE_DIS LL_XQSPI_CACHE_DIS /**< Cache off in XIP mode */ 241 #define XQSPI_CACHE_MODE_EN LL_XQSPI_CACHE_EN /**< Cache on in XIP mode */ 242 /** @} */ 243 244 /** @defgroup XQSPI_Read_CMD XQSPI Read Command in XIP mode 245 * @{ 246 */ 247 #define XQSPI_READ_CMD_READ LL_XQSPI_XIP_CMD_READ /**< Read mode */ 248 #define XQSPI_READ_CMD_FAST_READ LL_XQSPI_XIP_CMD_FAST_READ /**< Fast Read mode */ 249 #define XQSPI_READ_CMD_DUAL_OUT_READ LL_XQSPI_XIP_CMD_DUAL_OUT_READ /**< Dual-Out Fast Read mode */ 250 #define XQSPI_READ_CMD_DUAL_IO_READ LL_XQSPI_XIP_CMD_DUAL_IO_READ /**< Dual-IO Fast Read mode */ 251 #define XQSPI_READ_CMD_QUAD_OUT_READ LL_XQSPI_XIP_CMD_QUAD_OUT_READ /**< Quad-Out Fast Read mode */ 252 #define XQSPI_READ_CMD_QUAD_IO_READ LL_XQSPI_XIP_CMD_QUAD_IO_READ /**< Quad-IO Fast Read mode */ 253 /** @} */ 254 255 /** @defgroup XQSPI_Clock_Mode XQSPI Clock Mode 256 * @{ 257 */ 258 #define XQSPI_CLOCK_MODE_0 ((LL_XQSPI_SCPOL_LOW << 1) | LL_XQSPI_SCPHA_1EDGE) /**< Inactive state of CLK is 259 low, CLK toggles at the 260 start of first data bit */ 261 #define XQSPI_CLOCK_MODE_1 ((LL_XQSPI_SCPOL_LOW << 1) | LL_XQSPI_SCPHA_2EDGE) /**< Inactive state of CLK is 262 low, CLK toggles in the 263 middle of first data bit */ 264 #define XQSPI_CLOCK_MODE_2 ((LL_XQSPI_SCPOL_HIGH << 1) | LL_XQSPI_SCPHA_1EDGE) /**< Inactive state of CLK is 265 high, CLK toggles at the 266 start of first data bit */ 267 #define XQSPI_CLOCK_MODE_3 ((LL_XQSPI_SCPOL_HIGH << 1) | LL_XQSPI_SCPHA_2EDGE) /**< Inactive state of CLK is 268 high, CLK toggles in the 269 middle of first data bit */ 270 /** @} */ 271 272 /** @defgroup XQSPI_Baud_Rate XQSPI Clock Speed 273 * @{ 274 */ 275 #define XQSPI_BAUD_RATE_64M LL_XQSPI_BAUD_RATE_64M /**< Serial clock speed is 64 MHz */ 276 #define XQSPI_BAUD_RATE_48M LL_XQSPI_BAUD_RATE_48M /**< Serial clock speed is 48 MHz */ 277 #define XQSPI_BAUD_RATE_32M LL_XQSPI_BAUD_RATE_32M /**< Serial clock speed is 32 MHz */ 278 #define XQSPI_BAUD_RATE_24M LL_XQSPI_BAUD_RATE_24M /**< Serial clock speed is 24 MHz */ 279 #define XQSPI_BAUD_RATE_16M LL_XQSPI_BAUD_RATE_16M /**< Serial clock speed is 16 MHz */ 280 /** @} */ 281 282 /** @defgroup XQSPI_Data_Mode XQSPI Data Mode, only in QSPI mode 283 * @{ 284 */ 285 #define XQSPI_DATA_MODE_SPI LL_XQSPI_QSPI_FRF_SPI /**< Standard SPI Frame Format */ 286 #define XQSPI_DATA_MODE_DUALSPI LL_XQSPI_QSPI_FRF_DUALSPI /**< Dual-SPI Frame Format */ 287 #define XQSPI_DATA_MODE_QUADSPI LL_XQSPI_QSPI_FRF_QUADSPI /**< Quad-SPI Frame Format */ 288 /** @} */ 289 290 /** @defgroup XQSPI_FIFO_Threshold XQSPI FIFO Threshold, FIFO depth is 64*4bytes, only in QSPI mode 291 * @{ 292 */ 293 #define XQSPI_FIFO_THRESHOLD_1_8 LL_XQSPI_QSPI_FIFO_WATERMARK_1_8 /**< FIFO depth/8 */ 294 #define XQSPI_FIFO_THRESHOLD_1_4 LL_XQSPI_QSPI_FIFO_WATERMARK_1_4 /**< FIFO depth/4 */ 295 #define XQSPI_FIFO_THRESHOLD_1_2 LL_XQSPI_QSPI_FIFO_WATERMARK_1_2 /**< FIFO depth/2 */ 296 #define XQSPI_FIFO_THRESHOLD_3_4 LL_XQSPI_QSPI_FIFO_WATERMARK_3_4 /**< FIFO depth*3/4 */ 297 #define XQSPI_FIFO_DEPTH LL_XQSPI_QSPI_FIFO_DEPTH /**< FIFO full depth */ 298 /** @} */ 299 300 /** @defgroup XQSPI_Instruction_Size XQSPI Instruction Size, only in QSPI mode 301 * @{ 302 */ 303 #define XQSPI_INSTSIZE_00_BITS (0) /**< 0-bit (No Instruction) */ 304 #define XQSPI_INSTSIZE_08_BITS (1) /**< 8-bit Instruction */ 305 #define XQSPI_INSTSIZE_16_BITS (2) /**< 16-bit Instruction */ 306 /** @} */ 307 308 /** @defgroup XQSPI_Address_Size XQSPI Address Size, only in QSPI mode 309 * @{ 310 */ 311 #define XQSPI_ADDRSIZE_00_BITS (0) /**< 0-bit (No Address) */ 312 #define XQSPI_ADDRSIZE_08_BITS (1) /**< 8-bit Address */ 313 #define XQSPI_ADDRSIZE_16_BITS (2) /**< 16-bit Address */ 314 #define XQSPI_ADDRSIZE_24_BITS (3) /**< 24-bit Address */ 315 #define XQSPI_ADDRSIZE_32_BITS (4) /**< 32-bit Address */ 316 /** @} */ 317 318 /** @defgroup XQSPI_Inst_Addr_Mode XQSPI Instruction and Address Mode, only in QSPI mode 319 * @{ 320 */ 321 #define XQSPI_INST_ADDR_ALL_IN_SPI (0) /**< Instruction and address are sent in SPI mode */ 322 #define XQSPI_INST_IN_SPI_ADDR_IN_SPIFRF (1) /**< Instruction is sent in SPI mode, 323 and address is sent in Daul/Quad SPI mode */ 324 #define XQSPI_INST_ADDR_ALL_IN_SPIFRF (2) /**< Instruction and address are sent in Daul/Quad SPI mode */ 325 /** @} */ 326 327 /** @defgroup XQSPI_Flags XQSPI Flags, only in QSPI mode 328 * @{ 329 */ 330 #define XQSPI_FLAG_RFF LL_XQSPI_QSPI_STAT_RFF /**< Rx FIFO full flag */ 331 #define XQSPI_FLAG_RFTF LL_XQSPI_QSPI_STAT_RFTF /**< Rx FIFO threshold flag */ 332 #define XQSPI_FLAG_RFE LL_XQSPI_QSPI_STAT_RFE /**< Rx FIFO empty flag */ 333 #define XQSPI_FLAG_TFF LL_XQSPI_QSPI_STAT_TFF /**< Tx FIFO full flag */ 334 #define XQSPI_FLAG_TFTF LL_XQSPI_QSPI_STAT_TFTF /**< Tx FIFO threshold flag */ 335 #define XQSPI_FLAG_TFE LL_XQSPI_QSPI_STAT_TFE /**< Tx FIFO empty flag */ 336 #define XQSPI_FLAG_BUSY LL_XQSPI_QSPI_STAT_BUSY /**< Busy flag */ 337 /** @} */ 338 339 /** @defgroup XQSPI_Ctrl_Present Control Present Status, only in XIP mode 340 * @{ 341 */ 342 #define XQSPI_DISABLE_PRESENT LL_XQSPI_DISABLE_PRESENT /**< Disable Present */ 343 #define XQSPI_ENABLE_PRESENT LL_XQSPI_ENABLE_PRESENT /**< Enable Present */ 344 /** @} */ 345 346 /** 347 * @brief XQSPI_Retry_definition XQSPI Retry definition 348 */ 349 #define HAL_XQSPI_RETRY_DEFAULT_VALUE ((uint32_t)1000) /**< 1000 times */ 350 351 /** @} */ 352 353 /* Exported macro ------------------------------------------------------------*/ 354 /** @defgroup XQSPI_Exported_Macros XQSPI Exported Macros 355 * @{ 356 */ 357 358 /** @brief Reset XQSPI handle states. 359 * @param __HANDLE__ XQSPI handle. 360 * @retval None 361 */ 362 #define HAL_XQSPI_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->state = HAL_XQSPI_STATE_RESET) 363 364 /** @brief Enable the specified QSPI peripheral in XQSPI. 365 * @param __HANDLE__ specifies the XQSPI Handle. 366 * @retval None 367 */ 368 #define HAL_XQSPI_ENABLE_QSPI(__HANDLE__) \ 369 SET_BITS((__HANDLE__)->p_instance->QSPI.SPIEN, SSI_SSIEN_EN) 370 371 /** @brief Disable the specified QSPI peripheral in XQSPI. 372 * @param __HANDLE__ specifies the XQSPI Handle. 373 * @retval None 374 */ 375 #define HAL_XQSPI_DISABLE_QSPI(__HANDLE__) \ 376 CLEAR_BITS((__HANDLE__)->p_instance->QSPI.SPIEN, SSI_SSIEN_EN) 377 378 /** @brief Enable the specified XIP peripheral in XQSPI. 379 * @param __HANDLE__ specifies the XQSPI Handle. 380 * @retval None 381 */ 382 #define HAL_XQSPI_ENABLE_XIP(__HANDLE__) \ 383 do { \ 384 SET_BITS((__HANDLE__)->p_instance->XIP.CTRL3, SSI_SSIEN_EN); \ 385 while (!ll_xqspi_get_xip_flag((__HANDLE__)->p_instance)) \ 386 } while (0) 387 388 /** @brief Disable the specified XIP peripheral in XQSPI. 389 * @param __HANDLE__ specifies the XQSPI Handle. 390 * @retval None 391 */ 392 #define HAL_XQSPI_DISABLE_XIP(__HANDLE__) \ 393 do { \ 394 CLEAR_BITS((__HANDLE__)->p_instance->XIP.CTRL3, SSI_SSIEN_EN); \ 395 while (ll_xqspi_get_xip_flag((__HANDLE__)->p_instance)) \ 396 } while (0) 397 398 /** @brief Enable the specified CACHE peripheral in XQSPI. 399 * @param __HANDLE__ specifies the XQSPI Handle. 400 * @retval None 401 */ 402 #define HAL_XQSPI_ENABLE_CACHE(__HANDLE__) \ 403 CLEAR_BITS((__HANDLE__)->p_instance->CACHE.CTRL0, XQSPI_CACHE_CTRL0_DIS) 404 405 /** @brief Disable the specified CACHE peripheral in XQSPI. 406 * @param __HANDLE__ specifies the XQSPI Handle. 407 * @retval None 408 */ 409 #define HAL_XQSPI_DISABLE_CACHE(__HANDLE__) \ 410 SET_BITS((__HANDLE__)->p_instance->CACHE.CTRL0, XQSPI_CACHE_CTRL0_DIS) 411 412 /** @brief Check whether the specified XQSPI flag is set or not. 413 * @param __HANDLE__ specifies the XQSPI Handle. 414 * @param __FLAG__ specifies the flag to check. 415 * This parameter can be one of the following values: 416 * @arg @ref XQSPI_FLAG_RFF Rx FIFO full flag 417 * @arg @ref XQSPI_FLAG_RFTF Rx FIFO threshold flag 418 * @arg @ref XQSPI_FLAG_RFE Rx FIFO empty flag 419 * @arg @ref XQSPI_FLAG_TFF Tx FIFO full flag 420 * @arg @ref XQSPI_FLAG_TFTF Tx FIFO threshold flag 421 * @arg @ref XQSPI_FLAG_TFE Tx FIFO empty flag 422 * @arg @ref XQSPI_FLAG_BUSY Busy flag 423 * @retval The new state of __FLAG__ (TRUE or FALSE). 424 */ 425 #define HAL_XQSPI_GET_FLAG(__HANDLE__, __FLAG__) \ 426 ((READ_BITS((__HANDLE__)->p_instance->QSPI.STAT, (__FLAG__)) != 0) ? SET : RESET) 427 428 /** @} */ 429 430 /* Private macros ------------------------------------------------------------*/ 431 /** @defgroup XQSPI_Private_Macro XQSPI Private Macros 432 * @{ 433 */ 434 435 /** @brief Check if XQSPI Work Mode is valid. 436 * @param __MODE__ XQSPI Work Mode. 437 * @retval SET (__MODE__ is valid) or RESET (__MODE__ is invalid) 438 */ 439 #define IS_XQSPI_WORK_MODE(__MODE__) (((__MODE__) == XQSPI_WORK_MODE_QSPI) || \ 440 ((__MODE__) == XQSPI_WORK_MODE_XIP)) 441 442 /** @brief Check if XQSPI Cache Mode is valid. 443 * @param __MODE__ XQSPI Cache Mode. 444 * @retval SET (__MODE__ is valid) or RESET (__MODE__ is invalid) 445 */ 446 #define IS_XQSPI_CACHE_MODE(__MODE__) (((__MODE__) == XQSPI_CACHE_MODE_DIS) || \ 447 ((__MODE__) == XQSPI_CACHE_MODE_EN)) 448 449 /** @brief Check if XQSPI Read CMD is valid. 450 * @param __CMD__ XQSPI Cache Mode. 451 * @retval SET (__CMD__ is valid) or RESET (__CMD__ is invalid) 452 */ 453 #define IS_XQSPI_READ_CMD(__CMD__) (((__CMD__) == XQSPI_READ_CMD_READ ) || \ 454 ((__CMD__) == XQSPI_READ_CMD_FAST_READ ) || \ 455 ((__CMD__) == XQSPI_READ_CMD_DUAL_OUT_READ) || \ 456 ((__CMD__) == XQSPI_READ_CMD_DUAL_IO_READ ) || \ 457 ((__CMD__) == XQSPI_READ_CMD_QUAD_OUT_READ) || \ 458 ((__CMD__) == XQSPI_READ_CMD_QUAD_IO_READ)) 459 460 /** @brief Check if XQSPI Clock Baud Rate is valid. 461 * @param __BAUD__ XQSPI Clock Baud Rate. 462 * @retval SET (__BAUD__ is valid) or RESET (__BAUD__ is invalid) 463 */ 464 #define IS_XQSPI_BAUD_RATE(__BAUD__) (((__BAUD__) == XQSPI_BAUD_RATE_64M) || \ 465 ((__BAUD__) == XQSPI_BAUD_RATE_48M) || \ 466 ((__BAUD__) == XQSPI_BAUD_RATE_32M) || \ 467 ((__BAUD__) == XQSPI_BAUD_RATE_24M) || \ 468 ((__BAUD__) == XQSPI_BAUD_RATE_16M)) 469 470 /** @brief Check if XQSPI Clock Mode is valid. 471 * @param __CLKMODE__ XQSPI Clock Mode. 472 * @retval SET (__CLKMODE__ is valid) or RESET (__CLKMODE__ is invalid) 473 */ 474 #define IS_XQSPI_CLOCK_MODE(__CLKMODE__) (((__CLKMODE__) == XQSPI_CLOCK_MODE_0) || \ 475 ((__CLKMODE__) == XQSPI_CLOCK_MODE_1) || \ 476 ((__CLKMODE__) == XQSPI_CLOCK_MODE_2) || \ 477 ((__CLKMODE__) == XQSPI_CLOCK_MODE_3)) 478 479 /** @brief Check if XQSPI FIFO Threshold is valid. 480 * @param __THR__ XQSPI FIFO Threshold. 481 * @retval SET (__THR__ is valid) or RESET (__THR__ is invalid) 482 */ 483 #define IS_XQSPI_FIFO_THRESHOLD(__THR__) (((__THR__) == XQSPI_FIFO_THRESHOLD_1_8) || \ 484 ((__THR__) == XQSPI_FIFO_THRESHOLD_1_4) || \ 485 ((__THR__) == XQSPI_FIFO_THRESHOLD_1_2) || \ 486 ((__THR__) == XQSPI_FIFO_THRESHOLD_3_4)) 487 488 /** @brief Check if XQSPI Instruction Size is valid. 489 * @param __INST_SIZE__ XQSPI Instruction Size. 490 * @retval SET (__INST_SIZE__ is valid) or RESET (__INST_SIZE__ is invalid) 491 */ 492 #define IS_XQSPI_INSTRUCTION_SIZE(__INST_SIZE__) (((__INST_SIZE__) == XQSPI_INSTSIZE_00_BITS) || \ 493 ((__INST_SIZE__) == XQSPI_INSTSIZE_08_BITS) || \ 494 ((__INST_SIZE__) == XQSPI_INSTSIZE_16_BITS)) 495 496 /** @brief Check if XQSPI Address Size is valid. 497 * @param __ADDR_SIZE__ XQSPI Address Size . 498 * @retval SET (__ADDR_SIZE__ is valid) or RESET (__ADDR_SIZE__ is invalid) 499 */ 500 #define IS_XQSPI_ADDRESS_SIZE(__ADDR_SIZE__) (((__ADDR_SIZE__) == XQSPI_ADDRSIZE_00_BITS) || \ 501 ((__ADDR_SIZE__) == XQSPI_ADDRSIZE_08_BITS) || \ 502 ((__ADDR_SIZE__) == XQSPI_ADDRSIZE_16_BITS) || \ 503 ((__ADDR_SIZE__) == XQSPI_ADDRSIZE_24_BITS) || \ 504 ((__ADDR_SIZE__) == XQSPI_ADDRSIZE_32_BITS)) 505 506 /** @brief Check if XQSPI Instruction and Address Mode is valid. 507 * @param __MODE__ XQSPI Instruction and Address Mode. 508 * @retval SET (__MODE__ is valid) or RESET (__MODE__ is invalid) 509 */ 510 #define IS_XQSPI_INSTADDR_MODE(__MODE__) (((__MODE__) == XQSPI_INST_ADDR_ALL_IN_SPI) || \ 511 ((__MODE__) == XQSPI_INST_IN_SPI_ADDR_IN_SPIFRF) || \ 512 ((__MODE__) == XQSPI_INST_ADDR_ALL_IN_SPIFRF)) 513 514 /** @brief Check if XQSPI Data Mode is valid. 515 * @param __MODE__ XQSPI Data Mode. 516 * @retval SET (__MODE__ is valid) or RESET (__MODE__ is invalid) 517 */ 518 #define IS_XQSPI_DATA_MODE(__MODE__) (((__MODE__) == XQSPI_DATA_MODE_SPI) || \ 519 ((__MODE__) == XQSPI_DATA_MODE_DUALSPI) || \ 520 ((__MODE__) == XQSPI_DATA_MODE_QUADSPI)) 521 522 /** @} */ 523 524 /** @} */ 525 526 527 /* Exported functions --------------------------------------------------------*/ 528 /** @addtogroup HAL_XQSPI_DRIVER_FUNCTIONS Functions 529 * @{ 530 */ 531 532 /** @defgroup XQSPI_Exported_Functions_Group1 Initialization and de-initialization functions 533 * @brief Initialization and de-initialization functions 534 * 535 @verbatim 536 =============================================================================== 537 ##### Initialization and de-initialization functions ##### 538 =============================================================================== 539 [..] This subsection provides a set of functions allowing to initialize and 540 de-initialize the XQSPIx peripheral. 541 542 (+) User must implement hal_xqspi_msp_init() function in which he configures 543 all related peripherals resources (GPIO, DMA, IT and NVIC ). 544 545 (+) Call the function hal_xqspi_init() to configure the selected device with 546 the selected configuration: 547 (++) work_mode 548 (++) cache_mode 549 (++) read_cmd 550 (++) baud_rate 551 (++) clock_mode 552 553 (+) Call the function hal_xqspi_deinit() to restore the default configuration 554 of the selected XQSPIx peripheral. 555 556 @endverbatim 557 * @{ 558 */ 559 560 /** 561 **************************************************************************************** 562 * @brief Initialize the XQSPI according to the specified parameters 563 * in the xqspi_init_t and initialize the associated handle. 564 * @param[in] p_xqspi: Pointer to an XQSPI handle which contains the 565 * configuration information for the specified XQSPI. 566 * @retval ::HAL_OK: Operation is OK. 567 * @retval ::HAL_ERROR: Parameter error or operation not supported. 568 * @retval ::HAL_BUSY: Driver is busy. 569 * @retval ::HAL_TIMEOUT: Timeout occurred. 570 **************************************************************************************** 571 */ 572 hal_status_t hal_xqspi_init(xqspi_handle_t *p_xqspi); 573 574 /** 575 **************************************************************************************** 576 * @brief De-initialize the XQSPI peripheral. 577 * @param[in] p_xqspi: Pointer to an XQSPI handle which contains the 578 * configuration information for the specified XQSPI. 579 * @retval ::HAL_OK: Operation is OK. 580 * @retval ::HAL_ERROR: Parameter error or operation not supported. 581 * @retval ::HAL_BUSY: Driver is busy. 582 * @retval ::HAL_TIMEOUT: Timeout occurred. 583 **************************************************************************************** 584 */ 585 hal_status_t hal_xqspi_deinit(xqspi_handle_t *p_xqspi); 586 587 /** 588 **************************************************************************************** 589 * @brief Initialize the XQSPI MSP. 590 * @note This function should not be modified. When the callback is needed, 591 the hal_xqspi_msp_deinit can be implemented in the user file. 592 * @param[in] p_xqspi: Pointer to an XQSPI handle which contains the 593 * configuration information for the specified XQSPI. 594 **************************************************************************************** 595 */ 596 void hal_xqspi_msp_init(xqspi_handle_t *p_xqspi); 597 598 /** 599 **************************************************************************************** 600 * @brief De-initialize the XQSPI MSP. 601 * @note This function should not be modified. When the callback is needed, 602 the hal_xqspi_msp_deinit can be implemented in the user file. 603 * @param[in] p_xqspi: Pointer to an XQSPI handle which contains the 604 * configuration information for the specified XQSPI. 605 **************************************************************************************** 606 */ 607 void hal_xqspi_msp_deinit(xqspi_handle_t *p_xqspi); 608 609 /** @} */ 610 611 /** @defgroup XQSPI_Exported_Functions_Group2 IO operation functions 612 * @brief Data transfers functions 613 * 614 @verbatim 615 ============================================================================== 616 ##### IO operation functions ##### 617 =============================================================================== 618 [..] 619 This subsection provides a set of functions allowing to manage the XQSPI 620 data transfers. 621 622 [..] The XQSPI supports master and slave mode: 623 624 (#) There are one modes of transfer: 625 (++) Blocking mode: The communication is performed in polling mode. 626 The HAL status of all data processing is returned by the same function 627 after finishing transfer. 628 629 (#) APIs provided for only one transfer mode (Blocking mode) 630 exist for 1Line/2Line/4Line (simplex) modes. 631 632 @endverbatim 633 * @{ 634 */ 635 636 /** 637 **************************************************************************************** 638 * @brief Transmit an amount of data with specified instruction and address in blocking mode. 639 * @note This function is used only in Indirect Write Mode. 640 * @param[in] p_xqspi: Pointer to an XQSPI handle which contains the 641 * configuration information for the specified XQSPI. 642 * @param[in] p_cmd: Pointer to a xqspi_command_t structure that 643 * contains the instruction and address for data transfer. 644 * @param[in] p_data: Pointer to data buffer 645 * @param[in] retry: Repeat times 646 * @retval ::HAL_OK: Operation is OK. 647 * @retval ::HAL_ERROR: Parameter error or operation not supported. 648 * @retval ::HAL_BUSY: Driver is busy. 649 * @retval ::HAL_TIMEOUT: Timeout occurred. 650 **************************************************************************************** 651 */ 652 hal_status_t hal_xqspi_command_transmit(xqspi_handle_t *p_xqspi, xqspi_command_t *p_cmd, 653 uint8_t *p_data, uint32_t retry); 654 655 /** 656 **************************************************************************************** 657 * @brief Receive an amount of data with specified instruction and address in blocking mode. 658 * @note This function is used only in Indirect Write Mode. 659 * @param[in] p_xqspi: Pointer to an XQSPI handle which contains the 660 * configuration information for the specified XQSPI. 661 * @param[in] p_cmd: Pointer to a xqspi_command_t structure that 662 * contains the instruction and address for data transfer. 663 * @param[out] p_data: Pointer to data buffer 664 * @param[in] retry: Repeat times 665 * @retval ::HAL_OK: Operation is OK. 666 * @retval ::HAL_ERROR: Parameter error or operation not supported. 667 * @retval ::HAL_BUSY: Driver is busy. 668 * @retval ::HAL_TIMEOUT: Timeout occurred. 669 **************************************************************************************** 670 */ 671 hal_status_t hal_xqspi_command_receive(xqspi_handle_t *p_xqspi, xqspi_command_t *p_cmd, 672 uint8_t *p_data, uint32_t retry); 673 674 #if defined RTL_SIM 675 hal_status_t hal_xqspi_command_receive_rtl(xqspi_handle_t *p_xqspi, xqspi_command_t *p_cmd, 676 uint8_t *p_data, uint32_t retry); 677 #endif 678 679 680 /** 681 **************************************************************************************** 682 * @brief Transmit an amount of data in blocking mode. 683 * @note This function is used only in Indirect Write Mode, only in standard SPI mode. 684 * @param[in] p_xqspi: Pointer to an XQSPI handle which contains the 685 * configuration information for the specified XQSPI. 686 * @param[in] p_data: Pointer to data buffer 687 * @param[in] length: Amount of data to be sent in bytes 688 * @param[in] retry: Repeat times 689 * @retval ::HAL_OK: Operation is OK. 690 * @retval ::HAL_ERROR: Parameter error or operation not supported. 691 * @retval ::HAL_BUSY: Driver is busy. 692 * @retval ::HAL_TIMEOUT: Timeout occurred. 693 **************************************************************************************** 694 */ 695 hal_status_t hal_xqspi_transmit(xqspi_handle_t *p_xqspi, uint8_t *p_data, uint32_t length, uint32_t retry); 696 697 /** 698 **************************************************************************************** 699 * @brief Receive an amount of data in blocking mode. 700 * @note This function is used only in Indirect Read Mode, only in standard SPI mode. 701 * @param[in] p_xqspi: Pointer to an XQSPI handle which contains the 702 * configuration information for the specified XQSPI. 703 * @param[out] p_data: Pointer to data buffer 704 * @param[in] length: Amount of data to be received in bytes 705 * @param[in] retry: Repeat times 706 * @retval ::HAL_OK: Operation is OK. 707 * @retval ::HAL_ERROR: Parameter error or operation not supported. 708 * @retval ::HAL_BUSY: Driver is busy. 709 * @retval ::HAL_TIMEOUT: Timeout occurred. 710 **************************************************************************************** 711 */ 712 hal_status_t hal_xqspi_receive(xqspi_handle_t *p_xqspi, uint8_t *p_data, uint32_t length, uint32_t retry); 713 714 /** @} */ 715 716 /** @defgroup XQSPI_Exported_Functions_Group3 Peripheral State and Errors functions 717 * @brief XQSPI control functions 718 * 719 @verbatim 720 =============================================================================== 721 ##### Peripheral State and Errors functions ##### 722 =============================================================================== 723 [..] 724 This subsection provides a set of functions allowing to control the XQSPI. 725 (+) hal_xqspi_get_state()API can be helpful to check in run-time the state of the XQSPI peripheral. 726 (+) hal_xqspi_get_error() check in run-time Errors occurring during communication. 727 (+) hal_xqspi_set_retry() set the repeat times during internal process. 728 (+) hal_xqspi_set_tx_fifo_threshold() set the TX FIFO Threshold. 729 (+) hal_xqspi_set_rx_fifo_threshold() set the RX FIFO Threshold. 730 (+) hal_xqspi_get_tx_fifo_threshold() get the TX FIFO Threshold. 731 (+) hal_xqspi_get_rx_fifo_threshold() get the RX FIFO Threshold. 732 @endverbatim 733 * @{ 734 */ 735 736 /** 737 **************************************************************************************** 738 * @brief Return the XQSPI handle state. 739 * @param[in] p_xqspi: Pointer to an XQSPI handle which contains the 740 * configuration information for the specified XQSPI. 741 * @retval ::HAL_XQSPI_STATE_RESET: Peripheral not initialized. 742 * @retval ::HAL_XQSPI_STATE_READY: Peripheral initialized and ready for use. 743 * @retval ::HAL_XQSPI_STATE_BUSY: Peripheral in indirect mode and busy. 744 * @retval ::HAL_XQSPI_STATE_BUSY_INDIRECT_TX: Peripheral in indirect mode with transmission ongoing. 745 * @retval ::HAL_XQSPI_STATE_BUSY_INDIRECT_RX: Peripheral in indirect mode with reception ongoing. 746 * @retval ::HAL_XQSPI_STATE_ABORT: Peripheral with abort request ongoing. 747 * @retval ::HAL_XQSPI_STATE_ERROR: Peripheral in error. 748 **************************************************************************************** 749 */ 750 hal_xqspi_state_t hal_xqspi_get_state(xqspi_handle_t *p_xqspi); 751 752 /** 753 **************************************************************************************** 754 * @brief Return the XQSPI error code. 755 * @param[in] p_xqspi: Pointer to an XQSPI handle which contains the 756 * configuration information for the specified XQSPI. 757 * @return XQSPI error code in bitmap format 758 **************************************************************************************** 759 */ 760 uint32_t hal_xqspi_get_error(xqspi_handle_t *p_xqspi); 761 762 /** 763 **************************************************************************************** 764 * @brief Set the XQSPI internal process repeat times value. 765 * @param[in] p_xqspi: Pointer to an XQSPI handle which contains the 766 * configuration information for the specified XQSPI. 767 * @param[in] retry: Internal process repeat times value. 768 **************************************************************************************** 769 */ 770 void hal_xqspi_set_retry(xqspi_handle_t *p_xqspi, uint32_t retry); 771 772 /** 773 **************************************************************************************** 774 * @brief Set the TXFIFO threshold. 775 * @param[in] p_xqspi: Pointer to an XQSPI handle which contains the 776 * configuration information for the specified XQSPI. 777 * @param[in] threshold: TX FIFO threshold can be one of the following values: 778 * @arg @ref XQSPI_FIFO_THRESHOLD_1_8 threshold is 8 bytes 779 * @arg @ref XQSPI_FIFO_THRESHOLD_1_4 threshold is 16 bytes 780 * @arg @ref XQSPI_FIFO_THRESHOLD_1_2 threshold is 32 bytes 781 * @arg @ref XQSPI_FIFO_THRESHOLD_3_4 threshold is 48 bytes 782 * @retval ::HAL_OK: Operation is OK. 783 * @retval ::HAL_ERROR: Parameter error or operation not supported. 784 * @retval ::HAL_BUSY: Driver is busy. 785 * @retval ::HAL_TIMEOUT: Timeout occurred. 786 **************************************************************************************** 787 */ 788 hal_status_t hal_xqspi_set_tx_fifo_threshold(xqspi_handle_t *p_xqspi, uint32_t threshold); 789 790 /** 791 **************************************************************************************** 792 * @brief Set the RXFIFO threshold. 793 * @param[in] p_xqspi: Pointer to an XQSPI handle which contains the 794 * configuration information for the specified XQSPI. 795 * @param[in] threshold: RX FIFO threshold can be one of the following values: 796 * @arg @ref XQSPI_FIFO_THRESHOLD_1_8 threshold is 8 bytes 797 * @arg @ref XQSPI_FIFO_THRESHOLD_1_4 threshold is 16 bytes 798 * @arg @ref XQSPI_FIFO_THRESHOLD_1_2 threshold is 32 bytes 799 * @arg @ref XQSPI_FIFO_THRESHOLD_3_4 threshold is 48 bytes 800 * @retval ::HAL_OK: Operation is OK. 801 * @retval ::HAL_ERROR: Parameter error or operation not supported. 802 * @retval ::HAL_BUSY: Driver is busy. 803 * @retval ::HAL_TIMEOUT: Timeout occurred. 804 **************************************************************************************** 805 */ 806 hal_status_t hal_xqspi_set_rx_fifo_threshold(xqspi_handle_t *p_xqspi, uint32_t threshold); 807 808 /** 809 **************************************************************************************** 810 * @brief Get the TXFIFO threshold. 811 * @param[in] p_xqspi: Pointer to an XQSPI handle which contains the 812 * configuration information for the specified XQSPI. 813 * @return TX FIFO threshold 814 **************************************************************************************** 815 */ 816 uint32_t hal_xqspi_get_tx_fifo_threshold(xqspi_handle_t *p_xqspi); 817 818 /** 819 **************************************************************************************** 820 * @brief Get the RXFIFO threshold. 821 * @param[in] p_xqspi: Pointer to an XQSPI handle which contains the 822 * configuration information for the specified XQSPI. 823 * @return RX FIFO threshold 824 **************************************************************************************** 825 */ 826 uint32_t hal_xqspi_get_rx_fifo_threshold(xqspi_handle_t *p_xqspi); 827 828 /** 829 **************************************************************************************** 830 * @brief Turn on/off present module, only in XIP mode. 831 * @param[in] p_xqspi: Pointer to an XQSPI handle which contains the 832 * configuration information for the specified XQSPI. 833 * @param[in] status: Presen status can be one of the following values: 834 * @arg @ref XQSPI_DISABLE_PRESENT Disable Present 835 * @arg @ref XQSPI_ENABLE_PRESENT Enable Present 836 837 **************************************************************************************** 838 */ 839 void hal_xqspi_set_xip_present_status(xqspi_handle_t *p_xqspi, uint32_t status); 840 841 /** @} */ 842 843 /** @} */ 844 845 #ifdef __cplusplus 846 } 847 #endif 848 849 #endif /* __GR55xx_HAL_XQSPI_H__ */ 850 851 /** @} */ 852 853 /** @} */ 854 855 /** @} */ 856