1 /* 2 * Copyright (c) 2021-2023 HPMicro 3 * 4 * SPDX-License-Identifier: BSD-3-Clause 5 * 6 */ 7 8 9 #ifndef HPM_SYNT_H 10 #define HPM_SYNT_H 11 12 typedef struct { 13 __RW uint32_t GCR; /* 0x0: Global control register */ 14 __RW uint32_t RLD; /* 0x4: Counter reload register */ 15 __RW uint32_t TIMESTAMP_NEW; /* 0x8: timestamp new value register */ 16 __R uint32_t CNT; /* 0xC: Counter */ 17 __R uint32_t TIMESTAMP_SAV; /* 0x10: timestamp trig save value */ 18 __R uint32_t TIMESTAMP_CUR; /* 0x14: timestamp read value */ 19 __R uint8_t RESERVED0[8]; /* 0x18 - 0x1F: Reserved */ 20 __RW uint32_t CMP[4]; /* 0x20 - 0x2C: Comparator */ 21 } SYNT_Type; 22 23 24 /* Bitfield definition for register: GCR */ 25 /* 26 * TIMESTAMP_INC_NEW (WO) 27 * 28 * set to increase the timesamp with new value, auto clr 29 */ 30 #define SYNT_GCR_TIMESTAMP_INC_NEW_MASK (0x80000000UL) 31 #define SYNT_GCR_TIMESTAMP_INC_NEW_SHIFT (31U) 32 #define SYNT_GCR_TIMESTAMP_INC_NEW_SET(x) (((uint32_t)(x) << SYNT_GCR_TIMESTAMP_INC_NEW_SHIFT) & SYNT_GCR_TIMESTAMP_INC_NEW_MASK) 33 #define SYNT_GCR_TIMESTAMP_INC_NEW_GET(x) (((uint32_t)(x) & SYNT_GCR_TIMESTAMP_INC_NEW_MASK) >> SYNT_GCR_TIMESTAMP_INC_NEW_SHIFT) 34 35 /* 36 * TIMESTAMP_DEC_NEW (WO) 37 * 38 * set to decrease the timesamp with new value, auto clr 39 */ 40 #define SYNT_GCR_TIMESTAMP_DEC_NEW_MASK (0x40000000UL) 41 #define SYNT_GCR_TIMESTAMP_DEC_NEW_SHIFT (30U) 42 #define SYNT_GCR_TIMESTAMP_DEC_NEW_SET(x) (((uint32_t)(x) << SYNT_GCR_TIMESTAMP_DEC_NEW_SHIFT) & SYNT_GCR_TIMESTAMP_DEC_NEW_MASK) 43 #define SYNT_GCR_TIMESTAMP_DEC_NEW_GET(x) (((uint32_t)(x) & SYNT_GCR_TIMESTAMP_DEC_NEW_MASK) >> SYNT_GCR_TIMESTAMP_DEC_NEW_SHIFT) 44 45 /* 46 * TIMESTAMP_SET_NEW (WO) 47 * 48 * set the timesamp to new value, auto clr 49 */ 50 #define SYNT_GCR_TIMESTAMP_SET_NEW_MASK (0x20000000UL) 51 #define SYNT_GCR_TIMESTAMP_SET_NEW_SHIFT (29U) 52 #define SYNT_GCR_TIMESTAMP_SET_NEW_SET(x) (((uint32_t)(x) << SYNT_GCR_TIMESTAMP_SET_NEW_SHIFT) & SYNT_GCR_TIMESTAMP_SET_NEW_MASK) 53 #define SYNT_GCR_TIMESTAMP_SET_NEW_GET(x) (((uint32_t)(x) & SYNT_GCR_TIMESTAMP_SET_NEW_MASK) >> SYNT_GCR_TIMESTAMP_SET_NEW_SHIFT) 54 55 /* 56 * TIMESTAMP_RESET (WO) 57 * 58 * reset timesamp to 0, auto clr 59 */ 60 #define SYNT_GCR_TIMESTAMP_RESET_MASK (0x10000000UL) 61 #define SYNT_GCR_TIMESTAMP_RESET_SHIFT (28U) 62 #define SYNT_GCR_TIMESTAMP_RESET_SET(x) (((uint32_t)(x) << SYNT_GCR_TIMESTAMP_RESET_SHIFT) & SYNT_GCR_TIMESTAMP_RESET_MASK) 63 #define SYNT_GCR_TIMESTAMP_RESET_GET(x) (((uint32_t)(x) & SYNT_GCR_TIMESTAMP_RESET_MASK) >> SYNT_GCR_TIMESTAMP_RESET_SHIFT) 64 65 /* 66 * TIMESTAMP_DEBUG_EN (RW) 67 * 68 * set to enable cpu_debug_mode to stop the timesamp 69 */ 70 #define SYNT_GCR_TIMESTAMP_DEBUG_EN_MASK (0x20U) 71 #define SYNT_GCR_TIMESTAMP_DEBUG_EN_SHIFT (5U) 72 #define SYNT_GCR_TIMESTAMP_DEBUG_EN_SET(x) (((uint32_t)(x) << SYNT_GCR_TIMESTAMP_DEBUG_EN_SHIFT) & SYNT_GCR_TIMESTAMP_DEBUG_EN_MASK) 73 #define SYNT_GCR_TIMESTAMP_DEBUG_EN_GET(x) (((uint32_t)(x) & SYNT_GCR_TIMESTAMP_DEBUG_EN_MASK) >> SYNT_GCR_TIMESTAMP_DEBUG_EN_SHIFT) 74 75 /* 76 * TIMESTAMP_ENABLE (RW) 77 * 78 * set to enable the timesamp , clr to stop 79 */ 80 #define SYNT_GCR_TIMESTAMP_ENABLE_MASK (0x10U) 81 #define SYNT_GCR_TIMESTAMP_ENABLE_SHIFT (4U) 82 #define SYNT_GCR_TIMESTAMP_ENABLE_SET(x) (((uint32_t)(x) << SYNT_GCR_TIMESTAMP_ENABLE_SHIFT) & SYNT_GCR_TIMESTAMP_ENABLE_MASK) 83 #define SYNT_GCR_TIMESTAMP_ENABLE_GET(x) (((uint32_t)(x) & SYNT_GCR_TIMESTAMP_ENABLE_MASK) >> SYNT_GCR_TIMESTAMP_ENABLE_SHIFT) 84 85 /* 86 * COUNTER_DEBUG_EN (RW) 87 * 88 * set to enable cpu_debug_mode to stop the counter 89 */ 90 #define SYNT_GCR_COUNTER_DEBUG_EN_MASK (0x4U) 91 #define SYNT_GCR_COUNTER_DEBUG_EN_SHIFT (2U) 92 #define SYNT_GCR_COUNTER_DEBUG_EN_SET(x) (((uint32_t)(x) << SYNT_GCR_COUNTER_DEBUG_EN_SHIFT) & SYNT_GCR_COUNTER_DEBUG_EN_MASK) 93 #define SYNT_GCR_COUNTER_DEBUG_EN_GET(x) (((uint32_t)(x) & SYNT_GCR_COUNTER_DEBUG_EN_MASK) >> SYNT_GCR_COUNTER_DEBUG_EN_SHIFT) 94 95 /* 96 * CRST (RW) 97 * 98 * 1- Reset counter 99 */ 100 #define SYNT_GCR_CRST_MASK (0x2U) 101 #define SYNT_GCR_CRST_SHIFT (1U) 102 #define SYNT_GCR_CRST_SET(x) (((uint32_t)(x) << SYNT_GCR_CRST_SHIFT) & SYNT_GCR_CRST_MASK) 103 #define SYNT_GCR_CRST_GET(x) (((uint32_t)(x) & SYNT_GCR_CRST_MASK) >> SYNT_GCR_CRST_SHIFT) 104 105 /* 106 * CEN (RW) 107 * 108 * 1- Enable counter 109 */ 110 #define SYNT_GCR_CEN_MASK (0x1U) 111 #define SYNT_GCR_CEN_SHIFT (0U) 112 #define SYNT_GCR_CEN_SET(x) (((uint32_t)(x) << SYNT_GCR_CEN_SHIFT) & SYNT_GCR_CEN_MASK) 113 #define SYNT_GCR_CEN_GET(x) (((uint32_t)(x) & SYNT_GCR_CEN_MASK) >> SYNT_GCR_CEN_SHIFT) 114 115 /* Bitfield definition for register: RLD */ 116 /* 117 * RLD (RW) 118 * 119 * counter reload value 120 */ 121 #define SYNT_RLD_RLD_MASK (0xFFFFFFFFUL) 122 #define SYNT_RLD_RLD_SHIFT (0U) 123 #define SYNT_RLD_RLD_SET(x) (((uint32_t)(x) << SYNT_RLD_RLD_SHIFT) & SYNT_RLD_RLD_MASK) 124 #define SYNT_RLD_RLD_GET(x) (((uint32_t)(x) & SYNT_RLD_RLD_MASK) >> SYNT_RLD_RLD_SHIFT) 125 126 /* Bitfield definition for register: TIMESTAMP_NEW */ 127 /* 128 * VALUE (RW) 129 * 130 * new value for timesamp , can be used as set/inc/dec 131 */ 132 #define SYNT_TIMESTAMP_NEW_VALUE_MASK (0xFFFFFFFFUL) 133 #define SYNT_TIMESTAMP_NEW_VALUE_SHIFT (0U) 134 #define SYNT_TIMESTAMP_NEW_VALUE_SET(x) (((uint32_t)(x) << SYNT_TIMESTAMP_NEW_VALUE_SHIFT) & SYNT_TIMESTAMP_NEW_VALUE_MASK) 135 #define SYNT_TIMESTAMP_NEW_VALUE_GET(x) (((uint32_t)(x) & SYNT_TIMESTAMP_NEW_VALUE_MASK) >> SYNT_TIMESTAMP_NEW_VALUE_SHIFT) 136 137 /* Bitfield definition for register: CNT */ 138 /* 139 * CNT (RO) 140 * 141 * counter 142 */ 143 #define SYNT_CNT_CNT_MASK (0xFFFFFFFFUL) 144 #define SYNT_CNT_CNT_SHIFT (0U) 145 #define SYNT_CNT_CNT_GET(x) (((uint32_t)(x) & SYNT_CNT_CNT_MASK) >> SYNT_CNT_CNT_SHIFT) 146 147 /* Bitfield definition for register: TIMESTAMP_SAV */ 148 /* 149 * VALUE (RO) 150 * 151 * use the trigger to save timesamp here 152 */ 153 #define SYNT_TIMESTAMP_SAV_VALUE_MASK (0xFFFFFFFFUL) 154 #define SYNT_TIMESTAMP_SAV_VALUE_SHIFT (0U) 155 #define SYNT_TIMESTAMP_SAV_VALUE_GET(x) (((uint32_t)(x) & SYNT_TIMESTAMP_SAV_VALUE_MASK) >> SYNT_TIMESTAMP_SAV_VALUE_SHIFT) 156 157 /* Bitfield definition for register: TIMESTAMP_CUR */ 158 /* 159 * VALUE (RO) 160 * 161 * current timesamp value 162 */ 163 #define SYNT_TIMESTAMP_CUR_VALUE_MASK (0xFFFFFFFFUL) 164 #define SYNT_TIMESTAMP_CUR_VALUE_SHIFT (0U) 165 #define SYNT_TIMESTAMP_CUR_VALUE_GET(x) (((uint32_t)(x) & SYNT_TIMESTAMP_CUR_VALUE_MASK) >> SYNT_TIMESTAMP_CUR_VALUE_SHIFT) 166 167 /* Bitfield definition for register array: CMP */ 168 /* 169 * CMP (RW) 170 * 171 * comparator value, the output will assert when counter count to this value 172 */ 173 #define SYNT_CMP_CMP_MASK (0xFFFFFFFFUL) 174 #define SYNT_CMP_CMP_SHIFT (0U) 175 #define SYNT_CMP_CMP_SET(x) (((uint32_t)(x) << SYNT_CMP_CMP_SHIFT) & SYNT_CMP_CMP_MASK) 176 #define SYNT_CMP_CMP_GET(x) (((uint32_t)(x) & SYNT_CMP_CMP_MASK) >> SYNT_CMP_CMP_SHIFT) 177 178 179 180 /* CMP register group index macro definition */ 181 #define SYNT_CMP_0 (0UL) 182 #define SYNT_CMP_1 (1UL) 183 #define SYNT_CMP_2 (2UL) 184 #define SYNT_CMP_3 (3UL) 185 186 187 #endif /* HPM_SYNT_H */ 188