1 /* 2 * A V4L2 driver for nvp6324 cameras and AHD Coax protocol. 3 * 4 * Copyright (c) 2017 by Allwinnertech Co., Ltd. http://www.allwinnertech.com 5 * 6 * Authors: Li Huiyu <lihuiyu@allwinnertech.com> 7 * 8 * This program is free software; you can redistribute it and/or modify 9 * it under the terms of the GNU General Public License version 2 as 10 * published by the Free Software Foundation. 11 */ 12 13 #ifndef __COMMON_H__ 14 #define __COMMON_H__ 15 #include "mipi_dev_nvp6324.h" 16 17 #define gpio_i2c_read nvp6324_i2c_read 18 #define gpio_i2c_write nvp6324_i2c_write 19 20 #define DRIVER_VER "1.1.7" 21 22 #define JAGUAR1_MAX_CHAN_CNT 4 23 24 extern unsigned int jaguar1_i2c_addr[4]; 25 26 #define HI_CHIPID_BASE 0x12050000 27 #define HI_CHIPID0 IO_ADDRESS(HI_CHIPID_BASE + 0xEEC) 28 #define HI_CHIPID1 IO_ADDRESS(HI_CHIPID_BASE + 0xEE8) 29 #define HI_CHIPID2 IO_ADDRESS(HI_CHIPID_BASE + 0xEE4) 30 #define HI_CHIPID3 IO_ADDRESS(HI_CHIPID_BASE + 0xEE0) 31 #define HW_REG(reg) (*((volatile unsigned int *)(reg))) 32 33 #define _SET_BIT(data, bit) ((data) |= (1<<(bit))) 34 #define _CLE_BIT(data, bit) ((data) &= (~(1<<(bit)))) 35 36 #define JAGUAR1_BANK_CHANGE(bank) gpio_i2c_write(jaguar1_i2c_addr[0], 0xFF, bank); 37 38 #define PORTA 0x00 39 #define PORTB 0x01 40 #define PORTC 0x02 41 #define PORTD 0x03 42 #define PORTAB 0x04 43 #define PORTCD 0x05 44 45 #define FUNC_ON 0x01 46 #define FUNC_OFF 0x00 47 48 #define BANK_0 0x00 49 #define BANK_1 0x01 50 #define BANK_2 0x02 51 #define BANK_3 0x03 52 #define BANK_4 0x04 53 #define BANK_5 0x05 54 #define BANK_A 0x0A 55 #define BANK_B 0x0B 56 #define BANK_11 0x11 57 #define BANK_13 0x13 58 #define BANK_20 0x20 59 #define BANK_21 0x21 60 #define BANK_22 0x22 61 62 63 typedef struct _decoder_get_information_str { 64 65 unsigned char chip_id[4]; 66 unsigned char chip_rev[4]; 67 unsigned char chip_addr[4]; 68 69 unsigned char Total_Port_Num; 70 unsigned char Total_Chip_Cnt; 71 72 } decoder_get_information_str; 73 74 typedef struct _decoder_dev_ch_info_s { 75 76 unsigned char ch; 77 unsigned char devnum; 78 unsigned char fmt_def; 79 } decoder_dev_ch_info_s; 80 81 82 typedef enum NC_FORMAT_FPS { 83 84 FMT_FPS_UNKNOWN = 0, 85 FMT_NT = 1, 86 FMT_PAL, 87 FMT_12_5P, 88 FMT_7_5P, 89 FMT_30P, 90 FMT_25P, 91 FMT_50P, 92 FMT_60P, 93 FMT_15P, 94 FMT_18P, 95 FMT_18_75P, 96 FMT_20P, 97 98 FMT_FPS_MAX, 99 100 } NC_FORMAT_FPS; 101 102 //#define FMT_AUTO (-1) 103 104 typedef enum NC_FORMAT_STANDARD { 105 106 FMT_STD_UNKNOWN = 0, 107 FMT_SD, 108 FMT_AHD20, 109 FMT_AHD30, 110 FMT_TVI, 111 FMT_CVI, 112 113 FMT_AUTO, // FIXME 114 115 FMT_STD_MAX, 116 117 } NC_FORMAT_STANDARD; 118 119 120 typedef enum NC_FORMAT_RESOLUTION { 121 122 FMT_RESOL_UNKNOWN = 0, 123 FMT_SH720, 124 FMT_H960, 125 FMT_H1280, 126 FMT_H1440, 127 FMT_H960_EX, 128 FMT_H960_2EX, 129 FMT_H960_Btype_2EX, 130 FMT_720P, 131 FMT_720P_EX, 132 FMT_720P_Btype, 133 FMT_720P_Btype_EX, 134 FMT_1080P, 135 FMT_3M, 136 FMT_4M, 137 FMT_5M, 138 FMT_5_3M, 139 FMT_6M, 140 FMT_8M_X, 141 FMT_8M, 142 FMT_960P, 143 144 FMT_H960_Btype_2EX_SP, 145 FMT_720P_Btype_EX_SP, 146 147 FMT_RESOL_MAX, 148 } NC_FORMAT_RESOLUTION; 149 150 151 typedef enum NC_VIVO_CH_FORMATDEF { 152 153 NC_VIVO_CH_FORMATDEF_UNKNOWN = 0, 154 NC_VIVO_CH_FORMATDEF_AUTO, 155 156 AHD20_SD_H960_NT, 157 AHD20_SD_H960_PAL, 158 AHD20_SD_SH720_NT, 159 AHD20_SD_SH720_PAL, 160 AHD20_SD_H1280_NT, 161 AHD20_SD_H1280_PAL, 162 AHD20_SD_H1440_NT, 163 AHD20_SD_H1440_PAL, 164 AHD20_SD_H960_EX_NT, 165 AHD20_SD_H960_EX_PAL, 166 AHD20_SD_H960_2EX_NT, 167 AHD20_SD_H960_2EX_PAL, 168 AHD20_SD_H960_2EX_Btype_NT, 169 AHD20_SD_H960_2EX_Btype_PAL, 170 AHD20_1080P_60P, // For Test 171 AHD20_1080P_50P, // For Test 172 AHD20_1080P_30P, 173 AHD20_1080P_25P, 174 AHD20_720P_60P, 175 AHD20_720P_50P, 176 AHD20_720P_30P, 177 AHD20_720P_25P, 178 AHD20_720P_30P_EX, 179 AHD20_720P_25P_EX, 180 AHD20_720P_30P_EX_Btype, 181 AHD20_720P_25P_EX_Btype, 182 AHD20_720P_960P_30P, 183 AHD20_720P_960P_25P, 184 185 AHD30_4M_30P, 186 AHD30_4M_25P, 187 AHD30_4M_15P, 188 AHD30_3M_30P, 189 AHD30_3M_25P, 190 AHD30_3M_18P, 191 AHD30_5M_12_5P, 192 AHD30_5M_20P, 193 AHD30_5_3M_20P, 194 AHD30_6M_18P, 195 AHD30_6M_20P, 196 AHD30_8M_X_30P, 197 AHD30_8M_X_25P, 198 AHD30_8M_7_5P, 199 AHD30_8M_12_5P, 200 AHD30_8M_15P, 201 202 TVI_FHD_30P, 203 TVI_FHD_25P, 204 TVI_HD_60P, 205 TVI_HD_50P, 206 TVI_HD_30P, 207 TVI_HD_25P, 208 TVI_HD_30P_EX, 209 TVI_HD_25P_EX, 210 TVI_HD_B_30P, 211 TVI_HD_B_25P, 212 TVI_HD_B_30P_EX, 213 TVI_HD_B_25P_EX, 214 TVI_3M_18P, 215 TVI_5M_12_5P, 216 TVI_4M_30P, 217 TVI_4M_25P, 218 TVI_4M_15P, 219 220 CVI_FHD_30P, 221 CVI_FHD_25P, 222 CVI_HD_60P, 223 CVI_HD_50P, 224 CVI_HD_30P, 225 CVI_HD_25P, 226 CVI_HD_30P_EX, 227 CVI_HD_25P_EX, 228 CVI_4M_30P, 229 CVI_4M_25P, 230 CVI_8M_15P, 231 CVI_8M_12_5P, 232 233 AHD20_SD_H960_2EX_Btype_SP_NT, 234 AHD20_SD_H960_2EX_Btype_SP_PAL, 235 236 AHD20_720P_30P_EX_Btype_SP, 237 AHD20_720P_25P_EX_Btype_SP, 238 239 NC_VIVO_CH_FORMATDEF_MAX, 240 241 } NC_VIVO_CH_FORMATDEF; 242 243 typedef enum NC_OUTPUT_MUX_MODE { 244 245 NC_MX_MUX1 = 0, 246 NC_MX_MUX2, 247 NC_MX_MUX4, 248 } NC_OUTPUT_MUX_MODE; 249 250 typedef enum NC_OUTPUT_INTERFACE { 251 NC_OI_BT656 = 0, /* ITU-R BT.656 YUV4:2:2 */ 252 NC_OI_BT601, /* ITU-R BT.601 YUV4:2:2 */ 253 NC_OI_DIGITAL_CAMERA, /* digatal camera mode */ 254 NC_OI_BT1120_STANDARD, /* BT.1120 progressive mode */ 255 NC_OI_BT1120_INTERLEAVED, /* BT.1120 interstage mode */ 256 } NC_OUTPUT_INTERFACE; 257 258 typedef enum NC_OUTPUT_EDGE { 259 260 NC_OE_SINGLE_UP = 0, /* single-edge mode and in rising edge */ 261 NC_OE_SINGLE_DOWN, /* single-edge mode and in falling edge */ 262 NC_OE_DOUBLE, 263 } NC_OUTPUT_EDGE; 264 265 266 267 typedef enum NC_ANALOG_INPUT { 268 269 SINGLE_ENDED = 0, 270 DIFFERENTIAL, 271 } NC_ANALOG_INPUT; 272 273 typedef enum NC_CABLE { 274 275 CABLE_A = 0, 276 CABLE_B, 277 CABLE_C, 278 CABLE_D, 279 } NC_CABLE; 280 281 typedef enum NC_STAGE { 282 283 STAGE_0 = 0, 284 STAGE_1, 285 STAGE_2, 286 STAGE_3, 287 STAGE_4, 288 STAGE_5, 289 } NC_STAGE; 290 291 typedef enum NC_JAGUAR1_EQ { 292 293 NC_EQ_SETTING_FMT_UNKNOWN = 0, 294 295 AHD20_SD_H720_NT_SINGLE_ENDED, 296 AHD20_SD_H720_NT_DIFFERENTIAL, 297 AHD20_SD_H720_PAL_SINGLE_ENDED, 298 AHD20_SD_H720_PAL_DIFFERENTIAL, 299 300 AHD20_SD_H960_2EX_Btype_NT_SINGLE_ENDED, 301 AHD20_SD_H960_2EX_Btype_NT_DIFFERENTIAL, 302 AHD20_SD_H960_2EX_Btype_PAL_SINGLE_ENDED, 303 AHD20_SD_H960_2EX_Btype_PAL_DIFFERENTIAL, 304 305 AHD20_SD_H1440_NT_SINGLE_ENDED, 306 AHD20_SD_H1440_NT_DIFFERENTIAL, 307 AHD20_SD_H1440_PAL_SINGLE_ENDED, 308 AHD20_SD_H1440_PAL_DIFFERENTIAL, 309 310 AHD20_1080P_30P_SINGLE_ENDED, 311 AHD20_1080P_30P_DIFFERENTIAL, 312 AHD20_1080P_25P_SINGLE_ENDED, 313 AHD20_1080P_25P_DIFFERENTIAL, 314 315 AHD20_720P_60P_SINGLE_ENDED, 316 AHD20_720P_60P_DIFFERENTIAL, 317 AHD20_720P_50P_SINGLE_ENDED, 318 AHD20_720P_50P_DIFFERENTIAL, 319 320 AHD20_720P_30P_SINGLE_ENDED, 321 AHD20_720P_30P_DIFFERENTIAL, 322 AHD20_720P_25P_SINGLE_ENDED, 323 AHD20_720P_25P_DIFFERENTIAL, 324 325 AHD20_720P_30P_EX_SINGLE_ENDED, 326 AHD20_720P_30P_EX_DIFFERENTIAL, 327 AHD20_720P_25P_EX_SINGLE_ENDED, 328 AHD20_720P_25P_EX_DIFFERENTIAL, 329 330 AHD20_720P_30P_EX_Btype_SINGLE_ENDED, 331 AHD20_720P_30P_EX_Btype_DIFFERENTIAL, 332 AHD20_720P_25P_EX_Btype_SINGLE_ENDED, 333 AHD20_720P_25P_EX_Btype_DIFFERENTIAL, 334 335 AHD20_960P_30P_SINGLE_ENDED, 336 AHD20_960P_30P_DIFFERENTIAL, 337 AHD20_960P_25P_SINGLE_ENDED, 338 AHD20_960P_25P_DIFFERENTIAL, 339 340 TVI_FHD_30P_SINGLE_ENDED, 341 TVI_FHD_30P_DIFFERENTIAL, 342 TVI_FHD_25P_SINGLE_ENDED, 343 TVI_FHD_25P_DIFFERENTIAL, 344 345 TVI_HD_60P_SINGLE_ENDED, 346 TVI_HD_60P_DIFFERENTIAL, 347 TVI_HD_50P_SINGLE_ENDED, 348 TVI_HD_50P_DIFFERENTIAL, 349 350 TVI_HD_30P_SINGLE_ENDED, 351 TVI_HD_30P_DIFFERENTIAL, 352 TVI_HD_25P_SINGLE_ENDED, 353 TVI_HD_25P_DIFFERENTIAL, 354 355 TVI_HD_30P_EX_SINGLE_ENDED, 356 TVI_HD_30P_EX_DIFFERENTIAL, 357 TVI_HD_25P_EX_SINGLE_ENDED, 358 TVI_HD_25P_EX_DIFFERENTIAL, 359 360 TVI_HD_B_30P_SINGLE_ENDED, 361 TVI_HD_B_30P_DIFFERENTIAL, 362 TVI_HD_B_25P_SINGLE_ENDED, 363 TVI_HD_B_25P_DIFFERENTIAL, 364 365 TVI_HD_B_30P_EX_SINGLE_ENDED, 366 TVI_HD_B_30P_EX_DIFFERENTIAL, 367 TVI_HD_B_25P_EX_SINGLE_ENDED, 368 TVI_HD_B_25P_EX_DIFFERENTIAL, 369 370 CVI_FHD_30P_SINGLE_ENDED, 371 CVI_FHD_30P_DIFFERENTIAL, 372 CVI_FHD_25P_SINGLE_ENDED, 373 CVI_FHD_25P_DIFFERENTIAL, 374 375 CVI_HD_60P_SINGLE_ENDED, 376 CVI_HD_60P_DIFFERENTIAL, 377 CVI_HD_50P_SINGLE_ENDED, 378 CVI_HD_50P_DIFFERENTIAL, 379 380 CVI_HD_30P_SINGLE_ENDED, 381 CVI_HD_30P_DIFFERENTIAL, 382 CVI_HD_25P_SINGLE_ENDED, 383 CVI_HD_25P_DIFFERENTIAL, 384 385 CVI_HD_30P_EX_SINGLE_ENDED, 386 CVI_HD_30P_EX_DIFFERENTIAL, 387 CVI_HD_25P_EX_SINGLE_ENDED, 388 CVI_HD_25P_EX_DIFFERENTIAL, 389 390 NC_EQ_SETTING_FMT_MAX, 391 392 393 } NC_JAGUAR1_EQ; 394 395 typedef enum NC_D2S_OUTPUT_INTERFACE { 396 397 _DISABLE = 0, 398 YUV_422, 399 YUV_420, 400 YUV_420_LEGACY, 401 } NC_D2S_OUTPUT_INTERFACE; 402 403 typedef struct _NC_DEOCDER_SET_STR { 404 405 NC_VIVO_CH_FORMATDEF FmtDef; 406 NC_FORMAT_STANDARD fmt_std; 407 NC_FORMAT_RESOLUTION fmt_res; 408 NC_FORMAT_FPS fmt_fps; 409 NC_ANALOG_INPUT input; 410 NC_D2S_OUTPUT_INTERFACE interface; 411 } NC_DEOCDER_SET_STR; 412 413 #define UNUSED(x) ((void)(x)) 414 415 #if 0 416 #define dbg_printk(...) _kernel_dbg_printk(__VA_ARGS__) 417 418 static void _kernel_dbg_printk(const char *s, ...) 419 { 420 421 unsigned char buffer[128]; 422 char *pS = buffer; 423 424 va_list args; 425 va_start(args, s); 426 vsprintf(buffer, s, args); 427 va_end(args); 428 429 430 while (*pS) { 431 if (*pS == '\n') 432 *pS = ' '; 433 pS++; 434 } 435 436 printk("\033[33m\033[1m [KERNEL] \033[0m:\033[32m\033[1m %s \033[0m\n", buffer); 437 } 438 #endif 439 440 441 442 443 444 445 446 447 448 449 450 451 452 453 #endif 454 455