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1 // Copyright (C) 2022 Beken Corporation
2 //
3 // Licensed under the Apache License, Version 2.0 (the "License");
4 // you may not use this file except in compliance with the License.
5 // You may obtain a copy of the License at
6 //
7 //     http://www.apache.org/licenses/LICENSE-2.0
8 //
9 // Unless required by applicable law or agreed to in writing, software
10 // distributed under the License is distributed on an "AS IS" BASIS,
11 // WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
12 // See the License for the specific language governing permissions and
13 // limitations under the License.
14 
15 #ifndef _mb_ipc_cmd_h_
16 #define _mb_ipc_cmd_h_
17 
18 #ifdef __cplusplus
19 extern "C" {
20 #endif
21 
22 #include <common/bk_typedef.h>
23 #include <common/bk_err.h>
24 #include "amp_res_lock.h"
25 
26 enum
27 {
28 	IPC_TEST_CMD = 0,               /* CPU0 <-> CPU1 */
29 
30 	IPC_CPU1_POWER_UP_INDICATION,           /* CPU1 -> CPU0  */
31 	IPC_CPU1_HEART_BEAT_INDICATION,         /* CPU1 -> CPU0  */
32 	IPC_GET_POWER_SAVE_FLAG,            /* CPU0 -> CPU1  */
33 	IPC_GET_CPU1_HEART_RATE,            /* CPU0 -> CPU1  */
34 	IPC_SET_CPU1_HEART_RATE,            /* CPU0 -> CPU1  */
35 
36 	IPC_RES_ACQUIRE_CNT,                    /* CPU1 -> CPU0  */
37 	IPC_RES_RELEASE_CNT,                    /* CPU1 -> CPU0  */
38 
39 	IPC_RES_AVAILABLE_INDICATION,   /* CPU0 <-> CPU1 */
40 	IPC_ALLOC_DMA_CHNL,                     /* CPU1 -> CPU0  */
41 	IPC_FREE_DMA_CHNL,                      /* CPU1 -> CPU0  */
42 	IPC_DMA_CHNL_USER,                      /* CPU1 -> CPU0  */
43 
44 	IPC_CALL_CMD = 0x60,                    /* CPU1 -> CPU0  */
45 
46 	IPC_CMD_MAX  = 0x7F,  /* cmd id can NOT great than 0x7F. */
47 };
48 
49 /**    =============================     RPC    =============================   **/
50 
51 #define FIELD_OFFSET(type, member)		((u32)(&(((type *)0)->member)))
52 #define FIELD_SIZE(type, member)		(sizeof(((type *)0)->member))
53 
54 /* FIELD_IDX works only when every member size of type is the SAME ! */
55 #define FIELD_IDX(type, member)			(FIELD_OFFSET(type, member) / FIELD_SIZE(type, member))
56 
57 
58 #define RPC_CTRL_NO_RETURN		0x00
59 
60 typedef union
61 {
62 	struct
63 	{
64 		u8	mod_id;
65 		u8	api_id;
66 		u8	ctrl;
67 		u8	data_len;
68 	};
69 	u32		call_id;
70 } rpc_call_hdr_t;
71 
72 typedef struct
73 {
74 	rpc_call_hdr_t	call_hdr;
75 	u8	call_param[0];
76 } rpc_call_def_t;
77 
78 typedef struct
79 {
80 	rpc_call_hdr_t	call_hdr;
81 	u8	ret_data[0];		/* api_ret_data_t if has ret data. */
82 } rpc_ret_def_t;
83 
84 enum
85 {
86 	RPC_MOD_GPIO = 0,
87 	RPC_MOD_DMA,
88 	RPC_MOD_MAX,
89 } ;
90 
91 #ifdef CONFIG_DUAL_CORE
92 
93 u32 ipc_send_test_cmd(u32 param);
94 bk_err_t ipc_send_available_ind(u16 resource_id);
95 
96 #if CONFIG_SLAVE_CORE
97 
98 bk_err_t ipc_client_init(void);
99 bk_err_t ipc_send_power_up(void);
100 bk_err_t ipc_send_heart_beat(u32 param);
101 bk_err_t ipc_send_res_acquire_cnt(u16 resource_id, u16 cpu_id, amp_res_req_cnt_t *cnt_list);
102 bk_err_t ipc_send_res_release_cnt(u16 resource_id, u16 cpu_id, amp_res_req_cnt_t *cnt_list);
103 u8 ipc_send_alloc_dma_chnl(u32 user_id);
104 bk_err_t ipc_send_free_dma_chnl(u32 user_id, u8 chnl_id);
105 u32 ipc_send_dma_chnl_user(u8 chnl_id);
106 
107 bk_err_t rpc_client_init(void);
108 bk_err_t rpc_client_call(rpc_call_def_t *rpc_param, u16 param_len, rpc_ret_def_t *ret_buf, u16 buf_len);
109 
110 #define ipc_init	ipc_client_init
111 #define rpc_init	rpc_client_init
112 
113 #endif  /* CONFIG_SLAVE_CORE */
114 
115 #if CONFIG_MASTER_CORE
116 
117 bk_err_t ipc_server_init(void);
118 u32 ipc_send_get_ps_flag(void);
119 u32 ipc_send_get_heart_rate(void);
120 bk_err_t ipc_send_set_heart_rate(u32 param);
121 
122 bk_err_t rpc_server_init(void);
123 bk_err_t rpc_server_rsp(rpc_ret_def_t *rsp_param, u16 param_len);
124 int rpc_server_listen_cmd(u32 timeout_ms);
125 void rpc_server_handle_cmd(void);
126 
127 #define ipc_init	ipc_server_init
128 #define rpc_init	rpc_server_init
129 
130 #endif  /* CONFIG_MASTER_CORE */
131 
132 #else  /* CONFIG_DUAL_CORE */
133 
134 #define ipc_init(void)
135 #define rpc_init(void)
136 
137 #endif  /* CONFIG_DUAL_CORE */
138 
139 /**    ============================    RPC end   ============================   **/
140 
141 #ifdef __cplusplus
142 }
143 #endif
144 
145 #endif /* _mb_ipc_cmd_h_ */
146 
147