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1 /******************************************************************************
2  *
3  * Copyright(c) 2007 - 2017  Realtek Corporation.
4  *
5  * This program is free software; you can redistribute it and/or modify it
6  * under the terms of version 2 of the GNU General Public License as
7  * published by the Free Software Foundation.
8  *
9  * This program is distributed in the hope that it will be useful, but WITHOUT
10  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
11  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
12  * more details.
13  *
14  * The full GNU General Public License is included in this distribution in the
15  * file called LICENSE.
16  *
17  * Contact Information:
18  * wlanfae <wlanfae@realtek.com>
19  * Realtek Corporation, No. 2, Innovation Road II, Hsinchu Science Park,
20  * Hsinchu 300, Taiwan.
21  *
22  * Larry Finger <Larry.Finger@lwfinger.net>
23  *
24  *****************************************************************************/
25 
26 #ifndef __INC_ADCSMP_H
27 #define __INC_ADCSMP_H
28 
29 #if (PHYDM_LA_MODE_SUPPORT)
30 
31 /* 2020.07.03 [8723F] Fix SD4 compile error*/
32 #define DYNAMIC_LA_MODE "4.2"
33 
34 /* @1 ============================================================
35  * 1  Definition
36  * 1 ============================================================
37  */
38 
39 #if (DM_ODM_SUPPORT_TYPE & ODM_AP)
40 #if (RTL8197F_SUPPORT || RTL8198F_SUPPORT || RTL8197G_SUPPORT)
41 	#define PHYDM_COMPILE_LA_STORE_IN_IMEM
42 #endif
43 #endif
44 
45 #define PHYDM_LA_STORE_IN_IMEM_IC (ODM_RTL8197F | ODM_RTL8198F | ODM_RTL8197G)
46 
47 #define FULL_BUFF_MODE_SUPPORT (ODM_RTL8821C | ODM_RTL8195B | ODM_RTL8822C |\
48 				ODM_RTL8812F | ODM_RTL8814B | ODM_RTL8814C)
49 
50 /* @ ============================================================
51  *  enumrate
52  *  ============================================================
53  */
54 enum la_dump_mode {
55 	LA_BB_ADC_DUMP		= 0,
56 	LA_MAC_DBG_DUMP		= 1
57 };
58 
59 enum rt_adcsmp_trig_sel {
60 	PHYDM_ADC_BB_TRIG	= 0,
61 	PHYDM_ADC_MAC_TRIG	= 1,
62 	PHYDM_ADC_RF0_TRIG	= 2,
63 	PHYDM_ADC_RF1_TRIG	= 3,
64 	PHYDM_MAC_TRIG		= 4
65 };
66 
67 enum rt_adcsmp_trig_sig_sel {
68 	ADCSMP_TRIG_CRCOK	= 0,
69 	ADCSMP_TRIG_CRCFAIL	= 1,
70 	ADCSMP_TRIG_CCA		= 2,
71 	ADCSMP_TRIG_REG		= 3
72 };
73 
74 enum rt_adcsmp_state {
75 	ADCSMP_STATE_IDLE	= 0,
76 	ADCSMP_STATE_SET	= 1,
77 	ADCSMP_STATE_QUERY	= 2
78 };
79 
80 enum la_buff_mode {
81 	ADCSMP_BUFF_HALF	= 0,
82 	ADCSMP_BUFF_ALL		= 1	/*Only use in MP Driver*/
83 };
84 
85 /* @ ============================================================
86  *   structure
87  *  ============================================================
88  */
89 
90 struct rt_adcsmp_string {
91 	u32			*octet;
92 	u32			length;
93 	u32			buffer_size;
94 	u32			start_pos;
95 	u32			end_pos;	/*@buf addr*/
96 };
97 
98 #ifdef PHYDM_IC_JGR3_SERIES_SUPPORT
99 struct la_adv_trig {
100 	boolean			la_adv_bbtrigger_en;
101 	boolean			la_ori_bb_dis;
102 	u8			la_and1_sel;
103 	u8			la_and1_val;
104 	boolean			la_and1_inv;
105 	u8			la_and2_sel;
106 	u8			la_and2_val;
107 	boolean			la_and2_inv;
108 	u8			la_and3_sel;
109 	u8			la_and3_val;
110 	boolean			la_and3_inv;
111 	u32			la_and4_mask;
112 	u32			la_and4_bitmap;
113 	boolean			la_and4_inv;
114 };
115 #endif
116 
117 struct rt_adcsmp {
118 	struct rt_adcsmp_string	adc_smp_buf;
119 	enum rt_adcsmp_state	adc_smp_state;
120 	enum la_buff_mode	la_buff_mode;
121 	enum la_dump_mode	la_dump_mode;
122 	u8			la_trig_mode;
123 	u32			la_trig_sig_sel;
124 	u8			la_dma_type;
125 	u32			la_trigger_time;
126 	/*@1.BB mode: Dbg port header sel, 2.MAC mode: for reference mask*/
127 	u32			la_mac_mask_or_hdr_sel;
128 	u32			la_dbg_port;
129 	u8			la_trigger_edge;
130 	u8			la_smp_rate;
131 	u32			la_count;
132 	u32			smp_number;
133 	u32			smp_number_max;
134 	u32			txff_page;
135 	boolean			is_la_print;
136 	boolean			en_fake_trig;
137 #if (RTL8197F_SUPPORT)
138 	u32			backup_dma;
139 #endif
140 
141 #if (DM_ODM_SUPPORT_TYPE == ODM_WIN)
142 	u8			la_work_item_index;
143 	RT_WORK_ITEM		adc_smp_work_item;
144 	RT_WORK_ITEM		adc_smp_work_item_1;
145 #endif
146 
147 #ifdef PHYDM_IC_JGR3_SERIES_SUPPORT
148 	struct la_adv_trig	adv_trig_table;
149 #endif
150 };
151 
152 /* @ ============================================================
153  *  Function Prototype
154  *  ============================================================
155  */
156 
157 void phydm_la_set(void *dm_void);
158 
159 void phydm_la_cmd(void *dm_void, char input[][16], u32 *_used, char *output,
160 		  u32 *_out_len);
161 
162 void phydm_la_stop(void *dm_void);
163 
164 void phydm_la_init(void *dm_void);
165 
166 void adc_smp_de_init(void *dm_void);
167 
168 #if (DM_ODM_SUPPORT_TYPE & ODM_WIN)
169 void adc_smp_work_item_callback(void *context);
170 #endif
171 #endif
172 #endif
173