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1 // Copyright (C) 2022 Beken Corporation
2 //
3 // Licensed under the Apache License, Version 2.0 (the "License");
4 // you may not use this file except in compliance with the License.
5 // You may obtain a copy of the License at
6 //
7 //     http://www.apache.org/licenses/LICENSE-2.0
8 //
9 // Unless required by applicable law or agreed to in writing, software
10 // distributed under the License is distributed on an "AS IS" BASIS,
11 // WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
12 // See the License for the specific language governing permissions and
13 // limitations under the License.
14 
15 #pragma once
16 
17 #include <soc/soc.h>
18 #include "icu_hw.h"
19 
20 
21 #ifdef __cplusplus
22 extern "C" {
23 #endif
24 
25 #define ICU_LL_REG_BASE() (SOC_ICU_REG_BASE)
26 
27 
power_ll_pwm_pwr_up(icu_hw_t * hw,uint32_t chan)28 static inline void power_ll_pwm_pwr_up(icu_hw_t *hw, uint32_t chan)
29 {
30 	REG_MCHAN_SET_FIELD(chan, ICU_R_PWM_CHAN_PWR, ICU_F_PWM_CHAN_PWR, ICU_V_PWM_CHAN_PWR_UP);
31 }
32 
power_ll_pwm_pwr_down(icu_hw_t * hw,uint32_t chan)33 static inline void power_ll_pwm_pwr_down(icu_hw_t *hw, uint32_t chan)
34 {
35 	REG_MCHAN_SET_FIELD(chan, ICU_R_PWM_CHAN_PWR, ICU_F_PWM_CHAN_PWR, ICU_V_PWM_CHAN_PWR_DOWN);
36 }
37 
power_ll_pwr_up_timer(icu_hw_t * hw,uint32_t timer_id)38 static inline void power_ll_pwr_up_timer(icu_hw_t *hw, uint32_t timer_id)
39 {
40     REG_MCHAN_SET_FIELD(timer_id, ICU_R_TIMER_CHAN_PWR, ICU_F_TIMER_CHAN_PWR, ICU_V_TIMER_CHAN_PWR_UP);
41 }
42 
power_ll_pwr_down_timer(icu_hw_t * hw,uint32_t timer_id)43 static inline void power_ll_pwr_down_timer(icu_hw_t *hw, uint32_t timer_id)
44 {
45     REG_MCHAN_SET_FIELD(timer_id, ICU_R_TIMER_CHAN_PWR, ICU_F_TIMER_CHAN_PWR, ICU_V_TIMER_CHAN_PWR_DOWN);
46 }
47 
48 
power_ll_pwr_up_qspi(icu_hw_t * hw)49 static inline void power_ll_pwr_up_qspi(icu_hw_t *hw)
50 {
51 }
power_ll_pwr_down_qspi(icu_hw_t * hw)52 static inline void power_ll_pwr_down_qspi(icu_hw_t *hw)
53 {
54 }
55 
power_ll_pwr_up_jpeg(icu_hw_t * hw)56 static inline void power_ll_pwr_up_jpeg(icu_hw_t *hw)
57 {
58 }
power_ll_pwr_down_jpeg(icu_hw_t * hw)59 static inline void power_ll_pwr_down_jpeg(icu_hw_t *hw)
60 {
61 }
62 
power_ll_pwr_up_fft(icu_hw_t * hw)63 static inline void power_ll_pwr_up_fft(icu_hw_t *hw)
64 {
65 }
power_ll_pwr_down_fft(icu_hw_t * hw)66 static inline void power_ll_pwr_down_fft(icu_hw_t *hw)
67 {
68 }
69 
power_ll_pwr_up_usb(icu_hw_t * hw,uint32 id)70 static inline void power_ll_pwr_up_usb(icu_hw_t *hw, uint32 id)
71 {
72 }
power_ll_pwr_down_usb(icu_hw_t * hw,uint32 id)73 static inline void power_ll_pwr_down_usb(icu_hw_t *hw, uint32 id)
74 {
75 }
76 
power_ll_pwr_up_sdio(icu_hw_t * hw)77 static inline void power_ll_pwr_up_sdio(icu_hw_t *hw)
78 {
79 	hw->clk_pwr_down.sdio= 0;
80 }
power_ll_pwr_down_sdio(icu_hw_t * hw)81 static inline void power_ll_pwr_down_sdio(icu_hw_t *hw)
82 {
83 	hw->clk_pwr_down.sdio= 1;
84 }
85 
power_ll_pwr_up_tl410_wdt(icu_hw_t * hw)86 static inline void power_ll_pwr_up_tl410_wdt(icu_hw_t *hw)
87 {
88 }
power_ll_pwr_down_tl410_wdt(icu_hw_t * hw)89 static inline void power_ll_pwr_down_tl410_wdt(icu_hw_t *hw)
90 {
91 }
92 
power_ll_pwr_up_audio(icu_hw_t * hw)93 static inline void power_ll_pwr_up_audio(icu_hw_t *hw)
94 {
95 }
power_ll_pwr_down_audio(icu_hw_t * hw)96 static inline void power_ll_pwr_down_audio(icu_hw_t *hw)
97 {
98 }
99 
power_ll_pwr_up_arm_wdt(icu_hw_t * hw)100 static inline void power_ll_pwr_up_arm_wdt(icu_hw_t *hw)
101 {
102 	hw->clk_pwr_down.arm_watchdog= 0;
103 }
power_ll_pwr_down_arm_wdt(icu_hw_t * hw)104 static inline void power_ll_pwr_down_arm_wdt(icu_hw_t *hw)
105 {
106 	hw->clk_pwr_down.arm_watchdog= 1;
107 }
108 
power_ll_pwr_up_saradc(icu_hw_t * hw)109 static inline void power_ll_pwr_up_saradc(icu_hw_t *hw)
110 {
111 	hw->clk_pwr_down.saradc= 0;
112 }
power_ll_pwr_down_saradc(icu_hw_t * hw)113 static inline void power_ll_pwr_down_saradc(icu_hw_t *hw)
114 {
115 	hw->clk_pwr_down.saradc= 1;
116 }
117 
power_ll_pwr_up_spi(icu_hw_t * hw,uint32 id)118 static inline void power_ll_pwr_up_spi(icu_hw_t *hw, uint32 id)
119 {
120 	hw->clk_pwr_down.spi= 0;
121 }
power_ll_pwr_down_spi(icu_hw_t * hw,uint32 id)122 static inline void power_ll_pwr_down_spi(icu_hw_t *hw, uint32 id)
123 {
124 	hw->clk_pwr_down.spi= 1;
125 }
126 
power_ll_pwr_up_i2s_pcm(icu_hw_t * hw)127 static inline void power_ll_pwr_up_i2s_pcm(icu_hw_t *hw)
128 {
129 }
power_ll_pwr_down_i2s_pcm(icu_hw_t * hw)130 static inline void power_ll_pwr_down_i2s_pcm(icu_hw_t *hw)
131 {
132 }
133 
power_ll_pwr_up_irda(icu_hw_t * hw)134 static inline void power_ll_pwr_up_irda(icu_hw_t *hw)
135 {
136 	hw->clk_pwr_down.irda= 0;
137 }
power_ll_pwr_down_irda(icu_hw_t * hw)138 static inline void power_ll_pwr_down_irda(icu_hw_t *hw)
139 {
140 	hw->clk_pwr_down.irda= 1;
141 }
142 
power_ll_pwr_up_i2c(icu_hw_t * hw,uint32 id)143 static inline void power_ll_pwr_up_i2c(icu_hw_t *hw, uint32 id)
144 {
145 	if(id == 1)
146 		hw->clk_pwr_down.i2c1= 0;
147 	else
148 		hw->clk_pwr_down.i2c2= 0;
149 
150 }
power_ll_pwr_down_i2c(icu_hw_t * hw,uint32 id)151 static inline void power_ll_pwr_down_i2c(icu_hw_t *hw, uint32 id)
152 {
153 	if(id == 1)
154 		hw->clk_pwr_down.i2c1= 1;
155 	else
156 		hw->clk_pwr_down.i2c2= 1;
157 }
158 
power_ll_pwr_up_uart(icu_hw_t * hw,uint32_t id)159 static inline void power_ll_pwr_up_uart(icu_hw_t *hw, uint32_t id)
160 {
161 	REG_CLR_BIT(&hw->clk_pwr_down, 1 << (id  & 0x1));
162 }
163 
power_ll_pwr_down_uart(icu_hw_t * hw,uint32_t id)164 static inline void power_ll_pwr_down_uart(icu_hw_t *hw, uint32_t id)
165 {
166 	REG_SET_BIT(&hw->clk_pwr_down, 1 << (id  & 0x1));
167 }
168 
169 
power_ll_pwr_up_ble(icu_hw_t * hw)170 static inline void power_ll_pwr_up_ble(icu_hw_t *hw)
171 {
172 	hw->clk_pwr_down_2.ble = 0;
173 }
power_ll_pwr_down_ble(icu_hw_t * hw)174 static inline void power_ll_pwr_down_ble(icu_hw_t *hw)
175 {
176 	hw->clk_pwr_down_2.ble = 1;
177 }
178 
power_ll_pwr_up_tl410(icu_hw_t * hw)179 static inline void power_ll_pwr_up_tl410(icu_hw_t *hw)
180 {
181 }
power_ll_pwr_down_tl410(icu_hw_t * hw)182 static inline void power_ll_pwr_down_tl410(icu_hw_t *hw)
183 {
184 }
185 
power_ll_pwr_up_security(icu_hw_t * hw)186 static inline void power_ll_pwr_up_security(icu_hw_t *hw)
187 {
188 	hw->clk_pwr_down.security= 0;
189 }
power_ll_pwr_down_security(icu_hw_t * hw)190 static inline void power_ll_pwr_down_security(icu_hw_t *hw)
191 {
192 	hw->clk_pwr_down.security= 1;
193 }
194 
power_ll_pwr_up_cec(icu_hw_t * hw)195 static inline void power_ll_pwr_up_cec(icu_hw_t *hw)
196 {
197 }
power_ll_pwr_down_cec(icu_hw_t * hw)198 static inline void power_ll_pwr_down_cec(icu_hw_t *hw)
199 {
200 }
201 
power_ll_pwr_up_sdio_dma(icu_hw_t * hw)202 static inline void power_ll_pwr_up_sdio_dma(icu_hw_t *hw)
203 {
204 }
power_ll_pwr_down_sdio_dma(icu_hw_t * hw)205 static inline void power_ll_pwr_down_sdio_dma(icu_hw_t *hw)
206 {
207 }
208 
power_ll_pwr_up_wdt(icu_hw_t * hw)209 static inline void power_ll_pwr_up_wdt(icu_hw_t *hw)
210 {
211 	hw->clk_pwr_down.arm_watchdog = 0;
212 }
213 
power_ll_pwr_down_wdt(icu_hw_t * hw)214 static inline void power_ll_pwr_down_wdt(icu_hw_t *hw)
215 {
216 	hw->clk_pwr_down.arm_watchdog = 1;
217 }
218 
219 #ifdef __cplusplus
220 }
221 #endif
222