1 // Copyright (C) 2022 Beken Corporation 2 // 3 // Licensed under the Apache License, Version 2.0 (the "License"); 4 // you may not use this file except in compliance with the License. 5 // You may obtain a copy of the License at 6 // 7 // http://www.apache.org/licenses/LICENSE-2.0 8 // 9 // Unless required by applicable law or agreed to in writing, software 10 // distributed under the License is distributed on an "AS IS" BASIS, 11 // WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 12 // See the License for the specific language governing permissions and 13 // limitations under the License. 14 15 #pragma once 16 17 #include "hal_config.h" 18 #include <soc/soc.h> 19 #include "psram_ll_macro_def.h" 20 //#include <driver/aud_types.h> 21 22 #ifdef __cplusplus 23 extern "C" { 24 #endif 25 26 /* REG_0x00 */ 27 #define psram_hal_get_reg0_value() psram_ll_get_reg0_value() 28 #define psram_hal_set_reg0_value(value) psram_ll_set_reg0_value(value) 29 30 /* REG_0x01 */ 31 #define psram_hal_get_reg1_value() psram_ll_get_reg1_value() 32 #define psram_hal_set_reg1_value(value) psram_ll_set_reg1_value(value) 33 34 /* REG_0x01 */ 35 #define psram_hal_get_reg2_value() psram_ll_get_reg2_value() 36 #define psram_hal_set_reg2_value(value) psram_ll_set_reg2_value(value) 37 38 /* REG_0x03 */ 39 #define psram_hal_get_reg3_value() psram_ll_get_reg3_value() 40 #define psram_hal_set_reg3_value(value) psram_ll_set_reg3_value(value) 41 42 /* REG_0x04 */ 43 #define psram_hal_get_mode_value() psram_ll_get_mode_value() 44 #define psram_hal_set_mode_value(value) psram_ll_set_mode_value(value) 45 46 /* REG_0x05 */ 47 #define psram_hal_get_reg5_value() psram_ll_get_reg5_value() 48 #define psram_hal_set_reg5_value(value) psram_ll_set_reg5_value(value) 49 50 /* REG_0x06 */ 51 #define psram_hal_get_reg6_value() psram_ll_get_reg6_value() 52 #define psram_hal_set_reg6_value(value) psram_ll_set_reg6_value(value) 53 54 /* REG_0x07 */ 55 #define psram_hal_get_reg7_value() psram_ll_get_reg7_value() 56 #define psram_hal_set_reg7_value(value) psram_ll_set_reg7_value(value) 57 58 /* REG_0x08 */ 59 #define psram_hal_get_reg8_value() psram_ll_get_reg8_value() 60 #define psram_hal_set_reg8_value(value) psram_ll_set_reg8_value(value) 61 62 /* REG_0x09 */ 63 #define psram_hal_get_reg9_value() psram_ll_get_write_address() 64 #define psram_hal_set_reg9_value(value) psram_ll_set_write_address(value) 65 66 /* REG_0x0a */ 67 #define psram_hal_get_write_data() psram_ll_get_write_data() 68 #define psram_hal_set_write_data(value) psram_ll_set_write_data(value) 69 70 /* REG_0x0b */ 71 #define psram_hal_get_regb_value() psram_ll_get_regb_value() 72 #define psram_hal_set_regb_value(value) psram_ll_set_regb_value(value) 73 74 void psram_hal_set_sf_reset(uint32_t value); 75 void psram_hal_set_cmd_reset(void); 76 void psram_hal_cmd_write(uint32_t addr, uint32_t value); 77 uint32_t psram_hal_cmd_read(uint32_t addr); 78 void psram_hal_set_transfer_mode(uint32_t value); 79 80 #if CFG_HAL_DEBUG_PSRAM 81 void psram_struct_dump(void); 82 #else 83 #define psram_struct_dump(void) 84 #endif 85 86 87 #ifdef __cplusplus 88 } 89 #endif 90 91 92