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1 /*
2  * Copyright (c) 2021 Chipsea Technologies (Shenzhen) Corp., Ltd. All rights reserved.
3  * Licensed under the Apache License, Version 2.0 (the "License");
4  * you may not use this file except in compliance with the License.
5  * You may obtain a copy of the License at
6  *
7  *     http://www.apache.org/licenses/LICENSE-2.0
8  *
9  * Unless required by applicable law or agreed to in writing, software
10  * distributed under the License is distributed on an "AS IS" BASIS,
11  * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
12  * See the License for the specific language governing permissions and
13  * limitations under the License.
14  */
15 #ifndef _REG_IPC_APP_H_
16 #define _REG_IPC_APP_H_
17 
18 #include "reg_access_wrapper.h"
19 #include "chip.h"
20 
21 /**
22  * @brief APP2EMB_TRIGGER register definition
23  * <pre>
24  *   Bits           Field Name   Reset Value
25  *  -----   ------------------   -----------
26  *  31:00      APP2EMB_TRIGGER   0x0
27  * </pre>
28  */
29 #define IPC_APP2EMB_TRIGGER_ADDR   (CS_IPCAPP_BASE + 0x0000)
30 #define IPC_APP2EMB_TRIGGER_OFFSET 0x00000000
31 #define IPC_APP2EMB_TRIGGER_INDEX  0x00000000
32 #define IPC_APP2EMB_TRIGGER_RESET  0x00000000
33 
ipc_app2emb_trigger_get(void)34 static inline uint32_t ipc_app2emb_trigger_get(void)
35 {
36     return PLATFORM_REG_READ(IPC_APP2EMB_TRIGGER_ADDR);
37 }
38 
ipc_app2emb_trigger_set(uint32_t value)39 static inline void ipc_app2emb_trigger_set(uint32_t value)
40 {
41     PLATFORM_REG_WRITE(IPC_APP2EMB_TRIGGER_ADDR, value);
42 }
43 
44 /**
45  * @brief EMB2APP_RAWSTATUS register definition
46  * <pre>
47  *   Bits           Field Name   Reset Value
48  *  -----   ------------------   -----------
49  *  31:00    EMB2APP_RAWSTATUS   0x0
50  * </pre>
51  */
52 #define IPC_EMB2APP_RAWSTATUS_ADDR   (CS_IPCAPP_BASE + 0x0004)
53 #define IPC_EMB2APP_RAWSTATUS_OFFSET 0x00000004
54 #define IPC_EMB2APP_RAWSTATUS_INDEX  0x00000001
55 #define IPC_EMB2APP_RAWSTATUS_RESET  0x00000000
56 
ipc_emb2app_rawstatus_get(void)57 static inline uint32_t ipc_emb2app_rawstatus_get(void)
58 {
59     return PLATFORM_REG_READ(IPC_EMB2APP_RAWSTATUS_ADDR);
60 }
61 
62 /**
63  * @brief EMB2APP_ACK register definition
64  * <pre>
65  *   Bits           Field Name   Reset Value
66  *  -----   ------------------   -----------
67  *  31:00          EMB2APP_ACK   0x0
68  * </pre>
69  */
70 #define IPC_EMB2APP_ACK_ADDR   (CS_IPCAPP_BASE + 0x0008)
71 #define IPC_EMB2APP_ACK_OFFSET 0x00000008
72 #define IPC_EMB2APP_ACK_INDEX  0x00000002
73 #define IPC_EMB2APP_ACK_RESET  0x00000000
74 
ipc_emb2app_ack_get(void)75 static inline uint32_t ipc_emb2app_ack_get(void)
76 {
77     return PLATFORM_REG_READ(IPC_EMB2APP_ACK_ADDR);
78 }
79 
ipc_emb2app_ack_clear(uint32_t value)80 static inline void ipc_emb2app_ack_clear(uint32_t value)
81 {
82     PLATFORM_REG_WRITE(IPC_EMB2APP_ACK_ADDR, value);
83 }
84 
85 /**
86  * @brief EMB2APP_UNMASK_SET register definition
87  * <pre>
88  *   Bits           Field Name   Reset Value
89  *  -----   ------------------   -----------
90  *  31:00       EMB2APP_UNMASK   0x0
91  * </pre>
92  */
93 #define IPC_EMB2APP_UNMASK_SET_ADDR   (CS_IPCAPP_BASE + 0x000C)
94 #define IPC_EMB2APP_UNMASK_SET_OFFSET 0x0000000C
95 #define IPC_EMB2APP_UNMASK_SET_INDEX  0x00000003
96 #define IPC_EMB2APP_UNMASK_SET_RESET  0x00000000
97 
ipc_emb2app_unmask_get(void)98 static inline uint32_t ipc_emb2app_unmask_get(void)
99 {
100     return PLATFORM_REG_READ(IPC_EMB2APP_UNMASK_SET_ADDR);
101 }
102 
ipc_emb2app_unmask_set(uint32_t value)103 static inline void ipc_emb2app_unmask_set(uint32_t value)
104 {
105     PLATFORM_REG_WRITE(IPC_EMB2APP_UNMASK_SET_ADDR, value);
106 }
107 
108 /**
109  * @brief EMB2APP_UNMASK_CLEAR register definition
110  * <pre>
111  *   Bits           Field Name   Reset Value
112  *  -----   ------------------   -----------
113  *  31:00       EMB2APP_UNMASK   0x0
114  * </pre>
115  */
116 #define IPC_EMB2APP_UNMASK_CLEAR_ADDR   (CS_IPCAPP_BASE + 0x0010)
117 #define IPC_EMB2APP_UNMASK_CLEAR_OFFSET 0x00000010
118 #define IPC_EMB2APP_UNMASK_CLEAR_INDEX  0x00000004
119 #define IPC_EMB2APP_UNMASK_CLEAR_RESET  0x00000000
120 
ipc_emb2app_unmask_clear(uint32_t value)121 static inline void ipc_emb2app_unmask_clear(uint32_t value)
122 {
123     PLATFORM_REG_WRITE(IPC_EMB2APP_UNMASK_CLEAR_ADDR, value);
124 }
125 
126 /**
127  * @brief EMB2APP_LINE_SEL_LOW register definition
128  * <pre>
129  *   Bits           Field Name   Reset Value
130  *  -----   ------------------   -----------
131  *  31:30        EMB2APP15_SEL   0x0
132  *  29:28        EMB2APP14_SEL   0x0
133  *  27:26        EMB2APP13_SEL   0x0
134  *  25:24        EMB2APP12_SEL   0x0
135  *  23:22        EMB2APP11_SEL   0x0
136  *  21:20        EMB2APP10_SEL   0x0
137  *  19:18         EMB2APP9_SEL   0x0
138  *  17:16         EMB2APP8_SEL   0x0
139  *  15:14         EMB2APP7_SEL   0x0
140  *  13:12         EMB2APP6_SEL   0x0
141  *  11:10         EMB2APP5_SEL   0x0
142  *  09:08         EMB2APP4_SEL   0x0
143  *  07:06         EMB2APP3_SEL   0x0
144  *  05:04         EMB2APP2_SEL   0x0
145  *  03:02         EMB2APP1_SEL   0x0
146  *  01:00         EMB2APP0_SEL   0x0
147  * </pre>
148  */
149 #define IPC_EMB2APP_LINE_SEL_LOW_ADDR   (CS_IPCAPP_BASE + 0x0014)
150 #define IPC_EMB2APP_LINE_SEL_LOW_OFFSET 0x00000014
151 #define IPC_EMB2APP_LINE_SEL_LOW_INDEX  0x00000005
152 #define IPC_EMB2APP_LINE_SEL_LOW_RESET  0x00000000
153 
ipc_emb2app_line_sel_low_get(void)154 static inline uint32_t ipc_emb2app_line_sel_low_get(void)
155 {
156     return PLATFORM_REG_READ(IPC_EMB2APP_LINE_SEL_LOW_ADDR);
157 }
158 
ipc_emb2app_line_sel_low_set(uint32_t value)159 static inline void ipc_emb2app_line_sel_low_set(uint32_t value)
160 {
161     PLATFORM_REG_WRITE(IPC_EMB2APP_LINE_SEL_LOW_ADDR, value);
162 }
163 
164 // field definitions
165 #define IPC_EMB2APP15_SEL_MASK   ((uint32_t)0xC0000000)
166 #define IPC_EMB2APP15_SEL_LSB    30
167 #define IPC_EMB2APP15_SEL_WIDTH  ((uint32_t)0x00000002)
168 #define IPC_EMB2APP14_SEL_MASK   ((uint32_t)0x30000000)
169 #define IPC_EMB2APP14_SEL_LSB    28
170 #define IPC_EMB2APP14_SEL_WIDTH  ((uint32_t)0x00000002)
171 #define IPC_EMB2APP13_SEL_MASK   ((uint32_t)0x0C000000)
172 #define IPC_EMB2APP13_SEL_LSB    26
173 #define IPC_EMB2APP13_SEL_WIDTH  ((uint32_t)0x00000002)
174 #define IPC_EMB2APP12_SEL_MASK   ((uint32_t)0x03000000)
175 #define IPC_EMB2APP12_SEL_LSB    24
176 #define IPC_EMB2APP12_SEL_WIDTH  ((uint32_t)0x00000002)
177 #define IPC_EMB2APP11_SEL_MASK   ((uint32_t)0x00C00000)
178 #define IPC_EMB2APP11_SEL_LSB    22
179 #define IPC_EMB2APP11_SEL_WIDTH  ((uint32_t)0x00000002)
180 #define IPC_EMB2APP10_SEL_MASK   ((uint32_t)0x00300000)
181 #define IPC_EMB2APP10_SEL_LSB    20
182 #define IPC_EMB2APP10_SEL_WIDTH  ((uint32_t)0x00000002)
183 #define IPC_EMB2APP9_SEL_MASK    ((uint32_t)0x000C0000)
184 #define IPC_EMB2APP9_SEL_LSB     18
185 #define IPC_EMB2APP9_SEL_WIDTH   ((uint32_t)0x00000002)
186 #define IPC_EMB2APP8_SEL_MASK    ((uint32_t)0x00030000)
187 #define IPC_EMB2APP8_SEL_LSB     16
188 #define IPC_EMB2APP8_SEL_WIDTH   ((uint32_t)0x00000002)
189 #define IPC_EMB2APP7_SEL_MASK    ((uint32_t)0x0000C000)
190 #define IPC_EMB2APP7_SEL_LSB     14
191 #define IPC_EMB2APP7_SEL_WIDTH   ((uint32_t)0x00000002)
192 #define IPC_EMB2APP6_SEL_MASK    ((uint32_t)0x00003000)
193 #define IPC_EMB2APP6_SEL_LSB     12
194 #define IPC_EMB2APP6_SEL_WIDTH   ((uint32_t)0x00000002)
195 #define IPC_EMB2APP5_SEL_MASK    ((uint32_t)0x00000C00)
196 #define IPC_EMB2APP5_SEL_LSB     10
197 #define IPC_EMB2APP5_SEL_WIDTH   ((uint32_t)0x00000002)
198 #define IPC_EMB2APP4_SEL_MASK    ((uint32_t)0x00000300)
199 #define IPC_EMB2APP4_SEL_LSB     8
200 #define IPC_EMB2APP4_SEL_WIDTH   ((uint32_t)0x00000002)
201 #define IPC_EMB2APP3_SEL_MASK    ((uint32_t)0x000000C0)
202 #define IPC_EMB2APP3_SEL_LSB     6
203 #define IPC_EMB2APP3_SEL_WIDTH   ((uint32_t)0x00000002)
204 #define IPC_EMB2APP2_SEL_MASK    ((uint32_t)0x00000030)
205 #define IPC_EMB2APP2_SEL_LSB     4
206 #define IPC_EMB2APP2_SEL_WIDTH   ((uint32_t)0x00000002)
207 #define IPC_EMB2APP1_SEL_MASK    ((uint32_t)0x0000000C)
208 #define IPC_EMB2APP1_SEL_LSB     2
209 #define IPC_EMB2APP1_SEL_WIDTH   ((uint32_t)0x00000002)
210 #define IPC_EMB2APP0_SEL_MASK    ((uint32_t)0x00000003)
211 #define IPC_EMB2APP0_SEL_LSB     0
212 #define IPC_EMB2APP0_SEL_WIDTH   ((uint32_t)0x00000002)
213 
214 #define IPC_EMB2APP15_SEL_RST    0x0
215 #define IPC_EMB2APP14_SEL_RST    0x0
216 #define IPC_EMB2APP13_SEL_RST    0x0
217 #define IPC_EMB2APP12_SEL_RST    0x0
218 #define IPC_EMB2APP11_SEL_RST    0x0
219 #define IPC_EMB2APP10_SEL_RST    0x0
220 #define IPC_EMB2APP9_SEL_RST     0x0
221 #define IPC_EMB2APP8_SEL_RST     0x0
222 #define IPC_EMB2APP7_SEL_RST     0x0
223 #define IPC_EMB2APP6_SEL_RST     0x0
224 #define IPC_EMB2APP5_SEL_RST     0x0
225 #define IPC_EMB2APP4_SEL_RST     0x0
226 #define IPC_EMB2APP3_SEL_RST     0x0
227 #define IPC_EMB2APP2_SEL_RST     0x0
228 #define IPC_EMB2APP1_SEL_RST     0x0
229 #define IPC_EMB2APP0_SEL_RST     0x0
230 
ipc_emb2app_line_sel_low_pack(uint8_t emb2app15sel,uint8_t emb2app14sel,uint8_t emb2app13sel,uint8_t emb2app12sel,uint8_t emb2app11sel,uint8_t emb2app10sel,uint8_t emb2app9sel,uint8_t emb2app8sel,uint8_t emb2app7sel,uint8_t emb2app6sel,uint8_t emb2app5sel,uint8_t emb2app4sel,uint8_t emb2app3sel,uint8_t emb2app2sel,uint8_t emb2app1sel,uint8_t emb2app0sel)231 static inline void ipc_emb2app_line_sel_low_pack(uint8_t emb2app15sel, uint8_t emb2app14sel, uint8_t emb2app13sel, uint8_t emb2app12sel, uint8_t emb2app11sel, uint8_t emb2app10sel, uint8_t emb2app9sel, uint8_t emb2app8sel, uint8_t emb2app7sel, uint8_t emb2app6sel, uint8_t emb2app5sel, uint8_t emb2app4sel, uint8_t emb2app3sel, uint8_t emb2app2sel, uint8_t emb2app1sel, uint8_t emb2app0sel)
232 {
233     PLATFORM_REG_WRITE(IPC_EMB2APP_LINE_SEL_LOW_ADDR,  ((uint32_t)emb2app15sel << 30) | ((uint32_t)emb2app14sel << 28) | ((uint32_t)emb2app13sel << 26) | ((uint32_t)emb2app12sel << 24) | ((uint32_t)emb2app11sel << 22) | ((uint32_t)emb2app10sel << 20) | ((uint32_t)emb2app9sel << 18) | ((uint32_t)emb2app8sel << 16) | ((uint32_t)emb2app7sel << 14) | ((uint32_t)emb2app6sel << 12) | ((uint32_t)emb2app5sel << 10) | ((uint32_t)emb2app4sel << 8) | ((uint32_t)emb2app3sel << 6) | ((uint32_t)emb2app2sel << 4) | ((uint32_t)emb2app1sel << 2) | ((uint32_t)emb2app0sel << 0));
234 }
235 
ipc_emb2app_line_sel_low_unpack(uint8_t * emb2app15sel,uint8_t * emb2app14sel,uint8_t * emb2app13sel,uint8_t * emb2app12sel,uint8_t * emb2app11sel,uint8_t * emb2app10sel,uint8_t * emb2app9sel,uint8_t * emb2app8sel,uint8_t * emb2app7sel,uint8_t * emb2app6sel,uint8_t * emb2app5sel,uint8_t * emb2app4sel,uint8_t * emb2app3sel,uint8_t * emb2app2sel,uint8_t * emb2app1sel,uint8_t * emb2app0sel)236 static inline void ipc_emb2app_line_sel_low_unpack(uint8_t* emb2app15sel, uint8_t* emb2app14sel, uint8_t* emb2app13sel, uint8_t* emb2app12sel, uint8_t* emb2app11sel, uint8_t* emb2app10sel, uint8_t* emb2app9sel, uint8_t* emb2app8sel, uint8_t* emb2app7sel, uint8_t* emb2app6sel, uint8_t* emb2app5sel, uint8_t* emb2app4sel, uint8_t* emb2app3sel, uint8_t* emb2app2sel, uint8_t* emb2app1sel, uint8_t* emb2app0sel)
237 {
238     uint32_t localVal = PLATFORM_REG_READ(IPC_EMB2APP_LINE_SEL_LOW_ADDR);
239 
240     *emb2app15sel = (localVal & ((uint32_t)0xC0000000)) >> 30;
241     *emb2app14sel = (localVal & ((uint32_t)0x30000000)) >> 28;
242     *emb2app13sel = (localVal & ((uint32_t)0x0C000000)) >> 26;
243     *emb2app12sel = (localVal & ((uint32_t)0x03000000)) >> 24;
244     *emb2app11sel = (localVal & ((uint32_t)0x00C00000)) >> 22;
245     *emb2app10sel = (localVal & ((uint32_t)0x00300000)) >> 20;
246     *emb2app9sel = (localVal & ((uint32_t)0x000C0000)) >> 18;
247     *emb2app8sel = (localVal & ((uint32_t)0x00030000)) >> 16;
248     *emb2app7sel = (localVal & ((uint32_t)0x0000C000)) >> 14;
249     *emb2app6sel = (localVal & ((uint32_t)0x00003000)) >> 12;
250     *emb2app5sel = (localVal & ((uint32_t)0x00000C00)) >> 10;
251     *emb2app4sel = (localVal & ((uint32_t)0x00000300)) >> 8;
252     *emb2app3sel = (localVal & ((uint32_t)0x000000C0)) >> 6;
253     *emb2app2sel = (localVal & ((uint32_t)0x00000030)) >> 4;
254     *emb2app1sel = (localVal & ((uint32_t)0x0000000C)) >> 2;
255     *emb2app0sel = (localVal & ((uint32_t)0x00000003)) >> 0;
256 }
257 
ipc_emb2app15_sel_getf(void)258 static inline uint8_t ipc_emb2app15_sel_getf(void)
259 {
260     uint32_t localVal = PLATFORM_REG_READ(IPC_EMB2APP_LINE_SEL_LOW_ADDR);
261     return ((localVal & ((uint32_t)0xC0000000)) >> 30);
262 }
263 
ipc_emb2app15_sel_setf(uint8_t emb2app15sel)264 static inline void ipc_emb2app15_sel_setf(uint8_t emb2app15sel)
265 {
266     PLATFORM_REG_WRITE(IPC_EMB2APP_LINE_SEL_LOW_ADDR, (PLATFORM_REG_READ(IPC_EMB2APP_LINE_SEL_LOW_ADDR) & ~((uint32_t)0xC0000000)) | ((uint32_t)emb2app15sel << 30));
267 }
268 
ipc_emb2app14_sel_getf(void)269 static inline uint8_t ipc_emb2app14_sel_getf(void)
270 {
271     uint32_t localVal = PLATFORM_REG_READ(IPC_EMB2APP_LINE_SEL_LOW_ADDR);
272     return ((localVal & ((uint32_t)0x30000000)) >> 28);
273 }
274 
ipc_emb2app14_sel_setf(uint8_t emb2app14sel)275 static inline void ipc_emb2app14_sel_setf(uint8_t emb2app14sel)
276 {
277     PLATFORM_REG_WRITE(IPC_EMB2APP_LINE_SEL_LOW_ADDR, (PLATFORM_REG_READ(IPC_EMB2APP_LINE_SEL_LOW_ADDR) & ~((uint32_t)0x30000000)) | ((uint32_t)emb2app14sel << 28));
278 }
279 
ipc_emb2app13_sel_getf(void)280 static inline uint8_t ipc_emb2app13_sel_getf(void)
281 {
282     uint32_t localVal = PLATFORM_REG_READ(IPC_EMB2APP_LINE_SEL_LOW_ADDR);
283     return ((localVal & ((uint32_t)0x0C000000)) >> 26);
284 }
285 
ipc_emb2app13_sel_setf(uint8_t emb2app13sel)286 static inline void ipc_emb2app13_sel_setf(uint8_t emb2app13sel)
287 {
288     PLATFORM_REG_WRITE(IPC_EMB2APP_LINE_SEL_LOW_ADDR, (PLATFORM_REG_READ(IPC_EMB2APP_LINE_SEL_LOW_ADDR) & ~((uint32_t)0x0C000000)) | ((uint32_t)emb2app13sel << 26));
289 }
290 
ipc_emb2app12_sel_getf(void)291 static inline uint8_t ipc_emb2app12_sel_getf(void)
292 {
293     uint32_t localVal = PLATFORM_REG_READ(IPC_EMB2APP_LINE_SEL_LOW_ADDR);
294     return ((localVal & ((uint32_t)0x03000000)) >> 24);
295 }
296 
ipc_emb2app12_sel_setf(uint8_t emb2app12sel)297 static inline void ipc_emb2app12_sel_setf(uint8_t emb2app12sel)
298 {
299     PLATFORM_REG_WRITE(IPC_EMB2APP_LINE_SEL_LOW_ADDR, (PLATFORM_REG_READ(IPC_EMB2APP_LINE_SEL_LOW_ADDR) & ~((uint32_t)0x03000000)) | ((uint32_t)emb2app12sel << 24));
300 }
301 
ipc_emb2app11_sel_getf(void)302 static inline uint8_t ipc_emb2app11_sel_getf(void)
303 {
304     uint32_t localVal = PLATFORM_REG_READ(IPC_EMB2APP_LINE_SEL_LOW_ADDR);
305     return ((localVal & ((uint32_t)0x00C00000)) >> 22);
306 }
307 
ipc_emb2app11_sel_setf(uint8_t emb2app11sel)308 static inline void ipc_emb2app11_sel_setf(uint8_t emb2app11sel)
309 {
310     PLATFORM_REG_WRITE(IPC_EMB2APP_LINE_SEL_LOW_ADDR, (PLATFORM_REG_READ(IPC_EMB2APP_LINE_SEL_LOW_ADDR) & ~((uint32_t)0x00C00000)) | ((uint32_t)emb2app11sel << 22));
311 }
312 
ipc_emb2app10_sel_getf(void)313 static inline uint8_t ipc_emb2app10_sel_getf(void)
314 {
315     uint32_t localVal = PLATFORM_REG_READ(IPC_EMB2APP_LINE_SEL_LOW_ADDR);
316     return ((localVal & ((uint32_t)0x00300000)) >> 20);
317 }
318 
ipc_emb2app10_sel_setf(uint8_t emb2app10sel)319 static inline void ipc_emb2app10_sel_setf(uint8_t emb2app10sel)
320 {
321     PLATFORM_REG_WRITE(IPC_EMB2APP_LINE_SEL_LOW_ADDR, (PLATFORM_REG_READ(IPC_EMB2APP_LINE_SEL_LOW_ADDR) & ~((uint32_t)0x00300000)) | ((uint32_t)emb2app10sel << 20));
322 }
323 
ipc_emb2app9_sel_getf(void)324 static inline uint8_t ipc_emb2app9_sel_getf(void)
325 {
326     uint32_t localVal = PLATFORM_REG_READ(IPC_EMB2APP_LINE_SEL_LOW_ADDR);
327     return ((localVal & ((uint32_t)0x000C0000)) >> 18);
328 }
329 
ipc_emb2app9_sel_setf(uint8_t emb2app9sel)330 static inline void ipc_emb2app9_sel_setf(uint8_t emb2app9sel)
331 {
332     PLATFORM_REG_WRITE(IPC_EMB2APP_LINE_SEL_LOW_ADDR, (PLATFORM_REG_READ(IPC_EMB2APP_LINE_SEL_LOW_ADDR) & ~((uint32_t)0x000C0000)) | ((uint32_t)emb2app9sel << 18));
333 }
334 
ipc_emb2app8_sel_getf(void)335 static inline uint8_t ipc_emb2app8_sel_getf(void)
336 {
337     uint32_t localVal = PLATFORM_REG_READ(IPC_EMB2APP_LINE_SEL_LOW_ADDR);
338     return ((localVal & ((uint32_t)0x00030000)) >> 16);
339 }
340 
ipc_emb2app8_sel_setf(uint8_t emb2app8sel)341 static inline void ipc_emb2app8_sel_setf(uint8_t emb2app8sel)
342 {
343     PLATFORM_REG_WRITE(IPC_EMB2APP_LINE_SEL_LOW_ADDR, (PLATFORM_REG_READ(IPC_EMB2APP_LINE_SEL_LOW_ADDR) & ~((uint32_t)0x00030000)) | ((uint32_t)emb2app8sel << 16));
344 }
345 
ipc_emb2app7_sel_getf(void)346 static inline uint8_t ipc_emb2app7_sel_getf(void)
347 {
348     uint32_t localVal = PLATFORM_REG_READ(IPC_EMB2APP_LINE_SEL_LOW_ADDR);
349     return ((localVal & ((uint32_t)0x0000C000)) >> 14);
350 }
351 
ipc_emb2app7_sel_setf(uint8_t emb2app7sel)352 static inline void ipc_emb2app7_sel_setf(uint8_t emb2app7sel)
353 {
354     PLATFORM_REG_WRITE(IPC_EMB2APP_LINE_SEL_LOW_ADDR, (PLATFORM_REG_READ(IPC_EMB2APP_LINE_SEL_LOW_ADDR) & ~((uint32_t)0x0000C000)) | ((uint32_t)emb2app7sel << 14));
355 }
356 
ipc_emb2app6_sel_getf(void)357 static inline uint8_t ipc_emb2app6_sel_getf(void)
358 {
359     uint32_t localVal = PLATFORM_REG_READ(IPC_EMB2APP_LINE_SEL_LOW_ADDR);
360     return ((localVal & ((uint32_t)0x00003000)) >> 12);
361 }
362 
ipc_emb2app6_sel_setf(uint8_t emb2app6sel)363 static inline void ipc_emb2app6_sel_setf(uint8_t emb2app6sel)
364 {
365     PLATFORM_REG_WRITE(IPC_EMB2APP_LINE_SEL_LOW_ADDR, (PLATFORM_REG_READ(IPC_EMB2APP_LINE_SEL_LOW_ADDR) & ~((uint32_t)0x00003000)) | ((uint32_t)emb2app6sel << 12));
366 }
367 
ipc_emb2app5_sel_getf(void)368 static inline uint8_t ipc_emb2app5_sel_getf(void)
369 {
370     uint32_t localVal = PLATFORM_REG_READ(IPC_EMB2APP_LINE_SEL_LOW_ADDR);
371     return ((localVal & ((uint32_t)0x00000C00)) >> 10);
372 }
373 
ipc_emb2app5_sel_setf(uint8_t emb2app5sel)374 static inline void ipc_emb2app5_sel_setf(uint8_t emb2app5sel)
375 {
376     PLATFORM_REG_WRITE(IPC_EMB2APP_LINE_SEL_LOW_ADDR, (PLATFORM_REG_READ(IPC_EMB2APP_LINE_SEL_LOW_ADDR) & ~((uint32_t)0x00000C00)) | ((uint32_t)emb2app5sel << 10));
377 }
378 
ipc_emb2app4_sel_getf(void)379 static inline uint8_t ipc_emb2app4_sel_getf(void)
380 {
381     uint32_t localVal = PLATFORM_REG_READ(IPC_EMB2APP_LINE_SEL_LOW_ADDR);
382     return ((localVal & ((uint32_t)0x00000300)) >> 8);
383 }
384 
ipc_emb2app4_sel_setf(uint8_t emb2app4sel)385 static inline void ipc_emb2app4_sel_setf(uint8_t emb2app4sel)
386 {
387     PLATFORM_REG_WRITE(IPC_EMB2APP_LINE_SEL_LOW_ADDR, (PLATFORM_REG_READ(IPC_EMB2APP_LINE_SEL_LOW_ADDR) & ~((uint32_t)0x00000300)) | ((uint32_t)emb2app4sel << 8));
388 }
389 
ipc_emb2app3_sel_getf(void)390 static inline uint8_t ipc_emb2app3_sel_getf(void)
391 {
392     uint32_t localVal = PLATFORM_REG_READ(IPC_EMB2APP_LINE_SEL_LOW_ADDR);
393     return ((localVal & ((uint32_t)0x000000C0)) >> 6);
394 }
395 
ipc_emb2app3_sel_setf(uint8_t emb2app3sel)396 static inline void ipc_emb2app3_sel_setf(uint8_t emb2app3sel)
397 {
398     PLATFORM_REG_WRITE(IPC_EMB2APP_LINE_SEL_LOW_ADDR, (PLATFORM_REG_READ(IPC_EMB2APP_LINE_SEL_LOW_ADDR) & ~((uint32_t)0x000000C0)) | ((uint32_t)emb2app3sel << 6));
399 }
400 
ipc_emb2app2_sel_getf(void)401 static inline uint8_t ipc_emb2app2_sel_getf(void)
402 {
403     uint32_t localVal = PLATFORM_REG_READ(IPC_EMB2APP_LINE_SEL_LOW_ADDR);
404     return ((localVal & ((uint32_t)0x00000030)) >> 4);
405 }
406 
ipc_emb2app2_sel_setf(uint8_t emb2app2sel)407 static inline void ipc_emb2app2_sel_setf(uint8_t emb2app2sel)
408 {
409     PLATFORM_REG_WRITE(IPC_EMB2APP_LINE_SEL_LOW_ADDR, (PLATFORM_REG_READ(IPC_EMB2APP_LINE_SEL_LOW_ADDR) & ~((uint32_t)0x00000030)) | ((uint32_t)emb2app2sel << 4));
410 }
411 
ipc_emb2app1_sel_getf(void)412 static inline uint8_t ipc_emb2app1_sel_getf(void)
413 {
414     uint32_t localVal = PLATFORM_REG_READ(IPC_EMB2APP_LINE_SEL_LOW_ADDR);
415     return ((localVal & ((uint32_t)0x0000000C)) >> 2);
416 }
417 
ipc_emb2app1_sel_setf(uint8_t emb2app1sel)418 static inline void ipc_emb2app1_sel_setf(uint8_t emb2app1sel)
419 {
420     PLATFORM_REG_WRITE(IPC_EMB2APP_LINE_SEL_LOW_ADDR, (PLATFORM_REG_READ(IPC_EMB2APP_LINE_SEL_LOW_ADDR) & ~((uint32_t)0x0000000C)) | ((uint32_t)emb2app1sel << 2));
421 }
422 
ipc_emb2app0_sel_getf(void)423 static inline uint8_t ipc_emb2app0_sel_getf(void)
424 {
425     uint32_t localVal = PLATFORM_REG_READ(IPC_EMB2APP_LINE_SEL_LOW_ADDR);
426     return ((localVal & ((uint32_t)0x00000003)) >> 0);
427 }
428 
ipc_emb2app0_sel_setf(uint8_t emb2app0sel)429 static inline void ipc_emb2app0_sel_setf(uint8_t emb2app0sel)
430 {
431     PLATFORM_REG_WRITE(IPC_EMB2APP_LINE_SEL_LOW_ADDR, (PLATFORM_REG_READ(IPC_EMB2APP_LINE_SEL_LOW_ADDR) & ~((uint32_t)0x00000003)) | ((uint32_t)emb2app0sel << 0));
432 }
433 
434 /**
435  * @brief EMB2APP_LINE_SEL_HIGH register definition
436  * <pre>
437  *   Bits           Field Name   Reset Value
438  *  -----   ------------------   -----------
439  *  31:30        EMB2APP31_SEL   0x0
440  *  29:28        EMB2APP30_SEL   0x0
441  *  27:26        EMB2APP29_SEL   0x0
442  *  25:24        EMB2APP28_SEL   0x0
443  *  23:22        EMB2APP27_SEL   0x0
444  *  21:20        EMB2APP26_SEL   0x0
445  *  19:18        EMB2APP25_SEL   0x0
446  *  17:16        EMB2APP24_SEL   0x0
447  *  15:14        EMB2APP23_SEL   0x0
448  *  13:12        EMB2APP22_SEL   0x0
449  *  11:10        EMB2APP21_SEL   0x0
450  *  09:08        EMB2APP20_SEL   0x0
451  *  07:06        EMB2APP19_SEL   0x0
452  *  05:04        EMB2APP18_SEL   0x0
453  *  03:02        EMB2APP17_SEL   0x0
454  *  01:00        EMB2APP16_SEL   0x0
455  * </pre>
456  */
457 #define IPC_EMB2APP_LINE_SEL_HIGH_ADDR   (CS_IPCAPP_BASE + 0x0018)
458 #define IPC_EMB2APP_LINE_SEL_HIGH_OFFSET 0x00000018
459 #define IPC_EMB2APP_LINE_SEL_HIGH_INDEX  0x00000006
460 #define IPC_EMB2APP_LINE_SEL_HIGH_RESET  0x00000000
461 
ipc_emb2app_line_sel_high_get(void)462 static inline uint32_t ipc_emb2app_line_sel_high_get(void)
463 {
464     return PLATFORM_REG_READ(IPC_EMB2APP_LINE_SEL_HIGH_ADDR);
465 }
466 
ipc_emb2app_line_sel_high_set(uint32_t value)467 static inline void ipc_emb2app_line_sel_high_set(uint32_t value)
468 {
469     PLATFORM_REG_WRITE(IPC_EMB2APP_LINE_SEL_HIGH_ADDR, value);
470 }
471 
472 // field definitions
473 #define IPC_EMB2APP31_SEL_MASK   ((uint32_t)0xC0000000)
474 #define IPC_EMB2APP31_SEL_LSB    30
475 #define IPC_EMB2APP31_SEL_WIDTH  ((uint32_t)0x00000002)
476 #define IPC_EMB2APP30_SEL_MASK   ((uint32_t)0x30000000)
477 #define IPC_EMB2APP30_SEL_LSB    28
478 #define IPC_EMB2APP30_SEL_WIDTH  ((uint32_t)0x00000002)
479 #define IPC_EMB2APP29_SEL_MASK   ((uint32_t)0x0C000000)
480 #define IPC_EMB2APP29_SEL_LSB    26
481 #define IPC_EMB2APP29_SEL_WIDTH  ((uint32_t)0x00000002)
482 #define IPC_EMB2APP28_SEL_MASK   ((uint32_t)0x03000000)
483 #define IPC_EMB2APP28_SEL_LSB    24
484 #define IPC_EMB2APP28_SEL_WIDTH  ((uint32_t)0x00000002)
485 #define IPC_EMB2APP27_SEL_MASK   ((uint32_t)0x00C00000)
486 #define IPC_EMB2APP27_SEL_LSB    22
487 #define IPC_EMB2APP27_SEL_WIDTH  ((uint32_t)0x00000002)
488 #define IPC_EMB2APP26_SEL_MASK   ((uint32_t)0x00300000)
489 #define IPC_EMB2APP26_SEL_LSB    20
490 #define IPC_EMB2APP26_SEL_WIDTH  ((uint32_t)0x00000002)
491 #define IPC_EMB2APP25_SEL_MASK   ((uint32_t)0x000C0000)
492 #define IPC_EMB2APP25_SEL_LSB    18
493 #define IPC_EMB2APP25_SEL_WIDTH  ((uint32_t)0x00000002)
494 #define IPC_EMB2APP24_SEL_MASK   ((uint32_t)0x00030000)
495 #define IPC_EMB2APP24_SEL_LSB    16
496 #define IPC_EMB2APP24_SEL_WIDTH  ((uint32_t)0x00000002)
497 #define IPC_EMB2APP23_SEL_MASK   ((uint32_t)0x0000C000)
498 #define IPC_EMB2APP23_SEL_LSB    14
499 #define IPC_EMB2APP23_SEL_WIDTH  ((uint32_t)0x00000002)
500 #define IPC_EMB2APP22_SEL_MASK   ((uint32_t)0x00003000)
501 #define IPC_EMB2APP22_SEL_LSB    12
502 #define IPC_EMB2APP22_SEL_WIDTH  ((uint32_t)0x00000002)
503 #define IPC_EMB2APP21_SEL_MASK   ((uint32_t)0x00000C00)
504 #define IPC_EMB2APP21_SEL_LSB    10
505 #define IPC_EMB2APP21_SEL_WIDTH  ((uint32_t)0x00000002)
506 #define IPC_EMB2APP20_SEL_MASK   ((uint32_t)0x00000300)
507 #define IPC_EMB2APP20_SEL_LSB    8
508 #define IPC_EMB2APP20_SEL_WIDTH  ((uint32_t)0x00000002)
509 #define IPC_EMB2APP19_SEL_MASK   ((uint32_t)0x000000C0)
510 #define IPC_EMB2APP19_SEL_LSB    6
511 #define IPC_EMB2APP19_SEL_WIDTH  ((uint32_t)0x00000002)
512 #define IPC_EMB2APP18_SEL_MASK   ((uint32_t)0x00000030)
513 #define IPC_EMB2APP18_SEL_LSB    4
514 #define IPC_EMB2APP18_SEL_WIDTH  ((uint32_t)0x00000002)
515 #define IPC_EMB2APP17_SEL_MASK   ((uint32_t)0x0000000C)
516 #define IPC_EMB2APP17_SEL_LSB    2
517 #define IPC_EMB2APP17_SEL_WIDTH  ((uint32_t)0x00000002)
518 #define IPC_EMB2APP16_SEL_MASK   ((uint32_t)0x00000003)
519 #define IPC_EMB2APP16_SEL_LSB    0
520 #define IPC_EMB2APP16_SEL_WIDTH  ((uint32_t)0x00000002)
521 
522 #define IPC_EMB2APP31_SEL_RST    0x0
523 #define IPC_EMB2APP30_SEL_RST    0x0
524 #define IPC_EMB2APP29_SEL_RST    0x0
525 #define IPC_EMB2APP28_SEL_RST    0x0
526 #define IPC_EMB2APP27_SEL_RST    0x0
527 #define IPC_EMB2APP26_SEL_RST    0x0
528 #define IPC_EMB2APP25_SEL_RST    0x0
529 #define IPC_EMB2APP24_SEL_RST    0x0
530 #define IPC_EMB2APP23_SEL_RST    0x0
531 #define IPC_EMB2APP22_SEL_RST    0x0
532 #define IPC_EMB2APP21_SEL_RST    0x0
533 #define IPC_EMB2APP20_SEL_RST    0x0
534 #define IPC_EMB2APP19_SEL_RST    0x0
535 #define IPC_EMB2APP18_SEL_RST    0x0
536 #define IPC_EMB2APP17_SEL_RST    0x0
537 #define IPC_EMB2APP16_SEL_RST    0x0
538 
ipc_emb2app_line_sel_high_pack(uint8_t emb2app31sel,uint8_t emb2app30sel,uint8_t emb2app29sel,uint8_t emb2app28sel,uint8_t emb2app27sel,uint8_t emb2app26sel,uint8_t emb2app25sel,uint8_t emb2app24sel,uint8_t emb2app23sel,uint8_t emb2app22sel,uint8_t emb2app21sel,uint8_t emb2app20sel,uint8_t emb2app19sel,uint8_t emb2app18sel,uint8_t emb2app17sel,uint8_t emb2app16sel)539 static inline void ipc_emb2app_line_sel_high_pack(uint8_t emb2app31sel, uint8_t emb2app30sel, uint8_t emb2app29sel, uint8_t emb2app28sel, uint8_t emb2app27sel, uint8_t emb2app26sel, uint8_t emb2app25sel, uint8_t emb2app24sel, uint8_t emb2app23sel, uint8_t emb2app22sel, uint8_t emb2app21sel, uint8_t emb2app20sel, uint8_t emb2app19sel, uint8_t emb2app18sel, uint8_t emb2app17sel, uint8_t emb2app16sel)
540 {
541     PLATFORM_REG_WRITE(IPC_EMB2APP_LINE_SEL_HIGH_ADDR,  ((uint32_t)emb2app31sel << 30) | ((uint32_t)emb2app30sel << 28) | ((uint32_t)emb2app29sel << 26) | ((uint32_t)emb2app28sel << 24) | ((uint32_t)emb2app27sel << 22) | ((uint32_t)emb2app26sel << 20) | ((uint32_t)emb2app25sel << 18) | ((uint32_t)emb2app24sel << 16) | ((uint32_t)emb2app23sel << 14) | ((uint32_t)emb2app22sel << 12) | ((uint32_t)emb2app21sel << 10) | ((uint32_t)emb2app20sel << 8) | ((uint32_t)emb2app19sel << 6) | ((uint32_t)emb2app18sel << 4) | ((uint32_t)emb2app17sel << 2) | ((uint32_t)emb2app16sel << 0));
542 }
543 
ipc_emb2app_line_sel_high_unpack(uint8_t * emb2app31sel,uint8_t * emb2app30sel,uint8_t * emb2app29sel,uint8_t * emb2app28sel,uint8_t * emb2app27sel,uint8_t * emb2app26sel,uint8_t * emb2app25sel,uint8_t * emb2app24sel,uint8_t * emb2app23sel,uint8_t * emb2app22sel,uint8_t * emb2app21sel,uint8_t * emb2app20sel,uint8_t * emb2app19sel,uint8_t * emb2app18sel,uint8_t * emb2app17sel,uint8_t * emb2app16sel)544 static inline void ipc_emb2app_line_sel_high_unpack(uint8_t* emb2app31sel, uint8_t* emb2app30sel, uint8_t* emb2app29sel, uint8_t* emb2app28sel, uint8_t* emb2app27sel, uint8_t* emb2app26sel, uint8_t* emb2app25sel, uint8_t* emb2app24sel, uint8_t* emb2app23sel, uint8_t* emb2app22sel, uint8_t* emb2app21sel, uint8_t* emb2app20sel, uint8_t* emb2app19sel, uint8_t* emb2app18sel, uint8_t* emb2app17sel, uint8_t* emb2app16sel)
545 {
546     uint32_t localVal = PLATFORM_REG_READ(IPC_EMB2APP_LINE_SEL_HIGH_ADDR);
547 
548     *emb2app31sel = (localVal & ((uint32_t)0xC0000000)) >> 30;
549     *emb2app30sel = (localVal & ((uint32_t)0x30000000)) >> 28;
550     *emb2app29sel = (localVal & ((uint32_t)0x0C000000)) >> 26;
551     *emb2app28sel = (localVal & ((uint32_t)0x03000000)) >> 24;
552     *emb2app27sel = (localVal & ((uint32_t)0x00C00000)) >> 22;
553     *emb2app26sel = (localVal & ((uint32_t)0x00300000)) >> 20;
554     *emb2app25sel = (localVal & ((uint32_t)0x000C0000)) >> 18;
555     *emb2app24sel = (localVal & ((uint32_t)0x00030000)) >> 16;
556     *emb2app23sel = (localVal & ((uint32_t)0x0000C000)) >> 14;
557     *emb2app22sel = (localVal & ((uint32_t)0x00003000)) >> 12;
558     *emb2app21sel = (localVal & ((uint32_t)0x00000C00)) >> 10;
559     *emb2app20sel = (localVal & ((uint32_t)0x00000300)) >> 8;
560     *emb2app19sel = (localVal & ((uint32_t)0x000000C0)) >> 6;
561     *emb2app18sel = (localVal & ((uint32_t)0x00000030)) >> 4;
562     *emb2app17sel = (localVal & ((uint32_t)0x0000000C)) >> 2;
563     *emb2app16sel = (localVal & ((uint32_t)0x00000003)) >> 0;
564 }
565 
ipc_emb2app31_sel_getf(void)566 static inline uint8_t ipc_emb2app31_sel_getf(void)
567 {
568     uint32_t localVal = PLATFORM_REG_READ(IPC_EMB2APP_LINE_SEL_HIGH_ADDR);
569     return ((localVal & ((uint32_t)0xC0000000)) >> 30);
570 }
571 
ipc_emb2app31_sel_setf(uint8_t emb2app31sel)572 static inline void ipc_emb2app31_sel_setf(uint8_t emb2app31sel)
573 {
574     PLATFORM_REG_WRITE(IPC_EMB2APP_LINE_SEL_HIGH_ADDR, (PLATFORM_REG_READ(IPC_EMB2APP_LINE_SEL_HIGH_ADDR) & ~((uint32_t)0xC0000000)) | ((uint32_t)emb2app31sel << 30));
575 }
576 
ipc_emb2app30_sel_getf(void)577 static inline uint8_t ipc_emb2app30_sel_getf(void)
578 {
579     uint32_t localVal = PLATFORM_REG_READ(IPC_EMB2APP_LINE_SEL_HIGH_ADDR);
580     return ((localVal & ((uint32_t)0x30000000)) >> 28);
581 }
582 
ipc_emb2app30_sel_setf(uint8_t emb2app30sel)583 static inline void ipc_emb2app30_sel_setf(uint8_t emb2app30sel)
584 {
585     PLATFORM_REG_WRITE(IPC_EMB2APP_LINE_SEL_HIGH_ADDR, (PLATFORM_REG_READ(IPC_EMB2APP_LINE_SEL_HIGH_ADDR) & ~((uint32_t)0x30000000)) | ((uint32_t)emb2app30sel << 28));
586 }
587 
ipc_emb2app29_sel_getf(void)588 static inline uint8_t ipc_emb2app29_sel_getf(void)
589 {
590     uint32_t localVal = PLATFORM_REG_READ(IPC_EMB2APP_LINE_SEL_HIGH_ADDR);
591     return ((localVal & ((uint32_t)0x0C000000)) >> 26);
592 }
593 
ipc_emb2app29_sel_setf(uint8_t emb2app29sel)594 static inline void ipc_emb2app29_sel_setf(uint8_t emb2app29sel)
595 {
596     PLATFORM_REG_WRITE(IPC_EMB2APP_LINE_SEL_HIGH_ADDR, (PLATFORM_REG_READ(IPC_EMB2APP_LINE_SEL_HIGH_ADDR) & ~((uint32_t)0x0C000000)) | ((uint32_t)emb2app29sel << 26));
597 }
598 
ipc_emb2app28_sel_getf(void)599 static inline uint8_t ipc_emb2app28_sel_getf(void)
600 {
601     uint32_t localVal = PLATFORM_REG_READ(IPC_EMB2APP_LINE_SEL_HIGH_ADDR);
602     return ((localVal & ((uint32_t)0x03000000)) >> 24);
603 }
604 
ipc_emb2app28_sel_setf(uint8_t emb2app28sel)605 static inline void ipc_emb2app28_sel_setf(uint8_t emb2app28sel)
606 {
607     PLATFORM_REG_WRITE(IPC_EMB2APP_LINE_SEL_HIGH_ADDR, (PLATFORM_REG_READ(IPC_EMB2APP_LINE_SEL_HIGH_ADDR) & ~((uint32_t)0x03000000)) | ((uint32_t)emb2app28sel << 24));
608 }
609 
ipc_emb2app27_sel_getf(void)610 static inline uint8_t ipc_emb2app27_sel_getf(void)
611 {
612     uint32_t localVal = PLATFORM_REG_READ(IPC_EMB2APP_LINE_SEL_HIGH_ADDR);
613     return ((localVal & ((uint32_t)0x00C00000)) >> 22);
614 }
615 
ipc_emb2app27_sel_setf(uint8_t emb2app27sel)616 static inline void ipc_emb2app27_sel_setf(uint8_t emb2app27sel)
617 {
618     PLATFORM_REG_WRITE(IPC_EMB2APP_LINE_SEL_HIGH_ADDR, (PLATFORM_REG_READ(IPC_EMB2APP_LINE_SEL_HIGH_ADDR) & ~((uint32_t)0x00C00000)) | ((uint32_t)emb2app27sel << 22));
619 }
620 
ipc_emb2app26_sel_getf(void)621 static inline uint8_t ipc_emb2app26_sel_getf(void)
622 {
623     uint32_t localVal = PLATFORM_REG_READ(IPC_EMB2APP_LINE_SEL_HIGH_ADDR);
624     return ((localVal & ((uint32_t)0x00300000)) >> 20);
625 }
626 
ipc_emb2app26_sel_setf(uint8_t emb2app26sel)627 static inline void ipc_emb2app26_sel_setf(uint8_t emb2app26sel)
628 {
629     PLATFORM_REG_WRITE(IPC_EMB2APP_LINE_SEL_HIGH_ADDR, (PLATFORM_REG_READ(IPC_EMB2APP_LINE_SEL_HIGH_ADDR) & ~((uint32_t)0x00300000)) | ((uint32_t)emb2app26sel << 20));
630 }
631 
ipc_emb2app25_sel_getf(void)632 static inline uint8_t ipc_emb2app25_sel_getf(void)
633 {
634     uint32_t localVal = PLATFORM_REG_READ(IPC_EMB2APP_LINE_SEL_HIGH_ADDR);
635     return ((localVal & ((uint32_t)0x000C0000)) >> 18);
636 }
637 
ipc_emb2app25_sel_setf(uint8_t emb2app25sel)638 static inline void ipc_emb2app25_sel_setf(uint8_t emb2app25sel)
639 {
640     PLATFORM_REG_WRITE(IPC_EMB2APP_LINE_SEL_HIGH_ADDR, (PLATFORM_REG_READ(IPC_EMB2APP_LINE_SEL_HIGH_ADDR) & ~((uint32_t)0x000C0000)) | ((uint32_t)emb2app25sel << 18));
641 }
642 
ipc_emb2app24_sel_getf(void)643 static inline uint8_t ipc_emb2app24_sel_getf(void)
644 {
645     uint32_t localVal = PLATFORM_REG_READ(IPC_EMB2APP_LINE_SEL_HIGH_ADDR);
646     return ((localVal & ((uint32_t)0x00030000)) >> 16);
647 }
648 
ipc_emb2app24_sel_setf(uint8_t emb2app24sel)649 static inline void ipc_emb2app24_sel_setf(uint8_t emb2app24sel)
650 {
651     PLATFORM_REG_WRITE(IPC_EMB2APP_LINE_SEL_HIGH_ADDR, (PLATFORM_REG_READ(IPC_EMB2APP_LINE_SEL_HIGH_ADDR) & ~((uint32_t)0x00030000)) | ((uint32_t)emb2app24sel << 16));
652 }
653 
ipc_emb2app23_sel_getf(void)654 static inline uint8_t ipc_emb2app23_sel_getf(void)
655 {
656     uint32_t localVal = PLATFORM_REG_READ(IPC_EMB2APP_LINE_SEL_HIGH_ADDR);
657     return ((localVal & ((uint32_t)0x0000C000)) >> 14);
658 }
659 
ipc_emb2app23_sel_setf(uint8_t emb2app23sel)660 static inline void ipc_emb2app23_sel_setf(uint8_t emb2app23sel)
661 {
662     PLATFORM_REG_WRITE(IPC_EMB2APP_LINE_SEL_HIGH_ADDR, (PLATFORM_REG_READ(IPC_EMB2APP_LINE_SEL_HIGH_ADDR) & ~((uint32_t)0x0000C000)) | ((uint32_t)emb2app23sel << 14));
663 }
664 
ipc_emb2app22_sel_getf(void)665 static inline uint8_t ipc_emb2app22_sel_getf(void)
666 {
667     uint32_t localVal = PLATFORM_REG_READ(IPC_EMB2APP_LINE_SEL_HIGH_ADDR);
668     return ((localVal & ((uint32_t)0x00003000)) >> 12);
669 }
670 
ipc_emb2app22_sel_setf(uint8_t emb2app22sel)671 static inline void ipc_emb2app22_sel_setf(uint8_t emb2app22sel)
672 {
673     PLATFORM_REG_WRITE(IPC_EMB2APP_LINE_SEL_HIGH_ADDR, (PLATFORM_REG_READ(IPC_EMB2APP_LINE_SEL_HIGH_ADDR) & ~((uint32_t)0x00003000)) | ((uint32_t)emb2app22sel << 12));
674 }
675 
ipc_emb2app21_sel_getf(void)676 static inline uint8_t ipc_emb2app21_sel_getf(void)
677 {
678     uint32_t localVal = PLATFORM_REG_READ(IPC_EMB2APP_LINE_SEL_HIGH_ADDR);
679     return ((localVal & ((uint32_t)0x00000C00)) >> 10);
680 }
681 
ipc_emb2app21_sel_setf(uint8_t emb2app21sel)682 static inline void ipc_emb2app21_sel_setf(uint8_t emb2app21sel)
683 {
684     PLATFORM_REG_WRITE(IPC_EMB2APP_LINE_SEL_HIGH_ADDR, (PLATFORM_REG_READ(IPC_EMB2APP_LINE_SEL_HIGH_ADDR) & ~((uint32_t)0x00000C00)) | ((uint32_t)emb2app21sel << 10));
685 }
686 
ipc_emb2app20_sel_getf(void)687 static inline uint8_t ipc_emb2app20_sel_getf(void)
688 {
689     uint32_t localVal = PLATFORM_REG_READ(IPC_EMB2APP_LINE_SEL_HIGH_ADDR);
690     return ((localVal & ((uint32_t)0x00000300)) >> 8);
691 }
692 
ipc_emb2app20_sel_setf(uint8_t emb2app20sel)693 static inline void ipc_emb2app20_sel_setf(uint8_t emb2app20sel)
694 {
695     PLATFORM_REG_WRITE(IPC_EMB2APP_LINE_SEL_HIGH_ADDR, (PLATFORM_REG_READ(IPC_EMB2APP_LINE_SEL_HIGH_ADDR) & ~((uint32_t)0x00000300)) | ((uint32_t)emb2app20sel << 8));
696 }
697 
ipc_emb2app19_sel_getf(void)698 static inline uint8_t ipc_emb2app19_sel_getf(void)
699 {
700     uint32_t localVal = PLATFORM_REG_READ(IPC_EMB2APP_LINE_SEL_HIGH_ADDR);
701     return ((localVal & ((uint32_t)0x000000C0)) >> 6);
702 }
703 
ipc_emb2app19_sel_setf(uint8_t emb2app19sel)704 static inline void ipc_emb2app19_sel_setf(uint8_t emb2app19sel)
705 {
706     PLATFORM_REG_WRITE(IPC_EMB2APP_LINE_SEL_HIGH_ADDR, (PLATFORM_REG_READ(IPC_EMB2APP_LINE_SEL_HIGH_ADDR) & ~((uint32_t)0x000000C0)) | ((uint32_t)emb2app19sel << 6));
707 }
708 
ipc_emb2app18_sel_getf(void)709 static inline uint8_t ipc_emb2app18_sel_getf(void)
710 {
711     uint32_t localVal = PLATFORM_REG_READ(IPC_EMB2APP_LINE_SEL_HIGH_ADDR);
712     return ((localVal & ((uint32_t)0x00000030)) >> 4);
713 }
714 
ipc_emb2app18_sel_setf(uint8_t emb2app18sel)715 static inline void ipc_emb2app18_sel_setf(uint8_t emb2app18sel)
716 {
717     PLATFORM_REG_WRITE(IPC_EMB2APP_LINE_SEL_HIGH_ADDR, (PLATFORM_REG_READ(IPC_EMB2APP_LINE_SEL_HIGH_ADDR) & ~((uint32_t)0x00000030)) | ((uint32_t)emb2app18sel << 4));
718 }
719 
ipc_emb2app17_sel_getf(void)720 static inline uint8_t ipc_emb2app17_sel_getf(void)
721 {
722     uint32_t localVal = PLATFORM_REG_READ(IPC_EMB2APP_LINE_SEL_HIGH_ADDR);
723     return ((localVal & ((uint32_t)0x0000000C)) >> 2);
724 }
725 
ipc_emb2app17_sel_setf(uint8_t emb2app17sel)726 static inline void ipc_emb2app17_sel_setf(uint8_t emb2app17sel)
727 {
728     PLATFORM_REG_WRITE(IPC_EMB2APP_LINE_SEL_HIGH_ADDR, (PLATFORM_REG_READ(IPC_EMB2APP_LINE_SEL_HIGH_ADDR) & ~((uint32_t)0x0000000C)) | ((uint32_t)emb2app17sel << 2));
729 }
730 
ipc_emb2app16_sel_getf(void)731 static inline uint8_t ipc_emb2app16_sel_getf(void)
732 {
733     uint32_t localVal = PLATFORM_REG_READ(IPC_EMB2APP_LINE_SEL_HIGH_ADDR);
734     return ((localVal & ((uint32_t)0x00000003)) >> 0);
735 }
736 
ipc_emb2app16_sel_setf(uint8_t emb2app16sel)737 static inline void ipc_emb2app16_sel_setf(uint8_t emb2app16sel)
738 {
739     PLATFORM_REG_WRITE(IPC_EMB2APP_LINE_SEL_HIGH_ADDR, (PLATFORM_REG_READ(IPC_EMB2APP_LINE_SEL_HIGH_ADDR) & ~((uint32_t)0x00000003)) | ((uint32_t)emb2app16sel << 0));
740 }
741 
742 
743 /**
744  * @brief EMB2APP_STATUS register definition
745  * <pre>
746  *   Bits           Field Name   Reset Value
747  *  -----   ------------------   -----------
748  *  31:00       EMB2APP_STATUS   0x0
749  * </pre>
750  */
751 #define IPC_EMB2APP_STATUS_ADDR   (CS_IPCAPP_BASE + 0x001C)
752 #define IPC_EMB2APP_STATUS_OFFSET 0x0000001C
753 #define IPC_EMB2APP_STATUS_INDEX  0x00000007
754 #define IPC_EMB2APP_STATUS_RESET  0x00000000
755 
ipc_emb2app_status_get(void)756 static inline uint32_t ipc_emb2app_status_get(void)
757 {
758     return PLATFORM_REG_READ(IPC_EMB2APP_STATUS_ADDR);
759 }
760 
761 #endif /* _REG_IPC_APP_H_ */
762