1 /* 2 // Copyright (C) 2022 Beken Corporation 3 * Licensed under the Apache License, Version 2.0 (the "License"); 4 * you may not use this file except in compliance with the License. 5 * You may obtain a copy of the License at 6 * 7 * http://www.apache.org/licenses/LICENSE-2.0 8 * 9 * Unless required by applicable law or agreed to in writing, software 10 * distributed under the License is distributed on an "AS IS" BASIS, 11 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 12 * See the License for the specific language governing permissions and 13 * limitations under the License. 14 */ 15 16 #ifndef __SDIO_DRIVER_H__ 17 #define __SDIO_DRIVER_H__ 18 19 #include <common/bk_include.h> 20 21 #include "bk_uart.h" 22 #define SDCARD_DEBUG 23 24 #ifdef SDCARD_DEBUG 25 #if CONFIG_SOC_BK7256XX 26 #define SD_TAG "sd" 27 #define SDCARD_PRT(...) BK_LOGI(SD_TAG, ##__VA_ARGS__) 28 #define SDCARD_WARN(...) BK_LOGW(SD_TAG, ##__VA_ARGS__) 29 #define SDCARD_FATAL(...) BK_LOGE(SD_TAG, ##__VA_ARGS__) 30 #define SDCARD_DBG(...) BK_LOGD(SD_TAG, ##__VA_ARGS__) 31 #else 32 #define SDCARD_PRT os_printf 33 #define SDCARD_WARN warning_prf 34 #define SDCARD_FATAL fatal_prf 35 #define SDCARD_DBG null_prf 36 #endif 37 #else 38 #define SDCARD_PRT null_prf 39 #define SDCARD_WARN null_prf 40 #define SDCARD_FATAL null_prf 41 #define SDCARD_DBG null_prf 42 #endif 43 44 /* SDCARD Register*/ 45 #if (CONFIG_SOC_BK7271) 46 #define SDCARD_BASE_ADDR (0x00802300) 47 #elif (CONFIG_SOC_BK7256XX) 48 #define SDCARD_BASE_ADDR (0x448B0000) 49 #else 50 #define SDCARD_BASE_ADDR (0x00802D00) 51 #endif 52 53 #define REG_SDCARD_CMD_SEND_CTRL (SDCARD_BASE_ADDR + 0*4) 54 #define SDCARD_CMD_SEND_CTRL_CMD_START (1 << 0) //Read & Write, Auto clear by ASIC. 55 #define SDCARD_CMD_SEND_CTRL_CMD_FLAGS_MASK (0x7) 56 #define SDCARD_CMD_SEND_CTRL_CMD_FLAGS_POSI (1) 57 #define SDCARD_CMD_SEND_CTRL_CMD_INDEX_MASK (0x3f) 58 #define SDCARD_CMD_SEND_CTRL_CMD_INDEX_POSI (4) 59 60 #define REG_SDCARD_CMD_SEND_AGUMENT (SDCARD_BASE_ADDR + 1*4) 61 #define REG_SDCARD_CMD_RSP_TIMER (SDCARD_BASE_ADDR + 2*4) 62 63 #define REG_SDCARD_DATA_REC_CTRL (SDCARD_BASE_ADDR + 3*4) 64 #define SDCARD_DATA_REC_CTRL_DATA_EN (1 << 0) //Read & Write, Auto clear by ASIC. 65 #define SDCARD_DATA_REC_CTRL_DATA_STOP_EN (1 << 1) //Read & Write, Auto clear by ASIC. 66 #define SDCARD_DATA_REC_CTRL_DATA_BUS (1 << 2) //4 data wires or 1 data wire. 67 #define SDCARD_DATA_REC_CTRL_DATA_MUL_BLK (1 << 3) 68 #define SDCARD_DATA_REC_CTRL_BLK_SIZE_MASK (0xfff) 69 #define SDCARD_DATA_REC_CTRL_BLK_SIZE_POSI (4) 70 #define SDCARD_DATA_REC_CTRL_DATA_WR_DATA_EN (1 << 16) //Read & Write, Auto clear by ASIC. 71 #define SDCARD_DATA_REC_CTRL_DATA_BYTE_SEL (1 << 17) 72 73 #define REG_SDCARD_DATA_REC_TIMER (SDCARD_BASE_ADDR + 4*4) 74 #define REG_SDCARD_CMD_RSP_AGUMENT0 (SDCARD_BASE_ADDR + 5*4) 75 #define REG_SDCARD_CMD_RSP_AGUMENT1 (SDCARD_BASE_ADDR + 6*4) 76 #define REG_SDCARD_CMD_RSP_AGUMENT2 (SDCARD_BASE_ADDR + 7*4) 77 #define REG_SDCARD_CMD_RSP_AGUMENT3 (SDCARD_BASE_ADDR + 8*4) 78 79 #define REG_SDCARD_CMD_RSP_INT_SEL (SDCARD_BASE_ADDR + 9*4) 80 #define SDCARD_CMDRSP_NORSP_END_INT (1 << 0) 81 #define SDCARD_CMDRSP_RSP_END_INT (1 << 1) 82 #define SDCARD_CMDRSP_TIMEOUT_INT (1 << 2) 83 #define SDCARD_CMDRSP_DATA_REC_END_INT (1 << 3) 84 #define SDCARD_CMDRSP_DATA_WR_END_INT (1 << 4) 85 #define SDCARD_CMDRSP_DATA_TIME_OUT_INT (1 << 5) 86 #define SDCARD_CMDRSP_RX_FIFO_NEED_READ (1 << 6) 87 #define SDCARD_CMDRSP_TX_FIFO_NEED_WRITE (1 << 7) 88 #define SDCARD_CMDRSP_RX_OVERFLOW (1 << 8) 89 #define SDCARD_CMDRSP_TX_FIFO_EMPTY (1 << 9) 90 #define SDCARD_CMDRSP_CMD_CRC_OK (1 << 10) 91 #define SDCARD_CMDRSP_CMD_CRC_FAIL (1 << 11) 92 #define SDCARD_CMDRSP_DATA_CRC_OK (1 << 12) 93 #define SDCARD_CMDRSP_DATA_CRC_FAIL (1 << 13) 94 #define SDCARD_CMDRSP_RSP_INDEX (0x3f<<14) 95 #define SDCARD_CMDRSP_WR_STATU (0x7<<20) 96 #define SDCARD_CMDRSP_DATA_BUSY (0x1<<23) 97 98 #define REG_SDCARD_CMD_RSP_INT_MASK (SDCARD_BASE_ADDR + 10*4) 99 #define SDCARD_CMDRSP_NORSP_END_INT_MASK (1 << 0) 100 #define SDCARD_CMDRSP_RSP_END_INT_MASK (1 << 1) 101 #define SDCARD_CMDRSP_TIMEOUT_INT_MASK (1 << 2) 102 #define SDCARD_CMDRSP_DATA_REC_END_INT_MASK (1 << 3) 103 #define SDCARD_CMDRSP_DATA_WR_END_INT_MASK (1 << 4) 104 #define SDCARD_CMDRSP_DATA_TIME_OUT_INT_MASK (1 << 5) 105 #define SDCARD_CMDRSP_RX_FIFO_NEED_READ_MASK (1 << 6) 106 #define SDCARD_CMDRSP_TX_FIFO_NEED_WRITE_MASK (1 << 7) 107 #define SDCARD_CMDRSP_RX_OVERFLOW_MASK (1 << 8) 108 #define SDCARD_CMDRSP_TX_FIFO_EMPTY_MASK (1 << 9) 109 110 #if CONFIG_SOC_BK7256XX 111 #define SDIO_REG0XA_TX_FIFO_NEED_WRITE_MASK_CG_POS (13) 112 #define SDIO_REG0XA_TX_FIFO_NEED_WRITE_MASK_CG_MASK (0x1) 113 114 #define SDIO_REG0XA_WRITE_WAIT_JUMP_SEL_POS (14) 115 #define SDIO_REG0XA_WRITE_WAIT_JUMP_SEL_MASK (0x1) 116 117 #define SDIO_REG0XA_IDLE_STOP_JUMP_SEL_POS (15) 118 #define SDIO_REG0XA_IDLE_STOP_JUMP_SEL_MASK (0x1) 119 120 #define SDIO_REG0XA_RESERVED0_POS (16) 121 #define SDIO_REG0XA_RESERVED0_MASK (0xFFFF) 122 #else 123 #define SDIO_REG0XA_RESERVED0_POS (13) 124 #define SDIO_REG0XA_RESERVED0_MASK (0x7FFFF) 125 #endif 126 127 #define REG_SDCARD_WR_DATA_ADDR (SDCARD_BASE_ADDR + 11*4) 128 #define REG_SDCARD_RD_DATA_ADDR (SDCARD_BASE_ADDR + 12*4) 129 130 #define REG_SDCARD_FIFO_THRESHOLD (SDCARD_BASE_ADDR + 13*4) 131 #define SDCARD_FIFO_RX_FIFO_THRESHOLD_MASK (0xff) 132 #define SDCARD_FIFO_RX_FIFO_THRESHOLD_POSI (0) 133 #define SDCARD_FIFO_TX_FIFO_THRESHOLD_MASK (0xff) 134 #define SDCARD_FIFO_TX_FIFO_THRESHOLD_POSI (8) 135 #define SDCARD_FIFO_RX_FIFO_RST (1 << 16) 136 #define SDCARD_FIFO_TX_FIFO_RST (1 << 17) 137 #define SDCARD_FIFO_RXFIFO_RD_READY (1 << 18) 138 #define SDCARD_FIFO_TXFIFO_WR_READY (1 << 19) 139 #define SDCARD_FIFO_SD_STA_RST (1 << 20) 140 #define SDCARD_FIFO_SD_RATE_SELECT_POSI (21) 141 #define SDCARD_FIFO_SD_RATE_SELECT_MASK (0x3) 142 143 #if CONFIG_SOC_BK7256XX 144 #define SDIO_REG0XD_SD_RD_WAIT_SEL_POS (23) 145 #define SDIO_REG0XD_SD_RD_WAIT_SEL_MASK (0x1) 146 #define SDIO_REG0XD_SD_RD_WAIT_SEL (0x1 << SDIO_REG0XD_SD_RD_WAIT_SEL_POS) 147 148 #define SDIO_REG0XD_SD_WR_WAIT_SEL_POS (24) 149 #define SDIO_REG0XD_SD_WR_WAIT_SEL_MASK (0x1) 150 151 #define SDIO_REG0XD_CLK_REC_SEL_POS (25) 152 #define SDIO_REG0XD_CLK_REC_SEL_MASK (0x1) 153 #define SDIO_REG0XD_CLK_REC_SEL (0x1<<SDIO_REG0XD_CLK_REC_SEL_POS) 154 #endif 155 156 #if CONFIG_SOC_BK7256XX 157 #define SDIO_REG0XD_SAMP_SEL_POS (26) 158 #define SDIO_REG0XD_SAMP_SEL_MASK (0x1) 159 160 #define SDIO_REG0XD_CLK_GATE_ON_POS (27) 161 #define SDIO_REG0XD_CLK_GATE_ON_MASK (0x1) 162 163 #define SDIO_REG0XD_HOST_WR_BLK_EN_POS (28) 164 #define SDIO_REG0XD_HOST_WR_BLK_EN_MASK (0x1) 165 166 #define SDIO_REG0XD_HOST_RD_BLK_EN_POS (29) 167 #define SDIO_REG0XD_HOST_RD_BLK_EN_MASK (0x1) 168 169 #define SDIO_REG0XD_RESERVED0_POS (30) 170 #define SDIO_REG0XD_RESERVED0_MASK (0x3) 171 #endif 172 173 // SDcard defination 174 /* Exported types ------------------------------------------------------------*/ 175 typedef enum { 176 SD_OK = 0, 177 SD_CMD_CRC_FAIL = (1), /*!< Command response received (but CRC check failed) */ 178 SD_DATA_CRC_FAIL = (2), /*!< Data bock sent/received (CRC check Failed) */ 179 SD_CMD_RSP_TIMEOUT = (3), /*!< Command response timeout */ 180 SD_DATA_TIMEOUT = (4), /*!< Data time out */ 181 182 SD_INVALID_VOLTRANGE, 183 SD_R5_ERROR, /* A general or an unknown error occurred during the operation */ 184 SD_R5_ERR_FUNC_NUMB, /* An invalid function number was requested */ 185 SD_R5_OUT_OF_RANGE, /*The command's argument was out of the allowed range for this card*/ 186 SD_ERROR, 187 SD_ERR_LONG_TIME_NO_RESPONS, 188 SD_ERR_CMD41_CNT = 0xfffe 189 } SDIO_Error; 190 191 192 #define SD_CMD_NORESP 0 193 #define SD_CMD_SHORT (CMD_FLAG_RESPONSE|CMD_FLAG_CRC_CHECK) 194 #define SD_CMD_LONG (CMD_FLAG_RESPONSE|CMD_FLAG_LONG_CMD\ 195 |CMD_FLAG_CRC_CHECK) 196 197 #define SD_CMD_RSP (SDCARD_CMDRSP_NORSP_END_INT\ 198 |SDCARD_CMDRSP_RSP_END_INT\ 199 |SDCARD_CMDRSP_TIMEOUT_INT\ 200 |SDCARD_CMDRSP_CMD_CRC_FAIL) 201 202 #define SD_DATA_RSP (SDCARD_CMDRSP_DATA_REC_END_INT\ 203 |SDCARD_CMDRSP_DATA_CRC_FAIL\ 204 |SDCARD_CMDRSP_DATA_WR_END_INT\ 205 |SDCARD_CMDRSP_DATA_TIME_OUT_INT) 206 207 208 #define SD_DATA_DIR_RD 0 209 #define SD_DATA_DIR_WR 1 210 211 #define OCR_MSK_BUSY 0x80000000 // Busy flag 212 #define OCR_MSK_HC 0x40000000 // High Capacity flag 213 #define OCR_MSK_VOLTAGE_3_2V_3_3V 0x00100000 // Voltage 3.2V to 3.3V flag 214 #define OCR_MSK_VOLTAGE_ALL 0x00FF8000 // All Voltage flag 215 216 #define SD_DEFAULT_OCR (OCR_MSK_VOLTAGE_ALL|OCR_MSK_HC) 217 218 #define SD_MAX_VOLT_TRIAL (0xFF) 219 220 #define SD_DEFAULT_BLOCK_SIZE 512 221 #define SDCARD_TX_FIFO_THRD (0x01) // 16byte 222 #define SDCARD_RX_FIFO_THRD (0x01) 223 224 #if (CONFIG_SOC_BK7256XX) //Temp code, clock module should re-arch. 225 226 //320M:divider 0:/2 1:/4 2:/6 3:/8 4:/10 5:/12 6:/16 7:/256 227 //The SDIO supports max clock is 80M, or data transfer is error 228 #define CLK_80M 9 //(divider == 4,value == b[16-14]'001;clk_src == 320M,value == b[17]'1;together == b[17-14]'1001) 229 //#define CLK_53M 10 //(divider == 6,value == b[16-14]'010;clk_src == 320M,value == b[17]'1;together == b[17-14]'1010) 230 #define CLK_40M 11 //(divider == 8,value == b[16-14]'011;clk_src == 320M,value == b[17]'1;together == b[17-14]'1011) 231 232 #define CLK_20M 14 //(divider == 16,value == b[16-14]'110;clk_src == 320M,value == b[17]'1;together == b[17-14]'1110) 233 234 //XTL 26M:divider 0:/2 1:/4 2:/6 3:/8 4:/10 5:/12 6:/16 7:/256 235 #define CLK_13M 0 //(divider == 2,value == b[16-14]'000;clk_src == 26M,value == b[17]'0;together == b[17-14]'0000) 236 #define CLK_6_5M 1 //(divider == 4,value == b[16-14]'001;clk_src == 26M,value == b[17]'0;together == b[17-14]'0001) 237 #define CLK_100K 7 //(divider == 256,value == b[16-14]'111;clk_src == 26M,value == b[17]'0;together == b[17-14]'0111) 238 #define CLK_LOWEST (CLK_100K) 239 240 #define CMD_TIMEOUT_100K 2500 241 #define DATA_TIMEOUT_100K 10000 242 243 #define CMD_TIMEOUT_6_5_M 300000 //about 150ns per cycle (45ms) 244 #define DATA_TIMEOUT_6_5_M 3000000 //450ms 245 246 #define CMD_TIMEOUT_13M 600000 //about 77ns pr cycle (45ms) 247 #define DATA_TIMEOUT_13M 6000000 //450ms 248 249 #define CMD_TIMEOUT_20M 1000000 250 #define DATA_TIMEOUT_20M 10000000 251 252 #define CMD_TIMEOUT_40M 2000000 253 #define DATA_TIMEOUT_40M 20000000 254 255 #define CMD_TIMEOUT_80M 4000000 256 #define DATA_TIMEOUT_80M 40000000 257 #else 258 #define CLK_26M 0 259 #define CLK_13M 1 260 #define CLK_6_5M 2 261 #define CLK_200K 3 262 #define CLK_LOWEST (CLK_200K) 263 264 #define CMD_TIMEOUT_200K 5000 //about 5us per cycle (25ms) 265 #define DATA_TIMEOUT_200K 20000 //100ms 266 267 #define CMD_TIMEOUT_6_5_M 300000 //about 150ns per cycle (45ms) 268 #define DATA_TIMEOUT_6_5_M 3000000 //450ms 269 270 #define CMD_TIMEOUT_13M 600000 //about 77ns pr cycle (45ms) 271 #define DATA_TIMEOUT_13M 6000000 //450ms 272 273 #define CMD_TIMEOUT_26M 1200000//about 38ns pr cycle (45ms) 274 #define DATA_TIMEOUT_26M 12000000 //450ms 275 #endif 276 277 #define CMD_FLAG_RESPONSE 0x01 278 #define CMD_FLAG_LONG_CMD 0x02 279 #define CMD_FLAG_CRC_CHECK 0x04 280 #define CMD_FLAG_MASK 0x07 281 282 #define SDIO_RD_DATA 0 283 #define SDIO_WR_DATA 1 284 #define SDIO_RD_AF_WR 2 285 286 #define SDIO_DEF_LINE_MODE 4 287 #define SDIO_DEF_WORK_CLK 13 288 289 290 #define SD_CLK_PIN_TIMEOUT1 0x1000 291 #define SD_CLK_PIN_TIMEOUT2 0x8000 292 #define SD_CARD_OFFLINE 0 293 #define SD_CARD_ONLINE 1 294 295 296 //#define CONFIG_SDCARD_BUSWIDTH_4LINE 297 298 // interface function 299 void sdio_set_clock(UINT8 clk_index); 300 void sdio_gpio_config(void); 301 #if CONFIG_SOC_BK7256XX 302 void sdio_clk_gate_config(uint8_t enable); 303 #endif 304 void sdio_clk_config(UINT8 enable); 305 void sdio_register_reset(void); 306 void sdio_sendcmd_function(UINT8 cmd_index, UINT32 flag, 307 UINT32 timeout, VOID *arg); 308 SDIO_Error sdio_wait_cmd_response(UINT32 cmd); 309 void sdio_get_cmdresponse_argument(UINT8 num, UINT32 *resp); 310 void sdio_setup_data(UINT32 data_dir, UINT32 byte_len); 311 void sdio_set_data_timeout(UINT32 timeout); 312 313 SDIO_Error sdcard_wait_receive_data(UINT8 *receive_buf); 314 //SDIO_Error sdcard_wait_write_end(void); 315 //SDIO_Error sdcard_write_data(UINT8 *writebuff, UINT32 block); 316 void driver_sdcard_recv_data_start(int timeout); 317 //uint8 sd_clk_is_attached(void); 318 //uint8 sd_is_attached(void); 319 //void sdio_register_reenable(void); 320 int wait_Receive_Data(void); 321 322 #endif 323 324