1 // Copyright 2015-2018 Espressif Systems (Shanghai) PTE LTD 2 // 3 // Licensed under the Apache License, Version 2.0 (the "License"); 4 // you may not use this file except in compliance with the License. 5 // You may obtain a copy of the License at 6 7 // http://www.apache.org/licenses/LICENSE-2.0 8 // 9 // Unless required by applicable law or agreed to in writing, software 10 // distributed under the License is distributed on an "AS IS" BASIS, 11 // WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 12 // See the License for the specific language governing permissions and 13 // limitations under the License. 14 #ifndef _SOC_SLC_STRUCT_H_ 15 #define _SOC_SLC_STRUCT_H_ 16 17 #include <stdint.h> 18 19 #ifdef __cplusplus 20 extern "C" { 21 #endif 22 23 typedef volatile struct slc_dev_s { 24 union { 25 struct { 26 uint32_t slc0_tx_rst: 1; 27 uint32_t slc0_rx_rst: 1; 28 uint32_t ahbm_fifo_rst: 1; 29 uint32_t ahbm_rst: 1; 30 uint32_t slc0_tx_loop_test: 1; 31 uint32_t slc0_rx_loop_test: 1; 32 uint32_t slc0_rx_auto_wrback: 1; 33 uint32_t slc0_rx_no_restart_clr: 1; 34 uint32_t slc0_rxdscr_burst_en: 1; 35 uint32_t slc0_rxdata_burst_en: 1; 36 uint32_t slc0_rxlink_auto_ret: 1; 37 uint32_t slc0_txlink_auto_ret: 1; 38 uint32_t slc0_txdscr_burst_en: 1; 39 uint32_t slc0_txdata_burst_en: 1; 40 uint32_t slc0_token_auto_clr: 1; 41 uint32_t slc0_token_sel: 1; 42 uint32_t slc1_tx_rst: 1; 43 uint32_t slc1_rx_rst: 1; 44 uint32_t slc0_wr_retry_mask_en: 1; 45 uint32_t slc1_wr_retry_mask_en: 1; 46 uint32_t slc1_tx_loop_test: 1; 47 uint32_t slc1_rx_loop_test: 1; 48 uint32_t slc1_rx_auto_wrback: 1; 49 uint32_t slc1_rx_no_restart_clr: 1; 50 uint32_t slc1_rxdscr_burst_en: 1; 51 uint32_t slc1_rxdata_burst_en: 1; 52 uint32_t slc1_rxlink_auto_ret: 1; 53 uint32_t slc1_txlink_auto_ret: 1; 54 uint32_t slc1_txdscr_burst_en: 1; 55 uint32_t slc1_txdata_burst_en: 1; 56 uint32_t slc1_token_auto_clr: 1; 57 uint32_t slc1_token_sel: 1; 58 }; 59 uint32_t val; 60 } conf0; 61 union { 62 struct { 63 uint32_t frhost_bit0: 1; 64 uint32_t frhost_bit1: 1; 65 uint32_t frhost_bit2: 1; 66 uint32_t frhost_bit3: 1; 67 uint32_t frhost_bit4: 1; 68 uint32_t frhost_bit5: 1; 69 uint32_t frhost_bit6: 1; 70 uint32_t frhost_bit7: 1; 71 uint32_t rx_start: 1; 72 uint32_t tx_start: 1; 73 uint32_t rx_udf: 1; 74 uint32_t tx_ovf: 1; 75 uint32_t token0_1to0: 1; 76 uint32_t token1_1to0: 1; 77 uint32_t tx_done: 1; 78 uint32_t tx_suc_eof: 1; 79 uint32_t rx_done: 1; 80 uint32_t rx_eof: 1; 81 uint32_t tohost: 1; 82 uint32_t tx_dscr_err: 1; 83 uint32_t rx_dscr_err: 1; 84 uint32_t tx_dscr_empty: 1; 85 uint32_t host_rd_ack: 1; 86 uint32_t wr_retry_done: 1; 87 uint32_t tx_err_eof: 1; 88 uint32_t cmd_dtc: 1; 89 uint32_t rx_quick_eof: 1; 90 uint32_t reserved27: 5; 91 }; 92 uint32_t val; 93 } slc0_int_raw; 94 union { 95 struct { 96 uint32_t frhost_bit0: 1; 97 uint32_t frhost_bit1: 1; 98 uint32_t frhost_bit2: 1; 99 uint32_t frhost_bit3: 1; 100 uint32_t frhost_bit4: 1; 101 uint32_t frhost_bit5: 1; 102 uint32_t frhost_bit6: 1; 103 uint32_t frhost_bit7: 1; 104 uint32_t rx_start: 1; 105 uint32_t tx_start: 1; 106 uint32_t rx_udf: 1; 107 uint32_t tx_ovf: 1; 108 uint32_t token0_1to0: 1; 109 uint32_t token1_1to0: 1; 110 uint32_t tx_done: 1; 111 uint32_t tx_suc_eof: 1; 112 uint32_t rx_done: 1; 113 uint32_t rx_eof: 1; 114 uint32_t tohost: 1; 115 uint32_t tx_dscr_err: 1; 116 uint32_t rx_dscr_err: 1; 117 uint32_t tx_dscr_empty: 1; 118 uint32_t host_rd_ack: 1; 119 uint32_t wr_retry_done: 1; 120 uint32_t tx_err_eof: 1; 121 uint32_t cmd_dtc: 1; 122 uint32_t rx_quick_eof: 1; 123 uint32_t reserved27: 5; 124 }; 125 uint32_t val; 126 } slc0_int_st; 127 union { 128 struct { 129 uint32_t frhost_bit0: 1; 130 uint32_t frhost_bit1: 1; 131 uint32_t frhost_bit2: 1; 132 uint32_t frhost_bit3: 1; 133 uint32_t frhost_bit4: 1; 134 uint32_t frhost_bit5: 1; 135 uint32_t frhost_bit6: 1; 136 uint32_t frhost_bit7: 1; 137 uint32_t rx_start: 1; 138 uint32_t tx_start: 1; 139 uint32_t rx_udf: 1; 140 uint32_t tx_ovf: 1; 141 uint32_t token0_1to0: 1; 142 uint32_t token1_1to0: 1; 143 uint32_t tx_done: 1; 144 uint32_t tx_suc_eof: 1; 145 uint32_t rx_done: 1; 146 uint32_t rx_eof: 1; 147 uint32_t tohost: 1; 148 uint32_t tx_dscr_err: 1; 149 uint32_t rx_dscr_err: 1; 150 uint32_t tx_dscr_empty: 1; 151 uint32_t host_rd_ack: 1; 152 uint32_t wr_retry_done: 1; 153 uint32_t tx_err_eof: 1; 154 uint32_t cmd_dtc: 1; 155 uint32_t rx_quick_eof: 1; 156 uint32_t reserved27: 5; 157 }; 158 uint32_t val; 159 } slc0_int_ena; 160 union { 161 struct { 162 uint32_t frhost_bit0: 1; 163 uint32_t frhost_bit1: 1; 164 uint32_t frhost_bit2: 1; 165 uint32_t frhost_bit3: 1; 166 uint32_t frhost_bit4: 1; 167 uint32_t frhost_bit5: 1; 168 uint32_t frhost_bit6: 1; 169 uint32_t frhost_bit7: 1; 170 uint32_t rx_start: 1; 171 uint32_t tx_start: 1; 172 uint32_t rx_udf: 1; 173 uint32_t tx_ovf: 1; 174 uint32_t token0_1to0: 1; 175 uint32_t token1_1to0: 1; 176 uint32_t tx_done: 1; 177 uint32_t tx_suc_eof: 1; 178 uint32_t rx_done: 1; 179 uint32_t rx_eof: 1; 180 uint32_t tohost: 1; 181 uint32_t tx_dscr_err: 1; 182 uint32_t rx_dscr_err: 1; 183 uint32_t tx_dscr_empty: 1; 184 uint32_t host_rd_ack: 1; 185 uint32_t wr_retry_done: 1; 186 uint32_t tx_err_eof: 1; 187 uint32_t cmd_dtc: 1; 188 uint32_t rx_quick_eof: 1; 189 uint32_t reserved27: 5; 190 }; 191 uint32_t val; 192 } slc0_int_clr; 193 union { 194 struct { 195 uint32_t frhost_bit8: 1; 196 uint32_t frhost_bit9: 1; 197 uint32_t frhost_bit10: 1; 198 uint32_t frhost_bit11: 1; 199 uint32_t frhost_bit12: 1; 200 uint32_t frhost_bit13: 1; 201 uint32_t frhost_bit14: 1; 202 uint32_t frhost_bit15: 1; 203 uint32_t rx_start: 1; 204 uint32_t tx_start: 1; 205 uint32_t rx_udf: 1; 206 uint32_t tx_ovf: 1; 207 uint32_t token0_1to0: 1; 208 uint32_t token1_1to0: 1; 209 uint32_t tx_done: 1; 210 uint32_t tx_suc_eof: 1; 211 uint32_t rx_done: 1; 212 uint32_t rx_eof: 1; 213 uint32_t tohost: 1; 214 uint32_t tx_dscr_err: 1; 215 uint32_t rx_dscr_err: 1; 216 uint32_t tx_dscr_empty: 1; 217 uint32_t host_rd_ack: 1; 218 uint32_t wr_retry_done: 1; 219 uint32_t tx_err_eof: 1; 220 uint32_t reserved25: 7; 221 }; 222 uint32_t val; 223 } slc1_int_raw; 224 union { 225 struct { 226 uint32_t frhost_bit8: 1; 227 uint32_t frhost_bit9: 1; 228 uint32_t frhost_bit10: 1; 229 uint32_t frhost_bit11: 1; 230 uint32_t frhost_bit12: 1; 231 uint32_t frhost_bit13: 1; 232 uint32_t frhost_bit14: 1; 233 uint32_t frhost_bit15: 1; 234 uint32_t rx_start: 1; 235 uint32_t tx_start: 1; 236 uint32_t rx_udf: 1; 237 uint32_t tx_ovf: 1; 238 uint32_t token0_1to0: 1; 239 uint32_t token1_1to0: 1; 240 uint32_t tx_done: 1; 241 uint32_t tx_suc_eof: 1; 242 uint32_t rx_done: 1; 243 uint32_t rx_eof: 1; 244 uint32_t tohost: 1; 245 uint32_t tx_dscr_err: 1; 246 uint32_t rx_dscr_err: 1; 247 uint32_t tx_dscr_empty: 1; 248 uint32_t host_rd_ack: 1; 249 uint32_t wr_retry_done: 1; 250 uint32_t tx_err_eof: 1; 251 uint32_t reserved25: 7; 252 }; 253 uint32_t val; 254 } slc1_int_st; 255 union { 256 struct { 257 uint32_t frhost_bit8: 1; 258 uint32_t frhost_bit9: 1; 259 uint32_t frhost_bit10: 1; 260 uint32_t frhost_bit11: 1; 261 uint32_t frhost_bit12: 1; 262 uint32_t frhost_bit13: 1; 263 uint32_t frhost_bit14: 1; 264 uint32_t frhost_bit15: 1; 265 uint32_t rx_start: 1; 266 uint32_t tx_start: 1; 267 uint32_t rx_udf: 1; 268 uint32_t tx_ovf: 1; 269 uint32_t token0_1to0: 1; 270 uint32_t token1_1to0: 1; 271 uint32_t tx_done: 1; 272 uint32_t tx_suc_eof: 1; 273 uint32_t rx_done: 1; 274 uint32_t rx_eof: 1; 275 uint32_t tohost: 1; 276 uint32_t tx_dscr_err: 1; 277 uint32_t rx_dscr_err: 1; 278 uint32_t tx_dscr_empty: 1; 279 uint32_t host_rd_ack: 1; 280 uint32_t wr_retry_done: 1; 281 uint32_t tx_err_eof: 1; 282 uint32_t reserved25: 7; 283 }; 284 uint32_t val; 285 } slc1_int_ena; 286 union { 287 struct { 288 uint32_t frhost_bit8: 1; 289 uint32_t frhost_bit9: 1; 290 uint32_t frhost_bit10: 1; 291 uint32_t frhost_bit11: 1; 292 uint32_t frhost_bit12: 1; 293 uint32_t frhost_bit13: 1; 294 uint32_t frhost_bit14: 1; 295 uint32_t frhost_bit15: 1; 296 uint32_t rx_start: 1; 297 uint32_t tx_start: 1; 298 uint32_t rx_udf: 1; 299 uint32_t tx_ovf: 1; 300 uint32_t token0_1to0: 1; 301 uint32_t token1_1to0: 1; 302 uint32_t tx_done: 1; 303 uint32_t tx_suc_eof: 1; 304 uint32_t rx_done: 1; 305 uint32_t rx_eof: 1; 306 uint32_t tohost: 1; 307 uint32_t tx_dscr_err: 1; 308 uint32_t rx_dscr_err: 1; 309 uint32_t tx_dscr_empty: 1; 310 uint32_t host_rd_ack: 1; 311 uint32_t wr_retry_done: 1; 312 uint32_t tx_err_eof: 1; 313 uint32_t reserved25: 7; 314 }; 315 uint32_t val; 316 } slc1_int_clr; 317 union { 318 struct { 319 uint32_t slc0_rx_full: 1; 320 uint32_t slc0_rx_empty: 1; 321 uint32_t reserved2: 14; 322 uint32_t slc1_rx_full: 1; 323 uint32_t slc1_rx_empty: 1; 324 uint32_t reserved18:14; 325 }; 326 uint32_t val; 327 } rx_status; 328 union { 329 struct { 330 uint32_t rxfifo_wdata: 9; 331 uint32_t reserved9: 7; 332 uint32_t rxfifo_push: 1; 333 uint32_t reserved17: 15; 334 }; 335 uint32_t val; 336 } slc0_rxfifo_push; 337 union { 338 struct { 339 uint32_t rxfifo_wdata: 9; 340 uint32_t reserved9: 7; 341 uint32_t rxfifo_push: 1; 342 uint32_t reserved17: 15; 343 }; 344 uint32_t val; 345 } slc1_rxfifo_push; 346 union { 347 struct { 348 uint32_t slc0_tx_full: 1; 349 uint32_t slc0_tx_empty: 1; 350 uint32_t reserved2: 14; 351 uint32_t slc1_tx_full: 1; 352 uint32_t slc1_tx_empty: 1; 353 uint32_t reserved18:14; 354 }; 355 uint32_t val; 356 } tx_status; 357 union { 358 struct { 359 uint32_t txfifo_rdata: 11; 360 uint32_t reserved11: 5; 361 uint32_t txfifo_pop: 1; 362 uint32_t reserved17: 15; 363 }; 364 uint32_t val; 365 } slc0_txfifo_pop; 366 union { 367 struct { 368 uint32_t txfifo_rdata: 11; 369 uint32_t reserved11: 5; 370 uint32_t txfifo_pop: 1; 371 uint32_t reserved17: 15; 372 }; 373 uint32_t val; 374 } slc1_txfifo_pop; 375 union { 376 struct { 377 uint32_t addr: 20; 378 uint32_t reserved20: 8; 379 uint32_t stop: 1; 380 uint32_t start: 1; 381 uint32_t restart: 1; 382 uint32_t park: 1; 383 }; 384 uint32_t val; 385 } slc0_rx_link; 386 union { 387 struct { 388 uint32_t addr: 20; 389 uint32_t reserved20: 8; 390 uint32_t stop: 1; 391 uint32_t start: 1; 392 uint32_t restart: 1; 393 uint32_t park: 1; 394 }; 395 uint32_t val; 396 } slc0_tx_link; 397 union { 398 struct { 399 uint32_t addr: 20; 400 uint32_t bt_packet: 1; 401 uint32_t reserved21: 7; 402 uint32_t stop: 1; 403 uint32_t start: 1; 404 uint32_t restart: 1; 405 uint32_t park: 1; 406 }; 407 uint32_t val; 408 } slc1_rx_link; 409 union { 410 struct { 411 uint32_t addr: 20; 412 uint32_t reserved20: 8; 413 uint32_t stop: 1; 414 uint32_t start: 1; 415 uint32_t restart: 1; 416 uint32_t park: 1; 417 }; 418 uint32_t val; 419 } slc1_tx_link; 420 union { 421 struct { 422 uint32_t slc0_intvec: 8; 423 uint32_t reserved8: 8; 424 uint32_t slc1_intvec: 8; 425 uint32_t reserved24: 8; 426 }; 427 uint32_t val; 428 } intvec_tohost; 429 union { 430 struct { 431 uint32_t wdata: 12; 432 uint32_t wr: 1; 433 uint32_t inc: 1; 434 uint32_t inc_more: 1; 435 uint32_t reserved15: 1; 436 uint32_t token0: 12; 437 uint32_t reserved28: 4; 438 }; 439 uint32_t val; 440 } slc0_token0; 441 union { 442 struct { 443 uint32_t wdata: 12; 444 uint32_t wr: 1; 445 uint32_t inc: 1; 446 uint32_t inc_more: 1; 447 uint32_t reserved15: 1; 448 uint32_t token1: 12; 449 uint32_t reserved28: 4; 450 }; 451 uint32_t val; 452 } slc0_token1; 453 union { 454 struct { 455 uint32_t wdata: 12; 456 uint32_t wr: 1; 457 uint32_t inc: 1; 458 uint32_t inc_more: 1; 459 uint32_t reserved15: 1; 460 uint32_t token0: 12; 461 uint32_t reserved28: 4; 462 }; 463 uint32_t val; 464 } slc1_token0; 465 union { 466 struct { 467 uint32_t wdata: 12; 468 uint32_t wr: 1; 469 uint32_t inc: 1; 470 uint32_t inc_more: 1; 471 uint32_t reserved15: 1; 472 uint32_t token1: 12; 473 uint32_t reserved28: 4; 474 }; 475 uint32_t val; 476 } slc1_token1; 477 union { 478 struct { 479 uint32_t slc0_check_owner: 1; 480 uint32_t slc0_tx_check_sum_en: 1; 481 uint32_t slc0_rx_check_sum_en: 1; 482 uint32_t cmd_hold_en: 1; 483 uint32_t slc0_len_auto_clr: 1; 484 uint32_t slc0_tx_stitch_en: 1; 485 uint32_t slc0_rx_stitch_en: 1; 486 uint32_t reserved7: 9; 487 uint32_t slc1_check_owner: 1; 488 uint32_t slc1_tx_check_sum_en: 1; 489 uint32_t slc1_rx_check_sum_en: 1; 490 uint32_t host_int_level_sel: 1; 491 uint32_t slc1_tx_stitch_en: 1; 492 uint32_t slc1_rx_stitch_en: 1; 493 uint32_t clk_en: 1; 494 uint32_t reserved23: 9; 495 }; 496 uint32_t val; 497 } conf1; 498 uint32_t slc0_state0; /**/ 499 uint32_t slc0_state1; /**/ 500 uint32_t slc1_state0; /**/ 501 uint32_t slc1_state1; /**/ 502 union { 503 struct { 504 uint32_t txeof_ena: 6; 505 uint32_t reserved6: 2; 506 uint32_t fifo_map_ena: 4; 507 uint32_t slc0_tx_dummy_mode: 1; 508 uint32_t hda_map_128k: 1; 509 uint32_t slc1_tx_dummy_mode: 1; 510 uint32_t reserved15: 1; 511 uint32_t tx_push_idle_num:16; 512 }; 513 uint32_t val; 514 } bridge_conf; 515 uint32_t slc0_to_eof_des_addr; /**/ 516 uint32_t slc0_tx_eof_des_addr; /**/ 517 uint32_t slc0_to_eof_bfr_des_addr; /**/ 518 uint32_t slc1_to_eof_des_addr; /**/ 519 uint32_t slc1_tx_eof_des_addr; /**/ 520 uint32_t slc1_to_eof_bfr_des_addr; /**/ 521 union { 522 struct { 523 uint32_t mode: 3; 524 uint32_t reserved3: 1; 525 uint32_t addr: 2; 526 uint32_t reserved6: 26; 527 }; 528 uint32_t val; 529 } ahb_test; 530 union { 531 struct { 532 uint32_t cmd_st: 3; 533 uint32_t reserved3: 1; 534 uint32_t func_st: 4; 535 uint32_t sdio_wakeup: 1; 536 uint32_t reserved9: 3; 537 uint32_t bus_st: 3; 538 uint32_t reserved15: 1; 539 uint32_t func1_acc_state: 5; 540 uint32_t reserved21: 3; 541 uint32_t func2_acc_state: 5; 542 uint32_t reserved29: 3; 543 }; 544 uint32_t val; 545 } sdio_st; 546 union { 547 struct { 548 uint32_t slc0_token_no_replace: 1; 549 uint32_t slc0_infor_no_replace: 1; 550 uint32_t slc0_rx_fill_mode: 1; 551 uint32_t slc0_rx_eof_mode: 1; 552 uint32_t slc0_rx_fill_en: 1; 553 uint32_t slc0_rd_retry_threshold:11; 554 uint32_t slc1_token_no_replace: 1; 555 uint32_t slc1_infor_no_replace: 1; 556 uint32_t slc1_rx_fill_mode: 1; 557 uint32_t slc1_rx_eof_mode: 1; 558 uint32_t slc1_rx_fill_en: 1; 559 uint32_t slc1_rd_retry_threshold:11; 560 }; 561 uint32_t val; 562 } rx_dscr_conf; 563 uint32_t slc0_txlink_dscr; /**/ 564 uint32_t slc0_txlink_dscr_bf0; /**/ 565 uint32_t slc0_txlink_dscr_bf1; /**/ 566 uint32_t slc0_rxlink_dscr; /**/ 567 uint32_t slc0_rxlink_dscr_bf0; /**/ 568 uint32_t slc0_rxlink_dscr_bf1; /**/ 569 uint32_t slc1_txlink_dscr; /**/ 570 uint32_t slc1_txlink_dscr_bf0; /**/ 571 uint32_t slc1_txlink_dscr_bf1; /**/ 572 uint32_t slc1_rxlink_dscr; /**/ 573 uint32_t slc1_rxlink_dscr_bf0; /**/ 574 uint32_t slc1_rxlink_dscr_bf1; /**/ 575 uint32_t slc0_tx_erreof_des_addr; /**/ 576 uint32_t slc1_tx_erreof_des_addr; /**/ 577 union { 578 struct { 579 uint32_t slc0_token:12; 580 uint32_t reserved12: 4; 581 uint32_t slc1_token:12; 582 uint32_t reserved28: 4; 583 }; 584 uint32_t val; 585 } token_lat; 586 union { 587 struct { 588 uint32_t wr_retry_threshold:11; 589 uint32_t reserved11: 21; 590 }; 591 uint32_t val; 592 } tx_dscr_conf; 593 uint32_t cmd_infor0; /**/ 594 uint32_t cmd_infor1; /**/ 595 union { 596 struct { 597 uint32_t len_wdata: 20; 598 uint32_t len_wr: 1; 599 uint32_t len_inc: 1; 600 uint32_t len_inc_more: 1; 601 uint32_t rx_packet_load_en: 1; 602 uint32_t tx_packet_load_en: 1; 603 uint32_t rx_get_used_dscr: 1; 604 uint32_t tx_get_used_dscr: 1; 605 uint32_t rx_new_pkt_ind: 1; 606 uint32_t tx_new_pkt_ind: 1; 607 uint32_t reserved29: 3; 608 }; 609 uint32_t val; 610 } slc0_len_conf; 611 union { 612 struct { 613 uint32_t len: 20; 614 uint32_t reserved20:12; 615 }; 616 uint32_t val; 617 } slc0_length; 618 uint32_t slc0_txpkt_h_dscr; /**/ 619 uint32_t slc0_txpkt_e_dscr; /**/ 620 uint32_t slc0_rxpkt_h_dscr; /**/ 621 uint32_t slc0_rxpkt_e_dscr; /**/ 622 uint32_t slc0_txpktu_h_dscr; /**/ 623 uint32_t slc0_txpktu_e_dscr; /**/ 624 uint32_t slc0_rxpktu_h_dscr; /**/ 625 uint32_t slc0_rxpktu_e_dscr; /**/ 626 uint32_t reserved_10c; 627 uint32_t reserved_110; 628 union { 629 struct { 630 uint32_t slc0_position: 8; 631 uint32_t slc1_position: 8; 632 uint32_t reserved16: 16; 633 }; 634 uint32_t val; 635 } seq_position; 636 union { 637 struct { 638 uint32_t rx_dscr_rec_lim: 10; 639 uint32_t reserved10: 22; 640 }; 641 uint32_t val; 642 } slc0_dscr_rec_conf; 643 union { 644 struct { 645 uint32_t dat0_crc_err_cnt: 8; 646 uint32_t dat1_crc_err_cnt: 8; 647 uint32_t dat2_crc_err_cnt: 8; 648 uint32_t dat3_crc_err_cnt: 8; 649 }; 650 uint32_t val; 651 } sdio_crc_st0; 652 union { 653 struct { 654 uint32_t cmd_crc_err_cnt: 8; 655 uint32_t reserved8: 23; 656 uint32_t err_cnt_clr: 1; 657 }; 658 uint32_t val; 659 } sdio_crc_st1; 660 uint32_t slc0_eof_start_des; /**/ 661 uint32_t slc0_push_dscr_addr; /**/ 662 uint32_t slc0_done_dscr_addr; /**/ 663 uint32_t slc0_sub_start_des; /**/ 664 union { 665 struct { 666 uint32_t rx_dscr_cnt_lat: 10; 667 uint32_t reserved10: 6; 668 uint32_t rx_get_eof_occ: 1; 669 uint32_t reserved17: 15; 670 }; 671 uint32_t val; 672 } slc0_dscr_cnt; 673 union { 674 struct { 675 uint32_t len_lim: 20; 676 uint32_t reserved20:12; 677 }; 678 uint32_t val; 679 } slc0_len_lim_conf; 680 union { 681 struct { 682 uint32_t frhost_bit01: 1; 683 uint32_t frhost_bit11: 1; 684 uint32_t frhost_bit21: 1; 685 uint32_t frhost_bit31: 1; 686 uint32_t frhost_bit41: 1; 687 uint32_t frhost_bit51: 1; 688 uint32_t frhost_bit61: 1; 689 uint32_t frhost_bit71: 1; 690 uint32_t rx_start1: 1; 691 uint32_t tx_start1: 1; 692 uint32_t rx_udf1: 1; 693 uint32_t tx_ovf1: 1; 694 uint32_t token0_1to01: 1; 695 uint32_t token1_1to01: 1; 696 uint32_t tx_done1: 1; 697 uint32_t tx_suc_eof1: 1; 698 uint32_t rx_done1: 1; 699 uint32_t rx_eof1: 1; 700 uint32_t tohost1: 1; 701 uint32_t tx_dscr_err1: 1; 702 uint32_t rx_dscr_err1: 1; 703 uint32_t tx_dscr_empty1: 1; 704 uint32_t host_rd_ack1: 1; 705 uint32_t wr_retry_done1: 1; 706 uint32_t tx_err_eof1: 1; 707 uint32_t cmd_dtc1: 1; 708 uint32_t rx_quick_eof1: 1; 709 uint32_t reserved27: 5; 710 }; 711 uint32_t val; 712 } slc0_int_st1; 713 union { 714 struct { 715 uint32_t frhost_bit01: 1; 716 uint32_t frhost_bit11: 1; 717 uint32_t frhost_bit21: 1; 718 uint32_t frhost_bit31: 1; 719 uint32_t frhost_bit41: 1; 720 uint32_t frhost_bit51: 1; 721 uint32_t frhost_bit61: 1; 722 uint32_t frhost_bit71: 1; 723 uint32_t rx_start1: 1; 724 uint32_t tx_start1: 1; 725 uint32_t rx_udf1: 1; 726 uint32_t tx_ovf1: 1; 727 uint32_t token0_1to01: 1; 728 uint32_t token1_1to01: 1; 729 uint32_t tx_done1: 1; 730 uint32_t tx_suc_eof1: 1; 731 uint32_t rx_done1: 1; 732 uint32_t rx_eof1: 1; 733 uint32_t tohost1: 1; 734 uint32_t tx_dscr_err1: 1; 735 uint32_t rx_dscr_err1: 1; 736 uint32_t tx_dscr_empty1: 1; 737 uint32_t host_rd_ack1: 1; 738 uint32_t wr_retry_done1: 1; 739 uint32_t tx_err_eof1: 1; 740 uint32_t cmd_dtc1: 1; 741 uint32_t rx_quick_eof1: 1; 742 uint32_t reserved27: 5; 743 }; 744 uint32_t val; 745 } slc0_int_ena1; 746 union { 747 struct { 748 uint32_t frhost_bit81: 1; 749 uint32_t frhost_bit91: 1; 750 uint32_t frhost_bit101: 1; 751 uint32_t frhost_bit111: 1; 752 uint32_t frhost_bit121: 1; 753 uint32_t frhost_bit131: 1; 754 uint32_t frhost_bit141: 1; 755 uint32_t frhost_bit151: 1; 756 uint32_t rx_start1: 1; 757 uint32_t tx_start1: 1; 758 uint32_t rx_udf1: 1; 759 uint32_t tx_ovf1: 1; 760 uint32_t token0_1to01: 1; 761 uint32_t token1_1to01: 1; 762 uint32_t tx_done1: 1; 763 uint32_t tx_suc_eof1: 1; 764 uint32_t rx_done1: 1; 765 uint32_t rx_eof1: 1; 766 uint32_t tohost1: 1; 767 uint32_t tx_dscr_err1: 1; 768 uint32_t rx_dscr_err1: 1; 769 uint32_t tx_dscr_empty1: 1; 770 uint32_t host_rd_ack1: 1; 771 uint32_t wr_retry_done1: 1; 772 uint32_t tx_err_eof1: 1; 773 uint32_t reserved25: 7; 774 }; 775 uint32_t val; 776 } slc1_int_st1; 777 union { 778 struct { 779 uint32_t frhost_bit81: 1; 780 uint32_t frhost_bit91: 1; 781 uint32_t frhost_bit101: 1; 782 uint32_t frhost_bit111: 1; 783 uint32_t frhost_bit121: 1; 784 uint32_t frhost_bit131: 1; 785 uint32_t frhost_bit141: 1; 786 uint32_t frhost_bit151: 1; 787 uint32_t rx_start1: 1; 788 uint32_t tx_start1: 1; 789 uint32_t rx_udf1: 1; 790 uint32_t tx_ovf1: 1; 791 uint32_t token0_1to01: 1; 792 uint32_t token1_1to01: 1; 793 uint32_t tx_done1: 1; 794 uint32_t tx_suc_eof1: 1; 795 uint32_t rx_done1: 1; 796 uint32_t rx_eof1: 1; 797 uint32_t tohost1: 1; 798 uint32_t tx_dscr_err1: 1; 799 uint32_t rx_dscr_err1: 1; 800 uint32_t tx_dscr_empty1: 1; 801 uint32_t host_rd_ack1: 1; 802 uint32_t wr_retry_done1: 1; 803 uint32_t tx_err_eof1: 1; 804 uint32_t reserved25: 7; 805 }; 806 uint32_t val; 807 } slc1_int_ena1; 808 uint32_t reserved_14c; 809 uint32_t reserved_150; 810 uint32_t reserved_154; 811 uint32_t reserved_158; 812 uint32_t reserved_15c; 813 uint32_t reserved_160; 814 uint32_t reserved_164; 815 uint32_t reserved_168; 816 uint32_t reserved_16c; 817 uint32_t reserved_170; 818 uint32_t reserved_174; 819 uint32_t reserved_178; 820 uint32_t reserved_17c; 821 uint32_t reserved_180; 822 uint32_t reserved_184; 823 uint32_t reserved_188; 824 uint32_t reserved_18c; 825 uint32_t reserved_190; 826 uint32_t reserved_194; 827 uint32_t reserved_198; 828 uint32_t reserved_19c; 829 uint32_t reserved_1a0; 830 uint32_t reserved_1a4; 831 uint32_t reserved_1a8; 832 uint32_t reserved_1ac; 833 uint32_t reserved_1b0; 834 uint32_t reserved_1b4; 835 uint32_t reserved_1b8; 836 uint32_t reserved_1bc; 837 uint32_t reserved_1c0; 838 uint32_t reserved_1c4; 839 uint32_t reserved_1c8; 840 uint32_t reserved_1cc; 841 uint32_t reserved_1d0; 842 uint32_t reserved_1d4; 843 uint32_t reserved_1d8; 844 uint32_t reserved_1dc; 845 uint32_t reserved_1e0; 846 uint32_t reserved_1e4; 847 uint32_t reserved_1e8; 848 uint32_t reserved_1ec; 849 uint32_t reserved_1f0; 850 uint32_t reserved_1f4; 851 uint32_t date; /**/ 852 uint32_t id; /**/ 853 } slc_dev_t; 854 extern slc_dev_t SLC; 855 856 #ifdef __cplusplus 857 } 858 #endif 859 860 #endif /* _SOC_SLC_STRUCT_H_ */ 861