1 /** 2 ****************************************************************************** 3 * @file stm32f4xx_flash.h 4 * @author MCD Application Team 5 * @version V1.4.0 6 * @date 04-August-2014 7 * @brief This file contains all the functions prototypes for the FLASH 8 * firmware library. 9 ****************************************************************************** 10 * @attention 11 * 12 * <h2><center>© COPYRIGHT 2014 STMicroelectronics</center></h2> 13 * 14 * Licensed under MCD-ST Liberty SW License Agreement V2, (the "License"); 15 * You may not use this file except in compliance with the License. 16 * You may obtain a copy of the License at: 17 * 18 * http://www.st.com/software_license_agreement_liberty_v2 19 * 20 * Unless required by applicable law or agreed to in writing, software 21 * distributed under the License is distributed on an "AS IS" BASIS, 22 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 23 * See the License for the specific language governing permissions and 24 * limitations under the License. 25 * 26 ****************************************************************************** 27 */ 28 29 /* Define to prevent recursive inclusion -------------------------------------*/ 30 #ifndef __STM32F4xx_FLASH_H 31 #define __STM32F4xx_FLASH_H 32 33 #ifdef __cplusplus 34 extern "C" { 35 #endif 36 37 /* Includes ------------------------------------------------------------------*/ 38 #include "stm32f4xx.h" 39 40 /** @addtogroup STM32F4xx_StdPeriph_Driver 41 * @{ 42 */ 43 44 /** @addtogroup FLASH 45 * @{ 46 */ 47 48 /* Exported types ------------------------------------------------------------*/ 49 /** 50 * @brief FLASH Status 51 */ 52 typedef enum 53 { 54 FLASH_BUSY = 1, 55 FLASH_ERROR_RD, 56 FLASH_ERROR_PGS, 57 FLASH_ERROR_PGP, 58 FLASH_ERROR_PGA, 59 FLASH_ERROR_WRP, 60 FLASH_ERROR_PROGRAM, 61 FLASH_ERROR_OPERATION, 62 FLASH_COMPLETE 63 }FLASH_Status; 64 65 /* Exported constants --------------------------------------------------------*/ 66 67 /** @defgroup FLASH_Exported_Constants 68 * @{ 69 */ 70 71 /** @defgroup Flash_Latency 72 * @{ 73 */ 74 #define FLASH_Latency_0 ((uint8_t)0x0000) /*!< FLASH Zero Latency cycle */ 75 #define FLASH_Latency_1 ((uint8_t)0x0001) /*!< FLASH One Latency cycle */ 76 #define FLASH_Latency_2 ((uint8_t)0x0002) /*!< FLASH Two Latency cycles */ 77 #define FLASH_Latency_3 ((uint8_t)0x0003) /*!< FLASH Three Latency cycles */ 78 #define FLASH_Latency_4 ((uint8_t)0x0004) /*!< FLASH Four Latency cycles */ 79 #define FLASH_Latency_5 ((uint8_t)0x0005) /*!< FLASH Five Latency cycles */ 80 #define FLASH_Latency_6 ((uint8_t)0x0006) /*!< FLASH Six Latency cycles */ 81 #define FLASH_Latency_7 ((uint8_t)0x0007) /*!< FLASH Seven Latency cycles */ 82 #define FLASH_Latency_8 ((uint8_t)0x0008) /*!< FLASH Eight Latency cycles */ 83 #define FLASH_Latency_9 ((uint8_t)0x0009) /*!< FLASH Nine Latency cycles */ 84 #define FLASH_Latency_10 ((uint8_t)0x000A) /*!< FLASH Ten Latency cycles */ 85 #define FLASH_Latency_11 ((uint8_t)0x000B) /*!< FLASH Eleven Latency cycles */ 86 #define FLASH_Latency_12 ((uint8_t)0x000C) /*!< FLASH Twelve Latency cycles */ 87 #define FLASH_Latency_13 ((uint8_t)0x000D) /*!< FLASH Thirteen Latency cycles */ 88 #define FLASH_Latency_14 ((uint8_t)0x000E) /*!< FLASH Fourteen Latency cycles */ 89 #define FLASH_Latency_15 ((uint8_t)0x000F) /*!< FLASH Fifteen Latency cycles */ 90 91 92 #define IS_FLASH_LATENCY(LATENCY) (((LATENCY) == FLASH_Latency_0) || \ 93 ((LATENCY) == FLASH_Latency_1) || \ 94 ((LATENCY) == FLASH_Latency_2) || \ 95 ((LATENCY) == FLASH_Latency_3) || \ 96 ((LATENCY) == FLASH_Latency_4) || \ 97 ((LATENCY) == FLASH_Latency_5) || \ 98 ((LATENCY) == FLASH_Latency_6) || \ 99 ((LATENCY) == FLASH_Latency_7) || \ 100 ((LATENCY) == FLASH_Latency_8) || \ 101 ((LATENCY) == FLASH_Latency_9) || \ 102 ((LATENCY) == FLASH_Latency_10) || \ 103 ((LATENCY) == FLASH_Latency_11) || \ 104 ((LATENCY) == FLASH_Latency_12) || \ 105 ((LATENCY) == FLASH_Latency_13) || \ 106 ((LATENCY) == FLASH_Latency_14) || \ 107 ((LATENCY) == FLASH_Latency_15)) 108 /** 109 * @} 110 */ 111 112 /** @defgroup FLASH_Voltage_Range 113 * @{ 114 */ 115 #define VoltageRange_1 ((uint8_t)0x00) /*!< Device operating range: 1.8V to 2.1V */ 116 #define VoltageRange_2 ((uint8_t)0x01) /*!<Device operating range: 2.1V to 2.7V */ 117 #define VoltageRange_3 ((uint8_t)0x02) /*!<Device operating range: 2.7V to 3.6V */ 118 #define VoltageRange_4 ((uint8_t)0x03) /*!<Device operating range: 2.7V to 3.6V + External Vpp */ 119 120 #define IS_VOLTAGERANGE(RANGE)(((RANGE) == VoltageRange_1) || \ 121 ((RANGE) == VoltageRange_2) || \ 122 ((RANGE) == VoltageRange_3) || \ 123 ((RANGE) == VoltageRange_4)) 124 /** 125 * @} 126 */ 127 128 /** @defgroup FLASH_Sectors 129 * @{ 130 */ 131 #define FLASH_Sector_0 ((uint16_t)0x0000) /*!< Sector Number 0 */ 132 #define FLASH_Sector_1 ((uint16_t)0x0008) /*!< Sector Number 1 */ 133 #define FLASH_Sector_2 ((uint16_t)0x0010) /*!< Sector Number 2 */ 134 #define FLASH_Sector_3 ((uint16_t)0x0018) /*!< Sector Number 3 */ 135 #define FLASH_Sector_4 ((uint16_t)0x0020) /*!< Sector Number 4 */ 136 #define FLASH_Sector_5 ((uint16_t)0x0028) /*!< Sector Number 5 */ 137 #define FLASH_Sector_6 ((uint16_t)0x0030) /*!< Sector Number 6 */ 138 #define FLASH_Sector_7 ((uint16_t)0x0038) /*!< Sector Number 7 */ 139 #define FLASH_Sector_8 ((uint16_t)0x0040) /*!< Sector Number 8 */ 140 #define FLASH_Sector_9 ((uint16_t)0x0048) /*!< Sector Number 9 */ 141 #define FLASH_Sector_10 ((uint16_t)0x0050) /*!< Sector Number 10 */ 142 #define FLASH_Sector_11 ((uint16_t)0x0058) /*!< Sector Number 11 */ 143 #define FLASH_Sector_12 ((uint16_t)0x0080) /*!< Sector Number 12 */ 144 #define FLASH_Sector_13 ((uint16_t)0x0088) /*!< Sector Number 13 */ 145 #define FLASH_Sector_14 ((uint16_t)0x0090) /*!< Sector Number 14 */ 146 #define FLASH_Sector_15 ((uint16_t)0x0098) /*!< Sector Number 15 */ 147 #define FLASH_Sector_16 ((uint16_t)0x00A0) /*!< Sector Number 16 */ 148 #define FLASH_Sector_17 ((uint16_t)0x00A8) /*!< Sector Number 17 */ 149 #define FLASH_Sector_18 ((uint16_t)0x00B0) /*!< Sector Number 18 */ 150 #define FLASH_Sector_19 ((uint16_t)0x00B8) /*!< Sector Number 19 */ 151 #define FLASH_Sector_20 ((uint16_t)0x00C0) /*!< Sector Number 20 */ 152 #define FLASH_Sector_21 ((uint16_t)0x00C8) /*!< Sector Number 21 */ 153 #define FLASH_Sector_22 ((uint16_t)0x00D0) /*!< Sector Number 22 */ 154 #define FLASH_Sector_23 ((uint16_t)0x00D8) /*!< Sector Number 23 */ 155 156 #define IS_FLASH_SECTOR(SECTOR) (((SECTOR) == FLASH_Sector_0) || ((SECTOR) == FLASH_Sector_1) ||\ 157 ((SECTOR) == FLASH_Sector_2) || ((SECTOR) == FLASH_Sector_3) ||\ 158 ((SECTOR) == FLASH_Sector_4) || ((SECTOR) == FLASH_Sector_5) ||\ 159 ((SECTOR) == FLASH_Sector_6) || ((SECTOR) == FLASH_Sector_7) ||\ 160 ((SECTOR) == FLASH_Sector_8) || ((SECTOR) == FLASH_Sector_9) ||\ 161 ((SECTOR) == FLASH_Sector_10) || ((SECTOR) == FLASH_Sector_11) ||\ 162 ((SECTOR) == FLASH_Sector_12) || ((SECTOR) == FLASH_Sector_13) ||\ 163 ((SECTOR) == FLASH_Sector_14) || ((SECTOR) == FLASH_Sector_15) ||\ 164 ((SECTOR) == FLASH_Sector_16) || ((SECTOR) == FLASH_Sector_17) ||\ 165 ((SECTOR) == FLASH_Sector_18) || ((SECTOR) == FLASH_Sector_19) ||\ 166 ((SECTOR) == FLASH_Sector_20) || ((SECTOR) == FLASH_Sector_21) ||\ 167 ((SECTOR) == FLASH_Sector_22) || ((SECTOR) == FLASH_Sector_23)) 168 169 #if defined (STM32F427_437xx) || defined (STM32F429_439xx) 170 #define IS_FLASH_ADDRESS(ADDRESS) ((((ADDRESS) >= 0x08000000) && ((ADDRESS) <= 0x081FFFFF)) ||\ 171 (((ADDRESS) >= 0x1FFF7800) && ((ADDRESS) <= 0x1FFF7A0F))) 172 #endif /* STM32F427_437xx || STM32F429_439xx */ 173 174 #if defined (STM32F40_41xxx) 175 #define IS_FLASH_ADDRESS(ADDRESS) ((((ADDRESS) >= 0x08000000) && ((ADDRESS) <= 0x080FFFFF)) ||\ 176 (((ADDRESS) >= 0x1FFF7800) && ((ADDRESS) <= 0x1FFF7A0F))) 177 #endif /* STM32F40_41xxx */ 178 179 #if defined (STM32F401xx) 180 #define IS_FLASH_ADDRESS(ADDRESS) ((((ADDRESS) >= 0x08000000) && ((ADDRESS) <= 0x0803FFFF)) ||\ 181 (((ADDRESS) >= 0x1FFF7800) && ((ADDRESS) <= 0x1FFF7A0F))) 182 #endif /* STM32F401xx */ 183 184 #if defined (STM32F411xE) 185 #define IS_FLASH_ADDRESS(ADDRESS) ((((ADDRESS) >= 0x08000000) && ((ADDRESS) <= 0x0807FFFF)) ||\ 186 (((ADDRESS) >= 0x1FFF7800) && ((ADDRESS) <= 0x1FFF7A0F))) 187 #endif /* STM32F411xE */ 188 189 /** 190 * @} 191 */ 192 193 /** @defgroup Option_Bytes_Write_Protection 194 * @{ 195 */ 196 #define OB_WRP_Sector_0 ((uint32_t)0x00000001) /*!< Write protection of Sector0 */ 197 #define OB_WRP_Sector_1 ((uint32_t)0x00000002) /*!< Write protection of Sector1 */ 198 #define OB_WRP_Sector_2 ((uint32_t)0x00000004) /*!< Write protection of Sector2 */ 199 #define OB_WRP_Sector_3 ((uint32_t)0x00000008) /*!< Write protection of Sector3 */ 200 #define OB_WRP_Sector_4 ((uint32_t)0x00000010) /*!< Write protection of Sector4 */ 201 #define OB_WRP_Sector_5 ((uint32_t)0x00000020) /*!< Write protection of Sector5 */ 202 #define OB_WRP_Sector_6 ((uint32_t)0x00000040) /*!< Write protection of Sector6 */ 203 #define OB_WRP_Sector_7 ((uint32_t)0x00000080) /*!< Write protection of Sector7 */ 204 #define OB_WRP_Sector_8 ((uint32_t)0x00000100) /*!< Write protection of Sector8 */ 205 #define OB_WRP_Sector_9 ((uint32_t)0x00000200) /*!< Write protection of Sector9 */ 206 #define OB_WRP_Sector_10 ((uint32_t)0x00000400) /*!< Write protection of Sector10 */ 207 #define OB_WRP_Sector_11 ((uint32_t)0x00000800) /*!< Write protection of Sector11 */ 208 #define OB_WRP_Sector_12 ((uint32_t)0x00000001) /*!< Write protection of Sector12 */ 209 #define OB_WRP_Sector_13 ((uint32_t)0x00000002) /*!< Write protection of Sector13 */ 210 #define OB_WRP_Sector_14 ((uint32_t)0x00000004) /*!< Write protection of Sector14 */ 211 #define OB_WRP_Sector_15 ((uint32_t)0x00000008) /*!< Write protection of Sector15 */ 212 #define OB_WRP_Sector_16 ((uint32_t)0x00000010) /*!< Write protection of Sector16 */ 213 #define OB_WRP_Sector_17 ((uint32_t)0x00000020) /*!< Write protection of Sector17 */ 214 #define OB_WRP_Sector_18 ((uint32_t)0x00000040) /*!< Write protection of Sector18 */ 215 #define OB_WRP_Sector_19 ((uint32_t)0x00000080) /*!< Write protection of Sector19 */ 216 #define OB_WRP_Sector_20 ((uint32_t)0x00000100) /*!< Write protection of Sector20 */ 217 #define OB_WRP_Sector_21 ((uint32_t)0x00000200) /*!< Write protection of Sector21 */ 218 #define OB_WRP_Sector_22 ((uint32_t)0x00000400) /*!< Write protection of Sector22 */ 219 #define OB_WRP_Sector_23 ((uint32_t)0x00000800) /*!< Write protection of Sector23 */ 220 #define OB_WRP_Sector_All ((uint32_t)0x00000FFF) /*!< Write protection of all Sectors */ 221 222 #define IS_OB_WRP(SECTOR)((((SECTOR) & (uint32_t)0xFFFFF000) == 0x00000000) && ((SECTOR) != 0x00000000)) 223 /** 224 * @} 225 */ 226 227 /** @defgroup Selection_Protection_Mode 228 * @{ 229 */ 230 #define OB_PcROP_Disable ((uint8_t)0x00) /*!< Disabled PcROP, nWPRi bits used for Write Protection on sector i */ 231 #define OB_PcROP_Enable ((uint8_t)0x80) /*!< Enable PcROP, nWPRi bits used for PCRoP Protection on sector i */ 232 #define IS_OB_PCROP_SELECT(PCROP) (((PCROP) == OB_PcROP_Disable) || ((PCROP) == OB_PcROP_Enable)) 233 /** 234 * @} 235 */ 236 237 /** @defgroup Option_Bytes_PC_ReadWrite_Protection 238 * @{ 239 */ 240 #define OB_PCROP_Sector_0 ((uint32_t)0x00000001) /*!< PC Read/Write protection of Sector0 */ 241 #define OB_PCROP_Sector_1 ((uint32_t)0x00000002) /*!< PC Read/Write protection of Sector1 */ 242 #define OB_PCROP_Sector_2 ((uint32_t)0x00000004) /*!< PC Read/Write protection of Sector2 */ 243 #define OB_PCROP_Sector_3 ((uint32_t)0x00000008) /*!< PC Read/Write protection of Sector3 */ 244 #define OB_PCROP_Sector_4 ((uint32_t)0x00000010) /*!< PC Read/Write protection of Sector4 */ 245 #define OB_PCROP_Sector_5 ((uint32_t)0x00000020) /*!< PC Read/Write protection of Sector5 */ 246 #define OB_PCROP_Sector_6 ((uint32_t)0x00000040) /*!< PC Read/Write protection of Sector6 */ 247 #define OB_PCROP_Sector_7 ((uint32_t)0x00000080) /*!< PC Read/Write protection of Sector7 */ 248 #define OB_PCROP_Sector_8 ((uint32_t)0x00000100) /*!< PC Read/Write protection of Sector8 */ 249 #define OB_PCROP_Sector_9 ((uint32_t)0x00000200) /*!< PC Read/Write protection of Sector9 */ 250 #define OB_PCROP_Sector_10 ((uint32_t)0x00000400) /*!< PC Read/Write protection of Sector10 */ 251 #define OB_PCROP_Sector_11 ((uint32_t)0x00000800) /*!< PC Read/Write protection of Sector11 */ 252 #define OB_PCROP_Sector_12 ((uint32_t)0x00000001) /*!< PC Read/Write protection of Sector12 */ 253 #define OB_PCROP_Sector_13 ((uint32_t)0x00000002) /*!< PC Read/Write protection of Sector13 */ 254 #define OB_PCROP_Sector_14 ((uint32_t)0x00000004) /*!< PC Read/Write protection of Sector14 */ 255 #define OB_PCROP_Sector_15 ((uint32_t)0x00000008) /*!< PC Read/Write protection of Sector15 */ 256 #define OB_PCROP_Sector_16 ((uint32_t)0x00000010) /*!< PC Read/Write protection of Sector16 */ 257 #define OB_PCROP_Sector_17 ((uint32_t)0x00000020) /*!< PC Read/Write protection of Sector17 */ 258 #define OB_PCROP_Sector_18 ((uint32_t)0x00000040) /*!< PC Read/Write protection of Sector18 */ 259 #define OB_PCROP_Sector_19 ((uint32_t)0x00000080) /*!< PC Read/Write protection of Sector19 */ 260 #define OB_PCROP_Sector_20 ((uint32_t)0x00000100) /*!< PC Read/Write protection of Sector20 */ 261 #define OB_PCROP_Sector_21 ((uint32_t)0x00000200) /*!< PC Read/Write protection of Sector21 */ 262 #define OB_PCROP_Sector_22 ((uint32_t)0x00000400) /*!< PC Read/Write protection of Sector22 */ 263 #define OB_PCROP_Sector_23 ((uint32_t)0x00000800) /*!< PC Read/Write protection of Sector23 */ 264 #define OB_PCROP_Sector_All ((uint32_t)0x00000FFF) /*!< PC Read/Write protection of all Sectors */ 265 266 #define IS_OB_PCROP(SECTOR)((((SECTOR) & (uint32_t)0xFFFFF000) == 0x00000000) && ((SECTOR) != 0x00000000)) 267 /** 268 * @} 269 */ 270 271 /** @defgroup FLASH_Option_Bytes_Read_Protection 272 * @{ 273 */ 274 #define OB_RDP_Level_0 ((uint8_t)0xAA) 275 #define OB_RDP_Level_1 ((uint8_t)0x55) 276 /*#define OB_RDP_Level_2 ((uint8_t)0xCC)*/ /*!< Warning: When enabling read protection level 2 277 it's no more possible to go back to level 1 or 0 */ 278 #define IS_OB_RDP(LEVEL) (((LEVEL) == OB_RDP_Level_0)||\ 279 ((LEVEL) == OB_RDP_Level_1))/*||\ 280 ((LEVEL) == OB_RDP_Level_2))*/ 281 /** 282 * @} 283 */ 284 285 /** @defgroup FLASH_Option_Bytes_IWatchdog 286 * @{ 287 */ 288 #define OB_IWDG_SW ((uint8_t)0x20) /*!< Software IWDG selected */ 289 #define OB_IWDG_HW ((uint8_t)0x00) /*!< Hardware IWDG selected */ 290 #define IS_OB_IWDG_SOURCE(SOURCE) (((SOURCE) == OB_IWDG_SW) || ((SOURCE) == OB_IWDG_HW)) 291 /** 292 * @} 293 */ 294 295 /** @defgroup FLASH_Option_Bytes_nRST_STOP 296 * @{ 297 */ 298 #define OB_STOP_NoRST ((uint8_t)0x40) /*!< No reset generated when entering in STOP */ 299 #define OB_STOP_RST ((uint8_t)0x00) /*!< Reset generated when entering in STOP */ 300 #define IS_OB_STOP_SOURCE(SOURCE) (((SOURCE) == OB_STOP_NoRST) || ((SOURCE) == OB_STOP_RST)) 301 /** 302 * @} 303 */ 304 305 306 /** @defgroup FLASH_Option_Bytes_nRST_STDBY 307 * @{ 308 */ 309 #define OB_STDBY_NoRST ((uint8_t)0x80) /*!< No reset generated when entering in STANDBY */ 310 #define OB_STDBY_RST ((uint8_t)0x00) /*!< Reset generated when entering in STANDBY */ 311 #define IS_OB_STDBY_SOURCE(SOURCE) (((SOURCE) == OB_STDBY_NoRST) || ((SOURCE) == OB_STDBY_RST)) 312 /** 313 * @} 314 */ 315 316 /** @defgroup FLASH_BOR_Reset_Level 317 * @{ 318 */ 319 #define OB_BOR_LEVEL3 ((uint8_t)0x00) /*!< Supply voltage ranges from 2.70 to 3.60 V */ 320 #define OB_BOR_LEVEL2 ((uint8_t)0x04) /*!< Supply voltage ranges from 2.40 to 2.70 V */ 321 #define OB_BOR_LEVEL1 ((uint8_t)0x08) /*!< Supply voltage ranges from 2.10 to 2.40 V */ 322 #define OB_BOR_OFF ((uint8_t)0x0C) /*!< Supply voltage ranges from 1.62 to 2.10 V */ 323 #define IS_OB_BOR(LEVEL) (((LEVEL) == OB_BOR_LEVEL1) || ((LEVEL) == OB_BOR_LEVEL2) ||\ 324 ((LEVEL) == OB_BOR_LEVEL3) || ((LEVEL) == OB_BOR_OFF)) 325 /** 326 * @} 327 */ 328 329 /** @defgroup FLASH_Dual_Boot 330 * @{ 331 */ 332 #define OB_Dual_BootEnabled ((uint8_t)0x10) /*!< Dual Bank Boot Enable */ 333 #define OB_Dual_BootDisabled ((uint8_t)0x00) /*!< Dual Bank Boot Disable, always boot on User Flash */ 334 #define IS_OB_BOOT(BOOT) (((BOOT) == OB_Dual_BootEnabled) || ((BOOT) == OB_Dual_BootDisabled)) 335 /** 336 * @} 337 */ 338 339 /** @defgroup FLASH_Interrupts 340 * @{ 341 */ 342 #define FLASH_IT_EOP ((uint32_t)0x01000000) /*!< End of FLASH Operation Interrupt source */ 343 #define FLASH_IT_ERR ((uint32_t)0x02000000) /*!< Error Interrupt source */ 344 #define IS_FLASH_IT(IT) ((((IT) & (uint32_t)0xFCFFFFFF) == 0x00000000) && ((IT) != 0x00000000)) 345 /** 346 * @} 347 */ 348 349 /** @defgroup FLASH_Flags 350 * @{ 351 */ 352 #define FLASH_FLAG_EOP ((uint32_t)0x00000001) /*!< FLASH End of Operation flag */ 353 #define FLASH_FLAG_OPERR ((uint32_t)0x00000002) /*!< FLASH operation Error flag */ 354 #define FLASH_FLAG_WRPERR ((uint32_t)0x00000010) /*!< FLASH Write protected error flag */ 355 #define FLASH_FLAG_PGAERR ((uint32_t)0x00000020) /*!< FLASH Programming Alignment error flag */ 356 #define FLASH_FLAG_PGPERR ((uint32_t)0x00000040) /*!< FLASH Programming Parallelism error flag */ 357 #define FLASH_FLAG_PGSERR ((uint32_t)0x00000080) /*!< FLASH Programming Sequence error flag */ 358 #define FLASH_FLAG_RDERR ((uint32_t)0x00000100) /*!< Read Protection error flag (PCROP) */ 359 #define FLASH_FLAG_BSY ((uint32_t)0x00010000) /*!< FLASH Busy flag */ 360 #define IS_FLASH_CLEAR_FLAG(FLAG) ((((FLAG) & (uint32_t)0xFFFFFE0C) == 0x00000000) && ((FLAG) != 0x00000000)) 361 #define IS_FLASH_GET_FLAG(FLAG) (((FLAG) == FLASH_FLAG_EOP) || ((FLAG) == FLASH_FLAG_OPERR) || \ 362 ((FLAG) == FLASH_FLAG_WRPERR) || ((FLAG) == FLASH_FLAG_PGAERR) || \ 363 ((FLAG) == FLASH_FLAG_PGPERR) || ((FLAG) == FLASH_FLAG_PGSERR) || \ 364 ((FLAG) == FLASH_FLAG_BSY) || ((FLAG) == FLASH_FLAG_RDERR)) 365 /** 366 * @} 367 */ 368 369 /** @defgroup FLASH_Program_Parallelism 370 * @{ 371 */ 372 #define FLASH_PSIZE_BYTE ((uint32_t)0x00000000) 373 #define FLASH_PSIZE_HALF_WORD ((uint32_t)0x00000100) 374 #define FLASH_PSIZE_WORD ((uint32_t)0x00000200) 375 #define FLASH_PSIZE_DOUBLE_WORD ((uint32_t)0x00000300) 376 #define CR_PSIZE_MASK ((uint32_t)0xFFFFFCFF) 377 /** 378 * @} 379 */ 380 381 /** @defgroup FLASH_Keys 382 * @{ 383 */ 384 #define RDP_KEY ((uint16_t)0x00A5) 385 #define FLASH_KEY1 ((uint32_t)0x45670123) 386 #define FLASH_KEY2 ((uint32_t)0xCDEF89AB) 387 #define FLASH_OPT_KEY1 ((uint32_t)0x08192A3B) 388 #define FLASH_OPT_KEY2 ((uint32_t)0x4C5D6E7F) 389 /** 390 * @} 391 */ 392 393 /** 394 * @brief ACR register byte 0 (Bits[7:0]) base address 395 */ 396 #define ACR_BYTE0_ADDRESS ((uint32_t)0x40023C00) 397 /** 398 * @brief OPTCR register byte 0 (Bits[7:0]) base address 399 */ 400 #define OPTCR_BYTE0_ADDRESS ((uint32_t)0x40023C14) 401 /** 402 * @brief OPTCR register byte 1 (Bits[15:8]) base address 403 */ 404 #define OPTCR_BYTE1_ADDRESS ((uint32_t)0x40023C15) 405 /** 406 * @brief OPTCR register byte 2 (Bits[23:16]) base address 407 */ 408 #define OPTCR_BYTE2_ADDRESS ((uint32_t)0x40023C16) 409 /** 410 * @brief OPTCR register byte 3 (Bits[31:24]) base address 411 */ 412 #define OPTCR_BYTE3_ADDRESS ((uint32_t)0x40023C17) 413 414 /** 415 * @brief OPTCR1 register byte 0 (Bits[7:0]) base address 416 */ 417 #define OPTCR1_BYTE2_ADDRESS ((uint32_t)0x40023C1A) 418 419 /** 420 * @} 421 */ 422 423 /* Exported macro ------------------------------------------------------------*/ 424 /* Exported functions --------------------------------------------------------*/ 425 426 /* FLASH Interface configuration functions ************************************/ 427 void FLASH_SetLatency(uint32_t FLASH_Latency); 428 void FLASH_PrefetchBufferCmd(FunctionalState NewState); 429 void FLASH_InstructionCacheCmd(FunctionalState NewState); 430 void FLASH_DataCacheCmd(FunctionalState NewState); 431 void FLASH_InstructionCacheReset(void); 432 void FLASH_DataCacheReset(void); 433 434 /* FLASH Memory Programming functions *****************************************/ 435 void FLASH_Unlock(void); 436 void FLASH_Lock(void); 437 FLASH_Status FLASH_EraseSector(uint32_t FLASH_Sector, uint8_t VoltageRange); 438 FLASH_Status FLASH_EraseAllSectors(uint8_t VoltageRange); 439 FLASH_Status FLASH_EraseAllBank1Sectors(uint8_t VoltageRange); 440 FLASH_Status FLASH_EraseAllBank2Sectors(uint8_t VoltageRange); 441 FLASH_Status FLASH_ProgramDoubleWord(uint32_t Address, uint64_t Data); 442 FLASH_Status FLASH_ProgramWord(uint32_t Address, uint32_t Data); 443 FLASH_Status FLASH_ProgramHalfWord(uint32_t Address, uint16_t Data); 444 FLASH_Status FLASH_ProgramByte(uint32_t Address, uint8_t Data); 445 446 /* Option Bytes Programming functions *****************************************/ 447 void FLASH_OB_Unlock(void); 448 void FLASH_OB_Lock(void); 449 void FLASH_OB_WRPConfig(uint32_t OB_WRP, FunctionalState NewState); 450 void FLASH_OB_WRP1Config(uint32_t OB_WRP, FunctionalState NewState); 451 void FLASH_OB_PCROPSelectionConfig(uint8_t OB_PcROP); 452 void FLASH_OB_PCROPConfig(uint32_t OB_PCROP, FunctionalState NewState); 453 void FLASH_OB_PCROP1Config(uint32_t OB_PCROP, FunctionalState NewState); 454 void FLASH_OB_RDPConfig(uint8_t OB_RDP); 455 void FLASH_OB_UserConfig(uint8_t OB_IWDG, uint8_t OB_STOP, uint8_t OB_STDBY); 456 void FLASH_OB_BORConfig(uint8_t OB_BOR); 457 void FLASH_OB_BootConfig(uint8_t OB_BOOT); 458 FLASH_Status FLASH_OB_Launch(void); 459 uint8_t FLASH_OB_GetUser(void); 460 uint16_t FLASH_OB_GetWRP(void); 461 uint16_t FLASH_OB_GetWRP1(void); 462 uint16_t FLASH_OB_GetPCROP(void); 463 uint16_t FLASH_OB_GetPCROP1(void); 464 FlagStatus FLASH_OB_GetRDP(void); 465 uint8_t FLASH_OB_GetBOR(void); 466 467 /* Interrupts and flags management functions **********************************/ 468 void FLASH_ITConfig(uint32_t FLASH_IT, FunctionalState NewState); 469 FlagStatus FLASH_GetFlagStatus(uint32_t FLASH_FLAG); 470 void FLASH_ClearFlag(uint32_t FLASH_FLAG); 471 FLASH_Status FLASH_GetStatus(void); 472 FLASH_Status FLASH_WaitForLastOperation(void); 473 474 #ifdef __cplusplus 475 } 476 #endif 477 478 #endif /* __STM32F4xx_FLASH_H */ 479 480 /** 481 * @} 482 */ 483 484 /** 485 * @} 486 */ 487 488 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ 489