1 /**
2 ******************************************************************************
3 * @file stm32f4xx_ll_usart.c
4 * @author MCD Application Team
5 * @brief USART LL module driver.
6 ******************************************************************************
7 * @attention
8 *
9 * <h2><center>© Copyright (c) 2016 STMicroelectronics.
10 * All rights reserved.</center></h2>
11 *
12 * This software component is licensed by ST under BSD 3-Clause license,
13 * the "License"; You may not use this file except in compliance with the
14 * License. You may obtain a copy of the License at:
15 * opensource.org/licenses/BSD-3-Clause
16 *
17 ******************************************************************************
18 */
19
20 #if defined(USE_FULL_LL_DRIVER)
21
22 /* Includes ------------------------------------------------------------------*/
23 #include "stm32f4xx_ll_usart.h"
24 #include "stm32f4xx_ll_rcc.h"
25 #include "stm32f4xx_ll_bus.h"
26 #ifdef USE_FULL_ASSERT
27 #include "stm32_assert.h"
28 #else
29 #define assert_param(expr) ((void)0U)
30 #endif
31
32 /** @addtogroup STM32F4xx_LL_Driver
33 * @{
34 */
35
36 #if defined (USART1) || defined (USART2) || defined (USART3) || defined (USART6) || defined (UART4) || defined (UART5) || defined (UART7) || defined (UART8) || defined (UART9) || defined (UART10)
37
38 /** @addtogroup USART_LL
39 * @{
40 */
41
42 /* Private types -------------------------------------------------------------*/
43 /* Private variables ---------------------------------------------------------*/
44 /* Private constants ---------------------------------------------------------*/
45 /** @addtogroup USART_LL_Private_Constants
46 * @{
47 */
48
49 /**
50 * @}
51 */
52
53
54 /* Private macros ------------------------------------------------------------*/
55 /** @addtogroup USART_LL_Private_Macros
56 * @{
57 */
58
59 /* __BAUDRATE__ The maximum Baud Rate is derived from the maximum clock available
60 * divided by the smallest oversampling used on the USART (i.e. 8) */
61 #define IS_LL_USART_BAUDRATE(__BAUDRATE__) ((__BAUDRATE__) <= 12500000U)
62
63 /* __VALUE__ In case of oversampling by 16 and 8, BRR content must be greater than or equal to 16d. */
64 #define IS_LL_USART_BRR_MIN(__VALUE__) ((__VALUE__) >= 16U)
65
66 #define IS_LL_USART_DIRECTION(__VALUE__) (((__VALUE__) == LL_USART_DIRECTION_NONE) \
67 || ((__VALUE__) == LL_USART_DIRECTION_RX) \
68 || ((__VALUE__) == LL_USART_DIRECTION_TX) \
69 || ((__VALUE__) == LL_USART_DIRECTION_TX_RX))
70
71 #define IS_LL_USART_PARITY(__VALUE__) (((__VALUE__) == LL_USART_PARITY_NONE) \
72 || ((__VALUE__) == LL_USART_PARITY_EVEN) \
73 || ((__VALUE__) == LL_USART_PARITY_ODD))
74
75 #define IS_LL_USART_DATAWIDTH(__VALUE__) (((__VALUE__) == LL_USART_DATAWIDTH_8B) \
76 || ((__VALUE__) == LL_USART_DATAWIDTH_9B))
77
78 #define IS_LL_USART_OVERSAMPLING(__VALUE__) (((__VALUE__) == LL_USART_OVERSAMPLING_16) \
79 || ((__VALUE__) == LL_USART_OVERSAMPLING_8))
80
81 #define IS_LL_USART_LASTBITCLKOUTPUT(__VALUE__) (((__VALUE__) == LL_USART_LASTCLKPULSE_NO_OUTPUT) \
82 || ((__VALUE__) == LL_USART_LASTCLKPULSE_OUTPUT))
83
84 #define IS_LL_USART_CLOCKPHASE(__VALUE__) (((__VALUE__) == LL_USART_PHASE_1EDGE) \
85 || ((__VALUE__) == LL_USART_PHASE_2EDGE))
86
87 #define IS_LL_USART_CLOCKPOLARITY(__VALUE__) (((__VALUE__) == LL_USART_POLARITY_LOW) \
88 || ((__VALUE__) == LL_USART_POLARITY_HIGH))
89
90 #define IS_LL_USART_CLOCKOUTPUT(__VALUE__) (((__VALUE__) == LL_USART_CLOCK_DISABLE) \
91 || ((__VALUE__) == LL_USART_CLOCK_ENABLE))
92
93 #define IS_LL_USART_STOPBITS(__VALUE__) (((__VALUE__) == LL_USART_STOPBITS_0_5) \
94 || ((__VALUE__) == LL_USART_STOPBITS_1) \
95 || ((__VALUE__) == LL_USART_STOPBITS_1_5) \
96 || ((__VALUE__) == LL_USART_STOPBITS_2))
97
98 #define IS_LL_USART_HWCONTROL(__VALUE__) (((__VALUE__) == LL_USART_HWCONTROL_NONE) \
99 || ((__VALUE__) == LL_USART_HWCONTROL_RTS) \
100 || ((__VALUE__) == LL_USART_HWCONTROL_CTS) \
101 || ((__VALUE__) == LL_USART_HWCONTROL_RTS_CTS))
102
103 /**
104 * @}
105 */
106
107 /* Private function prototypes -----------------------------------------------*/
108
109 /* Exported functions --------------------------------------------------------*/
110 /** @addtogroup USART_LL_Exported_Functions
111 * @{
112 */
113
114 /** @addtogroup USART_LL_EF_Init
115 * @{
116 */
117
118 /**
119 * @brief De-initialize USART registers (Registers restored to their default values).
120 * @param USARTx USART Instance
121 * @retval An ErrorStatus enumeration value:
122 * - SUCCESS: USART registers are de-initialized
123 * - ERROR: USART registers are not de-initialized
124 */
LL_USART_DeInit(USART_TypeDef * USARTx)125 ErrorStatus LL_USART_DeInit(USART_TypeDef *USARTx)
126 {
127 ErrorStatus status = SUCCESS;
128
129 /* Check the parameters */
130 assert_param(IS_UART_INSTANCE(USARTx));
131
132 if (USARTx == USART1)
133 {
134 /* Force reset of USART clock */
135 LL_APB2_GRP1_ForceReset(LL_APB2_GRP1_PERIPH_USART1);
136
137 /* Release reset of USART clock */
138 LL_APB2_GRP1_ReleaseReset(LL_APB2_GRP1_PERIPH_USART1);
139 }
140 else if (USARTx == USART2)
141 {
142 /* Force reset of USART clock */
143 LL_APB1_GRP1_ForceReset(LL_APB1_GRP1_PERIPH_USART2);
144
145 /* Release reset of USART clock */
146 LL_APB1_GRP1_ReleaseReset(LL_APB1_GRP1_PERIPH_USART2);
147 }
148 #if defined(USART3)
149 else if (USARTx == USART3)
150 {
151 /* Force reset of USART clock */
152 LL_APB1_GRP1_ForceReset(LL_APB1_GRP1_PERIPH_USART3);
153
154 /* Release reset of USART clock */
155 LL_APB1_GRP1_ReleaseReset(LL_APB1_GRP1_PERIPH_USART3);
156 }
157 #endif /* USART3 */
158 #if defined(USART6)
159 else if (USARTx == USART6)
160 {
161 /* Force reset of USART clock */
162 LL_APB2_GRP1_ForceReset(LL_APB2_GRP1_PERIPH_USART6);
163
164 /* Release reset of USART clock */
165 LL_APB2_GRP1_ReleaseReset(LL_APB2_GRP1_PERIPH_USART6);
166 }
167 #endif /* USART6 */
168 #if defined(UART4)
169 else if (USARTx == UART4)
170 {
171 /* Force reset of UART clock */
172 LL_APB1_GRP1_ForceReset(LL_APB1_GRP1_PERIPH_UART4);
173
174 /* Release reset of UART clock */
175 LL_APB1_GRP1_ReleaseReset(LL_APB1_GRP1_PERIPH_UART4);
176 }
177 #endif /* UART4 */
178 #if defined(UART5)
179 else if (USARTx == UART5)
180 {
181 /* Force reset of UART clock */
182 LL_APB1_GRP1_ForceReset(LL_APB1_GRP1_PERIPH_UART5);
183
184 /* Release reset of UART clock */
185 LL_APB1_GRP1_ReleaseReset(LL_APB1_GRP1_PERIPH_UART5);
186 }
187 #endif /* UART5 */
188 #if defined(UART7)
189 else if (USARTx == UART7)
190 {
191 /* Force reset of UART clock */
192 LL_APB1_GRP1_ForceReset(LL_APB1_GRP1_PERIPH_UART7);
193
194 /* Release reset of UART clock */
195 LL_APB1_GRP1_ReleaseReset(LL_APB1_GRP1_PERIPH_UART7);
196 }
197 #endif /* UART7 */
198 #if defined(UART8)
199 else if (USARTx == UART8)
200 {
201 /* Force reset of UART clock */
202 LL_APB1_GRP1_ForceReset(LL_APB1_GRP1_PERIPH_UART8);
203
204 /* Release reset of UART clock */
205 LL_APB1_GRP1_ReleaseReset(LL_APB1_GRP1_PERIPH_UART8);
206 }
207 #endif /* UART8 */
208 #if defined(UART9)
209 else if (USARTx == UART9)
210 {
211 /* Force reset of UART clock */
212 LL_APB2_GRP1_ForceReset(LL_APB2_GRP1_PERIPH_UART9);
213
214 /* Release reset of UART clock */
215 LL_APB2_GRP1_ReleaseReset(LL_APB2_GRP1_PERIPH_UART9);
216 }
217 #endif /* UART9 */
218 #if defined(UART10)
219 else if (USARTx == UART10)
220 {
221 /* Force reset of UART clock */
222 LL_APB2_GRP1_ForceReset(LL_APB2_GRP1_PERIPH_UART10);
223
224 /* Release reset of UART clock */
225 LL_APB2_GRP1_ReleaseReset(LL_APB2_GRP1_PERIPH_UART10);
226 }
227 #endif /* UART10 */
228 else
229 {
230 status = ERROR;
231 }
232
233 return (status);
234 }
235
236 /**
237 * @brief Initialize USART registers according to the specified
238 * parameters in USART_InitStruct.
239 * @note As some bits in USART configuration registers can only be written when the USART is disabled (USART_CR1_UE bit =0),
240 * USART IP should be in disabled state prior calling this function. Otherwise, ERROR result will be returned.
241 * @note Baud rate value stored in USART_InitStruct BaudRate field, should be valid (different from 0).
242 * @param USARTx USART Instance
243 * @param USART_InitStruct pointer to a LL_USART_InitTypeDef structure
244 * that contains the configuration information for the specified USART peripheral.
245 * @retval An ErrorStatus enumeration value:
246 * - SUCCESS: USART registers are initialized according to USART_InitStruct content
247 * - ERROR: Problem occurred during USART Registers initialization
248 */
LL_USART_Init(USART_TypeDef * USARTx,LL_USART_InitTypeDef * USART_InitStruct)249 ErrorStatus LL_USART_Init(USART_TypeDef *USARTx, LL_USART_InitTypeDef *USART_InitStruct)
250 {
251 ErrorStatus status = ERROR;
252 uint32_t periphclk = LL_RCC_PERIPH_FREQUENCY_NO;
253 LL_RCC_ClocksTypeDef rcc_clocks;
254
255 /* Check the parameters */
256 assert_param(IS_UART_INSTANCE(USARTx));
257 assert_param(IS_LL_USART_BAUDRATE(USART_InitStruct->BaudRate));
258 assert_param(IS_LL_USART_DATAWIDTH(USART_InitStruct->DataWidth));
259 assert_param(IS_LL_USART_STOPBITS(USART_InitStruct->StopBits));
260 assert_param(IS_LL_USART_PARITY(USART_InitStruct->Parity));
261 assert_param(IS_LL_USART_DIRECTION(USART_InitStruct->TransferDirection));
262 assert_param(IS_LL_USART_HWCONTROL(USART_InitStruct->HardwareFlowControl));
263 assert_param(IS_LL_USART_OVERSAMPLING(USART_InitStruct->OverSampling));
264
265 /* USART needs to be in disabled state, in order to be able to configure some bits in
266 CRx registers */
267 if (LL_USART_IsEnabled(USARTx) == 0U)
268 {
269 /*---------------------------- USART CR1 Configuration -----------------------
270 * Configure USARTx CR1 (USART Word Length, Parity, Mode and Oversampling bits) with parameters:
271 * - DataWidth: USART_CR1_M bits according to USART_InitStruct->DataWidth value
272 * - Parity: USART_CR1_PCE, USART_CR1_PS bits according to USART_InitStruct->Parity value
273 * - TransferDirection: USART_CR1_TE, USART_CR1_RE bits according to USART_InitStruct->TransferDirection value
274 * - Oversampling: USART_CR1_OVER8 bit according to USART_InitStruct->OverSampling value.
275 */
276 MODIFY_REG(USARTx->CR1,
277 (USART_CR1_M | USART_CR1_PCE | USART_CR1_PS |
278 USART_CR1_TE | USART_CR1_RE | USART_CR1_OVER8),
279 (USART_InitStruct->DataWidth | USART_InitStruct->Parity |
280 USART_InitStruct->TransferDirection | USART_InitStruct->OverSampling));
281
282 /*---------------------------- USART CR2 Configuration -----------------------
283 * Configure USARTx CR2 (Stop bits) with parameters:
284 * - Stop Bits: USART_CR2_STOP bits according to USART_InitStruct->StopBits value.
285 * - CLKEN, CPOL, CPHA and LBCL bits are to be configured using LL_USART_ClockInit().
286 */
287 LL_USART_SetStopBitsLength(USARTx, USART_InitStruct->StopBits);
288
289 /*---------------------------- USART CR3 Configuration -----------------------
290 * Configure USARTx CR3 (Hardware Flow Control) with parameters:
291 * - HardwareFlowControl: USART_CR3_RTSE, USART_CR3_CTSE bits according to USART_InitStruct->HardwareFlowControl value.
292 */
293 LL_USART_SetHWFlowCtrl(USARTx, USART_InitStruct->HardwareFlowControl);
294
295 /*---------------------------- USART BRR Configuration -----------------------
296 * Retrieve Clock frequency used for USART Peripheral
297 */
298 LL_RCC_GetSystemClocksFreq(&rcc_clocks);
299 if (USARTx == USART1)
300 {
301 periphclk = rcc_clocks.PCLK2_Frequency;
302 }
303 else if (USARTx == USART2)
304 {
305 periphclk = rcc_clocks.PCLK1_Frequency;
306 }
307 #if defined(USART3)
308 else if (USARTx == USART3)
309 {
310 periphclk = rcc_clocks.PCLK1_Frequency;
311 }
312 #endif /* USART3 */
313 #if defined(USART6)
314 else if (USARTx == USART6)
315 {
316 periphclk = rcc_clocks.PCLK2_Frequency;
317 }
318 #endif /* USART6 */
319 #if defined(UART4)
320 else if (USARTx == UART4)
321 {
322 periphclk = rcc_clocks.PCLK1_Frequency;
323 }
324 #endif /* UART4 */
325 #if defined(UART5)
326 else if (USARTx == UART5)
327 {
328 periphclk = rcc_clocks.PCLK1_Frequency;
329 }
330 #endif /* UART5 */
331 #if defined(UART7)
332 else if (USARTx == UART7)
333 {
334 periphclk = rcc_clocks.PCLK1_Frequency;
335 }
336 #endif /* UART7 */
337 #if defined(UART8)
338 else if (USARTx == UART8)
339 {
340 periphclk = rcc_clocks.PCLK1_Frequency;
341 }
342 #endif /* UART8 */
343 #if defined(UART9)
344 else if (USARTx == UART9)
345 {
346 periphclk = rcc_clocks.PCLK2_Frequency;
347 }
348 #endif /* UART9 */
349 #if defined(UART10)
350 else if (USARTx == UART10)
351 {
352 periphclk = rcc_clocks.PCLK2_Frequency;
353 }
354 #endif /* UART10 */
355 else
356 {
357 /* Nothing to do, as error code is already assigned to ERROR value */
358 }
359
360 /* Configure the USART Baud Rate :
361 - valid baud rate value (different from 0) is required
362 - Peripheral clock as returned by RCC service, should be valid (different from 0).
363 */
364 if ((periphclk != LL_RCC_PERIPH_FREQUENCY_NO)
365 && (USART_InitStruct->BaudRate != 0U))
366 {
367 status = SUCCESS;
368 LL_USART_SetBaudRate(USARTx,
369 periphclk,
370 USART_InitStruct->OverSampling,
371 USART_InitStruct->BaudRate);
372
373 /* Check BRR is greater than or equal to 16d */
374 assert_param(IS_LL_USART_BRR_MIN(USARTx->BRR));
375 }
376 }
377 /* Endif (=> USART not in Disabled state => return ERROR) */
378
379 return (status);
380 }
381
382 /**
383 * @brief Set each @ref LL_USART_InitTypeDef field to default value.
384 * @param USART_InitStruct Pointer to a @ref LL_USART_InitTypeDef structure
385 * whose fields will be set to default values.
386 * @retval None
387 */
388
LL_USART_StructInit(LL_USART_InitTypeDef * USART_InitStruct)389 void LL_USART_StructInit(LL_USART_InitTypeDef *USART_InitStruct)
390 {
391 /* Set USART_InitStruct fields to default values */
392 USART_InitStruct->BaudRate = 9600U;
393 USART_InitStruct->DataWidth = LL_USART_DATAWIDTH_8B;
394 USART_InitStruct->StopBits = LL_USART_STOPBITS_1;
395 USART_InitStruct->Parity = LL_USART_PARITY_NONE ;
396 USART_InitStruct->TransferDirection = LL_USART_DIRECTION_TX_RX;
397 USART_InitStruct->HardwareFlowControl = LL_USART_HWCONTROL_NONE;
398 USART_InitStruct->OverSampling = LL_USART_OVERSAMPLING_16;
399 }
400
401 /**
402 * @brief Initialize USART Clock related settings according to the
403 * specified parameters in the USART_ClockInitStruct.
404 * @note As some bits in USART configuration registers can only be written when the USART is disabled (USART_CR1_UE bit =0),
405 * USART IP should be in disabled state prior calling this function. Otherwise, ERROR result will be returned.
406 * @param USARTx USART Instance
407 * @param USART_ClockInitStruct Pointer to a @ref LL_USART_ClockInitTypeDef structure
408 * that contains the Clock configuration information for the specified USART peripheral.
409 * @retval An ErrorStatus enumeration value:
410 * - SUCCESS: USART registers related to Clock settings are initialized according to USART_ClockInitStruct content
411 * - ERROR: Problem occurred during USART Registers initialization
412 */
LL_USART_ClockInit(USART_TypeDef * USARTx,LL_USART_ClockInitTypeDef * USART_ClockInitStruct)413 ErrorStatus LL_USART_ClockInit(USART_TypeDef *USARTx, LL_USART_ClockInitTypeDef *USART_ClockInitStruct)
414 {
415 ErrorStatus status = SUCCESS;
416
417 /* Check USART Instance and Clock signal output parameters */
418 assert_param(IS_UART_INSTANCE(USARTx));
419 assert_param(IS_LL_USART_CLOCKOUTPUT(USART_ClockInitStruct->ClockOutput));
420
421 /* USART needs to be in disabled state, in order to be able to configure some bits in
422 CRx registers */
423 if (LL_USART_IsEnabled(USARTx) == 0U)
424 {
425 /*---------------------------- USART CR2 Configuration -----------------------*/
426 /* If Clock signal has to be output */
427 if (USART_ClockInitStruct->ClockOutput == LL_USART_CLOCK_DISABLE)
428 {
429 /* Deactivate Clock signal delivery :
430 * - Disable Clock Output: USART_CR2_CLKEN cleared
431 */
432 LL_USART_DisableSCLKOutput(USARTx);
433 }
434 else
435 {
436 /* Ensure USART instance is USART capable */
437 assert_param(IS_USART_INSTANCE(USARTx));
438
439 /* Check clock related parameters */
440 assert_param(IS_LL_USART_CLOCKPOLARITY(USART_ClockInitStruct->ClockPolarity));
441 assert_param(IS_LL_USART_CLOCKPHASE(USART_ClockInitStruct->ClockPhase));
442 assert_param(IS_LL_USART_LASTBITCLKOUTPUT(USART_ClockInitStruct->LastBitClockPulse));
443
444 /*---------------------------- USART CR2 Configuration -----------------------
445 * Configure USARTx CR2 (Clock signal related bits) with parameters:
446 * - Enable Clock Output: USART_CR2_CLKEN set
447 * - Clock Polarity: USART_CR2_CPOL bit according to USART_ClockInitStruct->ClockPolarity value
448 * - Clock Phase: USART_CR2_CPHA bit according to USART_ClockInitStruct->ClockPhase value
449 * - Last Bit Clock Pulse Output: USART_CR2_LBCL bit according to USART_ClockInitStruct->LastBitClockPulse value.
450 */
451 MODIFY_REG(USARTx->CR2,
452 USART_CR2_CLKEN | USART_CR2_CPHA | USART_CR2_CPOL | USART_CR2_LBCL,
453 USART_CR2_CLKEN | USART_ClockInitStruct->ClockPolarity |
454 USART_ClockInitStruct->ClockPhase | USART_ClockInitStruct->LastBitClockPulse);
455 }
456 }
457 /* Else (USART not in Disabled state => return ERROR */
458 else
459 {
460 status = ERROR;
461 }
462
463 return (status);
464 }
465
466 /**
467 * @brief Set each field of a @ref LL_USART_ClockInitTypeDef type structure to default value.
468 * @param USART_ClockInitStruct Pointer to a @ref LL_USART_ClockInitTypeDef structure
469 * whose fields will be set to default values.
470 * @retval None
471 */
LL_USART_ClockStructInit(LL_USART_ClockInitTypeDef * USART_ClockInitStruct)472 void LL_USART_ClockStructInit(LL_USART_ClockInitTypeDef *USART_ClockInitStruct)
473 {
474 /* Set LL_USART_ClockInitStruct fields with default values */
475 USART_ClockInitStruct->ClockOutput = LL_USART_CLOCK_DISABLE;
476 USART_ClockInitStruct->ClockPolarity = LL_USART_POLARITY_LOW; /* Not relevant when ClockOutput = LL_USART_CLOCK_DISABLE */
477 USART_ClockInitStruct->ClockPhase = LL_USART_PHASE_1EDGE; /* Not relevant when ClockOutput = LL_USART_CLOCK_DISABLE */
478 USART_ClockInitStruct->LastBitClockPulse = LL_USART_LASTCLKPULSE_NO_OUTPUT; /* Not relevant when ClockOutput = LL_USART_CLOCK_DISABLE */
479 }
480
481 /**
482 * @}
483 */
484
485 /**
486 * @}
487 */
488
489 /**
490 * @}
491 */
492
493 #endif /* USART1 || USART2 || USART3 || USART6 || UART4 || UART5 || UART7 || UART8 || UART9 || UART10 */
494
495 /**
496 * @}
497 */
498
499 #endif /* USE_FULL_LL_DRIVER */
500
501 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
502
503