1 /** 2 ****************************************************************************** 3 * @file stm32mp1xx_hal_uart_ex.h 4 * @author MCD Application Team 5 * @brief Header file of UART HAL Extended module. 6 ****************************************************************************** 7 * @attention 8 * 9 * <h2><center>© Copyright (c) 2019 STMicroelectronics. 10 * All rights reserved.</center></h2> 11 * 12 * This software component is licensed by ST under BSD 3-Clause license, 13 * the "License"; You may not use this file except in compliance with the 14 * License. You may obtain a copy of the License at: 15 * opensource.org/licenses/BSD-3-Clause 16 * 17 ****************************************************************************** 18 */ 19 20 /* Define to prevent recursive inclusion -------------------------------------*/ 21 #ifndef STM32MP1xx_HAL_UART_EX_H 22 #define STM32MP1xx_HAL_UART_EX_H 23 24 #ifdef __cplusplus 25 extern "C" { 26 #endif 27 28 /* Includes ------------------------------------------------------------------*/ 29 #include "stm32mp1xx_hal_def.h" 30 31 /** @addtogroup STM32MP1xx_HAL_Driver 32 * @{ 33 */ 34 35 /** @addtogroup UARTEx 36 * @{ 37 */ 38 39 /* Exported types ------------------------------------------------------------*/ 40 /** @defgroup UARTEx_Exported_Types UARTEx Exported Types 41 * @{ 42 */ 43 44 /** 45 * @brief UART wake up from stop mode parameters 46 */ 47 typedef struct 48 { 49 uint32_t WakeUpEvent; /*!< Specifies which event will activate the Wakeup from Stop mode flag (WUF). 50 This parameter can be a value of @ref UART_WakeUp_from_Stop_Selection. 51 If set to UART_WAKEUP_ON_ADDRESS, the two other fields below must 52 be filled up. */ 53 54 uint16_t AddressLength; /*!< Specifies whether the address is 4 or 7-bit long. 55 This parameter can be a value of @ref UARTEx_WakeUp_Address_Length. */ 56 57 uint8_t Address; /*!< UART/USART node address (7-bit long max). */ 58 } UART_WakeUpTypeDef; 59 60 /** 61 * @} 62 */ 63 64 /* Exported constants --------------------------------------------------------*/ 65 /** @defgroup UARTEx_Exported_Constants UARTEx Exported Constants 66 * @{ 67 */ 68 69 /** @defgroup UARTEx_Word_Length UARTEx Word Length 70 * @{ 71 */ 72 #define UART_WORDLENGTH_7B USART_CR1_M1 /*!< 7-bit long UART frame */ 73 #define UART_WORDLENGTH_8B 0x00000000U /*!< 8-bit long UART frame */ 74 #define UART_WORDLENGTH_9B USART_CR1_M0 /*!< 9-bit long UART frame */ 75 /** 76 * @} 77 */ 78 79 /** @defgroup UARTEx_WakeUp_Address_Length UARTEx WakeUp Address Length 80 * @{ 81 */ 82 #define UART_ADDRESS_DETECT_4B 0x00000000U /*!< 4-bit long wake-up address */ 83 #define UART_ADDRESS_DETECT_7B USART_CR2_ADDM7 /*!< 7-bit long wake-up address */ 84 /** 85 * @} 86 */ 87 88 /** @defgroup UARTEx_FIFO_mode UARTEx FIFO mode 89 * @brief UART FIFO mode 90 * @{ 91 */ 92 #define UART_FIFOMODE_DISABLE 0x00000000U /*!< FIFO mode disable */ 93 #define UART_FIFOMODE_ENABLE USART_CR1_FIFOEN /*!< FIFO mode enable */ 94 /** 95 * @} 96 */ 97 98 /** @defgroup UARTEx_TXFIFO_threshold_level UARTEx TXFIFO threshold level 99 * @brief UART TXFIFO threshold level 100 * @{ 101 */ 102 #define UART_TXFIFO_THRESHOLD_1_8 0x00000000U /*!< TXFIFO reaches 1/8 of its depth */ 103 #define UART_TXFIFO_THRESHOLD_1_4 USART_CR3_TXFTCFG_0 /*!< TXFIFO reaches 1/4 of its depth */ 104 #define UART_TXFIFO_THRESHOLD_1_2 USART_CR3_TXFTCFG_1 /*!< TXFIFO reaches 1/2 of its depth */ 105 #define UART_TXFIFO_THRESHOLD_3_4 (USART_CR3_TXFTCFG_0|USART_CR3_TXFTCFG_1) /*!< TXFIFO reaches 3/4 of its depth */ 106 #define UART_TXFIFO_THRESHOLD_7_8 USART_CR3_TXFTCFG_2 /*!< TXFIFO reaches 7/8 of its depth */ 107 #define UART_TXFIFO_THRESHOLD_8_8 (USART_CR3_TXFTCFG_2|USART_CR3_TXFTCFG_0) /*!< TXFIFO becomes empty */ 108 /** 109 * @} 110 */ 111 112 /** @defgroup UARTEx_RXFIFO_threshold_level UARTEx RXFIFO threshold level 113 * @brief UART RXFIFO threshold level 114 * @{ 115 */ 116 #define UART_RXFIFO_THRESHOLD_1_8 0x00000000U /*!< RXFIFO FIFO reaches 1/8 of its depth */ 117 #define UART_RXFIFO_THRESHOLD_1_4 USART_CR3_RXFTCFG_0 /*!< RXFIFO FIFO reaches 1/4 of its depth */ 118 #define UART_RXFIFO_THRESHOLD_1_2 USART_CR3_RXFTCFG_1 /*!< RXFIFO FIFO reaches 1/2 of its depth */ 119 #define UART_RXFIFO_THRESHOLD_3_4 (USART_CR3_RXFTCFG_0|USART_CR3_RXFTCFG_1) /*!< RXFIFO FIFO reaches 3/4 of its depth */ 120 #define UART_RXFIFO_THRESHOLD_7_8 USART_CR3_RXFTCFG_2 /*!< RXFIFO FIFO reaches 7/8 of its depth */ 121 #define UART_RXFIFO_THRESHOLD_8_8 (USART_CR3_RXFTCFG_2|USART_CR3_RXFTCFG_0) /*!< RXFIFO FIFO becomes full */ 122 /** 123 * @} 124 */ 125 126 /** 127 * @} 128 */ 129 130 /* Exported macros -----------------------------------------------------------*/ 131 /* Exported functions --------------------------------------------------------*/ 132 /** @addtogroup UARTEx_Exported_Functions 133 * @{ 134 */ 135 136 /** @addtogroup UARTEx_Exported_Functions_Group1 137 * @{ 138 */ 139 140 /* Initialization and de-initialization functions ****************************/ 141 HAL_StatusTypeDef HAL_RS485Ex_Init(UART_HandleTypeDef *huart, uint32_t Polarity, uint32_t AssertionTime, 142 uint32_t DeassertionTime); 143 144 /** 145 * @} 146 */ 147 148 /** @addtogroup UARTEx_Exported_Functions_Group2 149 * @{ 150 */ 151 152 void HAL_UARTEx_WakeupCallback(UART_HandleTypeDef *huart); 153 154 void HAL_UARTEx_RxFifoFullCallback(UART_HandleTypeDef *huart); 155 void HAL_UARTEx_TxFifoEmptyCallback(UART_HandleTypeDef *huart); 156 157 /** 158 * @} 159 */ 160 161 /** @addtogroup UARTEx_Exported_Functions_Group3 162 * @{ 163 */ 164 165 /* Peripheral Control functions **********************************************/ 166 HAL_StatusTypeDef HAL_UARTEx_StopModeWakeUpSourceConfig(UART_HandleTypeDef *huart, UART_WakeUpTypeDef WakeUpSelection); 167 HAL_StatusTypeDef HAL_UARTEx_EnableStopMode(UART_HandleTypeDef *huart); 168 HAL_StatusTypeDef HAL_UARTEx_DisableStopMode(UART_HandleTypeDef *huart); 169 170 HAL_StatusTypeDef HAL_MultiProcessorEx_AddressLength_Set(UART_HandleTypeDef *huart, uint32_t AddressLength); 171 172 HAL_StatusTypeDef HAL_UARTEx_EnableFifoMode(UART_HandleTypeDef *huart); 173 HAL_StatusTypeDef HAL_UARTEx_DisableFifoMode(UART_HandleTypeDef *huart); 174 HAL_StatusTypeDef HAL_UARTEx_SetTxFifoThreshold(UART_HandleTypeDef *huart, uint32_t Threshold); 175 HAL_StatusTypeDef HAL_UARTEx_SetRxFifoThreshold(UART_HandleTypeDef *huart, uint32_t Threshold); 176 177 /** 178 * @} 179 */ 180 181 /** 182 * @} 183 */ 184 185 /* Private macros ------------------------------------------------------------*/ 186 /** @defgroup UARTEx_Private_Macros UARTEx Private Macros 187 * @{ 188 */ 189 190 /** @brief Report the UART clock source. 191 * @param __HANDLE__ specifies the UART Handle. 192 * @param __CLOCKSOURCE__ output variable. 193 * @retval UART clocking source, written in __CLOCKSOURCE__. 194 */ 195 #define UART_GETCLOCKSOURCE(__HANDLE__,__CLOCKSOURCE__) \ 196 do { \ 197 if((__HANDLE__)->Instance == USART1) \ 198 { \ 199 switch(__HAL_RCC_GET_USART1_SOURCE()) \ 200 { \ 201 case RCC_USART1CLKSOURCE_PCLK5: \ 202 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_PCLK5; \ 203 break; \ 204 case RCC_USART1CLKSOURCE_PLL3: \ 205 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_PLL3Q; \ 206 break; \ 207 case RCC_USART1CLKSOURCE_HSI: \ 208 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_HSI; \ 209 break; \ 210 case RCC_USART1CLKSOURCE_CSI: \ 211 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_CSI; \ 212 break; \ 213 case RCC_USART1CLKSOURCE_PLL4: \ 214 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_PLL4Q; \ 215 break; \ 216 case RCC_USART1CLKSOURCE_HSE: \ 217 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_HSE; \ 218 break; \ 219 default: \ 220 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_UNDEFINED; \ 221 break; \ 222 } \ 223 } \ 224 else if((__HANDLE__)->Instance == USART2) \ 225 { \ 226 switch(__HAL_RCC_GET_UART24_SOURCE()) \ 227 { \ 228 case RCC_UART24CLKSOURCE_PCLK1: \ 229 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_PCLK1; \ 230 break; \ 231 case RCC_UART24CLKSOURCE_PLL4: \ 232 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_PLL4Q; \ 233 break; \ 234 case RCC_UART24CLKSOURCE_HSI: \ 235 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_HSI; \ 236 break; \ 237 case RCC_UART24CLKSOURCE_CSI: \ 238 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_CSI; \ 239 break; \ 240 case RCC_UART24CLKSOURCE_HSE: \ 241 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_HSE; \ 242 break; \ 243 default: \ 244 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_UNDEFINED; \ 245 break; \ 246 } \ 247 } \ 248 else if((__HANDLE__)->Instance == USART3) \ 249 { \ 250 switch(__HAL_RCC_GET_UART35_SOURCE()) \ 251 { \ 252 case RCC_UART35CLKSOURCE_PCLK1: \ 253 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_PCLK1; \ 254 break; \ 255 case RCC_UART35CLKSOURCE_PLL4: \ 256 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_PLL4Q; \ 257 break; \ 258 case RCC_UART35CLKSOURCE_HSI: \ 259 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_HSI; \ 260 break; \ 261 case RCC_UART35CLKSOURCE_CSI: \ 262 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_CSI; \ 263 break; \ 264 case RCC_UART35CLKSOURCE_HSE: \ 265 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_HSE; \ 266 break; \ 267 default: \ 268 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_UNDEFINED; \ 269 break; \ 270 } \ 271 } \ 272 else if((__HANDLE__)->Instance == UART4) \ 273 { \ 274 switch(__HAL_RCC_GET_UART24_SOURCE()) \ 275 { \ 276 case RCC_UART24CLKSOURCE_PCLK1: \ 277 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_PCLK1; \ 278 break; \ 279 case RCC_UART24CLKSOURCE_PLL4: \ 280 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_PLL4Q; \ 281 break; \ 282 case RCC_UART24CLKSOURCE_HSI: \ 283 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_HSI; \ 284 break; \ 285 case RCC_UART24CLKSOURCE_CSI: \ 286 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_CSI; \ 287 break; \ 288 case RCC_UART24CLKSOURCE_HSE: \ 289 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_HSE; \ 290 break; \ 291 default: \ 292 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_UNDEFINED; \ 293 break; \ 294 } \ 295 } \ 296 else if ((__HANDLE__)->Instance == UART5) \ 297 { \ 298 switch(__HAL_RCC_GET_UART35_SOURCE()) \ 299 { \ 300 case RCC_UART35CLKSOURCE_PCLK1: \ 301 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_PCLK1; \ 302 break; \ 303 case RCC_UART35CLKSOURCE_PLL4: \ 304 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_PLL4Q; \ 305 break; \ 306 case RCC_UART35CLKSOURCE_HSI: \ 307 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_HSI; \ 308 break; \ 309 case RCC_UART35CLKSOURCE_CSI: \ 310 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_CSI; \ 311 break; \ 312 case RCC_UART35CLKSOURCE_HSE: \ 313 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_HSE; \ 314 break; \ 315 default: \ 316 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_UNDEFINED; \ 317 break; \ 318 } \ 319 } \ 320 else if((__HANDLE__)->Instance == USART6) \ 321 { \ 322 switch(__HAL_RCC_GET_USART6_SOURCE()) \ 323 { \ 324 case RCC_USART6CLKSOURCE_PCLK2: \ 325 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_PCLK2; \ 326 break; \ 327 case RCC_USART6CLKSOURCE_PLL4: \ 328 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_PLL4Q; \ 329 break; \ 330 case RCC_USART6CLKSOURCE_HSI: \ 331 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_HSI; \ 332 break; \ 333 case RCC_USART6CLKSOURCE_CSI: \ 334 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_CSI; \ 335 break; \ 336 case RCC_USART6CLKSOURCE_HSE: \ 337 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_HSE; \ 338 break; \ 339 default: \ 340 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_UNDEFINED; \ 341 break; \ 342 } \ 343 } \ 344 else if((__HANDLE__)->Instance == UART7) \ 345 { \ 346 switch(__HAL_RCC_GET_UART78_SOURCE()) \ 347 { \ 348 case RCC_UART78CLKSOURCE_PCLK1: \ 349 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_PCLK1; \ 350 break; \ 351 case RCC_UART78CLKSOURCE_PLL4: \ 352 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_PLL4Q; \ 353 break; \ 354 case RCC_UART78CLKSOURCE_HSI: \ 355 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_HSI; \ 356 break; \ 357 case RCC_UART78CLKSOURCE_CSI: \ 358 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_CSI; \ 359 break; \ 360 case RCC_UART78CLKSOURCE_HSE: \ 361 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_HSE; \ 362 break; \ 363 default: \ 364 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_UNDEFINED; \ 365 break; \ 366 } \ 367 } \ 368 else if((__HANDLE__)->Instance == UART8) \ 369 { \ 370 switch(__HAL_RCC_GET_UART78_SOURCE()) \ 371 { \ 372 case RCC_UART78CLKSOURCE_PCLK1: \ 373 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_PCLK1; \ 374 break; \ 375 case RCC_UART78CLKSOURCE_PLL4: \ 376 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_PLL4Q; \ 377 break; \ 378 case RCC_UART78CLKSOURCE_HSI: \ 379 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_HSI; \ 380 break; \ 381 case RCC_UART78CLKSOURCE_CSI: \ 382 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_CSI; \ 383 break; \ 384 case RCC_UART78CLKSOURCE_HSE: \ 385 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_HSE; \ 386 break; \ 387 default: \ 388 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_UNDEFINED; \ 389 break; \ 390 } \ 391 } \ 392 else \ 393 { \ 394 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_UNDEFINED; \ 395 } \ 396 } while(0U) 397 398 /** @brief Report the UART mask to apply to retrieve the received data 399 * according to the word length and to the parity bits activation. 400 * @note If PCE = 1, the parity bit is not included in the data extracted 401 * by the reception API(). 402 * This masking operation is not carried out in the case of 403 * DMA transfers. 404 * @param __HANDLE__ specifies the UART Handle. 405 * @retval None, the mask to apply to UART RDR register is stored in (__HANDLE__)->Mask field. 406 */ 407 #define UART_MASK_COMPUTATION(__HANDLE__) \ 408 do { \ 409 if ((__HANDLE__)->Init.WordLength == UART_WORDLENGTH_9B) \ 410 { \ 411 if ((__HANDLE__)->Init.Parity == UART_PARITY_NONE) \ 412 { \ 413 (__HANDLE__)->Mask = 0x01FFU ; \ 414 } \ 415 else \ 416 { \ 417 (__HANDLE__)->Mask = 0x00FFU ; \ 418 } \ 419 } \ 420 else if ((__HANDLE__)->Init.WordLength == UART_WORDLENGTH_8B) \ 421 { \ 422 if ((__HANDLE__)->Init.Parity == UART_PARITY_NONE) \ 423 { \ 424 (__HANDLE__)->Mask = 0x00FFU ; \ 425 } \ 426 else \ 427 { \ 428 (__HANDLE__)->Mask = 0x007FU ; \ 429 } \ 430 } \ 431 else if ((__HANDLE__)->Init.WordLength == UART_WORDLENGTH_7B) \ 432 { \ 433 if ((__HANDLE__)->Init.Parity == UART_PARITY_NONE) \ 434 { \ 435 (__HANDLE__)->Mask = 0x007FU ; \ 436 } \ 437 else \ 438 { \ 439 (__HANDLE__)->Mask = 0x003FU ; \ 440 } \ 441 } \ 442 else \ 443 { \ 444 (__HANDLE__)->Mask = 0x0000U; \ 445 } \ 446 } while(0U) 447 448 /** 449 * @brief Ensure that UART frame length is valid. 450 * @param __LENGTH__ UART frame length. 451 * @retval SET (__LENGTH__ is valid) or RESET (__LENGTH__ is invalid) 452 */ 453 #define IS_UART_WORD_LENGTH(__LENGTH__) (((__LENGTH__) == UART_WORDLENGTH_7B) || \ 454 ((__LENGTH__) == UART_WORDLENGTH_8B) || \ 455 ((__LENGTH__) == UART_WORDLENGTH_9B)) 456 457 /** 458 * @brief Ensure that UART wake-up address length is valid. 459 * @param __ADDRESS__ UART wake-up address length. 460 * @retval SET (__ADDRESS__ is valid) or RESET (__ADDRESS__ is invalid) 461 */ 462 #define IS_UART_ADDRESSLENGTH_DETECT(__ADDRESS__) (((__ADDRESS__) == UART_ADDRESS_DETECT_4B) || \ 463 ((__ADDRESS__) == UART_ADDRESS_DETECT_7B)) 464 465 /** 466 * @brief Ensure that UART TXFIFO threshold level is valid. 467 * @param __THRESHOLD__ UART TXFIFO threshold level. 468 * @retval SET (__THRESHOLD__ is valid) or RESET (__THRESHOLD__ is invalid) 469 */ 470 #define IS_UART_TXFIFO_THRESHOLD(__THRESHOLD__) (((__THRESHOLD__) == UART_TXFIFO_THRESHOLD_1_8) || \ 471 ((__THRESHOLD__) == UART_TXFIFO_THRESHOLD_1_4) || \ 472 ((__THRESHOLD__) == UART_TXFIFO_THRESHOLD_1_2) || \ 473 ((__THRESHOLD__) == UART_TXFIFO_THRESHOLD_3_4) || \ 474 ((__THRESHOLD__) == UART_TXFIFO_THRESHOLD_7_8) || \ 475 ((__THRESHOLD__) == UART_TXFIFO_THRESHOLD_8_8)) 476 477 /** 478 * @brief Ensure that UART RXFIFO threshold level is valid. 479 * @param __THRESHOLD__ UART RXFIFO threshold level. 480 * @retval SET (__THRESHOLD__ is valid) or RESET (__THRESHOLD__ is invalid) 481 */ 482 #define IS_UART_RXFIFO_THRESHOLD(__THRESHOLD__) (((__THRESHOLD__) == UART_RXFIFO_THRESHOLD_1_8) || \ 483 ((__THRESHOLD__) == UART_RXFIFO_THRESHOLD_1_4) || \ 484 ((__THRESHOLD__) == UART_RXFIFO_THRESHOLD_1_2) || \ 485 ((__THRESHOLD__) == UART_RXFIFO_THRESHOLD_3_4) || \ 486 ((__THRESHOLD__) == UART_RXFIFO_THRESHOLD_7_8) || \ 487 ((__THRESHOLD__) == UART_RXFIFO_THRESHOLD_8_8)) 488 489 /** 490 * @} 491 */ 492 493 /* Private functions ---------------------------------------------------------*/ 494 495 /** 496 * @} 497 */ 498 499 /** 500 * @} 501 */ 502 503 #ifdef __cplusplus 504 } 505 #endif 506 507 #endif /* STM32MP1xx_HAL_UART_EX_H */ 508 509 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ 510