1 // Copyright (C) 2022 Beken Corporation
2 //
3 // Licensed under the Apache License, Version 2.0 (the "License");
4 // you may not use this file except in compliance with the License.
5 // You may obtain a copy of the License at
6 //
7 // http://www.apache.org/licenses/LICENSE-2.0
8 //
9 // Unless required by applicable law or agreed to in writing, software
10 // distributed under the License is distributed on an "AS IS" BASIS,
11 // WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
12 // See the License for the specific language governing permissions and
13 // limitations under the License.
14
15 #include "sys_hal.h"
16 #include "sys_driver.h"
17 #include "sys_driver_common.h"
18
19 #define SYS_DRV_DELAY_TIME_10US 120
20 #define SYS_DRV_DELAY_TIME_200US 3400
21
22 /** WIFI Start **/
23 //WIFI
24
sys_drv_delay10us(void)25 void sys_drv_delay10us(void)
26 {
27 volatile UINT32 i = 0;
28
29 for (i = 0; i < SYS_DRV_DELAY_TIME_10US; i ++)
30 ;
31 }
32
sys_drv_delay200us(void)33 void sys_drv_delay200us(void)
34 {
35 volatile UINT32 i = 0;
36
37 for (i = 0; i < SYS_DRV_DELAY_TIME_200US; i ++)
38 ;
39 }
40
sys_drv_ps_dpll_delay(UINT32 time)41 void sys_drv_ps_dpll_delay(UINT32 time)
42 {
43 volatile UINT32 i = 0;
44
45 for (i = 0; i < time; i ++)
46 ;
47 }
48
sys_drv_cali_dpll(uint32_t param)49 uint32_t sys_drv_cali_dpll(uint32_t param)
50 {
51 uint32_t int_level = rtos_disable_int();
52
53
54 sys_hal_cali_dpll_spi_trig_disable();
55
56 if (!param)
57 {
58 sys_drv_delay10us();
59 }
60 else
61 {
62 sys_drv_ps_dpll_delay(60);
63 }
64
65 sys_hal_cali_dpll_spi_trig_enable();
66 sys_hal_cali_dpll_spi_detect_disable();
67
68 if (!param)
69 {
70 sys_drv_delay200us();
71 }
72 else
73 {
74 sys_drv_ps_dpll_delay(340);
75 }
76
77 sys_hal_cali_dpll_spi_detect_enable();
78
79 rtos_enable_int(int_level);
80
81 return SYS_DRV_SUCCESS;
82 }
83
sys_drv_bias_reg_set(uint32_t param)84 uint32_t sys_drv_bias_reg_set(uint32_t param)
85 {
86 uint32_t int_level = rtos_disable_int();
87
88 sys_hal_bias_reg_set(param);
89 rtos_enable_int(int_level);
90 return SYS_DRV_SUCCESS;
91 }
92
sys_drv_bias_reg_clean(uint32_t param)93 uint32_t sys_drv_bias_reg_clean(uint32_t param)
94 {
95 uint32_t int_level = rtos_disable_int();
96
97 sys_hal_bias_reg_clean(param);
98 rtos_enable_int(int_level);
99 return SYS_DRV_SUCCESS;
100 }
101
sys_drv_bias_reg_read(void)102 uint32_t sys_drv_bias_reg_read(void)
103 {
104 uint32 ret;
105 uint32_t int_level = rtos_disable_int();
106
107 ret = sys_hal_bias_reg_read();
108 rtos_enable_int(int_level);
109 return ret;
110 }
111
sys_drv_bias_reg_write(uint32_t param)112 uint32_t sys_drv_bias_reg_write(uint32_t param)
113 {
114 uint32_t int_level = rtos_disable_int();
115
116 sys_hal_bias_reg_write(param);
117 rtos_enable_int(int_level);
118 return SYS_DRV_SUCCESS;
119 }
120
121 #if 0
122 uint32_t sys_drv_bias_get_cali_out(void)
123 {
124 //can't find PMU reg addr and bit filed definition
125 //only used in BK7271
126 return SYS_DRV_SUCCESS;
127 }
128 #endif
129
sys_drv_analog_reg4_bits_or(uint32_t param)130 uint32_t sys_drv_analog_reg4_bits_or(uint32_t param)
131 {
132 uint32_t int_level = rtos_disable_int();
133
134 rtos_enable_int(int_level);
135 //analog reg write only?
136 return SYS_DRV_SUCCESS;
137 }
138
sys_drv_analog_ctrl9_real_set(uint32_t param)139 uint32_t sys_drv_analog_ctrl9_real_set(uint32_t param)
140 {
141 uint32_t int_level = rtos_disable_int();
142
143 rtos_enable_int(int_level);
144 //analog reg write only?
145 return SYS_DRV_SUCCESS;
146 }
147
148
sys_drv_analog_set_xtalh_ctune(uint32_t param)149 uint32_t sys_drv_analog_set_xtalh_ctune(uint32_t param)
150 {
151 uint32_t int_level = rtos_disable_int();
152
153 sys_hal_set_xtalh_ctune(param);
154 rtos_enable_int(int_level);
155 return SYS_DRV_SUCCESS;
156 }
157
sys_drv_analog_get_xtalh_ctune(void)158 uint32_t sys_drv_analog_get_xtalh_ctune(void)
159 {
160 uint32_t int_level = rtos_disable_int();
161 uint32 reg_value;
162 reg_value = sys_hal_get_xtalh_ctune();
163 rtos_enable_int(int_level);
164 return reg_value;
165 }
sys_drv_analog_set(analog_reg_t reg,uint32_t value)166 void sys_drv_analog_set(analog_reg_t reg, uint32_t value)
167 {
168 sys_hal_analog_set(reg,value);
169 }
sys_drv_analog_get(analog_reg_t reg)170 uint32_t sys_drv_analog_get(analog_reg_t reg)
171 {
172 return sys_hal_analog_get(reg);
173 }
sys_drv_analog_reg1_set(uint32_t param)174 uint32_t sys_drv_analog_reg1_set(uint32_t param)
175 {
176 uint32_t int_level = rtos_disable_int();
177
178 sys_hal_set_ana_reg1_value(param);
179 rtos_enable_int(int_level);
180 return SYS_DRV_SUCCESS;
181 }
182
sys_drv_analog_reg2_set(uint32_t param)183 uint32_t sys_drv_analog_reg2_set(uint32_t param)
184 {
185 uint32_t int_level = rtos_disable_int();
186
187 sys_hal_set_ana_reg2_value(param);
188 rtos_enable_int(int_level);
189 return SYS_DRV_SUCCESS;
190 }
191
sys_drv_analog_reg3_set(uint32_t param)192 uint32_t sys_drv_analog_reg3_set(uint32_t param)
193 {
194 uint32_t int_level = rtos_disable_int();
195
196 sys_hal_set_ana_reg3_value(param);
197 rtos_enable_int(int_level);
198 return SYS_DRV_SUCCESS;
199 }
200
sys_drv_analog_reg4_set(uint32_t param)201 uint32_t sys_drv_analog_reg4_set(uint32_t param)
202 {
203 uint32_t int_level = rtos_disable_int();
204
205 sys_hal_set_ana_reg4_value(param);
206 rtos_enable_int(int_level);
207 return SYS_DRV_SUCCESS;
208 }
209
sys_drv_analog_reg12_set(uint32_t param)210 uint32_t sys_drv_analog_reg12_set(uint32_t param)
211 {
212 uint32_t int_level = rtos_disable_int();
213
214 sys_hal_set_ana_reg12_value(param);
215 rtos_enable_int(int_level);
216 return SYS_DRV_SUCCESS;
217 }
218
sys_drv_analog_reg13_set(uint32_t param)219 uint32_t sys_drv_analog_reg13_set(uint32_t param)
220 {
221 uint32_t int_level = rtos_disable_int();
222
223 sys_hal_set_ana_reg13_value(param);
224 rtos_enable_int(int_level);
225 return SYS_DRV_SUCCESS;
226 }
227
sys_drv_analog_reg14_set(uint32_t param)228 uint32_t sys_drv_analog_reg14_set(uint32_t param)
229 {
230 uint32_t int_level = rtos_disable_int();
231
232 sys_hal_set_ana_reg14_value(param);
233 rtos_enable_int(int_level);
234 return SYS_DRV_SUCCESS;
235 }
236
sys_drv_analog_reg15_set(uint32_t param)237 uint32_t sys_drv_analog_reg15_set(uint32_t param)
238 {
239 uint32_t int_level = rtos_disable_int();
240
241 sys_hal_set_ana_reg15_value(param);
242 rtos_enable_int(int_level);
243 return SYS_DRV_SUCCESS;
244 }
245
sys_drv_analog_reg16_set(uint32_t param)246 uint32_t sys_drv_analog_reg16_set(uint32_t param)
247 {
248 uint32_t int_level = rtos_disable_int();
249
250 sys_hal_set_ana_reg16_value(param);
251 rtos_enable_int(int_level);
252 return SYS_DRV_SUCCESS;
253 }
254
sys_drv_analog_reg17_set(uint32_t param)255 uint32_t sys_drv_analog_reg17_set(uint32_t param)
256 {
257 uint32_t int_level = rtos_disable_int();
258
259 sys_hal_set_ana_reg17_value(param);
260 rtos_enable_int(int_level);
261 return SYS_DRV_SUCCESS;
262 }
263
sys_drv_analog_reg6_set(uint32_t param)264 uint32_t sys_drv_analog_reg6_set(uint32_t param)
265 {
266 //analog reg write only?
267 uint32_t int_level = rtos_disable_int();
268
269 sys_hal_set_ana_reg6_value(param);
270 rtos_enable_int(int_level);
271 return SYS_DRV_SUCCESS;
272 }
273
sys_drv_analog_reg7_set(uint32_t param)274 uint32_t sys_drv_analog_reg7_set(uint32_t param)
275 {
276 uint32_t int_level = rtos_disable_int();
277
278 sys_hal_set_ana_reg7_value(param);
279 rtos_enable_int(int_level);
280 return SYS_DRV_SUCCESS;
281 }
282
sys_drv_analog_reg1_get(void)283 uint32_t sys_drv_analog_reg1_get(void)
284 {
285 uint32 ret;
286 uint32_t int_level = rtos_disable_int();
287
288 ret = sys_hal_analog_reg1_get();
289 rtos_enable_int(int_level);
290 return ret;
291 }
sys_drv_analog_reg2_get(void)292 uint32_t sys_drv_analog_reg2_get(void)
293 {
294 uint32 ret;
295 uint32_t int_level = rtos_disable_int();
296
297 ret = sys_hal_analog_reg2_get();
298 rtos_enable_int(int_level);
299 return ret;
300 }
sys_drv_analog_reg4_get(void)301 uint32_t sys_drv_analog_reg4_get(void)
302 {
303 uint32 ret;
304 uint32_t int_level = rtos_disable_int();
305
306 ret = sys_hal_analog_reg4_get();
307 rtos_enable_int(int_level);
308 return ret;
309 }
310
311
sys_drv_analog_reg6_get(void)312 uint32_t sys_drv_analog_reg6_get(void)
313 {
314 uint32 ret;
315 uint32_t int_level = rtos_disable_int();
316
317 ret = sys_hal_analog_reg6_get();
318 rtos_enable_int(int_level);
319 return ret;
320 }
321
322
sys_drv_analog_reg7_get(void)323 uint32_t sys_drv_analog_reg7_get(void)
324 {
325 uint32 ret;
326 uint32_t int_level = rtos_disable_int();
327
328 ret = sys_hal_analog_reg7_get();
329 rtos_enable_int(int_level);
330 return ret;
331 }
332
sys_drv_get_bgcalm(void)333 uint32_t sys_drv_get_bgcalm(void)
334 {
335 uint32_t ret;
336 uint32_t int_level = rtos_disable_int();
337
338 ret = sys_hal_get_bgcalm();
339 rtos_enable_int(int_level);
340 return ret;
341 }
342
sys_drv_set_bgcalm(uint32_t param)343 uint32_t sys_drv_set_bgcalm(uint32_t param)
344 {
345 uint32_t int_level = rtos_disable_int();
346
347 sys_hal_set_bgcalm(param);
348 rtos_enable_int(int_level);
349 return SYS_DRV_SUCCESS;
350 }
351
sys_drv_set_dpll_for_i2s(void)352 uint32_t sys_drv_set_dpll_for_i2s(void)
353 {
354 uint32_t int_level = rtos_disable_int();
355
356 sys_hal_set_audioen(1);
357 sys_hal_set_dpll_div_cksel(1);
358 sys_hal_set_dpll_reset(1);
359 rtos_enable_int(int_level);
360 return SYS_DRV_SUCCESS;
361 }
362
sys_drv_set_gadc_ten(uint32_t param)363 uint32_t sys_drv_set_gadc_ten(uint32_t param)
364 {
365 uint32_t int_level = rtos_disable_int();
366
367 sys_hal_set_gadc_ten(param);
368 rtos_enable_int(int_level);
369 return SYS_DRV_SUCCESS;
370 }
371
372
373 //Yantao Add Start
374
375 //Unused
376 //CMD_SCTRL_RESET_SET, CMD_SCTRL_RESET_CLR
sys_drv_reset_ctrl(uint32_t value)377 uint32_t sys_drv_reset_ctrl(uint32_t value)
378 {
379 return SYS_DRV_SUCCESS;
380 }
381
382 //CMD_SCTRL_MODEM_CORE_RESET
sys_drv_modem_core_reset(void)383 uint32_t sys_drv_modem_core_reset(void)
384 {
385 uint32_t int_level = rtos_disable_int();
386
387 sys_hal_modem_core_reset();
388
389 rtos_enable_int(int_level);
390 return SYS_DRV_SUCCESS;
391 }
392
393 //CMD_SCTRL_MPIF_CLK_INVERT
sys_drv_mpif_invert(void)394 uint32_t sys_drv_mpif_invert(void)
395 {
396 uint32_t int_level = rtos_disable_int();
397
398 sys_hal_mpif_invert();
399
400 rtos_enable_int(int_level);
401 return SYS_DRV_SUCCESS;
402 }
403
404 //CMD_SCTRL_MODEM_SUBCHIP_RESET
sys_drv_modem_subsys_reset(void)405 uint32_t sys_drv_modem_subsys_reset(void)
406 {
407 uint32_t int_level = rtos_disable_int();
408
409 sys_hal_modem_subsys_reset();
410
411 rtos_enable_int(int_level);
412 return SYS_DRV_SUCCESS;
413 }
414 //CMD_SCTRL_MAC_SUBSYS_RESET
sys_drv_mac_subsys_reset(void)415 uint32_t sys_drv_mac_subsys_reset(void)
416 {
417 uint32_t int_level = rtos_disable_int();
418
419 sys_hal_mac_subsys_reset();
420
421 rtos_enable_int(int_level);
422 return SYS_DRV_SUCCESS;
423 }
424 //CMD_SCTRL_USB_SUBSYS_RESET
sys_drv_usb_subsys_reset(void)425 uint32_t sys_drv_usb_subsys_reset(void)
426 {
427 uint32_t int_level = rtos_disable_int();
428
429 sys_hal_usb_subsys_reset();
430
431 rtos_enable_int(int_level);
432 return SYS_DRV_SUCCESS;
433 }
434 //CMD_SCTRL_DSP_SUBSYS_RESET
sys_drv_dsp_subsys_reset(void)435 uint32_t sys_drv_dsp_subsys_reset(void)
436 {
437 uint32_t int_level = rtos_disable_int();
438
439 sys_hal_dsp_subsys_reset();
440
441 rtos_enable_int(int_level);
442 return SYS_DRV_SUCCESS;
443 }
444
445 //CMD_SCTRL_MAC_POWERDOWN, CMD_SCTRL_MAC_POWERUP
sys_drv_mac_power_ctrl(bool power_up)446 uint32_t sys_drv_mac_power_ctrl(bool power_up)
447 {
448 uint32_t int_level = rtos_disable_int();
449 uint32_t ret = SYS_DRV_FAILURE;
450 ret = sys_amp_res_acquire();
451
452 sys_hal_mac_power_ctrl(power_up);
453
454 if(!ret)
455 ret = sys_amp_res_release();
456
457 rtos_enable_int(int_level);
458 return ret;
459 }
460
461 //CMD_SCTRL_MODEM_POWERDOWN, CMD_SCTRL_MODEM_POWERUP
sys_drv_modem_power_ctrl(bool power_up)462 uint32_t sys_drv_modem_power_ctrl(bool power_up)
463 {
464 uint32_t int_level = rtos_disable_int();
465 uint32_t ret = SYS_DRV_FAILURE;
466 ret = sys_amp_res_acquire();
467
468 sys_hal_modem_clk_ctrl(power_up);
469
470 if(!ret)
471 ret = sys_amp_res_release();
472
473 rtos_enable_int(int_level);
474 return ret;
475 }
476
477 //CMD_BLE_RF_PTA_EN, CMD_BLE_RF_PTA_DIS
sys_drv_pta_ctrl(bool pta_en)478 uint32_t sys_drv_pta_ctrl(bool pta_en)
479 {
480 #if (CONFIG_SOC_BK7231N) || (CONFIG_SOC_BK7236A) || (CONFIG_SOC_BK7256XX)
481 uint32_t int_level = rtos_disable_int();
482
483 sys_hal_pta_ctrl(pta_en);
484
485 rtos_enable_int(int_level);
486 #endif
487 return SYS_DRV_SUCCESS;
488 }
489
490 //CMD_SCTRL_MODEM_AHB_CLOCK_DISABLE, CMD_SCTRL_MODEM_AHB_CLOCK_ENABLE
sys_drv_modem_bus_clk_ctrl(bool clk_en)491 uint32_t sys_drv_modem_bus_clk_ctrl(bool clk_en)
492 {
493 uint32_t int_level = rtos_disable_int();
494
495 sys_hal_modem_bus_clk_ctrl(clk_en);
496
497 rtos_enable_int(int_level);
498 return SYS_DRV_SUCCESS;
499 }
500 //CMD_SCTRL_MODEM_CLOCK480M_DISABLE, CMD_SCTRL_MODEM_CLOCK480M_ENABLE
sys_drv_modem_clk_ctrl(bool clk_en)501 uint32_t sys_drv_modem_clk_ctrl(bool clk_en)
502 {
503 uint32_t int_level = rtos_disable_int();
504
505 sys_hal_modem_clk_ctrl(clk_en);
506
507 rtos_enable_int(int_level);
508 return SYS_DRV_SUCCESS;
509 }
510
511 //CMD_SCTRL_MAC_AHB_CLOCK_DISABLE, CMD_SCTRL_MAC_AHB_CLOCK_ENABLE
sys_drv_mac_bus_clk_ctrl(bool clk_en)512 uint32_t sys_drv_mac_bus_clk_ctrl(bool clk_en)
513 {
514 uint32_t int_level = rtos_disable_int();
515
516 sys_hal_mac_bus_clk_ctrl(clk_en);
517
518 rtos_enable_int(int_level);
519 return SYS_DRV_SUCCESS;
520 }
521 //CMD_SCTRL_MAC_CLOCK480M_DISABLE,CMD_SCTRL_MAC_CLOCK480M_ENABLE
sys_drv_mac_clk_ctrl(bool clk_en)522 uint32_t sys_drv_mac_clk_ctrl(bool clk_en)
523 {
524 uint32_t int_level = rtos_disable_int();
525 uint32_t ret = SYS_DRV_FAILURE;
526 ret = sys_amp_res_acquire();
527
528 sys_hal_mac_clk_ctrl(clk_en);
529
530 if(!ret)
531 ret = sys_amp_res_release();
532
533 rtos_enable_int(int_level);
534 return ret;
535 }
536
537 //CMD_SCTRL_SET_VDD_VALUE
sys_drv_set_vdd_value(uint32_t param)538 uint32_t sys_drv_set_vdd_value(uint32_t param)
539 {
540 uint32_t int_level = rtos_disable_int();
541
542 sys_hal_set_vdd_value(param);
543
544 rtos_enable_int(int_level);
545 return SYS_DRV_SUCCESS;
546 }
547 //CMD_SCTRL_GET_VDD_VALUE
sys_drv_get_vdd_value(void)548 uint32_t sys_drv_get_vdd_value(void)
549 {
550 uint32 ret;
551
552 uint32_t int_level = rtos_disable_int();
553
554 ret = sys_hal_get_vdd_value();
555
556 rtos_enable_int(int_level);
557 return ret;
558 }
559
560 //CMD_SCTRL_BLOCK_EN_MUX_SET
sys_drv_block_en_mux_set(uint32_t param)561 uint32_t sys_drv_block_en_mux_set(uint32_t param)
562 {
563 uint32_t int_level = rtos_disable_int();
564
565 sys_hal_block_en_mux_set(param);
566
567 rtos_enable_int(int_level);
568 return SYS_DRV_SUCCESS;
569 }
sys_drv_enable_mac_gen_int(void)570 uint32_t sys_drv_enable_mac_gen_int(void)
571 {
572 uint32_t int_level = rtos_disable_int();
573
574 sys_hal_enable_mac_gen_int();
575
576 rtos_enable_int(int_level);
577 return SYS_DRV_SUCCESS;
578 }
sys_drv_enable_mac_prot_int(void)579 uint32_t sys_drv_enable_mac_prot_int(void)
580 {
581 uint32_t int_level = rtos_disable_int();
582
583
584 sys_hal_enable_mac_prot_int();
585
586 rtos_enable_int(int_level);
587 return SYS_DRV_SUCCESS;
588 }
sys_drv_enable_mac_tx_trigger_int(void)589 uint32_t sys_drv_enable_mac_tx_trigger_int(void)
590 {
591 uint32_t int_level = rtos_disable_int();
592
593 sys_hal_enable_mac_tx_trigger_int();
594
595 rtos_enable_int(int_level);
596 return SYS_DRV_SUCCESS;
597 }
sys_drv_enable_mac_rx_trigger_int(void)598 uint32_t sys_drv_enable_mac_rx_trigger_int(void)
599 {
600 uint32_t int_level = rtos_disable_int();
601
602 sys_hal_enable_mac_rx_trigger_int();
603
604 rtos_enable_int(int_level);
605 return SYS_DRV_SUCCESS;
606 }
sys_drv_enable_mac_txrx_misc_int(void)607 uint32_t sys_drv_enable_mac_txrx_misc_int(void)
608 {
609 uint32_t int_level = rtos_disable_int();
610
611 sys_hal_enable_mac_txrx_misc_int();
612
613 rtos_enable_int(int_level);
614 return SYS_DRV_SUCCESS;
615 }
sys_drv_enable_mac_txrx_timer_int(void)616 uint32_t sys_drv_enable_mac_txrx_timer_int(void)
617 {
618 uint32_t int_level = rtos_disable_int();
619
620 sys_hal_enable_mac_txrx_timer_int();
621
622 rtos_enable_int(int_level);
623 return SYS_DRV_SUCCESS;
624 }
625
sys_drv_enable_modem_int(void)626 uint32_t sys_drv_enable_modem_int(void)
627 {
628 uint32_t int_level = rtos_disable_int();
629
630 sys_hal_enable_modem_int();
631
632 rtos_enable_int(int_level);
633 return SYS_DRV_SUCCESS;
634 }
sys_drv_enable_modem_rc_int(void)635 uint32_t sys_drv_enable_modem_rc_int(void)
636 {
637 uint32_t int_level = rtos_disable_int();
638
639 sys_hal_enable_modem_rc_int();
640
641 rtos_enable_int(int_level);
642 return SYS_DRV_SUCCESS;
643 }
644
645
646 //Yantao Add End
647 /** WIFI End **/
648
649