1 /* 2 * Copyright (c) 2021 Bestechnic (Shanghai) Co., Ltd. All rights reserved. 3 * Licensed under the Apache License, Version 2.0 (the "License"); 4 * you may not use this file except in compliance with the License. 5 * You may obtain a copy of the License at 6 * 7 * http://www.apache.org/licenses/LICENSE-2.0 8 * 9 * Unless required by applicable law or agreed to in writing, software 10 * distributed under the License is distributed on an "AS IS" BASIS, 11 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 12 * See the License for the specific language governing permissions and 13 * limitations under the License. 14 */ 15 #ifndef __REG_BTCMU_BEST2003_H__ 16 #define __REG_BTCMU_BEST2003_H__ 17 18 #include "plat_types.h" 19 20 struct BTCMU_T { 21 __IO uint32_t CLK_ENABLE; // 0x00 22 __IO uint32_t CLK_DISABLE; // 0x04 23 __IO uint32_t CLK_MODE; // 0x08 24 __IO uint32_t DIV_TIMER; // 0x0C 25 __IO uint32_t RESET_SET; // 0x10 26 __IO uint32_t RESET_CLR; // 0x14 27 __IO uint32_t DIV_WDT; // 0x18 28 __IO uint32_t RESET_PULSE; // 0x1C 29 uint32_t RESERVED_020[0x24 / 4]; // 0x20 30 __IO uint32_t CLK_OUT; // 0x44 31 uint32_t RESERVED_048[2]; // 0x48 32 __IO uint32_t ISIRQ_SET; // 0x50 33 __IO uint32_t ISIRQ_CLR; // 0x54 34 }; 35 36 // reg_44 37 #define BT_CMU_CAL_TIME(n) (((n) & 0xFF) << 0) 38 #define BT_CMU_CAL_TIME_MASK (0xFF << 0) 39 #define BT_CMU_CAL_TIME_SHIFT (0) 40 #define BT_CMU_SMP_CMU_SEL(n) (((n) & 0xF) << 8) 41 #define BT_CMU_SMP_CMU_SEL_MASK (0xF << 8) 42 #define BT_CMU_SMP_CMU_SEL_SHIFT (8) 43 #define BT_CMU_CFG_CLK_OUT(n) (((n) & 0xF) << 12) 44 #define BT_CMU_CFG_CLK_OUT_MASK (0xF << 12) 45 #define BT_CMU_CFG_CLK_OUT_SHIFT (12) 46 #define BT_CMU_PWR_DELAY(n) (((n) & 0x7F) << 16) 47 #define BT_CMU_PWR_DELAY_MASK (0x7F << 16) 48 #define BT_CMU_PWR_DELAY_SHIFT (16) 49 #define BT_CMU_ROM_PGEN(n) (((n) & 0xF) << 23) 50 #define BT_CMU_ROM_PGEN_MASK (0xF << 23) 51 #define BT_CMU_ROM_PGEN_SHIFT (23) 52 #define BT_CMU_RAM_EMAS (1 << 27) 53 #define BT_CMU_RF_EMAS (1 << 28) 54 55 #endif 56 57