Searched defs:EncodeSelect (Results 1 – 4 of 4) sorted by relevance
| /arkcompiler/runtime_core/static_core/compiler/optimizer/code_generator/ |
| D | encode.h | 347 …virtual void EncodeSelect([[maybe_unused]] Reg dst, [[maybe_unused]] Reg src0, [[maybe_unused]] Re… in EncodeSelect() function 440 …virtual void EncodeSelect([[maybe_unused]] Reg dst, [[maybe_unused]] Reg src0, [[maybe_unused]] Re… in EncodeSelect() function
|
| /arkcompiler/runtime_core/static_core/compiler/optimizer/code_generator/target/amd64/ |
| D | encode.cpp | 1821 void Amd64Encoder::EncodeSelect(Reg dst, Reg src0, Reg src1, Reg src2, Reg src3, Condition cc) in EncodeSelect() function in panda::compiler::amd64::Amd64Encoder 1857 void Amd64Encoder::EncodeSelect(Reg dst, Reg src0, Reg src1, Reg src2, Imm imm, Condition cc) in EncodeSelect() function in panda::compiler::amd64::Amd64Encoder
|
| /arkcompiler/runtime_core/static_core/compiler/optimizer/code_generator/target/aarch32/ |
| D | encode.cpp | 2663 void Aarch32Encoder::EncodeSelect(Reg dst, Reg src0, Reg src1, Reg src2, Reg src3, Condition cc) in EncodeSelect() function in panda::compiler::aarch32::Aarch32Encoder 2678 void Aarch32Encoder::EncodeSelect(Reg dst, Reg src0, Reg src1, Reg src2, Imm imm, Condition cc) in EncodeSelect() function in panda::compiler::aarch32::Aarch32Encoder
|
| /arkcompiler/runtime_core/static_core/compiler/optimizer/code_generator/target/aarch64/ |
| D | encode.cpp | 2209 void Aarch64Encoder::EncodeSelect(Reg dst, Reg src0, Reg src1, Reg src2, Reg src3, Condition cc) in EncodeSelect() function in panda::compiler::aarch64::Aarch64Encoder 2223 void Aarch64Encoder::EncodeSelect(Reg dst, Reg src0, Reg src1, Reg src2, Imm imm, Condition cc) in EncodeSelect() function in panda::compiler::aarch64::Aarch64Encoder
|