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1 /*
2  * Copyright (c) 2021-2023 HPMicro
3  *
4  * SPDX-License-Identifier: BSD-3-Clause
5  *
6  */
7 
8 
9 #ifndef HPM_IOMUX_H
10 #define HPM_IOMUX_H
11 
12 /* IOC_PA00_FUNC_CTL function mux definitions */
13 #define IOC_PA00_FUNC_CTL_GPIO_A_00            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(0)
14 #define IOC_PA00_FUNC_CTL_UART1_TXD            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(2)
15 #define IOC_PA00_FUNC_CTL_SPI3_CSN             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(5)
16 #define IOC_PA00_FUNC_CTL_XPI0_CA_CS0          IOC_PAD_FUNC_CTL_ALT_SELECT_SET(14)
17 #define IOC_PA00_FUNC_CTL_SDC0_DATA_1          IOC_PAD_FUNC_CTL_ALT_SELECT_SET(17)
18 
19 /* IOC_PA01_FUNC_CTL function mux definitions */
20 #define IOC_PA01_FUNC_CTL_GPIO_A_01            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(0)
21 #define IOC_PA01_FUNC_CTL_UART1_RXD            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(2)
22 #define IOC_PA01_FUNC_CTL_SPI3_MISO            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(5)
23 #define IOC_PA01_FUNC_CTL_XPI0_CA_D_1          IOC_PAD_FUNC_CTL_ALT_SELECT_SET(14)
24 #define IOC_PA01_FUNC_CTL_SDC0_DATA_0          IOC_PAD_FUNC_CTL_ALT_SELECT_SET(17)
25 
26 /* IOC_PA02_FUNC_CTL function mux definitions */
27 #define IOC_PA02_FUNC_CTL_GPIO_A_02            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(0)
28 #define IOC_PA02_FUNC_CTL_UART2_TXD            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(2)
29 #define IOC_PA02_FUNC_CTL_SPI3_SCLK            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(5)
30 #define IOC_PA02_FUNC_CTL_XPI0_CA_D_2          IOC_PAD_FUNC_CTL_ALT_SELECT_SET(14)
31 #define IOC_PA02_FUNC_CTL_SDC0_CLK             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(17)
32 
33 /* IOC_PA03_FUNC_CTL function mux definitions */
34 #define IOC_PA03_FUNC_CTL_GPIO_A_03            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(0)
35 #define IOC_PA03_FUNC_CTL_UART2_RXD            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(2)
36 #define IOC_PA03_FUNC_CTL_SPI3_MOSI            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(5)
37 #define IOC_PA03_FUNC_CTL_XPI0_CA_D_0          IOC_PAD_FUNC_CTL_ALT_SELECT_SET(14)
38 #define IOC_PA03_FUNC_CTL_SDC0_CMD             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(17)
39 
40 /* IOC_PA04_FUNC_CTL function mux definitions */
41 #define IOC_PA04_FUNC_CTL_GPIO_A_04            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(0)
42 #define IOC_PA04_FUNC_CTL_UART3_TXD            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(2)
43 #define IOC_PA04_FUNC_CTL_SPI3_DAT3            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(5)
44 #define IOC_PA04_FUNC_CTL_XPI0_CA_SCLK         IOC_PAD_FUNC_CTL_ALT_SELECT_SET(14)
45 #define IOC_PA04_FUNC_CTL_ACMP_COMP_1          IOC_PAD_FUNC_CTL_ALT_SELECT_SET(16)
46 #define IOC_PA04_FUNC_CTL_SDC0_DATA_3          IOC_PAD_FUNC_CTL_ALT_SELECT_SET(17)
47 
48 /* IOC_PA05_FUNC_CTL function mux definitions */
49 #define IOC_PA05_FUNC_CTL_GPIO_A_05            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(0)
50 #define IOC_PA05_FUNC_CTL_UART3_RXD            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(2)
51 #define IOC_PA05_FUNC_CTL_SPI3_DAT2            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(5)
52 #define IOC_PA05_FUNC_CTL_XPI0_CA_D_3          IOC_PAD_FUNC_CTL_ALT_SELECT_SET(14)
53 #define IOC_PA05_FUNC_CTL_ACMP_COMP_0          IOC_PAD_FUNC_CTL_ALT_SELECT_SET(16)
54 #define IOC_PA05_FUNC_CTL_SDC0_DATA_2          IOC_PAD_FUNC_CTL_ALT_SELECT_SET(17)
55 
56 /* IOC_PA06_FUNC_CTL function mux definitions */
57 #define IOC_PA06_FUNC_CTL_GPIO_A_06            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(0)
58 #define IOC_PA06_FUNC_CTL_GPTMR0_CAPT_0        IOC_PAD_FUNC_CTL_ALT_SELECT_SET(1)
59 #define IOC_PA06_FUNC_CTL_UART2_DE             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(2)
60 #define IOC_PA06_FUNC_CTL_UART2_RTS            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(3)
61 #define IOC_PA06_FUNC_CTL_I2C0_SCL             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(4)
62 #define IOC_PA06_FUNC_CTL_SPI0_CSN             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(5)
63 #define IOC_PA06_FUNC_CTL_XPI0_CA_CS1          IOC_PAD_FUNC_CTL_ALT_SELECT_SET(14)
64 #define IOC_PA06_FUNC_CTL_ETH0_TXEN            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(18)
65 
66 /* IOC_PA07_FUNC_CTL function mux definitions */
67 #define IOC_PA07_FUNC_CTL_GPIO_A_07            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(0)
68 #define IOC_PA07_FUNC_CTL_GPTMR0_CAPT_1        IOC_PAD_FUNC_CTL_ALT_SELECT_SET(1)
69 #define IOC_PA07_FUNC_CTL_UART2_CTS            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(3)
70 #define IOC_PA07_FUNC_CTL_I2C0_SDA             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(4)
71 #define IOC_PA07_FUNC_CTL_SPI0_MISO            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(5)
72 #define IOC_PA07_FUNC_CTL_XPI0_CA_DQS          IOC_PAD_FUNC_CTL_ALT_SELECT_SET(14)
73 #define IOC_PA07_FUNC_CTL_ETH0_TXD_1           IOC_PAD_FUNC_CTL_ALT_SELECT_SET(18)
74 
75 /* IOC_PA08_FUNC_CTL function mux definitions */
76 #define IOC_PA08_FUNC_CTL_GPIO_A_08            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(0)
77 #define IOC_PA08_FUNC_CTL_GPTMR0_COMP_0        IOC_PAD_FUNC_CTL_ALT_SELECT_SET(1)
78 #define IOC_PA08_FUNC_CTL_UART3_DE             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(2)
79 #define IOC_PA08_FUNC_CTL_UART3_RTS            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(3)
80 #define IOC_PA08_FUNC_CTL_I2C1_SCL             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(4)
81 #define IOC_PA08_FUNC_CTL_SPI0_SCLK            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(5)
82 #define IOC_PA08_FUNC_CTL_CAN0_TXD             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(7)
83 #define IOC_PA08_FUNC_CTL_XPI0_CB_D_0          IOC_PAD_FUNC_CTL_ALT_SELECT_SET(14)
84 #define IOC_PA08_FUNC_CTL_SDC0_DATA_2          IOC_PAD_FUNC_CTL_ALT_SELECT_SET(17)
85 #define IOC_PA08_FUNC_CTL_ETH0_TXD_0           IOC_PAD_FUNC_CTL_ALT_SELECT_SET(18)
86 
87 /* IOC_PA09_FUNC_CTL function mux definitions */
88 #define IOC_PA09_FUNC_CTL_GPIO_A_09            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(0)
89 #define IOC_PA09_FUNC_CTL_GPTMR0_COMP_1        IOC_PAD_FUNC_CTL_ALT_SELECT_SET(1)
90 #define IOC_PA09_FUNC_CTL_UART3_CTS            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(3)
91 #define IOC_PA09_FUNC_CTL_I2C1_SDA             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(4)
92 #define IOC_PA09_FUNC_CTL_SPI0_MOSI            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(5)
93 #define IOC_PA09_FUNC_CTL_CAN0_RXD             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(7)
94 #define IOC_PA09_FUNC_CTL_XPI0_CB_D_2          IOC_PAD_FUNC_CTL_ALT_SELECT_SET(14)
95 #define IOC_PA09_FUNC_CTL_SDC0_DATA_3          IOC_PAD_FUNC_CTL_ALT_SELECT_SET(17)
96 #define IOC_PA09_FUNC_CTL_ETH0_RXD_1           IOC_PAD_FUNC_CTL_ALT_SELECT_SET(18)
97 
98 /* IOC_PA10_FUNC_CTL function mux definitions */
99 #define IOC_PA10_FUNC_CTL_GPIO_A_10            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(0)
100 #define IOC_PA10_FUNC_CTL_GPTMR1_CAPT_0        IOC_PAD_FUNC_CTL_ALT_SELECT_SET(1)
101 #define IOC_PA10_FUNC_CTL_UART4_DE             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(2)
102 #define IOC_PA10_FUNC_CTL_UART4_RTS            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(3)
103 #define IOC_PA10_FUNC_CTL_SPI0_CSN             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(5)
104 #define IOC_PA10_FUNC_CTL_CAN1_TXD             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(7)
105 #define IOC_PA10_FUNC_CTL_XPI0_CB_D_1          IOC_PAD_FUNC_CTL_ALT_SELECT_SET(14)
106 #define IOC_PA10_FUNC_CTL_SDC0_CMD             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(17)
107 #define IOC_PA10_FUNC_CTL_ETH0_RXD_0           IOC_PAD_FUNC_CTL_ALT_SELECT_SET(18)
108 
109 /* IOC_PA11_FUNC_CTL function mux definitions */
110 #define IOC_PA11_FUNC_CTL_GPIO_A_11            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(0)
111 #define IOC_PA11_FUNC_CTL_GPTMR1_CAPT_1        IOC_PAD_FUNC_CTL_ALT_SELECT_SET(1)
112 #define IOC_PA11_FUNC_CTL_UART4_CTS            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(3)
113 #define IOC_PA11_FUNC_CTL_SPI0_MISO            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(5)
114 #define IOC_PA11_FUNC_CTL_CAN1_RXD             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(7)
115 #define IOC_PA11_FUNC_CTL_XPI0_CB_SCLK         IOC_PAD_FUNC_CTL_ALT_SELECT_SET(14)
116 #define IOC_PA11_FUNC_CTL_SDC0_CLK             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(17)
117 #define IOC_PA11_FUNC_CTL_ETH0_RXDV            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(18)
118 
119 /* IOC_PA12_FUNC_CTL function mux definitions */
120 #define IOC_PA12_FUNC_CTL_GPIO_A_12            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(0)
121 #define IOC_PA12_FUNC_CTL_GPTMR1_COMP_0        IOC_PAD_FUNC_CTL_ALT_SELECT_SET(1)
122 #define IOC_PA12_FUNC_CTL_UART5_DE             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(2)
123 #define IOC_PA12_FUNC_CTL_UART5_RTS            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(3)
124 #define IOC_PA12_FUNC_CTL_SPI0_SCLK            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(5)
125 #define IOC_PA12_FUNC_CTL_XPI0_CB_D_3          IOC_PAD_FUNC_CTL_ALT_SELECT_SET(14)
126 #define IOC_PA12_FUNC_CTL_SDC0_DATA_0          IOC_PAD_FUNC_CTL_ALT_SELECT_SET(17)
127 #define IOC_PA12_FUNC_CTL_ETH0_REFCLK          IOC_PAD_FUNC_CTL_ALT_SELECT_SET(18)
128 
129 /* IOC_PA13_FUNC_CTL function mux definitions */
130 #define IOC_PA13_FUNC_CTL_GPIO_A_13            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(0)
131 #define IOC_PA13_FUNC_CTL_GPTMR1_COMP_1        IOC_PAD_FUNC_CTL_ALT_SELECT_SET(1)
132 #define IOC_PA13_FUNC_CTL_UART5_CTS            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(3)
133 #define IOC_PA13_FUNC_CTL_SPI0_MOSI            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(5)
134 #define IOC_PA13_FUNC_CTL_PDM0_D_3             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(10)
135 #define IOC_PA13_FUNC_CTL_XPI0_CB_DQS          IOC_PAD_FUNC_CTL_ALT_SELECT_SET(14)
136 #define IOC_PA13_FUNC_CTL_SDC0_DATA_1          IOC_PAD_FUNC_CTL_ALT_SELECT_SET(17)
137 #define IOC_PA13_FUNC_CTL_ETH0_RXER            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(18)
138 #define IOC_PA13_FUNC_CTL_ETH0_MDIO            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(19)
139 #define IOC_PA13_FUNC_CTL_SOC_REF1             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(24)
140 
141 /* IOC_PA14_FUNC_CTL function mux definitions */
142 #define IOC_PA14_FUNC_CTL_GPIO_A_14            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(0)
143 #define IOC_PA14_FUNC_CTL_UART4_TXD            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(2)
144 #define IOC_PA14_FUNC_CTL_SPI0_DAT3            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(5)
145 #define IOC_PA14_FUNC_CTL_PDM0_D_2             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(10)
146 #define IOC_PA14_FUNC_CTL_XPI0_CB_CS1          IOC_PAD_FUNC_CTL_ALT_SELECT_SET(14)
147 #define IOC_PA14_FUNC_CTL_PWM1_P_5             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(16)
148 #define IOC_PA14_FUNC_CTL_SDC0_CDN             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(17)
149 #define IOC_PA14_FUNC_CTL_ETH0_RXD_3           IOC_PAD_FUNC_CTL_ALT_SELECT_SET(18)
150 #define IOC_PA14_FUNC_CTL_ETH0_MDC             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(19)
151 #define IOC_PA14_FUNC_CTL_SOC_REF0             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(24)
152 
153 /* IOC_PA15_FUNC_CTL function mux definitions */
154 #define IOC_PA15_FUNC_CTL_GPIO_A_15            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(0)
155 #define IOC_PA15_FUNC_CTL_UART4_RXD            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(2)
156 #define IOC_PA15_FUNC_CTL_SPI0_DAT2            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(5)
157 #define IOC_PA15_FUNC_CTL_PDM0_CLK             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(10)
158 #define IOC_PA15_FUNC_CTL_XPI0_CB_CS0          IOC_PAD_FUNC_CTL_ALT_SELECT_SET(14)
159 #define IOC_PA15_FUNC_CTL_PWM1_P_4             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(16)
160 #define IOC_PA15_FUNC_CTL_SDC0_WP              IOC_PAD_FUNC_CTL_ALT_SELECT_SET(17)
161 #define IOC_PA15_FUNC_CTL_ETH0_RXD_2           IOC_PAD_FUNC_CTL_ALT_SELECT_SET(18)
162 #define IOC_PA15_FUNC_CTL_ETH0_MDIO            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(19)
163 #define IOC_PA15_FUNC_CTL_SYSCTL_CLK_OBS_3     IOC_PAD_FUNC_CTL_ALT_SELECT_SET(24)
164 
165 /* IOC_PA16_FUNC_CTL function mux definitions */
166 #define IOC_PA16_FUNC_CTL_GPIO_A_16            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(0)
167 #define IOC_PA16_FUNC_CTL_UART5_TXD            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(2)
168 #define IOC_PA16_FUNC_CTL_SPI1_CSN             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(5)
169 #define IOC_PA16_FUNC_CTL_PDM0_D_1             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(10)
170 #define IOC_PA16_FUNC_CTL_PWM1_P_3             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(16)
171 #define IOC_PA16_FUNC_CTL_SDC0_VSEL            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(17)
172 #define IOC_PA16_FUNC_CTL_ETH0_RXCK            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(18)
173 #define IOC_PA16_FUNC_CTL_ETH0_MDC             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(19)
174 #define IOC_PA16_FUNC_CTL_SYSCTL_CLK_OBS_2     IOC_PAD_FUNC_CTL_ALT_SELECT_SET(24)
175 
176 /* IOC_PA17_FUNC_CTL function mux definitions */
177 #define IOC_PA17_FUNC_CTL_GPIO_A_17            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(0)
178 #define IOC_PA17_FUNC_CTL_UART5_RXD            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(2)
179 #define IOC_PA17_FUNC_CTL_SPI1_MISO            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(5)
180 #define IOC_PA17_FUNC_CTL_PDM0_D_0             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(10)
181 #define IOC_PA17_FUNC_CTL_PWM1_P_2             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(16)
182 #define IOC_PA17_FUNC_CTL_ETH0_RXD_1           IOC_PAD_FUNC_CTL_ALT_SELECT_SET(18)
183 #define IOC_PA17_FUNC_CTL_SYSCTL_CLK_OBS_1     IOC_PAD_FUNC_CTL_ALT_SELECT_SET(24)
184 
185 /* IOC_PA18_FUNC_CTL function mux definitions */
186 #define IOC_PA18_FUNC_CTL_GPIO_A_18            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(0)
187 #define IOC_PA18_FUNC_CTL_UART6_TXD            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(2)
188 #define IOC_PA18_FUNC_CTL_SPI1_SCLK            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(5)
189 #define IOC_PA18_FUNC_CTL_PDM0_CLK             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(10)
190 #define IOC_PA18_FUNC_CTL_PWM1_P_1             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(16)
191 #define IOC_PA18_FUNC_CTL_ETH0_RXD_0           IOC_PAD_FUNC_CTL_ALT_SELECT_SET(18)
192 #define IOC_PA18_FUNC_CTL_SYSCTL_CLK_OBS_0     IOC_PAD_FUNC_CTL_ALT_SELECT_SET(24)
193 
194 /* IOC_PA19_FUNC_CTL function mux definitions */
195 #define IOC_PA19_FUNC_CTL_GPIO_A_19            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(0)
196 #define IOC_PA19_FUNC_CTL_GPTMR0_CAPT_0        IOC_PAD_FUNC_CTL_ALT_SELECT_SET(1)
197 #define IOC_PA19_FUNC_CTL_UART6_RXD            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(2)
198 #define IOC_PA19_FUNC_CTL_I2C2_SCL             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(4)
199 #define IOC_PA19_FUNC_CTL_SPI1_MOSI            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(5)
200 #define IOC_PA19_FUNC_CTL_DAOR_P               IOC_PAD_FUNC_CTL_ALT_SELECT_SET(10)
201 #define IOC_PA19_FUNC_CTL_PWM1_P_0             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(16)
202 #define IOC_PA19_FUNC_CTL_ETH0_RXDV            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(18)
203 
204 /* IOC_PA20_FUNC_CTL function mux definitions */
205 #define IOC_PA20_FUNC_CTL_GPIO_A_20            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(0)
206 #define IOC_PA20_FUNC_CTL_GPTMR0_CAPT_1        IOC_PAD_FUNC_CTL_ALT_SELECT_SET(1)
207 #define IOC_PA20_FUNC_CTL_UART7_TXD            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(2)
208 #define IOC_PA20_FUNC_CTL_I2C2_SDA             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(4)
209 #define IOC_PA20_FUNC_CTL_DAOR_N               IOC_PAD_FUNC_CTL_ALT_SELECT_SET(10)
210 #define IOC_PA20_FUNC_CTL_TRGM1_P_00           IOC_PAD_FUNC_CTL_ALT_SELECT_SET(16)
211 #define IOC_PA20_FUNC_CTL_ETH0_TXD_0           IOC_PAD_FUNC_CTL_ALT_SELECT_SET(18)
212 
213 /* IOC_PA21_FUNC_CTL function mux definitions */
214 #define IOC_PA21_FUNC_CTL_GPIO_A_21            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(0)
215 #define IOC_PA21_FUNC_CTL_GPTMR0_COMP_0        IOC_PAD_FUNC_CTL_ALT_SELECT_SET(1)
216 #define IOC_PA21_FUNC_CTL_UART7_RXD            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(2)
217 #define IOC_PA21_FUNC_CTL_I2C3_SCL             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(4)
218 #define IOC_PA21_FUNC_CTL_CAN0_TXD             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(7)
219 #define IOC_PA21_FUNC_CTL_DAOL_P               IOC_PAD_FUNC_CTL_ALT_SELECT_SET(10)
220 #define IOC_PA21_FUNC_CTL_TRGM1_P_01           IOC_PAD_FUNC_CTL_ALT_SELECT_SET(16)
221 #define IOC_PA21_FUNC_CTL_ETH0_TXD_1           IOC_PAD_FUNC_CTL_ALT_SELECT_SET(18)
222 
223 /* IOC_PA22_FUNC_CTL function mux definitions */
224 #define IOC_PA22_FUNC_CTL_GPIO_A_22            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(0)
225 #define IOC_PA22_FUNC_CTL_GPTMR0_COMP_1        IOC_PAD_FUNC_CTL_ALT_SELECT_SET(1)
226 #define IOC_PA22_FUNC_CTL_UART6_DE             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(2)
227 #define IOC_PA22_FUNC_CTL_UART6_RTS            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(3)
228 #define IOC_PA22_FUNC_CTL_I2C3_SDA             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(4)
229 #define IOC_PA22_FUNC_CTL_CAN0_RXD             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(7)
230 #define IOC_PA22_FUNC_CTL_DAOL_N               IOC_PAD_FUNC_CTL_ALT_SELECT_SET(10)
231 #define IOC_PA22_FUNC_CTL_TRGM1_P_02           IOC_PAD_FUNC_CTL_ALT_SELECT_SET(16)
232 #define IOC_PA22_FUNC_CTL_ETH0_REFCLK          IOC_PAD_FUNC_CTL_ALT_SELECT_SET(18)
233 
234 /* IOC_PA23_FUNC_CTL function mux definitions */
235 #define IOC_PA23_FUNC_CTL_GPIO_A_23            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(0)
236 #define IOC_PA23_FUNC_CTL_GPTMR1_CAPT_0        IOC_PAD_FUNC_CTL_ALT_SELECT_SET(1)
237 #define IOC_PA23_FUNC_CTL_UART6_CTS            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(3)
238 #define IOC_PA23_FUNC_CTL_I2C0_SCL             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(4)
239 #define IOC_PA23_FUNC_CTL_CAN0_STBY            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(7)
240 #define IOC_PA23_FUNC_CTL_FEMC_CS_1            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(12)
241 #define IOC_PA23_FUNC_CTL_TRGM1_P_03           IOC_PAD_FUNC_CTL_ALT_SELECT_SET(16)
242 #define IOC_PA23_FUNC_CTL_ETH0_TXEN            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(18)
243 
244 /* IOC_PA24_FUNC_CTL function mux definitions */
245 #define IOC_PA24_FUNC_CTL_GPIO_A_24            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(0)
246 #define IOC_PA24_FUNC_CTL_GPTMR1_CAPT_1        IOC_PAD_FUNC_CTL_ALT_SELECT_SET(1)
247 #define IOC_PA24_FUNC_CTL_UART7_DE             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(2)
248 #define IOC_PA24_FUNC_CTL_UART7_RTS            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(3)
249 #define IOC_PA24_FUNC_CTL_I2C0_SDA             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(4)
250 #define IOC_PA24_FUNC_CTL_CAN1_STBY            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(7)
251 #define IOC_PA24_FUNC_CTL_FEMC_SCLK            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(12)
252 #define IOC_PA24_FUNC_CTL_TRGM1_P_04           IOC_PAD_FUNC_CTL_ALT_SELECT_SET(16)
253 #define IOC_PA24_FUNC_CTL_ETH0_TXD_2           IOC_PAD_FUNC_CTL_ALT_SELECT_SET(18)
254 
255 /* IOC_PA25_FUNC_CTL function mux definitions */
256 #define IOC_PA25_FUNC_CTL_GPIO_A_25            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(0)
257 #define IOC_PA25_FUNC_CTL_GPTMR1_COMP_0        IOC_PAD_FUNC_CTL_ALT_SELECT_SET(1)
258 #define IOC_PA25_FUNC_CTL_UART7_CTS            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(3)
259 #define IOC_PA25_FUNC_CTL_I2C1_SCL             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(4)
260 #define IOC_PA25_FUNC_CTL_CAN1_TXD             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(7)
261 #define IOC_PA25_FUNC_CTL_FEMC_DQ_07           IOC_PAD_FUNC_CTL_ALT_SELECT_SET(12)
262 #define IOC_PA25_FUNC_CTL_TRGM1_P_05           IOC_PAD_FUNC_CTL_ALT_SELECT_SET(16)
263 #define IOC_PA25_FUNC_CTL_ETH0_TXD_3           IOC_PAD_FUNC_CTL_ALT_SELECT_SET(18)
264 #define IOC_PA25_FUNC_CTL_ETH0_MDC             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(19)
265 
266 /* IOC_PA26_FUNC_CTL function mux definitions */
267 #define IOC_PA26_FUNC_CTL_GPIO_A_26            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(0)
268 #define IOC_PA26_FUNC_CTL_GPTMR1_COMP_1        IOC_PAD_FUNC_CTL_ALT_SELECT_SET(1)
269 #define IOC_PA26_FUNC_CTL_UART0_DE             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(2)
270 #define IOC_PA26_FUNC_CTL_UART0_RTS            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(3)
271 #define IOC_PA26_FUNC_CTL_I2C1_SDA             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(4)
272 #define IOC_PA26_FUNC_CTL_CAN1_RXD             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(7)
273 #define IOC_PA26_FUNC_CTL_FEMC_DQ_06           IOC_PAD_FUNC_CTL_ALT_SELECT_SET(12)
274 #define IOC_PA26_FUNC_CTL_TRGM1_P_06           IOC_PAD_FUNC_CTL_ALT_SELECT_SET(16)
275 #define IOC_PA26_FUNC_CTL_ETH0_CRS             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(18)
276 #define IOC_PA26_FUNC_CTL_ETH0_MDIO            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(19)
277 
278 /* IOC_PA27_FUNC_CTL function mux definitions */
279 #define IOC_PA27_FUNC_CTL_GPIO_A_27            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(0)
280 #define IOC_PA27_FUNC_CTL_UART0_CTS            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(3)
281 #define IOC_PA27_FUNC_CTL_FEMC_DQ_05           IOC_PAD_FUNC_CTL_ALT_SELECT_SET(12)
282 #define IOC_PA27_FUNC_CTL_TRGM1_P_07           IOC_PAD_FUNC_CTL_ALT_SELECT_SET(16)
283 #define IOC_PA27_FUNC_CTL_ETH0_COL             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(18)
284 
285 /* IOC_PA28_FUNC_CTL function mux definitions */
286 #define IOC_PA28_FUNC_CTL_GPIO_A_28            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(0)
287 #define IOC_PA28_FUNC_CTL_UART1_DE             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(2)
288 #define IOC_PA28_FUNC_CTL_UART1_RTS            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(3)
289 #define IOC_PA28_FUNC_CTL_SPI0_CSN             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(5)
290 #define IOC_PA28_FUNC_CTL_FEMC_DQ_04           IOC_PAD_FUNC_CTL_ALT_SELECT_SET(12)
291 #define IOC_PA28_FUNC_CTL_TRGM1_P_08           IOC_PAD_FUNC_CTL_ALT_SELECT_SET(16)
292 
293 /* IOC_PA29_FUNC_CTL function mux definitions */
294 #define IOC_PA29_FUNC_CTL_GPIO_A_29            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(0)
295 #define IOC_PA29_FUNC_CTL_UART1_CTS            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(3)
296 #define IOC_PA29_FUNC_CTL_SPI0_MISO            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(5)
297 #define IOC_PA29_FUNC_CTL_CAN0_TXD             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(7)
298 #define IOC_PA29_FUNC_CTL_FEMC_DQ_03           IOC_PAD_FUNC_CTL_ALT_SELECT_SET(12)
299 #define IOC_PA29_FUNC_CTL_TRGM1_P_09           IOC_PAD_FUNC_CTL_ALT_SELECT_SET(16)
300 
301 /* IOC_PA30_FUNC_CTL function mux definitions */
302 #define IOC_PA30_FUNC_CTL_GPIO_A_30            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(0)
303 #define IOC_PA30_FUNC_CTL_UART0_TXD            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(2)
304 #define IOC_PA30_FUNC_CTL_SPI0_SCLK            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(5)
305 #define IOC_PA30_FUNC_CTL_CAN0_RXD             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(7)
306 #define IOC_PA30_FUNC_CTL_FEMC_DQ_02           IOC_PAD_FUNC_CTL_ALT_SELECT_SET(12)
307 #define IOC_PA30_FUNC_CTL_TRGM1_P_10           IOC_PAD_FUNC_CTL_ALT_SELECT_SET(16)
308 
309 /* IOC_PA31_FUNC_CTL function mux definitions */
310 #define IOC_PA31_FUNC_CTL_GPIO_A_31            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(0)
311 #define IOC_PA31_FUNC_CTL_UART0_RXD            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(2)
312 #define IOC_PA31_FUNC_CTL_SPI0_MOSI            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(5)
313 #define IOC_PA31_FUNC_CTL_FEMC_DQ_01           IOC_PAD_FUNC_CTL_ALT_SELECT_SET(12)
314 #define IOC_PA31_FUNC_CTL_TRGM1_P_11           IOC_PAD_FUNC_CTL_ALT_SELECT_SET(16)
315 
316 /* IOC_PB00_FUNC_CTL function mux definitions */
317 #define IOC_PB00_FUNC_CTL_GPIO_B_00            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(0)
318 #define IOC_PB00_FUNC_CTL_UART1_TXD            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(2)
319 #define IOC_PB00_FUNC_CTL_SPI0_DAT2            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(5)
320 #define IOC_PB00_FUNC_CTL_FEMC_DQ_00           IOC_PAD_FUNC_CTL_ALT_SELECT_SET(12)
321 #define IOC_PB00_FUNC_CTL_PWM1_P_0             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(16)
322 
323 /* IOC_PB01_FUNC_CTL function mux definitions */
324 #define IOC_PB01_FUNC_CTL_GPIO_B_01            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(0)
325 #define IOC_PB01_FUNC_CTL_UART1_RXD            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(2)
326 #define IOC_PB01_FUNC_CTL_SPI0_DAT3            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(5)
327 #define IOC_PB01_FUNC_CTL_FEMC_DM_0            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(12)
328 #define IOC_PB01_FUNC_CTL_PWM1_P_1             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(16)
329 
330 /* IOC_PB02_FUNC_CTL function mux definitions */
331 #define IOC_PB02_FUNC_CTL_GPIO_B_02            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(0)
332 #define IOC_PB02_FUNC_CTL_UART2_TXD            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(2)
333 #define IOC_PB02_FUNC_CTL_SPI1_CSN             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(5)
334 #define IOC_PB02_FUNC_CTL_FEMC_DQ_08           IOC_PAD_FUNC_CTL_ALT_SELECT_SET(12)
335 #define IOC_PB02_FUNC_CTL_PWM1_P_2             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(16)
336 
337 /* IOC_PB03_FUNC_CTL function mux definitions */
338 #define IOC_PB03_FUNC_CTL_GPIO_B_03            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(0)
339 #define IOC_PB03_FUNC_CTL_UART2_RXD            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(2)
340 #define IOC_PB03_FUNC_CTL_SPI1_MISO            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(5)
341 #define IOC_PB03_FUNC_CTL_FEMC_DQ_09           IOC_PAD_FUNC_CTL_ALT_SELECT_SET(12)
342 #define IOC_PB03_FUNC_CTL_XPI1_CB_CS0          IOC_PAD_FUNC_CTL_ALT_SELECT_SET(14)
343 #define IOC_PB03_FUNC_CTL_PWM1_P_3             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(16)
344 
345 /* IOC_PB04_FUNC_CTL function mux definitions */
346 #define IOC_PB04_FUNC_CTL_GPIO_B_04            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(0)
347 #define IOC_PB04_FUNC_CTL_UART3_TXD            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(2)
348 #define IOC_PB04_FUNC_CTL_SPI1_SCLK            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(5)
349 #define IOC_PB04_FUNC_CTL_FEMC_DQ_10           IOC_PAD_FUNC_CTL_ALT_SELECT_SET(12)
350 #define IOC_PB04_FUNC_CTL_XPI1_CB_CS1          IOC_PAD_FUNC_CTL_ALT_SELECT_SET(14)
351 #define IOC_PB04_FUNC_CTL_PWM1_P_4             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(16)
352 
353 /* IOC_PB05_FUNC_CTL function mux definitions */
354 #define IOC_PB05_FUNC_CTL_GPIO_B_05            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(0)
355 #define IOC_PB05_FUNC_CTL_UART3_RXD            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(2)
356 #define IOC_PB05_FUNC_CTL_SPI1_MOSI            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(5)
357 #define IOC_PB05_FUNC_CTL_FEMC_DQ_11           IOC_PAD_FUNC_CTL_ALT_SELECT_SET(12)
358 #define IOC_PB05_FUNC_CTL_XPI1_CB_DQS          IOC_PAD_FUNC_CTL_ALT_SELECT_SET(14)
359 #define IOC_PB05_FUNC_CTL_PWM1_P_5             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(16)
360 
361 /* IOC_PB06_FUNC_CTL function mux definitions */
362 #define IOC_PB06_FUNC_CTL_GPIO_B_06            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(0)
363 #define IOC_PB06_FUNC_CTL_UART4_TXD            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(2)
364 #define IOC_PB06_FUNC_CTL_FEMC_DQ_12           IOC_PAD_FUNC_CTL_ALT_SELECT_SET(12)
365 #define IOC_PB06_FUNC_CTL_XPI1_CB_D_3          IOC_PAD_FUNC_CTL_ALT_SELECT_SET(14)
366 #define IOC_PB06_FUNC_CTL_PWM1_P_6             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(16)
367 
368 /* IOC_PB07_FUNC_CTL function mux definitions */
369 #define IOC_PB07_FUNC_CTL_GPIO_B_07            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(0)
370 #define IOC_PB07_FUNC_CTL_UART4_RXD            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(2)
371 #define IOC_PB07_FUNC_CTL_SPI1_DAT2            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(5)
372 #define IOC_PB07_FUNC_CTL_FEMC_DQ_13           IOC_PAD_FUNC_CTL_ALT_SELECT_SET(12)
373 #define IOC_PB07_FUNC_CTL_XPI1_CB_D_1          IOC_PAD_FUNC_CTL_ALT_SELECT_SET(14)
374 #define IOC_PB07_FUNC_CTL_PWM1_P_7             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(16)
375 
376 /* IOC_PB08_FUNC_CTL function mux definitions */
377 #define IOC_PB08_FUNC_CTL_GPIO_B_08            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(0)
378 #define IOC_PB08_FUNC_CTL_UART5_TXD            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(2)
379 #define IOC_PB08_FUNC_CTL_SPI1_DAT3            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(5)
380 #define IOC_PB08_FUNC_CTL_FEMC_DQ_14           IOC_PAD_FUNC_CTL_ALT_SELECT_SET(12)
381 #define IOC_PB08_FUNC_CTL_XPI1_CB_SCLK         IOC_PAD_FUNC_CTL_ALT_SELECT_SET(14)
382 #define IOC_PB08_FUNC_CTL_PWM1_FAULT_0         IOC_PAD_FUNC_CTL_ALT_SELECT_SET(16)
383 
384 /* IOC_PB09_FUNC_CTL function mux definitions */
385 #define IOC_PB09_FUNC_CTL_GPIO_B_09            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(0)
386 #define IOC_PB09_FUNC_CTL_UART5_RXD            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(2)
387 #define IOC_PB09_FUNC_CTL_SPI1_SCLK            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(5)
388 #define IOC_PB09_FUNC_CTL_FEMC_DQ_15           IOC_PAD_FUNC_CTL_ALT_SELECT_SET(12)
389 #define IOC_PB09_FUNC_CTL_XPI1_CB_D_2          IOC_PAD_FUNC_CTL_ALT_SELECT_SET(14)
390 #define IOC_PB09_FUNC_CTL_PWM1_FAULT_1         IOC_PAD_FUNC_CTL_ALT_SELECT_SET(16)
391 
392 /* IOC_PB10_FUNC_CTL function mux definitions */
393 #define IOC_PB10_FUNC_CTL_GPIO_B_10            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(0)
394 #define IOC_PB10_FUNC_CTL_UART6_TXD            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(2)
395 #define IOC_PB10_FUNC_CTL_SPI1_MISO            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(5)
396 #define IOC_PB10_FUNC_CTL_FEMC_DM_1            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(12)
397 #define IOC_PB10_FUNC_CTL_XPI1_CB_D_0          IOC_PAD_FUNC_CTL_ALT_SELECT_SET(14)
398 #define IOC_PB10_FUNC_CTL_PWM0_FAULT_1         IOC_PAD_FUNC_CTL_ALT_SELECT_SET(16)
399 
400 /* IOC_PB11_FUNC_CTL function mux definitions */
401 #define IOC_PB11_FUNC_CTL_GPIO_B_11            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(0)
402 #define IOC_PB11_FUNC_CTL_UART6_RXD            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(2)
403 #define IOC_PB11_FUNC_CTL_SPI1_MOSI            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(5)
404 #define IOC_PB11_FUNC_CTL_FEMC_WE              IOC_PAD_FUNC_CTL_ALT_SELECT_SET(12)
405 #define IOC_PB11_FUNC_CTL_XPI1_CA_DQS          IOC_PAD_FUNC_CTL_ALT_SELECT_SET(14)
406 #define IOC_PB11_FUNC_CTL_PWM0_FAULT_0         IOC_PAD_FUNC_CTL_ALT_SELECT_SET(16)
407 
408 /* IOC_PB12_FUNC_CTL function mux definitions */
409 #define IOC_PB12_FUNC_CTL_GPIO_B_12            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(0)
410 #define IOC_PB12_FUNC_CTL_UART7_TXD            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(2)
411 #define IOC_PB12_FUNC_CTL_SPI1_CSN             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(5)
412 #define IOC_PB12_FUNC_CTL_FEMC_CAS             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(12)
413 #define IOC_PB12_FUNC_CTL_XPI1_CA_D_0          IOC_PAD_FUNC_CTL_ALT_SELECT_SET(14)
414 #define IOC_PB12_FUNC_CTL_PWM0_P_0             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(16)
415 
416 /* IOC_PB13_FUNC_CTL function mux definitions */
417 #define IOC_PB13_FUNC_CTL_GPIO_B_13            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(0)
418 #define IOC_PB13_FUNC_CTL_UART7_RXD            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(2)
419 #define IOC_PB13_FUNC_CTL_SPI2_CSN             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(5)
420 #define IOC_PB13_FUNC_CTL_FEMC_RAS             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(12)
421 #define IOC_PB13_FUNC_CTL_XPI1_CA_D_2          IOC_PAD_FUNC_CTL_ALT_SELECT_SET(14)
422 #define IOC_PB13_FUNC_CTL_PWM0_P_1             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(16)
423 
424 /* IOC_PB14_FUNC_CTL function mux definitions */
425 #define IOC_PB14_FUNC_CTL_GPIO_B_14            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(0)
426 #define IOC_PB14_FUNC_CTL_UART6_DE             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(2)
427 #define IOC_PB14_FUNC_CTL_UART6_RTS            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(3)
428 #define IOC_PB14_FUNC_CTL_SPI2_MISO            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(5)
429 #define IOC_PB14_FUNC_CTL_CAN1_TXD             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(7)
430 #define IOC_PB14_FUNC_CTL_FEMC_CS_0            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(12)
431 #define IOC_PB14_FUNC_CTL_XPI1_CA_SCLK         IOC_PAD_FUNC_CTL_ALT_SELECT_SET(14)
432 #define IOC_PB14_FUNC_CTL_PWM0_P_2             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(16)
433 
434 /* IOC_PB15_FUNC_CTL function mux definitions */
435 #define IOC_PB15_FUNC_CTL_GPIO_B_15            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(0)
436 #define IOC_PB15_FUNC_CTL_UART6_CTS            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(3)
437 #define IOC_PB15_FUNC_CTL_SPI2_SCLK            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(5)
438 #define IOC_PB15_FUNC_CTL_CAN1_RXD             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(7)
439 #define IOC_PB15_FUNC_CTL_FEMC_BA0             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(12)
440 #define IOC_PB15_FUNC_CTL_XPI1_CA_D_1          IOC_PAD_FUNC_CTL_ALT_SELECT_SET(14)
441 #define IOC_PB15_FUNC_CTL_PWM0_P_3             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(16)
442 
443 /* IOC_PB16_FUNC_CTL function mux definitions */
444 #define IOC_PB16_FUNC_CTL_GPIO_B_16            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(0)
445 #define IOC_PB16_FUNC_CTL_UART7_DE             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(2)
446 #define IOC_PB16_FUNC_CTL_UART7_RTS            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(3)
447 #define IOC_PB16_FUNC_CTL_SPI2_MOSI            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(5)
448 #define IOC_PB16_FUNC_CTL_FEMC_BA1             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(12)
449 #define IOC_PB16_FUNC_CTL_XPI1_CA_D_3          IOC_PAD_FUNC_CTL_ALT_SELECT_SET(14)
450 #define IOC_PB16_FUNC_CTL_PWM0_P_4             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(16)
451 
452 /* IOC_PB17_FUNC_CTL function mux definitions */
453 #define IOC_PB17_FUNC_CTL_GPIO_B_17            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(0)
454 #define IOC_PB17_FUNC_CTL_UART7_CTS            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(3)
455 #define IOC_PB17_FUNC_CTL_FEMC_A_10            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(12)
456 #define IOC_PB17_FUNC_CTL_XPI1_CA_CS0          IOC_PAD_FUNC_CTL_ALT_SELECT_SET(14)
457 #define IOC_PB17_FUNC_CTL_PWM0_P_5             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(16)
458 
459 /* IOC_PB18_FUNC_CTL function mux definitions */
460 #define IOC_PB18_FUNC_CTL_GPIO_B_18            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(0)
461 #define IOC_PB18_FUNC_CTL_GPTMR2_CAPT_0        IOC_PAD_FUNC_CTL_ALT_SELECT_SET(1)
462 #define IOC_PB18_FUNC_CTL_UART0_DE             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(2)
463 #define IOC_PB18_FUNC_CTL_UART0_RTS            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(3)
464 #define IOC_PB18_FUNC_CTL_I2C2_SCL             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(4)
465 #define IOC_PB18_FUNC_CTL_CAN1_STBY            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(7)
466 #define IOC_PB18_FUNC_CTL_I2S0_TXD_3           IOC_PAD_FUNC_CTL_ALT_SELECT_SET(8)
467 #define IOC_PB18_FUNC_CTL_FEMC_A_00            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(12)
468 #define IOC_PB18_FUNC_CTL_PWM0_P_6             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(16)
469 
470 /* IOC_PB19_FUNC_CTL function mux definitions */
471 #define IOC_PB19_FUNC_CTL_GPIO_B_19            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(0)
472 #define IOC_PB19_FUNC_CTL_GPTMR2_CAPT_1        IOC_PAD_FUNC_CTL_ALT_SELECT_SET(1)
473 #define IOC_PB19_FUNC_CTL_UART0_CTS            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(3)
474 #define IOC_PB19_FUNC_CTL_I2C2_SDA             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(4)
475 #define IOC_PB19_FUNC_CTL_CAN0_STBY            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(7)
476 #define IOC_PB19_FUNC_CTL_I2S0_TXD_2           IOC_PAD_FUNC_CTL_ALT_SELECT_SET(8)
477 #define IOC_PB19_FUNC_CTL_FEMC_A_01            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(12)
478 #define IOC_PB19_FUNC_CTL_PWM0_P_7             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(16)
479 
480 /* IOC_PB20_FUNC_CTL function mux definitions */
481 #define IOC_PB20_FUNC_CTL_GPIO_B_20            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(0)
482 #define IOC_PB20_FUNC_CTL_GPTMR2_COMP_0        IOC_PAD_FUNC_CTL_ALT_SELECT_SET(1)
483 #define IOC_PB20_FUNC_CTL_UART1_DE             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(2)
484 #define IOC_PB20_FUNC_CTL_UART1_RTS            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(3)
485 #define IOC_PB20_FUNC_CTL_I2C3_SCL             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(4)
486 #define IOC_PB20_FUNC_CTL_CAN0_TXD             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(7)
487 #define IOC_PB20_FUNC_CTL_I2S0_TXD_1           IOC_PAD_FUNC_CTL_ALT_SELECT_SET(8)
488 #define IOC_PB20_FUNC_CTL_FEMC_A_02            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(12)
489 #define IOC_PB20_FUNC_CTL_TRGM0_P_00           IOC_PAD_FUNC_CTL_ALT_SELECT_SET(16)
490 
491 /* IOC_PB21_FUNC_CTL function mux definitions */
492 #define IOC_PB21_FUNC_CTL_GPIO_B_21            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(0)
493 #define IOC_PB21_FUNC_CTL_GPTMR2_COMP_1        IOC_PAD_FUNC_CTL_ALT_SELECT_SET(1)
494 #define IOC_PB21_FUNC_CTL_UART1_CTS            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(3)
495 #define IOC_PB21_FUNC_CTL_I2C3_SDA             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(4)
496 #define IOC_PB21_FUNC_CTL_CAN0_RXD             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(7)
497 #define IOC_PB21_FUNC_CTL_I2S0_TXD_0           IOC_PAD_FUNC_CTL_ALT_SELECT_SET(8)
498 #define IOC_PB21_FUNC_CTL_FEMC_A_03            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(12)
499 #define IOC_PB21_FUNC_CTL_TRGM0_P_01           IOC_PAD_FUNC_CTL_ALT_SELECT_SET(16)
500 
501 /* IOC_PB22_FUNC_CTL function mux definitions */
502 #define IOC_PB22_FUNC_CTL_GPIO_B_22            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(0)
503 #define IOC_PB22_FUNC_CTL_GPTMR3_CAPT_0        IOC_PAD_FUNC_CTL_ALT_SELECT_SET(1)
504 #define IOC_PB22_FUNC_CTL_UART0_TXD            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(2)
505 #define IOC_PB22_FUNC_CTL_I2C0_SCL             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(4)
506 #define IOC_PB22_FUNC_CTL_CAN1_TXD             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(7)
507 #define IOC_PB22_FUNC_CTL_I2S0_BCLK            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(8)
508 #define IOC_PB22_FUNC_CTL_FEMC_CLK             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(12)
509 #define IOC_PB22_FUNC_CTL_TRGM0_P_02           IOC_PAD_FUNC_CTL_ALT_SELECT_SET(16)
510 #define IOC_PB22_FUNC_CTL_SOC_REF0             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(24)
511 
512 /* IOC_PB23_FUNC_CTL function mux definitions */
513 #define IOC_PB23_FUNC_CTL_GPIO_B_23            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(0)
514 #define IOC_PB23_FUNC_CTL_GPTMR3_CAPT_1        IOC_PAD_FUNC_CTL_ALT_SELECT_SET(1)
515 #define IOC_PB23_FUNC_CTL_UART0_RXD            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(2)
516 #define IOC_PB23_FUNC_CTL_I2C0_SDA             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(4)
517 #define IOC_PB23_FUNC_CTL_CAN1_RXD             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(7)
518 #define IOC_PB23_FUNC_CTL_I2S0_FCLK            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(8)
519 #define IOC_PB23_FUNC_CTL_FEMC_CKE             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(12)
520 #define IOC_PB23_FUNC_CTL_TRGM0_P_03           IOC_PAD_FUNC_CTL_ALT_SELECT_SET(16)
521 #define IOC_PB23_FUNC_CTL_SOC_REF1             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(24)
522 
523 /* IOC_PB24_FUNC_CTL function mux definitions */
524 #define IOC_PB24_FUNC_CTL_GPIO_B_24            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(0)
525 #define IOC_PB24_FUNC_CTL_GPTMR3_COMP_0        IOC_PAD_FUNC_CTL_ALT_SELECT_SET(1)
526 #define IOC_PB24_FUNC_CTL_UART1_TXD            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(2)
527 #define IOC_PB24_FUNC_CTL_I2C1_SCL             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(4)
528 #define IOC_PB24_FUNC_CTL_I2S0_MCLK            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(8)
529 #define IOC_PB24_FUNC_CTL_FEMC_A_12            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(12)
530 #define IOC_PB24_FUNC_CTL_TRGM0_P_04           IOC_PAD_FUNC_CTL_ALT_SELECT_SET(16)
531 
532 /* IOC_PB25_FUNC_CTL function mux definitions */
533 #define IOC_PB25_FUNC_CTL_GPIO_B_25            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(0)
534 #define IOC_PB25_FUNC_CTL_GPTMR3_COMP_1        IOC_PAD_FUNC_CTL_ALT_SELECT_SET(1)
535 #define IOC_PB25_FUNC_CTL_UART1_RXD            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(2)
536 #define IOC_PB25_FUNC_CTL_I2C1_SDA             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(4)
537 #define IOC_PB25_FUNC_CTL_I2S0_RXD_0           IOC_PAD_FUNC_CTL_ALT_SELECT_SET(8)
538 #define IOC_PB25_FUNC_CTL_FEMC_A_11            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(12)
539 #define IOC_PB25_FUNC_CTL_TRGM0_P_05           IOC_PAD_FUNC_CTL_ALT_SELECT_SET(16)
540 
541 /* IOC_PB26_FUNC_CTL function mux definitions */
542 #define IOC_PB26_FUNC_CTL_GPIO_B_26            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(0)
543 #define IOC_PB26_FUNC_CTL_UART2_TXD            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(2)
544 #define IOC_PB26_FUNC_CTL_I2S0_RXD_1           IOC_PAD_FUNC_CTL_ALT_SELECT_SET(8)
545 #define IOC_PB26_FUNC_CTL_FEMC_A_09            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(12)
546 #define IOC_PB26_FUNC_CTL_TRGM0_P_06           IOC_PAD_FUNC_CTL_ALT_SELECT_SET(16)
547 
548 /* IOC_PB27_FUNC_CTL function mux definitions */
549 #define IOC_PB27_FUNC_CTL_GPIO_B_27            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(0)
550 #define IOC_PB27_FUNC_CTL_UART2_RXD            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(2)
551 #define IOC_PB27_FUNC_CTL_SPI1_CSN             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(5)
552 #define IOC_PB27_FUNC_CTL_I2S0_RXD_2           IOC_PAD_FUNC_CTL_ALT_SELECT_SET(8)
553 #define IOC_PB27_FUNC_CTL_FEMC_A_08            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(12)
554 #define IOC_PB27_FUNC_CTL_TRGM0_P_07           IOC_PAD_FUNC_CTL_ALT_SELECT_SET(16)
555 
556 /* IOC_PB28_FUNC_CTL function mux definitions */
557 #define IOC_PB28_FUNC_CTL_GPIO_B_28            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(0)
558 #define IOC_PB28_FUNC_CTL_UART3_TXD            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(2)
559 #define IOC_PB28_FUNC_CTL_SPI1_MISO            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(5)
560 #define IOC_PB28_FUNC_CTL_I2S0_RXD_3           IOC_PAD_FUNC_CTL_ALT_SELECT_SET(8)
561 #define IOC_PB28_FUNC_CTL_FEMC_A_07            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(12)
562 #define IOC_PB28_FUNC_CTL_TRGM0_P_08           IOC_PAD_FUNC_CTL_ALT_SELECT_SET(16)
563 
564 /* IOC_PB29_FUNC_CTL function mux definitions */
565 #define IOC_PB29_FUNC_CTL_GPIO_B_29            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(0)
566 #define IOC_PB29_FUNC_CTL_UART3_RXD            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(2)
567 #define IOC_PB29_FUNC_CTL_SPI1_SCLK            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(5)
568 #define IOC_PB29_FUNC_CTL_I2S0_TXD_3           IOC_PAD_FUNC_CTL_ALT_SELECT_SET(8)
569 #define IOC_PB29_FUNC_CTL_FEMC_A_06            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(12)
570 #define IOC_PB29_FUNC_CTL_TRGM0_P_09           IOC_PAD_FUNC_CTL_ALT_SELECT_SET(16)
571 
572 /* IOC_PB30_FUNC_CTL function mux definitions */
573 #define IOC_PB30_FUNC_CTL_GPIO_B_30            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(0)
574 #define IOC_PB30_FUNC_CTL_UART2_DE             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(2)
575 #define IOC_PB30_FUNC_CTL_UART2_RTS            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(3)
576 #define IOC_PB30_FUNC_CTL_SPI1_MOSI            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(5)
577 #define IOC_PB30_FUNC_CTL_I2S0_TXD_2           IOC_PAD_FUNC_CTL_ALT_SELECT_SET(8)
578 #define IOC_PB30_FUNC_CTL_FEMC_A_05            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(12)
579 #define IOC_PB30_FUNC_CTL_TRGM0_P_10           IOC_PAD_FUNC_CTL_ALT_SELECT_SET(16)
580 
581 /* IOC_PB31_FUNC_CTL function mux definitions */
582 #define IOC_PB31_FUNC_CTL_GPIO_B_31            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(0)
583 #define IOC_PB31_FUNC_CTL_UART2_CTS            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(3)
584 #define IOC_PB31_FUNC_CTL_SPI2_CSN             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(5)
585 #define IOC_PB31_FUNC_CTL_I2S0_TXD_1           IOC_PAD_FUNC_CTL_ALT_SELECT_SET(8)
586 #define IOC_PB31_FUNC_CTL_FEMC_A_04            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(12)
587 #define IOC_PB31_FUNC_CTL_TRGM0_P_11           IOC_PAD_FUNC_CTL_ALT_SELECT_SET(16)
588 
589 /* IOC_PC00_FUNC_CTL function mux definitions */
590 #define IOC_PC00_FUNC_CTL_GPIO_C_00            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(0)
591 #define IOC_PC00_FUNC_CTL_UART3_DE             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(2)
592 #define IOC_PC00_FUNC_CTL_UART3_RTS            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(3)
593 #define IOC_PC00_FUNC_CTL_SPI2_MISO            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(5)
594 #define IOC_PC00_FUNC_CTL_I2S0_TXD_0           IOC_PAD_FUNC_CTL_ALT_SELECT_SET(8)
595 #define IOC_PC00_FUNC_CTL_FEMC_SRDY            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(12)
596 #define IOC_PC00_FUNC_CTL_PWM0_P_0             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(16)
597 #define IOC_PC00_FUNC_CTL_USB0_ID              IOC_PAD_FUNC_CTL_ALT_SELECT_SET(24)
598 
599 /* IOC_PC01_FUNC_CTL function mux definitions */
600 #define IOC_PC01_FUNC_CTL_GPIO_C_01            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(0)
601 #define IOC_PC01_FUNC_CTL_UART3_CTS            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(3)
602 #define IOC_PC01_FUNC_CTL_SPI2_SCLK            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(5)
603 #define IOC_PC01_FUNC_CTL_I2S0_BCLK            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(8)
604 #define IOC_PC01_FUNC_CTL_FEMC_DQS             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(12)
605 #define IOC_PC01_FUNC_CTL_PWM0_P_1             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(16)
606 #define IOC_PC01_FUNC_CTL_USB0_PWR             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(24)
607 
608 /* IOC_PC02_FUNC_CTL function mux definitions */
609 #define IOC_PC02_FUNC_CTL_GPIO_C_02            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(0)
610 #define IOC_PC02_FUNC_CTL_UART4_DE             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(2)
611 #define IOC_PC02_FUNC_CTL_UART4_RTS            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(3)
612 #define IOC_PC02_FUNC_CTL_SPI2_MOSI            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(5)
613 #define IOC_PC02_FUNC_CTL_I2S0_FCLK            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(8)
614 #define IOC_PC02_FUNC_CTL_PWM0_P_2             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(16)
615 #define IOC_PC02_FUNC_CTL_USB0_OC              IOC_PAD_FUNC_CTL_ALT_SELECT_SET(24)
616 
617 /* IOC_PC03_FUNC_CTL function mux definitions */
618 #define IOC_PC03_FUNC_CTL_GPIO_C_03            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(0)
619 #define IOC_PC03_FUNC_CTL_UART4_CTS            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(3)
620 #define IOC_PC03_FUNC_CTL_SPI2_DAT2            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(5)
621 #define IOC_PC03_FUNC_CTL_I2S0_MCLK            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(8)
622 #define IOC_PC03_FUNC_CTL_I2S1_TXD_3           IOC_PAD_FUNC_CTL_ALT_SELECT_SET(9)
623 #define IOC_PC03_FUNC_CTL_PDM0_CLK             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(10)
624 #define IOC_PC03_FUNC_CTL_PWM0_P_3             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(16)
625 
626 /* IOC_PC04_FUNC_CTL function mux definitions */
627 #define IOC_PC04_FUNC_CTL_GPIO_C_04            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(0)
628 #define IOC_PC04_FUNC_CTL_UART5_DE             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(2)
629 #define IOC_PC04_FUNC_CTL_UART5_RTS            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(3)
630 #define IOC_PC04_FUNC_CTL_SPI2_DAT3            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(5)
631 #define IOC_PC04_FUNC_CTL_I2S0_RXD_0           IOC_PAD_FUNC_CTL_ALT_SELECT_SET(8)
632 #define IOC_PC04_FUNC_CTL_I2S1_TXD_2           IOC_PAD_FUNC_CTL_ALT_SELECT_SET(9)
633 #define IOC_PC04_FUNC_CTL_PDM0_D_2             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(10)
634 #define IOC_PC04_FUNC_CTL_PWM0_P_4             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(16)
635 
636 /* IOC_PC05_FUNC_CTL function mux definitions */
637 #define IOC_PC05_FUNC_CTL_GPIO_C_05            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(0)
638 #define IOC_PC05_FUNC_CTL_UART5_CTS            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(3)
639 #define IOC_PC05_FUNC_CTL_SPI2_SCLK            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(5)
640 #define IOC_PC05_FUNC_CTL_I2S0_RXD_1           IOC_PAD_FUNC_CTL_ALT_SELECT_SET(8)
641 #define IOC_PC05_FUNC_CTL_I2S1_TXD_1           IOC_PAD_FUNC_CTL_ALT_SELECT_SET(9)
642 #define IOC_PC05_FUNC_CTL_PDM0_D_3             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(10)
643 #define IOC_PC05_FUNC_CTL_PWM0_P_5             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(16)
644 #define IOC_PC05_FUNC_CTL_USB0_OC              IOC_PAD_FUNC_CTL_ALT_SELECT_SET(24)
645 
646 /* IOC_PC06_FUNC_CTL function mux definitions */
647 #define IOC_PC06_FUNC_CTL_GPIO_C_06            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(0)
648 #define IOC_PC06_FUNC_CTL_GPTMR2_CAPT_0        IOC_PAD_FUNC_CTL_ALT_SELECT_SET(1)
649 #define IOC_PC06_FUNC_CTL_UART4_TXD            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(2)
650 #define IOC_PC06_FUNC_CTL_SPI2_MISO            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(5)
651 #define IOC_PC06_FUNC_CTL_I2S0_RXD_2           IOC_PAD_FUNC_CTL_ALT_SELECT_SET(8)
652 #define IOC_PC06_FUNC_CTL_I2S1_TXD_0           IOC_PAD_FUNC_CTL_ALT_SELECT_SET(9)
653 #define IOC_PC06_FUNC_CTL_PDM0_CLK             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(10)
654 #define IOC_PC06_FUNC_CTL_USB0_ID              IOC_PAD_FUNC_CTL_ALT_SELECT_SET(24)
655 
656 /* IOC_PC07_FUNC_CTL function mux definitions */
657 #define IOC_PC07_FUNC_CTL_GPIO_C_07            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(0)
658 #define IOC_PC07_FUNC_CTL_GPTMR2_CAPT_1        IOC_PAD_FUNC_CTL_ALT_SELECT_SET(1)
659 #define IOC_PC07_FUNC_CTL_UART4_RXD            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(2)
660 #define IOC_PC07_FUNC_CTL_SPI2_MOSI            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(5)
661 #define IOC_PC07_FUNC_CTL_I2S0_RXD_3           IOC_PAD_FUNC_CTL_ALT_SELECT_SET(8)
662 #define IOC_PC07_FUNC_CTL_I2S1_MCLK            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(9)
663 #define IOC_PC07_FUNC_CTL_PDM0_D_0             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(10)
664 #define IOC_PC07_FUNC_CTL_ETH0_MDIO            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(19)
665 #define IOC_PC07_FUNC_CTL_USB0_OC              IOC_PAD_FUNC_CTL_ALT_SELECT_SET(24)
666 
667 /* IOC_PC08_FUNC_CTL function mux definitions */
668 #define IOC_PC08_FUNC_CTL_GPIO_C_08            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(0)
669 #define IOC_PC08_FUNC_CTL_GPTMR2_COMP_0        IOC_PAD_FUNC_CTL_ALT_SELECT_SET(1)
670 #define IOC_PC08_FUNC_CTL_UART5_TXD            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(2)
671 #define IOC_PC08_FUNC_CTL_SPI2_CSN             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(5)
672 #define IOC_PC08_FUNC_CTL_I2S1_FCLK            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(9)
673 #define IOC_PC08_FUNC_CTL_PDM0_D_1             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(10)
674 #define IOC_PC08_FUNC_CTL_ETH0_MDC             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(19)
675 #define IOC_PC08_FUNC_CTL_USB0_PWR             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(24)
676 
677 /* IOC_PC09_FUNC_CTL function mux definitions */
678 #define IOC_PC09_FUNC_CTL_GPIO_C_09            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(0)
679 #define IOC_PC09_FUNC_CTL_GPTMR2_COMP_1        IOC_PAD_FUNC_CTL_ALT_SELECT_SET(1)
680 #define IOC_PC09_FUNC_CTL_UART5_RXD            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(2)
681 #define IOC_PC09_FUNC_CTL_I2C2_SCL             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(4)
682 #define IOC_PC09_FUNC_CTL_CAN0_TXD             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(7)
683 #define IOC_PC09_FUNC_CTL_I2S1_BCLK            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(9)
684 #define IOC_PC09_FUNC_CTL_DAOR_N               IOC_PAD_FUNC_CTL_ALT_SELECT_SET(10)
685 
686 /* IOC_PC10_FUNC_CTL function mux definitions */
687 #define IOC_PC10_FUNC_CTL_GPIO_C_10            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(0)
688 #define IOC_PC10_FUNC_CTL_GPTMR3_CAPT_0        IOC_PAD_FUNC_CTL_ALT_SELECT_SET(1)
689 #define IOC_PC10_FUNC_CTL_UART6_TXD            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(2)
690 #define IOC_PC10_FUNC_CTL_I2C2_SDA             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(4)
691 #define IOC_PC10_FUNC_CTL_CAN0_RXD             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(7)
692 #define IOC_PC10_FUNC_CTL_I2S1_RXD_0           IOC_PAD_FUNC_CTL_ALT_SELECT_SET(9)
693 #define IOC_PC10_FUNC_CTL_DAOR_P               IOC_PAD_FUNC_CTL_ALT_SELECT_SET(10)
694 
695 /* IOC_PC11_FUNC_CTL function mux definitions */
696 #define IOC_PC11_FUNC_CTL_GPIO_C_11            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(0)
697 #define IOC_PC11_FUNC_CTL_GPTMR3_CAPT_1        IOC_PAD_FUNC_CTL_ALT_SELECT_SET(1)
698 #define IOC_PC11_FUNC_CTL_UART6_RXD            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(2)
699 #define IOC_PC11_FUNC_CTL_I2C3_SCL             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(4)
700 #define IOC_PC11_FUNC_CTL_CAN0_STBY            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(7)
701 #define IOC_PC11_FUNC_CTL_I2S1_RXD_1           IOC_PAD_FUNC_CTL_ALT_SELECT_SET(9)
702 #define IOC_PC11_FUNC_CTL_DAOL_N               IOC_PAD_FUNC_CTL_ALT_SELECT_SET(10)
703 
704 /* IOC_PC12_FUNC_CTL function mux definitions */
705 #define IOC_PC12_FUNC_CTL_GPIO_C_12            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(0)
706 #define IOC_PC12_FUNC_CTL_GPTMR3_COMP_0        IOC_PAD_FUNC_CTL_ALT_SELECT_SET(1)
707 #define IOC_PC12_FUNC_CTL_UART7_TXD            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(2)
708 #define IOC_PC12_FUNC_CTL_I2C3_SDA             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(4)
709 #define IOC_PC12_FUNC_CTL_CAN1_STBY            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(7)
710 #define IOC_PC12_FUNC_CTL_I2S1_RXD_2           IOC_PAD_FUNC_CTL_ALT_SELECT_SET(9)
711 #define IOC_PC12_FUNC_CTL_DAOL_P               IOC_PAD_FUNC_CTL_ALT_SELECT_SET(10)
712 
713 /* IOC_PC13_FUNC_CTL function mux definitions */
714 #define IOC_PC13_FUNC_CTL_GPIO_C_13            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(0)
715 #define IOC_PC13_FUNC_CTL_GPTMR3_COMP_1        IOC_PAD_FUNC_CTL_ALT_SELECT_SET(1)
716 #define IOC_PC13_FUNC_CTL_UART7_RXD            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(2)
717 #define IOC_PC13_FUNC_CTL_I2C0_SCL             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(4)
718 #define IOC_PC13_FUNC_CTL_CAN1_TXD             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(7)
719 #define IOC_PC13_FUNC_CTL_I2S1_RXD_3           IOC_PAD_FUNC_CTL_ALT_SELECT_SET(9)
720 
721 /* IOC_PC14_FUNC_CTL function mux definitions */
722 #define IOC_PC14_FUNC_CTL_GPIO_C_14            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(0)
723 #define IOC_PC14_FUNC_CTL_UART6_DE             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(2)
724 #define IOC_PC14_FUNC_CTL_UART6_RTS            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(3)
725 #define IOC_PC14_FUNC_CTL_I2C0_SDA             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(4)
726 #define IOC_PC14_FUNC_CTL_CAN1_RXD             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(7)
727 #define IOC_PC14_FUNC_CTL_I2S1_MCLK            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(9)
728 #define IOC_PC14_FUNC_CTL_ACMP_COMP_0          IOC_PAD_FUNC_CTL_ALT_SELECT_SET(16)
729 
730 /* IOC_PC15_FUNC_CTL function mux definitions */
731 #define IOC_PC15_FUNC_CTL_GPIO_C_15            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(0)
732 #define IOC_PC15_FUNC_CTL_UART6_CTS            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(3)
733 #define IOC_PC15_FUNC_CTL_I2C1_SCL             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(4)
734 #define IOC_PC15_FUNC_CTL_ACMP_COMP_1          IOC_PAD_FUNC_CTL_ALT_SELECT_SET(16)
735 
736 /* IOC_PC16_FUNC_CTL function mux definitions */
737 #define IOC_PC16_FUNC_CTL_GPIO_C_16            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(0)
738 #define IOC_PC16_FUNC_CTL_UART7_DE             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(2)
739 #define IOC_PC16_FUNC_CTL_UART7_RTS            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(3)
740 #define IOC_PC16_FUNC_CTL_I2C1_SDA             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(4)
741 #define IOC_PC16_FUNC_CTL_I2S1_TXD_3           IOC_PAD_FUNC_CTL_ALT_SELECT_SET(9)
742 
743 /* IOC_PC17_FUNC_CTL function mux definitions */
744 #define IOC_PC17_FUNC_CTL_GPIO_C_17            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(0)
745 #define IOC_PC17_FUNC_CTL_UART7_CTS            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(3)
746 #define IOC_PC17_FUNC_CTL_I2S1_TXD_2           IOC_PAD_FUNC_CTL_ALT_SELECT_SET(9)
747 #define IOC_PC17_FUNC_CTL_PDM0_D_1             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(10)
748 
749 /* IOC_PC18_FUNC_CTL function mux definitions */
750 #define IOC_PC18_FUNC_CTL_GPIO_C_18            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(0)
751 #define IOC_PC18_FUNC_CTL_UART0_DE             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(2)
752 #define IOC_PC18_FUNC_CTL_UART0_RTS            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(3)
753 #define IOC_PC18_FUNC_CTL_SPI3_CSN             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(5)
754 #define IOC_PC18_FUNC_CTL_I2S1_TXD_1           IOC_PAD_FUNC_CTL_ALT_SELECT_SET(9)
755 #define IOC_PC18_FUNC_CTL_PDM0_D_0             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(10)
756 
757 /* IOC_PC19_FUNC_CTL function mux definitions */
758 #define IOC_PC19_FUNC_CTL_GPIO_C_19            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(0)
759 #define IOC_PC19_FUNC_CTL_UART0_CTS            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(3)
760 #define IOC_PC19_FUNC_CTL_SPI3_MISO            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(5)
761 #define IOC_PC19_FUNC_CTL_I2S1_TXD_0           IOC_PAD_FUNC_CTL_ALT_SELECT_SET(9)
762 #define IOC_PC19_FUNC_CTL_PDM0_CLK             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(10)
763 
764 /* IOC_PC20_FUNC_CTL function mux definitions */
765 #define IOC_PC20_FUNC_CTL_GPIO_C_20            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(0)
766 #define IOC_PC20_FUNC_CTL_UART1_DE             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(2)
767 #define IOC_PC20_FUNC_CTL_UART1_RTS            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(3)
768 #define IOC_PC20_FUNC_CTL_SPI3_SCLK            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(5)
769 #define IOC_PC20_FUNC_CTL_I2S1_MCLK            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(9)
770 #define IOC_PC20_FUNC_CTL_PDM0_D_3             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(10)
771 #define IOC_PC20_FUNC_CTL_ETH0_EVTO_1          IOC_PAD_FUNC_CTL_ALT_SELECT_SET(19)
772 #define IOC_PC20_FUNC_CTL_WDG0_RST             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(24)
773 
774 /* IOC_PC21_FUNC_CTL function mux definitions */
775 #define IOC_PC21_FUNC_CTL_GPIO_C_21            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(0)
776 #define IOC_PC21_FUNC_CTL_UART1_CTS            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(3)
777 #define IOC_PC21_FUNC_CTL_SPI3_MOSI            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(5)
778 #define IOC_PC21_FUNC_CTL_I2S1_FCLK            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(9)
779 #define IOC_PC21_FUNC_CTL_PDM0_D_2             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(10)
780 #define IOC_PC21_FUNC_CTL_ETH0_EVTO_0          IOC_PAD_FUNC_CTL_ALT_SELECT_SET(19)
781 #define IOC_PC21_FUNC_CTL_WDG1_RST             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(24)
782 
783 /* IOC_PC22_FUNC_CTL function mux definitions */
784 #define IOC_PC22_FUNC_CTL_GPIO_C_22            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(0)
785 #define IOC_PC22_FUNC_CTL_UART0_TXD            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(2)
786 #define IOC_PC22_FUNC_CTL_SPI2_CSN             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(5)
787 #define IOC_PC22_FUNC_CTL_I2S1_BCLK            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(9)
788 #define IOC_PC22_FUNC_CTL_PDM0_CLK             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(10)
789 #define IOC_PC22_FUNC_CTL_SDC0_WP              IOC_PAD_FUNC_CTL_ALT_SELECT_SET(17)
790 #define IOC_PC22_FUNC_CTL_ETH0_MDIO            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(19)
791 
792 /* IOC_PC23_FUNC_CTL function mux definitions */
793 #define IOC_PC23_FUNC_CTL_GPIO_C_23            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(0)
794 #define IOC_PC23_FUNC_CTL_UART0_RXD            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(2)
795 #define IOC_PC23_FUNC_CTL_SPI2_MOSI            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(5)
796 #define IOC_PC23_FUNC_CTL_I2S1_MCLK            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(9)
797 #define IOC_PC23_FUNC_CTL_SDC0_VSEL            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(17)
798 #define IOC_PC23_FUNC_CTL_ETH0_MDC             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(19)
799 
800 /* IOC_PC24_FUNC_CTL function mux definitions */
801 #define IOC_PC24_FUNC_CTL_GPIO_C_24            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(0)
802 #define IOC_PC24_FUNC_CTL_UART1_TXD            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(2)
803 #define IOC_PC24_FUNC_CTL_SPI2_MISO            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(5)
804 #define IOC_PC24_FUNC_CTL_I2S1_RXD_0           IOC_PAD_FUNC_CTL_ALT_SELECT_SET(9)
805 #define IOC_PC24_FUNC_CTL_SDC0_CDN             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(17)
806 
807 /* IOC_PC25_FUNC_CTL function mux definitions */
808 #define IOC_PC25_FUNC_CTL_GPIO_C_25            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(0)
809 #define IOC_PC25_FUNC_CTL_UART1_RXD            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(2)
810 #define IOC_PC25_FUNC_CTL_SPI2_SCLK            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(5)
811 #define IOC_PC25_FUNC_CTL_I2S1_RXD_1           IOC_PAD_FUNC_CTL_ALT_SELECT_SET(9)
812 #define IOC_PC25_FUNC_CTL_SDC0_WP              IOC_PAD_FUNC_CTL_ALT_SELECT_SET(17)
813 
814 /* IOC_PC26_FUNC_CTL function mux definitions */
815 #define IOC_PC26_FUNC_CTL_GPIO_C_26            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(0)
816 #define IOC_PC26_FUNC_CTL_UART2_TXD            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(2)
817 #define IOC_PC26_FUNC_CTL_SPI2_DAT3            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(5)
818 #define IOC_PC26_FUNC_CTL_I2S1_RXD_2           IOC_PAD_FUNC_CTL_ALT_SELECT_SET(9)
819 #define IOC_PC26_FUNC_CTL_SDC0_VSEL            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(17)
820 #define IOC_PC26_FUNC_CTL_ETH0_EVTI_1          IOC_PAD_FUNC_CTL_ALT_SELECT_SET(19)
821 
822 /* IOC_PC27_FUNC_CTL function mux definitions */
823 #define IOC_PC27_FUNC_CTL_GPIO_C_27            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(0)
824 #define IOC_PC27_FUNC_CTL_UART2_RXD            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(2)
825 #define IOC_PC27_FUNC_CTL_SPI2_DAT2            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(5)
826 #define IOC_PC27_FUNC_CTL_I2S1_RXD_3           IOC_PAD_FUNC_CTL_ALT_SELECT_SET(9)
827 #define IOC_PC27_FUNC_CTL_SDC0_CDN             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(17)
828 #define IOC_PC27_FUNC_CTL_ETH0_EVTI_0          IOC_PAD_FUNC_CTL_ALT_SELECT_SET(19)
829 
830 /* IOC_PX00_FUNC_CTL function mux definitions */
831 #define IOC_PX00_FUNC_CTL_GPIO_X_00            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(0)
832 #define IOC_PX00_FUNC_CTL_XPI0_CA_D_2          IOC_PAD_FUNC_CTL_ALT_SELECT_SET(14)
833 
834 /* IOC_PX01_FUNC_CTL function mux definitions */
835 #define IOC_PX01_FUNC_CTL_GPIO_X_01            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(0)
836 #define IOC_PX01_FUNC_CTL_XPI0_CA_D_1          IOC_PAD_FUNC_CTL_ALT_SELECT_SET(14)
837 
838 /* IOC_PX02_FUNC_CTL function mux definitions */
839 #define IOC_PX02_FUNC_CTL_GPIO_X_02            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(0)
840 #define IOC_PX02_FUNC_CTL_XPI0_CA_CS0          IOC_PAD_FUNC_CTL_ALT_SELECT_SET(14)
841 
842 /* IOC_PX03_FUNC_CTL function mux definitions */
843 #define IOC_PX03_FUNC_CTL_GPIO_X_03            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(0)
844 #define IOC_PX03_FUNC_CTL_XPI0_CA_D_0          IOC_PAD_FUNC_CTL_ALT_SELECT_SET(14)
845 
846 /* IOC_PX04_FUNC_CTL function mux definitions */
847 #define IOC_PX04_FUNC_CTL_GPIO_X_04            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(0)
848 #define IOC_PX04_FUNC_CTL_XPI0_CA_SCLK         IOC_PAD_FUNC_CTL_ALT_SELECT_SET(14)
849 
850 /* IOC_PX05_FUNC_CTL function mux definitions */
851 #define IOC_PX05_FUNC_CTL_GPIO_X_05            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(0)
852 #define IOC_PX05_FUNC_CTL_XPI0_CA_D_3          IOC_PAD_FUNC_CTL_ALT_SELECT_SET(14)
853 
854 /* IOC_PX06_FUNC_CTL function mux definitions */
855 #define IOC_PX06_FUNC_CTL_GPIO_X_06            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(0)
856 #define IOC_PX06_FUNC_CTL_XPI0_CA_DQS          IOC_PAD_FUNC_CTL_ALT_SELECT_SET(14)
857 
858 /* IOC_PX07_FUNC_CTL function mux definitions */
859 #define IOC_PX07_FUNC_CTL_GPIO_X_07            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(0)
860 #define IOC_PX07_FUNC_CTL_FEMC_DQS             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(12)
861 #define IOC_PX07_FUNC_CTL_XPI1_CA_DQS          IOC_PAD_FUNC_CTL_ALT_SELECT_SET(14)
862 
863 /* IOC_PY00_FUNC_CTL function mux definitions */
864 #define IOC_PY00_FUNC_CTL_GPIO_Y_00            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(0)
865 #define IOC_PY00_FUNC_CTL_UART7_DE             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(2)
866 #define IOC_PY00_FUNC_CTL_UART7_RTS            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(3)
867 #define IOC_PY00_FUNC_CTL_SPI3_CSN             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(5)
868 #define IOC_PY00_FUNC_CTL_CAN0_TXD             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(7)
869 
870 /* IOC_PY01_FUNC_CTL function mux definitions */
871 #define IOC_PY01_FUNC_CTL_GPIO_Y_01            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(0)
872 #define IOC_PY01_FUNC_CTL_UART7_CTS            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(3)
873 #define IOC_PY01_FUNC_CTL_SPI3_MISO            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(5)
874 #define IOC_PY01_FUNC_CTL_CAN0_RXD             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(7)
875 
876 /* IOC_PY02_FUNC_CTL function mux definitions */
877 #define IOC_PY02_FUNC_CTL_GPIO_Y_02            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(0)
878 #define IOC_PY02_FUNC_CTL_UART0_DE             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(2)
879 #define IOC_PY02_FUNC_CTL_UART0_RTS            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(3)
880 #define IOC_PY02_FUNC_CTL_SPI3_SCLK            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(5)
881 
882 /* IOC_PY03_FUNC_CTL function mux definitions */
883 #define IOC_PY03_FUNC_CTL_GPIO_Y_03            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(0)
884 #define IOC_PY03_FUNC_CTL_UART0_CTS            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(3)
885 #define IOC_PY03_FUNC_CTL_SPI3_MOSI            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(5)
886 
887 /* IOC_PY04_FUNC_CTL function mux definitions */
888 #define IOC_PY04_FUNC_CTL_GPIO_Y_04            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(0)
889 #define IOC_PY04_FUNC_CTL_UART7_TXD            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(2)
890 #define IOC_PY04_FUNC_CTL_I2C0_SCL             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(4)
891 #define IOC_PY04_FUNC_CTL_CAN1_TXD             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(7)
892 #define IOC_PY04_FUNC_CTL_DAOR_P               IOC_PAD_FUNC_CTL_ALT_SELECT_SET(10)
893 #define IOC_PY04_FUNC_CTL_WDG0_RST             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(24)
894 
895 /* IOC_PY05_FUNC_CTL function mux definitions */
896 #define IOC_PY05_FUNC_CTL_GPIO_Y_05            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(0)
897 #define IOC_PY05_FUNC_CTL_UART7_RXD            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(2)
898 #define IOC_PY05_FUNC_CTL_I2C0_SDA             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(4)
899 #define IOC_PY05_FUNC_CTL_CAN1_RXD             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(7)
900 #define IOC_PY05_FUNC_CTL_DAOR_N               IOC_PAD_FUNC_CTL_ALT_SELECT_SET(10)
901 #define IOC_PY05_FUNC_CTL_WDG1_RST             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(24)
902 
903 /* IOC_PY06_FUNC_CTL function mux definitions */
904 #define IOC_PY06_FUNC_CTL_GPIO_Y_06            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(0)
905 #define IOC_PY06_FUNC_CTL_UART0_TXD            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(2)
906 #define IOC_PY06_FUNC_CTL_I2C1_SCL             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(4)
907 #define IOC_PY06_FUNC_CTL_DAOL_P               IOC_PAD_FUNC_CTL_ALT_SELECT_SET(10)
908 
909 /* IOC_PY07_FUNC_CTL function mux definitions */
910 #define IOC_PY07_FUNC_CTL_GPIO_Y_07            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(0)
911 #define IOC_PY07_FUNC_CTL_UART0_RXD            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(2)
912 #define IOC_PY07_FUNC_CTL_I2C1_SDA             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(4)
913 #define IOC_PY07_FUNC_CTL_DAOL_N               IOC_PAD_FUNC_CTL_ALT_SELECT_SET(10)
914 
915 /* IOC_PZ00_FUNC_CTL function mux definitions */
916 #define IOC_PZ00_FUNC_CTL_GPIO_Z_00            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(0)
917 #define IOC_PZ00_FUNC_CTL_UART3_TXD            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(2)
918 #define IOC_PZ00_FUNC_CTL_CAN0_TXD             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(7)
919 
920 /* IOC_PZ01_FUNC_CTL function mux definitions */
921 #define IOC_PZ01_FUNC_CTL_GPIO_Z_01            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(0)
922 #define IOC_PZ01_FUNC_CTL_UART3_RXD            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(2)
923 #define IOC_PZ01_FUNC_CTL_CAN0_RXD             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(7)
924 
925 /* IOC_PZ02_FUNC_CTL function mux definitions */
926 #define IOC_PZ02_FUNC_CTL_GPIO_Z_02            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(0)
927 #define IOC_PZ02_FUNC_CTL_UART4_TXD            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(2)
928 #define IOC_PZ02_FUNC_CTL_I2C2_SCL             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(4)
929 
930 /* IOC_PZ03_FUNC_CTL function mux definitions */
931 #define IOC_PZ03_FUNC_CTL_GPIO_Z_03            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(0)
932 #define IOC_PZ03_FUNC_CTL_UART4_RXD            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(2)
933 #define IOC_PZ03_FUNC_CTL_I2C2_SDA             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(4)
934 
935 /* IOC_PZ04_FUNC_CTL function mux definitions */
936 #define IOC_PZ04_FUNC_CTL_GPIO_Z_04            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(0)
937 #define IOC_PZ04_FUNC_CTL_UART5_TXD            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(2)
938 #define IOC_PZ04_FUNC_CTL_CAN1_TXD             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(7)
939 
940 /* IOC_PZ05_FUNC_CTL function mux definitions */
941 #define IOC_PZ05_FUNC_CTL_GPIO_Z_05            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(0)
942 #define IOC_PZ05_FUNC_CTL_UART5_RXD            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(2)
943 #define IOC_PZ05_FUNC_CTL_CAN1_RXD             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(7)
944 
945 /* IOC_PZ06_FUNC_CTL function mux definitions */
946 #define IOC_PZ06_FUNC_CTL_GPIO_Z_06            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(0)
947 #define IOC_PZ06_FUNC_CTL_UART6_TXD            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(2)
948 #define IOC_PZ06_FUNC_CTL_I2C3_SCL             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(4)
949 
950 /* IOC_PZ07_FUNC_CTL function mux definitions */
951 #define IOC_PZ07_FUNC_CTL_GPIO_Z_07            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(0)
952 #define IOC_PZ07_FUNC_CTL_UART6_RXD            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(2)
953 #define IOC_PZ07_FUNC_CTL_I2C3_SDA             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(4)
954 
955 
956 #endif /* HPM_IOMUX_H */
957