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1 /*
2  * Copyright (c) 2021-2023 HPMicro
3  *
4  * SPDX-License-Identifier: BSD-3-Clause
5  *
6  */
7 
8 
9 #ifndef HPM_IOMUX_H
10 #define HPM_IOMUX_H
11 
12 /* IOC_PA00_FUNC_CTL function mux definitions */
13 #define IOC_PA00_FUNC_CTL_GPIO_A_00            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(0)
14 #define IOC_PA00_FUNC_CTL_GPTMR1_COMP_0        IOC_PAD_FUNC_CTL_ALT_SELECT_SET(1)
15 #define IOC_PA00_FUNC_CTL_UART0_TXD            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(2)
16 #define IOC_PA00_FUNC_CTL_LIN0_TXD             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(6)
17 #define IOC_PA00_FUNC_CTL_CAN0_TXD             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(7)
18 #define IOC_PA00_FUNC_CTL_DAO_RN               IOC_PAD_FUNC_CTL_ALT_SELECT_SET(10)
19 
20 /* IOC_PA01_FUNC_CTL function mux definitions */
21 #define IOC_PA01_FUNC_CTL_GPIO_A_01            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(0)
22 #define IOC_PA01_FUNC_CTL_GPTMR1_CAPT_0        IOC_PAD_FUNC_CTL_ALT_SELECT_SET(1)
23 #define IOC_PA01_FUNC_CTL_UART0_RXD            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(2)
24 #define IOC_PA01_FUNC_CTL_LIN0_RXD             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(6)
25 #define IOC_PA01_FUNC_CTL_CAN0_RXD             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(7)
26 #define IOC_PA01_FUNC_CTL_DAO_RP               IOC_PAD_FUNC_CTL_ALT_SELECT_SET(10)
27 
28 /* IOC_PA02_FUNC_CTL function mux definitions */
29 #define IOC_PA02_FUNC_CTL_GPIO_A_02            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(0)
30 #define IOC_PA02_FUNC_CTL_GPTMR1_COMP_1        IOC_PAD_FUNC_CTL_ALT_SELECT_SET(1)
31 #define IOC_PA02_FUNC_CTL_UART0_DE             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(2)
32 #define IOC_PA02_FUNC_CTL_UART0_RTS            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(3)
33 #define IOC_PA02_FUNC_CTL_LIN0_TREN            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(6)
34 #define IOC_PA02_FUNC_CTL_CAN0_STBY            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(7)
35 #define IOC_PA02_FUNC_CTL_DAO_LN               IOC_PAD_FUNC_CTL_ALT_SELECT_SET(10)
36 
37 /* IOC_PA03_FUNC_CTL function mux definitions */
38 #define IOC_PA03_FUNC_CTL_GPIO_A_03            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(0)
39 #define IOC_PA03_FUNC_CTL_GPTMR1_CAPT_1        IOC_PAD_FUNC_CTL_ALT_SELECT_SET(1)
40 #define IOC_PA03_FUNC_CTL_UART0_CTS            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(3)
41 #define IOC_PA03_FUNC_CTL_CAN1_STBY            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(7)
42 #define IOC_PA03_FUNC_CTL_DAO_LP               IOC_PAD_FUNC_CTL_ALT_SELECT_SET(10)
43 
44 /* IOC_PA04_FUNC_CTL function mux definitions */
45 #define IOC_PA04_FUNC_CTL_GPIO_A_04            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(0)
46 #define IOC_PA04_FUNC_CTL_GPTMR1_CAPT_2        IOC_PAD_FUNC_CTL_ALT_SELECT_SET(1)
47 #define IOC_PA04_FUNC_CTL_UART1_CTS            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(3)
48 #define IOC_PA04_FUNC_CTL_CAN1_RXD             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(7)
49 #define IOC_PA04_FUNC_CTL_JTAG_TDO             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(24)
50 
51 /* IOC_PA05_FUNC_CTL function mux definitions */
52 #define IOC_PA05_FUNC_CTL_GPIO_A_05            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(0)
53 #define IOC_PA05_FUNC_CTL_GPTMR1_COMP_2        IOC_PAD_FUNC_CTL_ALT_SELECT_SET(1)
54 #define IOC_PA05_FUNC_CTL_UART1_DE             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(2)
55 #define IOC_PA05_FUNC_CTL_UART1_RTS            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(3)
56 #define IOC_PA05_FUNC_CTL_LIN1_TREN            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(6)
57 #define IOC_PA05_FUNC_CTL_CAN1_TXD             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(7)
58 #define IOC_PA05_FUNC_CTL_JTAG_TDI             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(24)
59 
60 /* IOC_PA06_FUNC_CTL function mux definitions */
61 #define IOC_PA06_FUNC_CTL_GPIO_A_06            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(0)
62 #define IOC_PA06_FUNC_CTL_GPTMR0_CAPT_0        IOC_PAD_FUNC_CTL_ALT_SELECT_SET(1)
63 #define IOC_PA06_FUNC_CTL_UART1_RXD            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(2)
64 #define IOC_PA06_FUNC_CTL_LIN1_TXD             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(6)
65 #define IOC_PA06_FUNC_CTL_JTAG_TCK             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(24)
66 
67 /* IOC_PA07_FUNC_CTL function mux definitions */
68 #define IOC_PA07_FUNC_CTL_GPIO_A_07            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(0)
69 #define IOC_PA07_FUNC_CTL_GPTMR0_COMP_0        IOC_PAD_FUNC_CTL_ALT_SELECT_SET(1)
70 #define IOC_PA07_FUNC_CTL_UART1_TXD            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(2)
71 #define IOC_PA07_FUNC_CTL_LIN1_RXD             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(6)
72 #define IOC_PA07_FUNC_CTL_JTAG_TMS             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(24)
73 
74 /* IOC_PA08_FUNC_CTL function mux definitions */
75 #define IOC_PA08_FUNC_CTL_GPIO_A_08            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(0)
76 #define IOC_PA08_FUNC_CTL_GPTMR0_COMP_1        IOC_PAD_FUNC_CTL_ALT_SELECT_SET(1)
77 #define IOC_PA08_FUNC_CTL_UART2_TXD            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(2)
78 #define IOC_PA08_FUNC_CTL_I2C0_SCL             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(4)
79 #define IOC_PA08_FUNC_CTL_CAN2_TXD             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(7)
80 #define IOC_PA08_FUNC_CTL_PDM0_D_1             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(10)
81 #define IOC_PA08_FUNC_CTL_JTAG_TRST            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(24)
82 
83 /* IOC_PA09_FUNC_CTL function mux definitions */
84 #define IOC_PA09_FUNC_CTL_GPIO_A_09            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(0)
85 #define IOC_PA09_FUNC_CTL_GPTMR0_CAPT_1        IOC_PAD_FUNC_CTL_ALT_SELECT_SET(1)
86 #define IOC_PA09_FUNC_CTL_UART2_RXD            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(2)
87 #define IOC_PA09_FUNC_CTL_I2C0_SDA             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(4)
88 #define IOC_PA09_FUNC_CTL_CAN2_RXD             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(7)
89 #define IOC_PA09_FUNC_CTL_PDM0_D_3             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(10)
90 
91 /* IOC_PA10_FUNC_CTL function mux definitions */
92 #define IOC_PA10_FUNC_CTL_GPIO_A_10            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(0)
93 #define IOC_PA10_FUNC_CTL_GPTMR0_COMP_2        IOC_PAD_FUNC_CTL_ALT_SELECT_SET(1)
94 #define IOC_PA10_FUNC_CTL_UART2_DE             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(2)
95 #define IOC_PA10_FUNC_CTL_UART2_RTS            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(3)
96 #define IOC_PA10_FUNC_CTL_SPI0_CS_0            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(5)
97 #define IOC_PA10_FUNC_CTL_LIN2_RXD             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(6)
98 #define IOC_PA10_FUNC_CTL_CAN2_STBY            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(7)
99 #define IOC_PA10_FUNC_CTL_PDM0_CLK             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(10)
100 #define IOC_PA10_FUNC_CTL_DIS0_G_4             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(20)
101 #define IOC_PA10_FUNC_CTL_CAM0_D_3             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(22)
102 
103 /* IOC_PA11_FUNC_CTL function mux definitions */
104 #define IOC_PA11_FUNC_CTL_GPIO_A_11            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(0)
105 #define IOC_PA11_FUNC_CTL_GPTMR0_CAPT_2        IOC_PAD_FUNC_CTL_ALT_SELECT_SET(1)
106 #define IOC_PA11_FUNC_CTL_UART2_CTS            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(3)
107 #define IOC_PA11_FUNC_CTL_SPI0_SCLK            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(5)
108 #define IOC_PA11_FUNC_CTL_LIN2_TXD             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(6)
109 #define IOC_PA11_FUNC_CTL_PDM0_CLK             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(10)
110 #define IOC_PA11_FUNC_CTL_DIS0_G_3             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(20)
111 #define IOC_PA11_FUNC_CTL_CAM0_D_2             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(22)
112 
113 /* IOC_PA12_FUNC_CTL function mux definitions */
114 #define IOC_PA12_FUNC_CTL_GPIO_A_12            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(0)
115 #define IOC_PA12_FUNC_CTL_GPTMR1_CAPT_3        IOC_PAD_FUNC_CTL_ALT_SELECT_SET(1)
116 #define IOC_PA12_FUNC_CTL_UART3_CTS            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(3)
117 #define IOC_PA12_FUNC_CTL_I2C1_SDA             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(4)
118 #define IOC_PA12_FUNC_CTL_SPI0_MISO            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(5)
119 #define IOC_PA12_FUNC_CTL_LIN2_TREN            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(6)
120 #define IOC_PA12_FUNC_CTL_PDM0_D_0             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(10)
121 #define IOC_PA12_FUNC_CTL_DIS0_G_6             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(20)
122 #define IOC_PA12_FUNC_CTL_CAM0_D_4             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(22)
123 
124 /* IOC_PA13_FUNC_CTL function mux definitions */
125 #define IOC_PA13_FUNC_CTL_GPIO_A_13            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(0)
126 #define IOC_PA13_FUNC_CTL_GPTMR1_COMP_3        IOC_PAD_FUNC_CTL_ALT_SELECT_SET(1)
127 #define IOC_PA13_FUNC_CTL_UART3_DE             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(2)
128 #define IOC_PA13_FUNC_CTL_UART3_RTS            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(3)
129 #define IOC_PA13_FUNC_CTL_I2C1_SCL             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(4)
130 #define IOC_PA13_FUNC_CTL_SPI0_MOSI            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(5)
131 #define IOC_PA13_FUNC_CTL_LIN3_TREN            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(6)
132 #define IOC_PA13_FUNC_CTL_CAN3_STBY            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(7)
133 #define IOC_PA13_FUNC_CTL_PDM0_D_2             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(10)
134 #define IOC_PA13_FUNC_CTL_DIS0_G_5             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(20)
135 #define IOC_PA13_FUNC_CTL_CAM0_D_5             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(22)
136 
137 /* IOC_PA14_FUNC_CTL function mux definitions */
138 #define IOC_PA14_FUNC_CTL_GPIO_A_14            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(0)
139 #define IOC_PA14_FUNC_CTL_GPTMR0_CAPT_3        IOC_PAD_FUNC_CTL_ALT_SELECT_SET(1)
140 #define IOC_PA14_FUNC_CTL_UART3_RXD            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(2)
141 #define IOC_PA14_FUNC_CTL_LIN3_RXD             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(6)
142 #define IOC_PA14_FUNC_CTL_CAN3_RXD             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(7)
143 #define IOC_PA14_FUNC_CTL_I2S0_RXD_1           IOC_PAD_FUNC_CTL_ALT_SELECT_SET(8)
144 #define IOC_PA14_FUNC_CTL_DIS0_CLK             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(20)
145 #define IOC_PA14_FUNC_CTL_CAM0_VSYNC           IOC_PAD_FUNC_CTL_ALT_SELECT_SET(22)
146 
147 /* IOC_PA15_FUNC_CTL function mux definitions */
148 #define IOC_PA15_FUNC_CTL_GPIO_A_15            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(0)
149 #define IOC_PA15_FUNC_CTL_GPTMR0_COMP_3        IOC_PAD_FUNC_CTL_ALT_SELECT_SET(1)
150 #define IOC_PA15_FUNC_CTL_UART3_TXD            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(2)
151 #define IOC_PA15_FUNC_CTL_LIN3_TXD             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(6)
152 #define IOC_PA15_FUNC_CTL_CAN3_TXD             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(7)
153 #define IOC_PA15_FUNC_CTL_I2S0_RXD_3           IOC_PAD_FUNC_CTL_ALT_SELECT_SET(8)
154 #define IOC_PA15_FUNC_CTL_DIS0_R_3             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(20)
155 #define IOC_PA15_FUNC_CTL_CAM0_HSYNC           IOC_PAD_FUNC_CTL_ALT_SELECT_SET(22)
156 
157 /* IOC_PA16_FUNC_CTL function mux definitions */
158 #define IOC_PA16_FUNC_CTL_GPIO_A_16            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(0)
159 #define IOC_PA16_FUNC_CTL_GPTMR3_COMP_0        IOC_PAD_FUNC_CTL_ALT_SELECT_SET(1)
160 #define IOC_PA16_FUNC_CTL_UART4_TXD            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(2)
161 #define IOC_PA16_FUNC_CTL_LIN4_TXD             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(6)
162 #define IOC_PA16_FUNC_CTL_CAN4_TXD             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(7)
163 #define IOC_PA16_FUNC_CTL_I2S0_RXD_0           IOC_PAD_FUNC_CTL_ALT_SELECT_SET(8)
164 #define IOC_PA16_FUNC_CTL_DIS0_R_5             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(20)
165 #define IOC_PA16_FUNC_CTL_CAM0_D_9             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(22)
166 
167 /* IOC_PA17_FUNC_CTL function mux definitions */
168 #define IOC_PA17_FUNC_CTL_GPIO_A_17            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(0)
169 #define IOC_PA17_FUNC_CTL_GPTMR3_CAPT_0        IOC_PAD_FUNC_CTL_ALT_SELECT_SET(1)
170 #define IOC_PA17_FUNC_CTL_UART4_RXD            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(2)
171 #define IOC_PA17_FUNC_CTL_LIN4_RXD             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(6)
172 #define IOC_PA17_FUNC_CTL_CAN4_RXD             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(7)
173 #define IOC_PA17_FUNC_CTL_I2S0_RXD_2           IOC_PAD_FUNC_CTL_ALT_SELECT_SET(8)
174 #define IOC_PA17_FUNC_CTL_DIS0_R_4             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(20)
175 #define IOC_PA17_FUNC_CTL_CAM0_D_8             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(22)
176 
177 /* IOC_PA18_FUNC_CTL function mux definitions */
178 #define IOC_PA18_FUNC_CTL_GPIO_A_18            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(0)
179 #define IOC_PA18_FUNC_CTL_GPTMR3_COMP_1        IOC_PAD_FUNC_CTL_ALT_SELECT_SET(1)
180 #define IOC_PA18_FUNC_CTL_UART4_DE             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(2)
181 #define IOC_PA18_FUNC_CTL_UART4_RTS            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(3)
182 #define IOC_PA18_FUNC_CTL_LIN4_TREN            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(6)
183 #define IOC_PA18_FUNC_CTL_CAN4_STBY            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(7)
184 #define IOC_PA18_FUNC_CTL_I2S0_FCLK            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(8)
185 #define IOC_PA18_FUNC_CTL_DIS0_R_7             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(20)
186 #define IOC_PA18_FUNC_CTL_CAM0_D_7             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(22)
187 #define IOC_PA18_FUNC_CTL_CPU0_NMI             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(24)
188 
189 /* IOC_PA19_FUNC_CTL function mux definitions */
190 #define IOC_PA19_FUNC_CTL_GPIO_A_19            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(0)
191 #define IOC_PA19_FUNC_CTL_GPTMR3_CAPT_1        IOC_PAD_FUNC_CTL_ALT_SELECT_SET(1)
192 #define IOC_PA19_FUNC_CTL_UART4_CTS            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(3)
193 #define IOC_PA19_FUNC_CTL_CAN5_STBY            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(7)
194 #define IOC_PA19_FUNC_CTL_I2S0_MCLK            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(8)
195 #define IOC_PA19_FUNC_CTL_DIS0_R_6             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(20)
196 #define IOC_PA19_FUNC_CTL_CAM0_D_6             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(22)
197 
198 /* IOC_PA20_FUNC_CTL function mux definitions */
199 #define IOC_PA20_FUNC_CTL_GPIO_A_20            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(0)
200 #define IOC_PA20_FUNC_CTL_GPTMR3_CAPT_2        IOC_PAD_FUNC_CTL_ALT_SELECT_SET(1)
201 #define IOC_PA20_FUNC_CTL_UART5_CTS            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(3)
202 #define IOC_PA20_FUNC_CTL_CAN5_RXD             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(7)
203 #define IOC_PA20_FUNC_CTL_I2S0_BCLK            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(8)
204 #define IOC_PA20_FUNC_CTL_DIS0_G_2             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(20)
205 #define IOC_PA20_FUNC_CTL_CAM0_PIXCLK          IOC_PAD_FUNC_CTL_ALT_SELECT_SET(22)
206 
207 /* IOC_PA21_FUNC_CTL function mux definitions */
208 #define IOC_PA21_FUNC_CTL_GPIO_A_21            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(0)
209 #define IOC_PA21_FUNC_CTL_GPTMR3_COMP_2        IOC_PAD_FUNC_CTL_ALT_SELECT_SET(1)
210 #define IOC_PA21_FUNC_CTL_UART5_DE             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(2)
211 #define IOC_PA21_FUNC_CTL_UART5_RTS            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(3)
212 #define IOC_PA21_FUNC_CTL_LIN5_TREN            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(6)
213 #define IOC_PA21_FUNC_CTL_CAN5_TXD             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(7)
214 #define IOC_PA21_FUNC_CTL_I2S0_TXD_1           IOC_PAD_FUNC_CTL_ALT_SELECT_SET(8)
215 #define IOC_PA21_FUNC_CTL_CAM0_XCLK            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(22)
216 
217 /* IOC_PA22_FUNC_CTL function mux definitions */
218 #define IOC_PA22_FUNC_CTL_GPIO_A_22            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(0)
219 #define IOC_PA22_FUNC_CTL_GPTMR2_CAPT_0        IOC_PAD_FUNC_CTL_ALT_SELECT_SET(1)
220 #define IOC_PA22_FUNC_CTL_UART5_RXD            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(2)
221 #define IOC_PA22_FUNC_CTL_LIN5_TXD             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(6)
222 #define IOC_PA22_FUNC_CTL_I2S0_TXD_3           IOC_PAD_FUNC_CTL_ALT_SELECT_SET(8)
223 
224 /* IOC_PA23_FUNC_CTL function mux definitions */
225 #define IOC_PA23_FUNC_CTL_GPIO_A_23            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(0)
226 #define IOC_PA23_FUNC_CTL_GPTMR2_COMP_0        IOC_PAD_FUNC_CTL_ALT_SELECT_SET(1)
227 #define IOC_PA23_FUNC_CTL_UART5_TXD            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(2)
228 #define IOC_PA23_FUNC_CTL_LIN5_RXD             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(6)
229 #define IOC_PA23_FUNC_CTL_I2S0_TXD_0           IOC_PAD_FUNC_CTL_ALT_SELECT_SET(8)
230 #define IOC_PA23_FUNC_CTL_SDC0_RSTN            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(17)
231 #define IOC_PA23_FUNC_CTL_CAM0_D_4             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(22)
232 
233 /* IOC_PA24_FUNC_CTL function mux definitions */
234 #define IOC_PA24_FUNC_CTL_GPIO_A_24            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(0)
235 #define IOC_PA24_FUNC_CTL_GPTMR2_COMP_1        IOC_PAD_FUNC_CTL_ALT_SELECT_SET(1)
236 #define IOC_PA24_FUNC_CTL_UART6_TXD            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(2)
237 #define IOC_PA24_FUNC_CTL_I2C2_SCL             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(4)
238 #define IOC_PA24_FUNC_CTL_SPI1_MISO            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(5)
239 #define IOC_PA24_FUNC_CTL_CAN6_TXD             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(7)
240 #define IOC_PA24_FUNC_CTL_I2S0_TXD_2           IOC_PAD_FUNC_CTL_ALT_SELECT_SET(8)
241 #define IOC_PA24_FUNC_CTL_SDC1_VON             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(17)
242 #define IOC_PA24_FUNC_CTL_CAM0_D_5             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(22)
243 
244 /* IOC_PA25_FUNC_CTL function mux definitions */
245 #define IOC_PA25_FUNC_CTL_GPIO_A_25            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(0)
246 #define IOC_PA25_FUNC_CTL_GPTMR2_CAPT_1        IOC_PAD_FUNC_CTL_ALT_SELECT_SET(1)
247 #define IOC_PA25_FUNC_CTL_UART6_RXD            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(2)
248 #define IOC_PA25_FUNC_CTL_I2C2_SDA             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(4)
249 #define IOC_PA25_FUNC_CTL_SPI1_MOSI            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(5)
250 #define IOC_PA25_FUNC_CTL_CAN6_RXD             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(7)
251 #define IOC_PA25_FUNC_CTL_I2S0_MCLK            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(8)
252 #define IOC_PA25_FUNC_CTL_SDC1_VSEL            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(17)
253 #define IOC_PA25_FUNC_CTL_CAM0_D_3             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(22)
254 
255 /* IOC_PA26_FUNC_CTL function mux definitions */
256 #define IOC_PA26_FUNC_CTL_GPIO_A_26            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(0)
257 #define IOC_PA26_FUNC_CTL_GPTMR2_COMP_2        IOC_PAD_FUNC_CTL_ALT_SELECT_SET(1)
258 #define IOC_PA26_FUNC_CTL_UART6_DE             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(2)
259 #define IOC_PA26_FUNC_CTL_UART6_RTS            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(3)
260 #define IOC_PA26_FUNC_CTL_SPI1_CS_0            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(5)
261 #define IOC_PA26_FUNC_CTL_LIN6_RXD             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(6)
262 #define IOC_PA26_FUNC_CTL_CAN6_STBY            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(7)
263 #define IOC_PA26_FUNC_CTL_SDC1_CDN             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(17)
264 #define IOC_PA26_FUNC_CTL_CAM0_PIXCLK          IOC_PAD_FUNC_CTL_ALT_SELECT_SET(22)
265 
266 /* IOC_PA27_FUNC_CTL function mux definitions */
267 #define IOC_PA27_FUNC_CTL_GPIO_A_27            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(0)
268 #define IOC_PA27_FUNC_CTL_GPTMR2_CAPT_2        IOC_PAD_FUNC_CTL_ALT_SELECT_SET(1)
269 #define IOC_PA27_FUNC_CTL_UART6_CTS            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(3)
270 #define IOC_PA27_FUNC_CTL_SPI1_SCLK            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(5)
271 #define IOC_PA27_FUNC_CTL_LIN6_TXD             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(6)
272 #define IOC_PA27_FUNC_CTL_SDC1_WP              IOC_PAD_FUNC_CTL_ALT_SELECT_SET(17)
273 #define IOC_PA27_FUNC_CTL_CAM0_D_2             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(22)
274 
275 /* IOC_PA28_FUNC_CTL function mux definitions */
276 #define IOC_PA28_FUNC_CTL_GPIO_A_28            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(0)
277 #define IOC_PA28_FUNC_CTL_GPTMR3_CAPT_3        IOC_PAD_FUNC_CTL_ALT_SELECT_SET(1)
278 #define IOC_PA28_FUNC_CTL_UART7_CTS            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(3)
279 #define IOC_PA28_FUNC_CTL_I2C3_SDA             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(4)
280 #define IOC_PA28_FUNC_CTL_LIN6_TREN            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(6)
281 #define IOC_PA28_FUNC_CTL_DIS0_R_0             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(20)
282 
283 /* IOC_PA29_FUNC_CTL function mux definitions */
284 #define IOC_PA29_FUNC_CTL_GPIO_A_29            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(0)
285 #define IOC_PA29_FUNC_CTL_GPTMR3_COMP_3        IOC_PAD_FUNC_CTL_ALT_SELECT_SET(1)
286 #define IOC_PA29_FUNC_CTL_UART7_DE             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(2)
287 #define IOC_PA29_FUNC_CTL_UART7_RTS            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(3)
288 #define IOC_PA29_FUNC_CTL_I2C3_SCL             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(4)
289 #define IOC_PA29_FUNC_CTL_LIN7_TREN            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(6)
290 #define IOC_PA29_FUNC_CTL_CAN7_STBY            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(7)
291 #define IOC_PA29_FUNC_CTL_CAM0_XCLK            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(22)
292 
293 /* IOC_PA30_FUNC_CTL function mux definitions */
294 #define IOC_PA30_FUNC_CTL_GPIO_A_30            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(0)
295 #define IOC_PA30_FUNC_CTL_GPTMR2_CAPT_3        IOC_PAD_FUNC_CTL_ALT_SELECT_SET(1)
296 #define IOC_PA30_FUNC_CTL_UART7_RXD            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(2)
297 #define IOC_PA30_FUNC_CTL_LIN7_RXD             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(6)
298 #define IOC_PA30_FUNC_CTL_CAN7_RXD             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(7)
299 #define IOC_PA30_FUNC_CTL_DIS0_R_2             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(20)
300 
301 /* IOC_PA31_FUNC_CTL function mux definitions */
302 #define IOC_PA31_FUNC_CTL_GPIO_A_31            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(0)
303 #define IOC_PA31_FUNC_CTL_GPTMR2_COMP_3        IOC_PAD_FUNC_CTL_ALT_SELECT_SET(1)
304 #define IOC_PA31_FUNC_CTL_UART7_TXD            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(2)
305 #define IOC_PA31_FUNC_CTL_LIN7_TXD             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(6)
306 #define IOC_PA31_FUNC_CTL_CAN7_TXD             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(7)
307 #define IOC_PA31_FUNC_CTL_DIS0_R_1             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(20)
308 
309 /* IOC_PB00_FUNC_CTL function mux definitions */
310 #define IOC_PB00_FUNC_CTL_GPIO_B_00            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(0)
311 #define IOC_PB00_FUNC_CTL_GPTMR5_COMP_0        IOC_PAD_FUNC_CTL_ALT_SELECT_SET(1)
312 #define IOC_PB00_FUNC_CTL_UART0_TXD            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(2)
313 #define IOC_PB00_FUNC_CTL_LIN0_TXD             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(6)
314 #define IOC_PB00_FUNC_CTL_CAN0_TXD             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(7)
315 #define IOC_PB00_FUNC_CTL_DIS0_G_1             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(20)
316 
317 /* IOC_PB01_FUNC_CTL function mux definitions */
318 #define IOC_PB01_FUNC_CTL_GPIO_B_01            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(0)
319 #define IOC_PB01_FUNC_CTL_GPTMR5_CAPT_0        IOC_PAD_FUNC_CTL_ALT_SELECT_SET(1)
320 #define IOC_PB01_FUNC_CTL_UART0_RXD            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(2)
321 #define IOC_PB01_FUNC_CTL_LIN0_RXD             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(6)
322 #define IOC_PB01_FUNC_CTL_CAN0_RXD             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(7)
323 #define IOC_PB01_FUNC_CTL_DIS0_G_0             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(20)
324 
325 /* IOC_PB02_FUNC_CTL function mux definitions */
326 #define IOC_PB02_FUNC_CTL_GPIO_B_02            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(0)
327 #define IOC_PB02_FUNC_CTL_GPTMR5_COMP_1        IOC_PAD_FUNC_CTL_ALT_SELECT_SET(1)
328 #define IOC_PB02_FUNC_CTL_UART0_DE             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(2)
329 #define IOC_PB02_FUNC_CTL_UART0_RTS            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(3)
330 #define IOC_PB02_FUNC_CTL_LIN0_TREN            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(6)
331 #define IOC_PB02_FUNC_CTL_CAN0_STBY            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(7)
332 #define IOC_PB02_FUNC_CTL_DIS0_B_1             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(20)
333 
334 /* IOC_PB03_FUNC_CTL function mux definitions */
335 #define IOC_PB03_FUNC_CTL_GPIO_B_03            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(0)
336 #define IOC_PB03_FUNC_CTL_GPTMR5_CAPT_1        IOC_PAD_FUNC_CTL_ALT_SELECT_SET(1)
337 #define IOC_PB03_FUNC_CTL_UART0_CTS            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(3)
338 #define IOC_PB03_FUNC_CTL_SPI3_CS_3            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(5)
339 #define IOC_PB03_FUNC_CTL_CAN1_STBY            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(7)
340 #define IOC_PB03_FUNC_CTL_DIS0_B_0             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(20)
341 
342 /* IOC_PB04_FUNC_CTL function mux definitions */
343 #define IOC_PB04_FUNC_CTL_GPIO_B_04            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(0)
344 #define IOC_PB04_FUNC_CTL_GPTMR5_CAPT_2        IOC_PAD_FUNC_CTL_ALT_SELECT_SET(1)
345 #define IOC_PB04_FUNC_CTL_UART1_CTS            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(3)
346 #define IOC_PB04_FUNC_CTL_SPI2_CS_0            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(5)
347 #define IOC_PB04_FUNC_CTL_CAN1_RXD             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(7)
348 #define IOC_PB04_FUNC_CTL_DIS0_B_2             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(20)
349 
350 /* IOC_PB05_FUNC_CTL function mux definitions */
351 #define IOC_PB05_FUNC_CTL_GPIO_B_05            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(0)
352 #define IOC_PB05_FUNC_CTL_GPTMR5_COMP_2        IOC_PAD_FUNC_CTL_ALT_SELECT_SET(1)
353 #define IOC_PB05_FUNC_CTL_UART1_DE             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(2)
354 #define IOC_PB05_FUNC_CTL_UART1_RTS            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(3)
355 #define IOC_PB05_FUNC_CTL_SPI2_SCLK            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(5)
356 #define IOC_PB05_FUNC_CTL_LIN1_TREN            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(6)
357 #define IOC_PB05_FUNC_CTL_CAN1_TXD             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(7)
358 #define IOC_PB05_FUNC_CTL_DIS0_G_7             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(20)
359 
360 /* IOC_PB06_FUNC_CTL function mux definitions */
361 #define IOC_PB06_FUNC_CTL_GPIO_B_06            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(0)
362 #define IOC_PB06_FUNC_CTL_GPTMR4_CAPT_0        IOC_PAD_FUNC_CTL_ALT_SELECT_SET(1)
363 #define IOC_PB06_FUNC_CTL_UART1_RXD            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(2)
364 #define IOC_PB06_FUNC_CTL_SPI2_MISO            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(5)
365 #define IOC_PB06_FUNC_CTL_LIN1_TXD             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(6)
366 #define IOC_PB06_FUNC_CTL_DIS0_B_3             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(20)
367 
368 /* IOC_PB07_FUNC_CTL function mux definitions */
369 #define IOC_PB07_FUNC_CTL_GPIO_B_07            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(0)
370 #define IOC_PB07_FUNC_CTL_GPTMR4_COMP_0        IOC_PAD_FUNC_CTL_ALT_SELECT_SET(1)
371 #define IOC_PB07_FUNC_CTL_UART1_TXD            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(2)
372 #define IOC_PB07_FUNC_CTL_SPI2_MOSI            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(5)
373 #define IOC_PB07_FUNC_CTL_LIN1_RXD             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(6)
374 #define IOC_PB07_FUNC_CTL_DIS0_B_4             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(20)
375 
376 /* IOC_PB08_FUNC_CTL function mux definitions */
377 #define IOC_PB08_FUNC_CTL_GPIO_B_08            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(0)
378 #define IOC_PB08_FUNC_CTL_GPTMR4_COMP_1        IOC_PAD_FUNC_CTL_ALT_SELECT_SET(1)
379 #define IOC_PB08_FUNC_CTL_UART2_TXD            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(2)
380 #define IOC_PB08_FUNC_CTL_I2C0_SCL             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(4)
381 #define IOC_PB08_FUNC_CTL_SPI3_CS_2            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(5)
382 #define IOC_PB08_FUNC_CTL_CAN2_TXD             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(7)
383 #define IOC_PB08_FUNC_CTL_DIS0_B_6             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(20)
384 
385 /* IOC_PB09_FUNC_CTL function mux definitions */
386 #define IOC_PB09_FUNC_CTL_GPIO_B_09            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(0)
387 #define IOC_PB09_FUNC_CTL_GPTMR4_CAPT_1        IOC_PAD_FUNC_CTL_ALT_SELECT_SET(1)
388 #define IOC_PB09_FUNC_CTL_UART2_RXD            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(2)
389 #define IOC_PB09_FUNC_CTL_I2C0_SDA             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(4)
390 #define IOC_PB09_FUNC_CTL_SPI3_CS_1            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(5)
391 #define IOC_PB09_FUNC_CTL_CAN2_RXD             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(7)
392 #define IOC_PB09_FUNC_CTL_DIS0_B_5             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(20)
393 
394 /* IOC_PB10_FUNC_CTL function mux definitions */
395 #define IOC_PB10_FUNC_CTL_GPIO_B_10            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(0)
396 #define IOC_PB10_FUNC_CTL_GPTMR4_COMP_2        IOC_PAD_FUNC_CTL_ALT_SELECT_SET(1)
397 #define IOC_PB10_FUNC_CTL_UART2_DE             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(2)
398 #define IOC_PB10_FUNC_CTL_UART2_RTS            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(3)
399 #define IOC_PB10_FUNC_CTL_SPI3_CS_0            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(5)
400 #define IOC_PB10_FUNC_CTL_LIN2_RXD             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(6)
401 #define IOC_PB10_FUNC_CTL_CAN2_STBY            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(7)
402 #define IOC_PB10_FUNC_CTL_DIS0_EN              IOC_PAD_FUNC_CTL_ALT_SELECT_SET(20)
403 
404 /* IOC_PB11_FUNC_CTL function mux definitions */
405 #define IOC_PB11_FUNC_CTL_GPIO_B_11            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(0)
406 #define IOC_PB11_FUNC_CTL_GPTMR4_CAPT_2        IOC_PAD_FUNC_CTL_ALT_SELECT_SET(1)
407 #define IOC_PB11_FUNC_CTL_UART2_CTS            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(3)
408 #define IOC_PB11_FUNC_CTL_SPI3_SCLK            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(5)
409 #define IOC_PB11_FUNC_CTL_LIN2_TXD             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(6)
410 #define IOC_PB11_FUNC_CTL_DIS0_B_7             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(20)
411 
412 /* IOC_PB12_FUNC_CTL function mux definitions */
413 #define IOC_PB12_FUNC_CTL_GPIO_B_12            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(0)
414 #define IOC_PB12_FUNC_CTL_GPTMR5_CAPT_3        IOC_PAD_FUNC_CTL_ALT_SELECT_SET(1)
415 #define IOC_PB12_FUNC_CTL_UART3_CTS            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(3)
416 #define IOC_PB12_FUNC_CTL_I2C1_SDA             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(4)
417 #define IOC_PB12_FUNC_CTL_SPI3_MISO            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(5)
418 #define IOC_PB12_FUNC_CTL_LIN2_TREN            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(6)
419 #define IOC_PB12_FUNC_CTL_DIS0_HSYNC           IOC_PAD_FUNC_CTL_ALT_SELECT_SET(20)
420 
421 /* IOC_PB13_FUNC_CTL function mux definitions */
422 #define IOC_PB13_FUNC_CTL_GPIO_B_13            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(0)
423 #define IOC_PB13_FUNC_CTL_GPTMR5_COMP_3        IOC_PAD_FUNC_CTL_ALT_SELECT_SET(1)
424 #define IOC_PB13_FUNC_CTL_UART3_DE             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(2)
425 #define IOC_PB13_FUNC_CTL_UART3_RTS            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(3)
426 #define IOC_PB13_FUNC_CTL_I2C1_SCL             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(4)
427 #define IOC_PB13_FUNC_CTL_SPI3_MOSI            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(5)
428 #define IOC_PB13_FUNC_CTL_LIN3_TREN            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(6)
429 #define IOC_PB13_FUNC_CTL_CAN3_STBY            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(7)
430 #define IOC_PB13_FUNC_CTL_DIS0_CLK             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(20)
431 
432 /* IOC_PB14_FUNC_CTL function mux definitions */
433 #define IOC_PB14_FUNC_CTL_GPIO_B_14            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(0)
434 #define IOC_PB14_FUNC_CTL_GPTMR4_CAPT_3        IOC_PAD_FUNC_CTL_ALT_SELECT_SET(1)
435 #define IOC_PB14_FUNC_CTL_UART3_RXD            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(2)
436 #define IOC_PB14_FUNC_CTL_SPI3_DAT2            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(5)
437 #define IOC_PB14_FUNC_CTL_LIN3_RXD             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(6)
438 #define IOC_PB14_FUNC_CTL_CAN3_RXD             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(7)
439 #define IOC_PB14_FUNC_CTL_DIS0_VSYNC           IOC_PAD_FUNC_CTL_ALT_SELECT_SET(20)
440 #define IOC_PB14_FUNC_CTL_SYSCTL_CLK_OBS_1     IOC_PAD_FUNC_CTL_ALT_SELECT_SET(24)
441 
442 /* IOC_PB15_FUNC_CTL function mux definitions */
443 #define IOC_PB15_FUNC_CTL_GPIO_B_15            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(0)
444 #define IOC_PB15_FUNC_CTL_GPTMR4_COMP_3        IOC_PAD_FUNC_CTL_ALT_SELECT_SET(1)
445 #define IOC_PB15_FUNC_CTL_UART3_TXD            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(2)
446 #define IOC_PB15_FUNC_CTL_SPI3_DAT3            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(5)
447 #define IOC_PB15_FUNC_CTL_LIN3_TXD             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(6)
448 #define IOC_PB15_FUNC_CTL_CAN3_TXD             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(7)
449 #define IOC_PB15_FUNC_CTL_SDC0_DS              IOC_PAD_FUNC_CTL_ALT_SELECT_SET(17)
450 #define IOC_PB15_FUNC_CTL_SYSCTL_CLK_OBS_3     IOC_PAD_FUNC_CTL_ALT_SELECT_SET(24)
451 
452 /* IOC_PB16_FUNC_CTL function mux definitions */
453 #define IOC_PB16_FUNC_CTL_GPIO_B_16            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(0)
454 #define IOC_PB16_FUNC_CTL_GPTMR7_COMP_0        IOC_PAD_FUNC_CTL_ALT_SELECT_SET(1)
455 #define IOC_PB16_FUNC_CTL_UART4_TXD            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(2)
456 #define IOC_PB16_FUNC_CTL_LIN4_TXD             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(6)
457 #define IOC_PB16_FUNC_CTL_CAN4_TXD             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(7)
458 #define IOC_PB16_FUNC_CTL_CAM0_D_6             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(22)
459 
460 /* IOC_PB17_FUNC_CTL function mux definitions */
461 #define IOC_PB17_FUNC_CTL_GPIO_B_17            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(0)
462 #define IOC_PB17_FUNC_CTL_GPTMR7_CAPT_0        IOC_PAD_FUNC_CTL_ALT_SELECT_SET(1)
463 #define IOC_PB17_FUNC_CTL_UART4_RXD            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(2)
464 #define IOC_PB17_FUNC_CTL_LIN4_RXD             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(6)
465 #define IOC_PB17_FUNC_CTL_CAN4_RXD             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(7)
466 #define IOC_PB17_FUNC_CTL_CAM0_D_7             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(22)
467 
468 /* IOC_PB18_FUNC_CTL function mux definitions */
469 #define IOC_PB18_FUNC_CTL_GPIO_B_18            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(0)
470 #define IOC_PB18_FUNC_CTL_GPTMR7_COMP_1        IOC_PAD_FUNC_CTL_ALT_SELECT_SET(1)
471 #define IOC_PB18_FUNC_CTL_UART4_DE             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(2)
472 #define IOC_PB18_FUNC_CTL_UART4_RTS            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(3)
473 #define IOC_PB18_FUNC_CTL_LIN4_TREN            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(6)
474 #define IOC_PB18_FUNC_CTL_CAN4_STBY            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(7)
475 #define IOC_PB18_FUNC_CTL_I2S1_TXD_1           IOC_PAD_FUNC_CTL_ALT_SELECT_SET(8)
476 #define IOC_PB18_FUNC_CTL_CAM0_D_9             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(22)
477 
478 /* IOC_PB19_FUNC_CTL function mux definitions */
479 #define IOC_PB19_FUNC_CTL_GPIO_B_19            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(0)
480 #define IOC_PB19_FUNC_CTL_GPTMR7_CAPT_1        IOC_PAD_FUNC_CTL_ALT_SELECT_SET(1)
481 #define IOC_PB19_FUNC_CTL_UART4_CTS            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(3)
482 #define IOC_PB19_FUNC_CTL_SPI0_CS_3            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(5)
483 #define IOC_PB19_FUNC_CTL_CAN5_STBY            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(7)
484 #define IOC_PB19_FUNC_CTL_I2S1_MCLK            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(8)
485 #define IOC_PB19_FUNC_CTL_CAM0_D_8             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(22)
486 
487 /* IOC_PB20_FUNC_CTL function mux definitions */
488 #define IOC_PB20_FUNC_CTL_GPIO_B_20            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(0)
489 #define IOC_PB20_FUNC_CTL_GPTMR7_CAPT_2        IOC_PAD_FUNC_CTL_ALT_SELECT_SET(1)
490 #define IOC_PB20_FUNC_CTL_UART5_CTS            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(3)
491 #define IOC_PB20_FUNC_CTL_SPI1_CS_0            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(5)
492 #define IOC_PB20_FUNC_CTL_CAN5_RXD             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(7)
493 #define IOC_PB20_FUNC_CTL_I2S1_TXD_2           IOC_PAD_FUNC_CTL_ALT_SELECT_SET(8)
494 #define IOC_PB20_FUNC_CTL_CAM0_HSYNC           IOC_PAD_FUNC_CTL_ALT_SELECT_SET(22)
495 
496 /* IOC_PB21_FUNC_CTL function mux definitions */
497 #define IOC_PB21_FUNC_CTL_GPIO_B_21            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(0)
498 #define IOC_PB21_FUNC_CTL_GPTMR7_COMP_2        IOC_PAD_FUNC_CTL_ALT_SELECT_SET(1)
499 #define IOC_PB21_FUNC_CTL_UART5_DE             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(2)
500 #define IOC_PB21_FUNC_CTL_UART5_RTS            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(3)
501 #define IOC_PB21_FUNC_CTL_SPI1_SCLK            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(5)
502 #define IOC_PB21_FUNC_CTL_LIN5_TREN            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(6)
503 #define IOC_PB21_FUNC_CTL_CAN5_TXD             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(7)
504 #define IOC_PB21_FUNC_CTL_I2S1_TXD_0           IOC_PAD_FUNC_CTL_ALT_SELECT_SET(8)
505 #define IOC_PB21_FUNC_CTL_CAM0_VSYNC           IOC_PAD_FUNC_CTL_ALT_SELECT_SET(22)
506 
507 /* IOC_PB22_FUNC_CTL function mux definitions */
508 #define IOC_PB22_FUNC_CTL_GPIO_B_22            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(0)
509 #define IOC_PB22_FUNC_CTL_GPTMR6_CAPT_0        IOC_PAD_FUNC_CTL_ALT_SELECT_SET(1)
510 #define IOC_PB22_FUNC_CTL_UART5_RXD            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(2)
511 #define IOC_PB22_FUNC_CTL_SPI1_MISO            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(5)
512 #define IOC_PB22_FUNC_CTL_LIN5_TXD             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(6)
513 #define IOC_PB22_FUNC_CTL_I2S1_TXD_3           IOC_PAD_FUNC_CTL_ALT_SELECT_SET(8)
514 #define IOC_PB22_FUNC_CTL_SDC0_DATA_6          IOC_PAD_FUNC_CTL_ALT_SELECT_SET(17)
515 
516 /* IOC_PB23_FUNC_CTL function mux definitions */
517 #define IOC_PB23_FUNC_CTL_GPIO_B_23            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(0)
518 #define IOC_PB23_FUNC_CTL_GPTMR6_COMP_0        IOC_PAD_FUNC_CTL_ALT_SELECT_SET(1)
519 #define IOC_PB23_FUNC_CTL_UART5_TXD            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(2)
520 #define IOC_PB23_FUNC_CTL_SPI1_MOSI            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(5)
521 #define IOC_PB23_FUNC_CTL_LIN5_RXD             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(6)
522 #define IOC_PB23_FUNC_CTL_I2S1_FCLK            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(8)
523 #define IOC_PB23_FUNC_CTL_SDC0_DATA_5          IOC_PAD_FUNC_CTL_ALT_SELECT_SET(17)
524 
525 /* IOC_PB24_FUNC_CTL function mux definitions */
526 #define IOC_PB24_FUNC_CTL_GPIO_B_24            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(0)
527 #define IOC_PB24_FUNC_CTL_GPTMR6_COMP_1        IOC_PAD_FUNC_CTL_ALT_SELECT_SET(1)
528 #define IOC_PB24_FUNC_CTL_UART6_TXD            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(2)
529 #define IOC_PB24_FUNC_CTL_I2C2_SCL             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(4)
530 #define IOC_PB24_FUNC_CTL_SPI0_CS_2            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(5)
531 #define IOC_PB24_FUNC_CTL_CAN6_TXD             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(7)
532 #define IOC_PB24_FUNC_CTL_I2S1_MCLK            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(8)
533 #define IOC_PB24_FUNC_CTL_SDC0_DATA_7          IOC_PAD_FUNC_CTL_ALT_SELECT_SET(17)
534 
535 /* IOC_PB25_FUNC_CTL function mux definitions */
536 #define IOC_PB25_FUNC_CTL_GPIO_B_25            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(0)
537 #define IOC_PB25_FUNC_CTL_GPTMR6_CAPT_1        IOC_PAD_FUNC_CTL_ALT_SELECT_SET(1)
538 #define IOC_PB25_FUNC_CTL_UART6_RXD            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(2)
539 #define IOC_PB25_FUNC_CTL_I2C2_SDA             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(4)
540 #define IOC_PB25_FUNC_CTL_SPI0_CS_1            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(5)
541 #define IOC_PB25_FUNC_CTL_CAN6_RXD             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(7)
542 #define IOC_PB25_FUNC_CTL_I2S1_BCLK            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(8)
543 #define IOC_PB25_FUNC_CTL_SDC0_DATA_4          IOC_PAD_FUNC_CTL_ALT_SELECT_SET(17)
544 
545 /* IOC_PB26_FUNC_CTL function mux definitions */
546 #define IOC_PB26_FUNC_CTL_GPIO_B_26            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(0)
547 #define IOC_PB26_FUNC_CTL_GPTMR6_COMP_2        IOC_PAD_FUNC_CTL_ALT_SELECT_SET(1)
548 #define IOC_PB26_FUNC_CTL_UART6_DE             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(2)
549 #define IOC_PB26_FUNC_CTL_UART6_RTS            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(3)
550 #define IOC_PB26_FUNC_CTL_SPI0_CS_0            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(5)
551 #define IOC_PB26_FUNC_CTL_LIN6_RXD             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(6)
552 #define IOC_PB26_FUNC_CTL_CAN6_STBY            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(7)
553 #define IOC_PB26_FUNC_CTL_I2S1_RXD_1           IOC_PAD_FUNC_CTL_ALT_SELECT_SET(8)
554 #define IOC_PB26_FUNC_CTL_SDC0_DATA_3          IOC_PAD_FUNC_CTL_ALT_SELECT_SET(17)
555 
556 /* IOC_PB27_FUNC_CTL function mux definitions */
557 #define IOC_PB27_FUNC_CTL_GPIO_B_27            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(0)
558 #define IOC_PB27_FUNC_CTL_GPTMR6_CAPT_2        IOC_PAD_FUNC_CTL_ALT_SELECT_SET(1)
559 #define IOC_PB27_FUNC_CTL_UART6_CTS            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(3)
560 #define IOC_PB27_FUNC_CTL_SPI0_SCLK            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(5)
561 #define IOC_PB27_FUNC_CTL_LIN6_TXD             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(6)
562 #define IOC_PB27_FUNC_CTL_I2S1_RXD_3           IOC_PAD_FUNC_CTL_ALT_SELECT_SET(8)
563 #define IOC_PB27_FUNC_CTL_SDC0_DATA_0          IOC_PAD_FUNC_CTL_ALT_SELECT_SET(17)
564 
565 /* IOC_PB28_FUNC_CTL function mux definitions */
566 #define IOC_PB28_FUNC_CTL_GPIO_B_28            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(0)
567 #define IOC_PB28_FUNC_CTL_GPTMR7_CAPT_3        IOC_PAD_FUNC_CTL_ALT_SELECT_SET(1)
568 #define IOC_PB28_FUNC_CTL_UART7_CTS            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(3)
569 #define IOC_PB28_FUNC_CTL_I2C3_SDA             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(4)
570 #define IOC_PB28_FUNC_CTL_SPI0_MISO            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(5)
571 #define IOC_PB28_FUNC_CTL_LIN6_TREN            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(6)
572 #define IOC_PB28_FUNC_CTL_I2S1_RXD_0           IOC_PAD_FUNC_CTL_ALT_SELECT_SET(8)
573 #define IOC_PB28_FUNC_CTL_SDC0_DATA_1          IOC_PAD_FUNC_CTL_ALT_SELECT_SET(17)
574 #define IOC_PB28_FUNC_CTL_CPU0_NMI             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(24)
575 
576 /* IOC_PB29_FUNC_CTL function mux definitions */
577 #define IOC_PB29_FUNC_CTL_GPIO_B_29            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(0)
578 #define IOC_PB29_FUNC_CTL_GPTMR7_COMP_3        IOC_PAD_FUNC_CTL_ALT_SELECT_SET(1)
579 #define IOC_PB29_FUNC_CTL_UART7_DE             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(2)
580 #define IOC_PB29_FUNC_CTL_UART7_RTS            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(3)
581 #define IOC_PB29_FUNC_CTL_I2C3_SCL             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(4)
582 #define IOC_PB29_FUNC_CTL_SPI0_MOSI            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(5)
583 #define IOC_PB29_FUNC_CTL_LIN7_TREN            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(6)
584 #define IOC_PB29_FUNC_CTL_CAN7_STBY            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(7)
585 #define IOC_PB29_FUNC_CTL_I2S1_RXD_2           IOC_PAD_FUNC_CTL_ALT_SELECT_SET(8)
586 #define IOC_PB29_FUNC_CTL_SDC0_DATA_2          IOC_PAD_FUNC_CTL_ALT_SELECT_SET(17)
587 
588 /* IOC_PB30_FUNC_CTL function mux definitions */
589 #define IOC_PB30_FUNC_CTL_GPIO_B_30            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(0)
590 #define IOC_PB30_FUNC_CTL_GPTMR6_CAPT_3        IOC_PAD_FUNC_CTL_ALT_SELECT_SET(1)
591 #define IOC_PB30_FUNC_CTL_UART7_RXD            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(2)
592 #define IOC_PB30_FUNC_CTL_SPI0_DAT2            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(5)
593 #define IOC_PB30_FUNC_CTL_LIN7_RXD             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(6)
594 #define IOC_PB30_FUNC_CTL_CAN7_RXD             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(7)
595 #define IOC_PB30_FUNC_CTL_SDC0_CLK             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(17)
596 
597 /* IOC_PB31_FUNC_CTL function mux definitions */
598 #define IOC_PB31_FUNC_CTL_GPIO_B_31            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(0)
599 #define IOC_PB31_FUNC_CTL_GPTMR6_COMP_3        IOC_PAD_FUNC_CTL_ALT_SELECT_SET(1)
600 #define IOC_PB31_FUNC_CTL_UART7_TXD            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(2)
601 #define IOC_PB31_FUNC_CTL_SPI0_DAT3            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(5)
602 #define IOC_PB31_FUNC_CTL_LIN7_TXD             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(6)
603 #define IOC_PB31_FUNC_CTL_CAN7_TXD             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(7)
604 #define IOC_PB31_FUNC_CTL_SDC0_CMD             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(17)
605 
606 /* IOC_PC00_FUNC_CTL function mux definitions */
607 #define IOC_PC00_FUNC_CTL_GPIO_C_00            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(0)
608 #define IOC_PC00_FUNC_CTL_GPTMR1_COMP_0        IOC_PAD_FUNC_CTL_ALT_SELECT_SET(1)
609 #define IOC_PC00_FUNC_CTL_UART0_TXD            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(2)
610 #define IOC_PC00_FUNC_CTL_LIN0_TXD             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(6)
611 #define IOC_PC00_FUNC_CTL_CAN0_TXD             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(7)
612 #define IOC_PC00_FUNC_CTL_I2S2_MCLK            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(8)
613 #define IOC_PC00_FUNC_CTL_SDC0_DS              IOC_PAD_FUNC_CTL_ALT_SELECT_SET(17)
614 #define IOC_PC00_FUNC_CTL_XPI_SLV_DQS          IOC_PAD_FUNC_CTL_ALT_SELECT_SET(30)
615 
616 /* IOC_PC01_FUNC_CTL function mux definitions */
617 #define IOC_PC01_FUNC_CTL_GPIO_C_01            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(0)
618 #define IOC_PC01_FUNC_CTL_GPTMR1_CAPT_0        IOC_PAD_FUNC_CTL_ALT_SELECT_SET(1)
619 #define IOC_PC01_FUNC_CTL_UART0_RXD            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(2)
620 #define IOC_PC01_FUNC_CTL_LIN0_RXD             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(6)
621 #define IOC_PC01_FUNC_CTL_CAN0_RXD             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(7)
622 #define IOC_PC01_FUNC_CTL_I2S2_RXD_2           IOC_PAD_FUNC_CTL_ALT_SELECT_SET(8)
623 #define IOC_PC01_FUNC_CTL_SDC0_CMD             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(17)
624 #define IOC_PC01_FUNC_CTL_CPU0_NMI             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(24)
625 #define IOC_PC01_FUNC_CTL_XPI_SLV_CLK          IOC_PAD_FUNC_CTL_ALT_SELECT_SET(30)
626 
627 /* IOC_PC02_FUNC_CTL function mux definitions */
628 #define IOC_PC02_FUNC_CTL_GPIO_C_02            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(0)
629 #define IOC_PC02_FUNC_CTL_GPTMR1_COMP_1        IOC_PAD_FUNC_CTL_ALT_SELECT_SET(1)
630 #define IOC_PC02_FUNC_CTL_UART0_DE             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(2)
631 #define IOC_PC02_FUNC_CTL_UART0_RTS            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(3)
632 #define IOC_PC02_FUNC_CTL_LIN0_TREN            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(6)
633 #define IOC_PC02_FUNC_CTL_CAN0_STBY            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(7)
634 #define IOC_PC02_FUNC_CTL_I2S2_RXD_3           IOC_PAD_FUNC_CTL_ALT_SELECT_SET(8)
635 #define IOC_PC02_FUNC_CTL_SDC0_CLK             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(17)
636 #define IOC_PC02_FUNC_CTL_XPI_SLV_CSN          IOC_PAD_FUNC_CTL_ALT_SELECT_SET(30)
637 
638 /* IOC_PC03_FUNC_CTL function mux definitions */
639 #define IOC_PC03_FUNC_CTL_GPIO_C_03            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(0)
640 #define IOC_PC03_FUNC_CTL_GPTMR1_CAPT_1        IOC_PAD_FUNC_CTL_ALT_SELECT_SET(1)
641 #define IOC_PC03_FUNC_CTL_UART0_CTS            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(3)
642 #define IOC_PC03_FUNC_CTL_CAN1_STBY            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(7)
643 #define IOC_PC03_FUNC_CTL_I2S2_RXD_0           IOC_PAD_FUNC_CTL_ALT_SELECT_SET(8)
644 #define IOC_PC03_FUNC_CTL_SDC0_DATA_1          IOC_PAD_FUNC_CTL_ALT_SELECT_SET(17)
645 #define IOC_PC03_FUNC_CTL_XPI_SLV_ADQ_1        IOC_PAD_FUNC_CTL_ALT_SELECT_SET(30)
646 
647 /* IOC_PC04_FUNC_CTL function mux definitions */
648 #define IOC_PC04_FUNC_CTL_GPIO_C_04            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(0)
649 #define IOC_PC04_FUNC_CTL_GPTMR1_CAPT_2        IOC_PAD_FUNC_CTL_ALT_SELECT_SET(1)
650 #define IOC_PC04_FUNC_CTL_UART1_CTS            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(3)
651 #define IOC_PC04_FUNC_CTL_SPI2_CS_0            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(5)
652 #define IOC_PC04_FUNC_CTL_CAN1_RXD             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(7)
653 #define IOC_PC04_FUNC_CTL_I2S2_RXD_1           IOC_PAD_FUNC_CTL_ALT_SELECT_SET(8)
654 #define IOC_PC04_FUNC_CTL_SDC0_DATA_2          IOC_PAD_FUNC_CTL_ALT_SELECT_SET(17)
655 #define IOC_PC04_FUNC_CTL_XPI_SLV_ADQ_3        IOC_PAD_FUNC_CTL_ALT_SELECT_SET(30)
656 
657 /* IOC_PC05_FUNC_CTL function mux definitions */
658 #define IOC_PC05_FUNC_CTL_GPIO_C_05            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(0)
659 #define IOC_PC05_FUNC_CTL_GPTMR1_COMP_2        IOC_PAD_FUNC_CTL_ALT_SELECT_SET(1)
660 #define IOC_PC05_FUNC_CTL_UART1_DE             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(2)
661 #define IOC_PC05_FUNC_CTL_UART1_RTS            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(3)
662 #define IOC_PC05_FUNC_CTL_SPI2_SCLK            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(5)
663 #define IOC_PC05_FUNC_CTL_LIN1_TREN            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(6)
664 #define IOC_PC05_FUNC_CTL_CAN1_TXD             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(7)
665 #define IOC_PC05_FUNC_CTL_I2S2_BCLK            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(8)
666 #define IOC_PC05_FUNC_CTL_SDC0_DATA_3          IOC_PAD_FUNC_CTL_ALT_SELECT_SET(17)
667 #define IOC_PC05_FUNC_CTL_XPI_SLV_ADQ_2        IOC_PAD_FUNC_CTL_ALT_SELECT_SET(30)
668 
669 /* IOC_PC06_FUNC_CTL function mux definitions */
670 #define IOC_PC06_FUNC_CTL_GPIO_C_06            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(0)
671 #define IOC_PC06_FUNC_CTL_GPTMR0_CAPT_0        IOC_PAD_FUNC_CTL_ALT_SELECT_SET(1)
672 #define IOC_PC06_FUNC_CTL_UART1_RXD            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(2)
673 #define IOC_PC06_FUNC_CTL_SPI2_MISO            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(5)
674 #define IOC_PC06_FUNC_CTL_LIN1_TXD             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(6)
675 #define IOC_PC06_FUNC_CTL_I2S2_FCLK            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(8)
676 #define IOC_PC06_FUNC_CTL_SDC0_DATA_0          IOC_PAD_FUNC_CTL_ALT_SELECT_SET(17)
677 #define IOC_PC06_FUNC_CTL_XPI_SLV_ADQ_0        IOC_PAD_FUNC_CTL_ALT_SELECT_SET(30)
678 
679 /* IOC_PC07_FUNC_CTL function mux definitions */
680 #define IOC_PC07_FUNC_CTL_GPIO_C_07            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(0)
681 #define IOC_PC07_FUNC_CTL_GPTMR0_COMP_0        IOC_PAD_FUNC_CTL_ALT_SELECT_SET(1)
682 #define IOC_PC07_FUNC_CTL_UART1_TXD            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(2)
683 #define IOC_PC07_FUNC_CTL_SPI2_MOSI            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(5)
684 #define IOC_PC07_FUNC_CTL_LIN1_RXD             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(6)
685 #define IOC_PC07_FUNC_CTL_I2S2_MCLK            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(8)
686 #define IOC_PC07_FUNC_CTL_SDC0_RSTN            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(17)
687 
688 /* IOC_PC08_FUNC_CTL function mux definitions */
689 #define IOC_PC08_FUNC_CTL_GPIO_C_08            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(0)
690 #define IOC_PC08_FUNC_CTL_GPTMR0_COMP_1        IOC_PAD_FUNC_CTL_ALT_SELECT_SET(1)
691 #define IOC_PC08_FUNC_CTL_UART2_TXD            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(2)
692 #define IOC_PC08_FUNC_CTL_I2C0_SCL             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(4)
693 #define IOC_PC08_FUNC_CTL_CAN2_TXD             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(7)
694 #define IOC_PC08_FUNC_CTL_I2S2_TXD_2           IOC_PAD_FUNC_CTL_ALT_SELECT_SET(8)
695 #define IOC_PC08_FUNC_CTL_DAO_LN               IOC_PAD_FUNC_CTL_ALT_SELECT_SET(10)
696 #define IOC_PC08_FUNC_CTL_SDC0_DATA_4          IOC_PAD_FUNC_CTL_ALT_SELECT_SET(17)
697 #define IOC_PC08_FUNC_CTL_XPI_SLV_ERR          IOC_PAD_FUNC_CTL_ALT_SELECT_SET(30)
698 
699 /* IOC_PC09_FUNC_CTL function mux definitions */
700 #define IOC_PC09_FUNC_CTL_GPIO_C_09            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(0)
701 #define IOC_PC09_FUNC_CTL_GPTMR0_CAPT_1        IOC_PAD_FUNC_CTL_ALT_SELECT_SET(1)
702 #define IOC_PC09_FUNC_CTL_UART2_RXD            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(2)
703 #define IOC_PC09_FUNC_CTL_I2C0_SDA             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(4)
704 #define IOC_PC09_FUNC_CTL_CAN2_RXD             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(7)
705 #define IOC_PC09_FUNC_CTL_I2S2_TXD_3           IOC_PAD_FUNC_CTL_ALT_SELECT_SET(8)
706 #define IOC_PC09_FUNC_CTL_DAO_LP               IOC_PAD_FUNC_CTL_ALT_SELECT_SET(10)
707 #define IOC_PC09_FUNC_CTL_SDC0_DATA_5          IOC_PAD_FUNC_CTL_ALT_SELECT_SET(17)
708 #define IOC_PC09_FUNC_CTL_XPI_SLV_RDY          IOC_PAD_FUNC_CTL_ALT_SELECT_SET(30)
709 
710 /* IOC_PC10_FUNC_CTL function mux definitions */
711 #define IOC_PC10_FUNC_CTL_GPIO_C_10            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(0)
712 #define IOC_PC10_FUNC_CTL_GPTMR0_COMP_2        IOC_PAD_FUNC_CTL_ALT_SELECT_SET(1)
713 #define IOC_PC10_FUNC_CTL_UART2_DE             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(2)
714 #define IOC_PC10_FUNC_CTL_UART2_RTS            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(3)
715 #define IOC_PC10_FUNC_CTL_LIN2_RXD             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(6)
716 #define IOC_PC10_FUNC_CTL_CAN2_STBY            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(7)
717 #define IOC_PC10_FUNC_CTL_I2S2_TXD_0           IOC_PAD_FUNC_CTL_ALT_SELECT_SET(8)
718 #define IOC_PC10_FUNC_CTL_DAO_RN               IOC_PAD_FUNC_CTL_ALT_SELECT_SET(10)
719 #define IOC_PC10_FUNC_CTL_SDC0_DATA_6          IOC_PAD_FUNC_CTL_ALT_SELECT_SET(17)
720 
721 /* IOC_PC11_FUNC_CTL function mux definitions */
722 #define IOC_PC11_FUNC_CTL_GPIO_C_11            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(0)
723 #define IOC_PC11_FUNC_CTL_GPTMR0_CAPT_2        IOC_PAD_FUNC_CTL_ALT_SELECT_SET(1)
724 #define IOC_PC11_FUNC_CTL_UART2_CTS            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(3)
725 #define IOC_PC11_FUNC_CTL_LIN2_TXD             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(6)
726 #define IOC_PC11_FUNC_CTL_I2S2_TXD_1           IOC_PAD_FUNC_CTL_ALT_SELECT_SET(8)
727 #define IOC_PC11_FUNC_CTL_DAO_RP               IOC_PAD_FUNC_CTL_ALT_SELECT_SET(10)
728 #define IOC_PC11_FUNC_CTL_SDC0_DATA_7          IOC_PAD_FUNC_CTL_ALT_SELECT_SET(17)
729 
730 /* IOC_PC12_FUNC_CTL function mux definitions */
731 #define IOC_PC12_FUNC_CTL_GPIO_C_12            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(0)
732 #define IOC_PC12_FUNC_CTL_GPTMR1_CAPT_3        IOC_PAD_FUNC_CTL_ALT_SELECT_SET(1)
733 #define IOC_PC12_FUNC_CTL_UART3_CTS            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(3)
734 #define IOC_PC12_FUNC_CTL_I2C1_SDA             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(4)
735 #define IOC_PC12_FUNC_CTL_SPI3_MISO            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(5)
736 #define IOC_PC12_FUNC_CTL_LIN2_TREN            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(6)
737 #define IOC_PC12_FUNC_CTL_PDM0_D_0             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(10)
738 #define IOC_PC12_FUNC_CTL_SDC1_DATA_3          IOC_PAD_FUNC_CTL_ALT_SELECT_SET(17)
739 
740 /* IOC_PC13_FUNC_CTL function mux definitions */
741 #define IOC_PC13_FUNC_CTL_GPIO_C_13            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(0)
742 #define IOC_PC13_FUNC_CTL_GPTMR1_COMP_3        IOC_PAD_FUNC_CTL_ALT_SELECT_SET(1)
743 #define IOC_PC13_FUNC_CTL_UART3_DE             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(2)
744 #define IOC_PC13_FUNC_CTL_UART3_RTS            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(3)
745 #define IOC_PC13_FUNC_CTL_I2C1_SCL             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(4)
746 #define IOC_PC13_FUNC_CTL_SPI3_MOSI            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(5)
747 #define IOC_PC13_FUNC_CTL_LIN3_TREN            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(6)
748 #define IOC_PC13_FUNC_CTL_CAN3_STBY            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(7)
749 #define IOC_PC13_FUNC_CTL_PDM0_CLK             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(10)
750 #define IOC_PC13_FUNC_CTL_SDC1_CMD             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(17)
751 
752 /* IOC_PC14_FUNC_CTL function mux definitions */
753 #define IOC_PC14_FUNC_CTL_GPIO_C_14            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(0)
754 #define IOC_PC14_FUNC_CTL_GPTMR0_CAPT_3        IOC_PAD_FUNC_CTL_ALT_SELECT_SET(1)
755 #define IOC_PC14_FUNC_CTL_UART3_RXD            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(2)
756 #define IOC_PC14_FUNC_CTL_SPI3_CS_0            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(5)
757 #define IOC_PC14_FUNC_CTL_LIN3_RXD             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(6)
758 #define IOC_PC14_FUNC_CTL_CAN3_RXD             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(7)
759 #define IOC_PC14_FUNC_CTL_PDM0_D_1             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(10)
760 #define IOC_PC14_FUNC_CTL_SDC1_DATA_2          IOC_PAD_FUNC_CTL_ALT_SELECT_SET(17)
761 
762 /* IOC_PC15_FUNC_CTL function mux definitions */
763 #define IOC_PC15_FUNC_CTL_GPIO_C_15            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(0)
764 #define IOC_PC15_FUNC_CTL_GPTMR0_COMP_3        IOC_PAD_FUNC_CTL_ALT_SELECT_SET(1)
765 #define IOC_PC15_FUNC_CTL_UART3_TXD            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(2)
766 #define IOC_PC15_FUNC_CTL_SPI3_SCLK            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(5)
767 #define IOC_PC15_FUNC_CTL_LIN3_TXD             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(6)
768 #define IOC_PC15_FUNC_CTL_CAN3_TXD             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(7)
769 #define IOC_PC15_FUNC_CTL_PDM0_D_2             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(10)
770 #define IOC_PC15_FUNC_CTL_SDC1_DATA_1          IOC_PAD_FUNC_CTL_ALT_SELECT_SET(17)
771 
772 /* IOC_PC16_FUNC_CTL function mux definitions */
773 #define IOC_PC16_FUNC_CTL_GPIO_C_16            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(0)
774 #define IOC_PC16_FUNC_CTL_GPTMR3_COMP_0        IOC_PAD_FUNC_CTL_ALT_SELECT_SET(1)
775 #define IOC_PC16_FUNC_CTL_UART4_TXD            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(2)
776 #define IOC_PC16_FUNC_CTL_LIN4_TXD             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(6)
777 #define IOC_PC16_FUNC_CTL_CAN4_TXD             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(7)
778 #define IOC_PC16_FUNC_CTL_PDM0_CLK             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(10)
779 #define IOC_PC16_FUNC_CTL_SDC1_CLK             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(17)
780 
781 /* IOC_PC17_FUNC_CTL function mux definitions */
782 #define IOC_PC17_FUNC_CTL_GPIO_C_17            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(0)
783 #define IOC_PC17_FUNC_CTL_GPTMR3_CAPT_0        IOC_PAD_FUNC_CTL_ALT_SELECT_SET(1)
784 #define IOC_PC17_FUNC_CTL_UART4_RXD            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(2)
785 #define IOC_PC17_FUNC_CTL_LIN4_RXD             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(6)
786 #define IOC_PC17_FUNC_CTL_CAN4_RXD             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(7)
787 #define IOC_PC17_FUNC_CTL_PDM0_D_3             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(10)
788 #define IOC_PC17_FUNC_CTL_SDC1_DATA_0          IOC_PAD_FUNC_CTL_ALT_SELECT_SET(17)
789 
790 /* IOC_PC18_FUNC_CTL function mux definitions */
791 #define IOC_PC18_FUNC_CTL_GPIO_C_18            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(0)
792 #define IOC_PC18_FUNC_CTL_GPTMR3_COMP_1        IOC_PAD_FUNC_CTL_ALT_SELECT_SET(1)
793 #define IOC_PC18_FUNC_CTL_UART4_DE             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(2)
794 #define IOC_PC18_FUNC_CTL_UART4_RTS            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(3)
795 #define IOC_PC18_FUNC_CTL_LIN4_TREN            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(6)
796 #define IOC_PC18_FUNC_CTL_CAN4_STBY            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(7)
797 #define IOC_PC18_FUNC_CTL_I2S1_RXD_2           IOC_PAD_FUNC_CTL_ALT_SELECT_SET(8)
798 #define IOC_PC18_FUNC_CTL_SDC1_DATA_3          IOC_PAD_FUNC_CTL_ALT_SELECT_SET(17)
799 #define IOC_PC18_FUNC_CTL_ETH0_TXD_3           IOC_PAD_FUNC_CTL_ALT_SELECT_SET(18)
800 
801 /* IOC_PC19_FUNC_CTL function mux definitions */
802 #define IOC_PC19_FUNC_CTL_GPIO_C_19            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(0)
803 #define IOC_PC19_FUNC_CTL_GPTMR3_CAPT_1        IOC_PAD_FUNC_CTL_ALT_SELECT_SET(1)
804 #define IOC_PC19_FUNC_CTL_UART4_CTS            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(3)
805 #define IOC_PC19_FUNC_CTL_SPI1_CS_3            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(5)
806 #define IOC_PC19_FUNC_CTL_CAN5_STBY            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(7)
807 #define IOC_PC19_FUNC_CTL_I2S1_RXD_3           IOC_PAD_FUNC_CTL_ALT_SELECT_SET(8)
808 #define IOC_PC19_FUNC_CTL_SDC1_DATA_2          IOC_PAD_FUNC_CTL_ALT_SELECT_SET(17)
809 #define IOC_PC19_FUNC_CTL_ETH0_TXD_2           IOC_PAD_FUNC_CTL_ALT_SELECT_SET(18)
810 #define IOC_PC19_FUNC_CTL_ADC0_DBG             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(24)
811 
812 /* IOC_PC20_FUNC_CTL function mux definitions */
813 #define IOC_PC20_FUNC_CTL_GPIO_C_20            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(0)
814 #define IOC_PC20_FUNC_CTL_GPTMR3_CAPT_2        IOC_PAD_FUNC_CTL_ALT_SELECT_SET(1)
815 #define IOC_PC20_FUNC_CTL_UART5_CTS            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(3)
816 #define IOC_PC20_FUNC_CTL_SPI0_CS_0            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(5)
817 #define IOC_PC20_FUNC_CTL_CAN5_RXD             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(7)
818 #define IOC_PC20_FUNC_CTL_I2S1_RXD_0           IOC_PAD_FUNC_CTL_ALT_SELECT_SET(8)
819 #define IOC_PC20_FUNC_CTL_SDC1_CLK             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(17)
820 #define IOC_PC20_FUNC_CTL_ETH0_TXCK            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(18)
821 
822 /* IOC_PC21_FUNC_CTL function mux definitions */
823 #define IOC_PC21_FUNC_CTL_GPIO_C_21            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(0)
824 #define IOC_PC21_FUNC_CTL_GPTMR3_COMP_2        IOC_PAD_FUNC_CTL_ALT_SELECT_SET(1)
825 #define IOC_PC21_FUNC_CTL_UART5_DE             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(2)
826 #define IOC_PC21_FUNC_CTL_UART5_RTS            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(3)
827 #define IOC_PC21_FUNC_CTL_SPI0_SCLK            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(5)
828 #define IOC_PC21_FUNC_CTL_LIN5_TREN            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(6)
829 #define IOC_PC21_FUNC_CTL_CAN5_TXD             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(7)
830 #define IOC_PC21_FUNC_CTL_I2S1_RXD_1           IOC_PAD_FUNC_CTL_ALT_SELECT_SET(8)
831 #define IOC_PC21_FUNC_CTL_SDC1_CMD             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(17)
832 #define IOC_PC21_FUNC_CTL_ETH0_TXEN            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(18)
833 
834 /* IOC_PC22_FUNC_CTL function mux definitions */
835 #define IOC_PC22_FUNC_CTL_GPIO_C_22            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(0)
836 #define IOC_PC22_FUNC_CTL_GPTMR2_CAPT_0        IOC_PAD_FUNC_CTL_ALT_SELECT_SET(1)
837 #define IOC_PC22_FUNC_CTL_UART5_RXD            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(2)
838 #define IOC_PC22_FUNC_CTL_SPI0_MISO            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(5)
839 #define IOC_PC22_FUNC_CTL_LIN5_TXD             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(6)
840 #define IOC_PC22_FUNC_CTL_I2S1_BCLK            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(8)
841 #define IOC_PC22_FUNC_CTL_SDC1_DATA_1          IOC_PAD_FUNC_CTL_ALT_SELECT_SET(17)
842 #define IOC_PC22_FUNC_CTL_ETH0_TXD_0           IOC_PAD_FUNC_CTL_ALT_SELECT_SET(18)
843 
844 /* IOC_PC23_FUNC_CTL function mux definitions */
845 #define IOC_PC23_FUNC_CTL_GPIO_C_23            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(0)
846 #define IOC_PC23_FUNC_CTL_GPTMR2_COMP_0        IOC_PAD_FUNC_CTL_ALT_SELECT_SET(1)
847 #define IOC_PC23_FUNC_CTL_UART5_TXD            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(2)
848 #define IOC_PC23_FUNC_CTL_SPI0_MOSI            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(5)
849 #define IOC_PC23_FUNC_CTL_LIN5_RXD             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(6)
850 #define IOC_PC23_FUNC_CTL_I2S1_FCLK            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(8)
851 #define IOC_PC23_FUNC_CTL_SDC1_DATA_0          IOC_PAD_FUNC_CTL_ALT_SELECT_SET(17)
852 #define IOC_PC23_FUNC_CTL_ETH0_TXD_1           IOC_PAD_FUNC_CTL_ALT_SELECT_SET(18)
853 #define IOC_PC23_FUNC_CTL_SYSCTL_CLK_OBS_0     IOC_PAD_FUNC_CTL_ALT_SELECT_SET(24)
854 
855 /* IOC_PC24_FUNC_CTL function mux definitions */
856 #define IOC_PC24_FUNC_CTL_GPIO_C_24            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(0)
857 #define IOC_PC24_FUNC_CTL_GPTMR2_COMP_1        IOC_PAD_FUNC_CTL_ALT_SELECT_SET(1)
858 #define IOC_PC24_FUNC_CTL_UART6_TXD            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(2)
859 #define IOC_PC24_FUNC_CTL_I2C2_SCL             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(4)
860 #define IOC_PC24_FUNC_CTL_SPI1_CS_2            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(5)
861 #define IOC_PC24_FUNC_CTL_CAN6_TXD             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(7)
862 #define IOC_PC24_FUNC_CTL_I2S1_TXD_0           IOC_PAD_FUNC_CTL_ALT_SELECT_SET(8)
863 #define IOC_PC24_FUNC_CTL_SDC1_CDN             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(17)
864 #define IOC_PC24_FUNC_CTL_ETH0_RXD_2           IOC_PAD_FUNC_CTL_ALT_SELECT_SET(18)
865 
866 /* IOC_PC25_FUNC_CTL function mux definitions */
867 #define IOC_PC25_FUNC_CTL_GPIO_C_25            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(0)
868 #define IOC_PC25_FUNC_CTL_GPTMR2_CAPT_1        IOC_PAD_FUNC_CTL_ALT_SELECT_SET(1)
869 #define IOC_PC25_FUNC_CTL_UART6_RXD            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(2)
870 #define IOC_PC25_FUNC_CTL_I2C2_SDA             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(4)
871 #define IOC_PC25_FUNC_CTL_SPI1_CS_1            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(5)
872 #define IOC_PC25_FUNC_CTL_CAN6_RXD             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(7)
873 #define IOC_PC25_FUNC_CTL_I2S1_TXD_1           IOC_PAD_FUNC_CTL_ALT_SELECT_SET(8)
874 #define IOC_PC25_FUNC_CTL_SDC1_VSEL            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(17)
875 #define IOC_PC25_FUNC_CTL_ETH0_RXD_3           IOC_PAD_FUNC_CTL_ALT_SELECT_SET(18)
876 
877 /* IOC_PC26_FUNC_CTL function mux definitions */
878 #define IOC_PC26_FUNC_CTL_GPIO_C_26            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(0)
879 #define IOC_PC26_FUNC_CTL_GPTMR2_COMP_2        IOC_PAD_FUNC_CTL_ALT_SELECT_SET(1)
880 #define IOC_PC26_FUNC_CTL_UART6_DE             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(2)
881 #define IOC_PC26_FUNC_CTL_UART6_RTS            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(3)
882 #define IOC_PC26_FUNC_CTL_SPI1_CS_0            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(5)
883 #define IOC_PC26_FUNC_CTL_LIN6_RXD             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(6)
884 #define IOC_PC26_FUNC_CTL_CAN6_STBY            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(7)
885 #define IOC_PC26_FUNC_CTL_I2S1_TXD_2           IOC_PAD_FUNC_CTL_ALT_SELECT_SET(8)
886 #define IOC_PC26_FUNC_CTL_SDC1_WP              IOC_PAD_FUNC_CTL_ALT_SELECT_SET(17)
887 #define IOC_PC26_FUNC_CTL_ETH0_RXCK            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(18)
888 
889 /* IOC_PC27_FUNC_CTL function mux definitions */
890 #define IOC_PC27_FUNC_CTL_GPIO_C_27            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(0)
891 #define IOC_PC27_FUNC_CTL_GPTMR2_CAPT_2        IOC_PAD_FUNC_CTL_ALT_SELECT_SET(1)
892 #define IOC_PC27_FUNC_CTL_UART6_CTS            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(3)
893 #define IOC_PC27_FUNC_CTL_SPI1_SCLK            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(5)
894 #define IOC_PC27_FUNC_CTL_LIN6_TXD             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(6)
895 #define IOC_PC27_FUNC_CTL_I2S1_TXD_3           IOC_PAD_FUNC_CTL_ALT_SELECT_SET(8)
896 #define IOC_PC27_FUNC_CTL_SDC1_VON             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(17)
897 #define IOC_PC27_FUNC_CTL_ETH0_RXDV            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(18)
898 #define IOC_PC27_FUNC_CTL_SYSCTL_CLK_OBS_2     IOC_PAD_FUNC_CTL_ALT_SELECT_SET(24)
899 
900 /* IOC_PC28_FUNC_CTL function mux definitions */
901 #define IOC_PC28_FUNC_CTL_GPIO_C_28            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(0)
902 #define IOC_PC28_FUNC_CTL_GPTMR3_CAPT_3        IOC_PAD_FUNC_CTL_ALT_SELECT_SET(1)
903 #define IOC_PC28_FUNC_CTL_UART7_CTS            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(3)
904 #define IOC_PC28_FUNC_CTL_I2C3_SDA             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(4)
905 #define IOC_PC28_FUNC_CTL_SPI1_MISO            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(5)
906 #define IOC_PC28_FUNC_CTL_LIN6_TREN            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(6)
907 #define IOC_PC28_FUNC_CTL_I2S1_MCLK            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(8)
908 #define IOC_PC28_FUNC_CTL_ETH0_RXD_1           IOC_PAD_FUNC_CTL_ALT_SELECT_SET(18)
909 
910 /* IOC_PC29_FUNC_CTL function mux definitions */
911 #define IOC_PC29_FUNC_CTL_GPIO_C_29            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(0)
912 #define IOC_PC29_FUNC_CTL_GPTMR3_COMP_3        IOC_PAD_FUNC_CTL_ALT_SELECT_SET(1)
913 #define IOC_PC29_FUNC_CTL_UART7_DE             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(2)
914 #define IOC_PC29_FUNC_CTL_UART7_RTS            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(3)
915 #define IOC_PC29_FUNC_CTL_I2C3_SCL             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(4)
916 #define IOC_PC29_FUNC_CTL_SPI1_MOSI            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(5)
917 #define IOC_PC29_FUNC_CTL_LIN7_TREN            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(6)
918 #define IOC_PC29_FUNC_CTL_CAN7_STBY            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(7)
919 #define IOC_PC29_FUNC_CTL_I2S1_MCLK            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(8)
920 #define IOC_PC29_FUNC_CTL_ETH0_RXD_0           IOC_PAD_FUNC_CTL_ALT_SELECT_SET(18)
921 
922 /* IOC_PC30_FUNC_CTL function mux definitions */
923 #define IOC_PC30_FUNC_CTL_GPIO_C_30            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(0)
924 #define IOC_PC30_FUNC_CTL_GPTMR2_CAPT_3        IOC_PAD_FUNC_CTL_ALT_SELECT_SET(1)
925 #define IOC_PC30_FUNC_CTL_UART7_RXD            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(2)
926 #define IOC_PC30_FUNC_CTL_LIN7_RXD             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(6)
927 #define IOC_PC30_FUNC_CTL_CAN7_RXD             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(7)
928 #define IOC_PC30_FUNC_CTL_DAO_LN               IOC_PAD_FUNC_CTL_ALT_SELECT_SET(10)
929 #define IOC_PC30_FUNC_CTL_SDC1_CDN             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(17)
930 
931 /* IOC_PC31_FUNC_CTL function mux definitions */
932 #define IOC_PC31_FUNC_CTL_GPIO_C_31            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(0)
933 #define IOC_PC31_FUNC_CTL_GPTMR2_COMP_3        IOC_PAD_FUNC_CTL_ALT_SELECT_SET(1)
934 #define IOC_PC31_FUNC_CTL_UART7_TXD            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(2)
935 #define IOC_PC31_FUNC_CTL_LIN7_TXD             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(6)
936 #define IOC_PC31_FUNC_CTL_CAN7_TXD             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(7)
937 #define IOC_PC31_FUNC_CTL_DAO_LP               IOC_PAD_FUNC_CTL_ALT_SELECT_SET(10)
938 #define IOC_PC31_FUNC_CTL_SDC1_VSEL            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(17)
939 
940 /* IOC_PD00_FUNC_CTL function mux definitions */
941 #define IOC_PD00_FUNC_CTL_GPIO_D_00            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(0)
942 #define IOC_PD00_FUNC_CTL_GPTMR5_COMP_0        IOC_PAD_FUNC_CTL_ALT_SELECT_SET(1)
943 #define IOC_PD00_FUNC_CTL_UART0_TXD            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(2)
944 #define IOC_PD00_FUNC_CTL_LIN0_TXD             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(6)
945 #define IOC_PD00_FUNC_CTL_CAN0_TXD             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(7)
946 #define IOC_PD00_FUNC_CTL_DAO_RN               IOC_PAD_FUNC_CTL_ALT_SELECT_SET(10)
947 #define IOC_PD00_FUNC_CTL_SDC1_VON             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(17)
948 
949 /* IOC_PD01_FUNC_CTL function mux definitions */
950 #define IOC_PD01_FUNC_CTL_GPIO_D_01            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(0)
951 #define IOC_PD01_FUNC_CTL_GPTMR5_CAPT_0        IOC_PAD_FUNC_CTL_ALT_SELECT_SET(1)
952 #define IOC_PD01_FUNC_CTL_UART0_RXD            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(2)
953 #define IOC_PD01_FUNC_CTL_LIN0_RXD             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(6)
954 #define IOC_PD01_FUNC_CTL_CAN0_RXD             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(7)
955 #define IOC_PD01_FUNC_CTL_DAO_RP               IOC_PAD_FUNC_CTL_ALT_SELECT_SET(10)
956 #define IOC_PD01_FUNC_CTL_SDC1_WP              IOC_PAD_FUNC_CTL_ALT_SELECT_SET(17)
957 
958 /* IOC_PD02_FUNC_CTL function mux definitions */
959 #define IOC_PD02_FUNC_CTL_GPIO_D_02            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(0)
960 #define IOC_PD02_FUNC_CTL_GPTMR5_COMP_1        IOC_PAD_FUNC_CTL_ALT_SELECT_SET(1)
961 #define IOC_PD02_FUNC_CTL_UART0_DE             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(2)
962 #define IOC_PD02_FUNC_CTL_UART0_RTS            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(3)
963 #define IOC_PD02_FUNC_CTL_LIN0_TREN            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(6)
964 #define IOC_PD02_FUNC_CTL_CAN0_STBY            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(7)
965 #define IOC_PD02_FUNC_CTL_ETH0_MDC             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(18)
966 
967 /* IOC_PD03_FUNC_CTL function mux definitions */
968 #define IOC_PD03_FUNC_CTL_GPIO_D_03            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(0)
969 #define IOC_PD03_FUNC_CTL_GPTMR5_CAPT_1        IOC_PAD_FUNC_CTL_ALT_SELECT_SET(1)
970 #define IOC_PD03_FUNC_CTL_UART0_CTS            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(3)
971 #define IOC_PD03_FUNC_CTL_CAN1_STBY            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(7)
972 #define IOC_PD03_FUNC_CTL_ETH0_MDIO            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(18)
973 
974 /* IOC_PD04_FUNC_CTL function mux definitions */
975 #define IOC_PD04_FUNC_CTL_GPIO_D_04            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(0)
976 #define IOC_PD04_FUNC_CTL_GPTMR5_CAPT_2        IOC_PAD_FUNC_CTL_ALT_SELECT_SET(1)
977 #define IOC_PD04_FUNC_CTL_UART1_CTS            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(3)
978 #define IOC_PD04_FUNC_CTL_SPI3_CS_0            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(5)
979 #define IOC_PD04_FUNC_CTL_CAN1_RXD             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(7)
980 #define IOC_PD04_FUNC_CTL_PDM0_D_0             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(10)
981 #define IOC_PD04_FUNC_CTL_XPI0_CA_CS0          IOC_PAD_FUNC_CTL_ALT_SELECT_SET(14)
982 
983 /* IOC_PD05_FUNC_CTL function mux definitions */
984 #define IOC_PD05_FUNC_CTL_GPIO_D_05            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(0)
985 #define IOC_PD05_FUNC_CTL_GPTMR5_COMP_2        IOC_PAD_FUNC_CTL_ALT_SELECT_SET(1)
986 #define IOC_PD05_FUNC_CTL_UART1_DE             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(2)
987 #define IOC_PD05_FUNC_CTL_UART1_RTS            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(3)
988 #define IOC_PD05_FUNC_CTL_SPI3_SCLK            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(5)
989 #define IOC_PD05_FUNC_CTL_LIN1_TREN            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(6)
990 #define IOC_PD05_FUNC_CTL_CAN1_TXD             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(7)
991 #define IOC_PD05_FUNC_CTL_PDM0_D_1             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(10)
992 #define IOC_PD05_FUNC_CTL_XPI0_CA_CS1          IOC_PAD_FUNC_CTL_ALT_SELECT_SET(14)
993 
994 /* IOC_PD06_FUNC_CTL function mux definitions */
995 #define IOC_PD06_FUNC_CTL_GPIO_D_06            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(0)
996 #define IOC_PD06_FUNC_CTL_GPTMR4_CAPT_0        IOC_PAD_FUNC_CTL_ALT_SELECT_SET(1)
997 #define IOC_PD06_FUNC_CTL_UART1_RXD            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(2)
998 #define IOC_PD06_FUNC_CTL_SPI3_MISO            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(5)
999 #define IOC_PD06_FUNC_CTL_LIN1_TXD             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(6)
1000 #define IOC_PD06_FUNC_CTL_I2S2_RXD_3           IOC_PAD_FUNC_CTL_ALT_SELECT_SET(8)
1001 #define IOC_PD06_FUNC_CTL_PDM0_CLK             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(10)
1002 #define IOC_PD06_FUNC_CTL_XPI0_CA_SCLK         IOC_PAD_FUNC_CTL_ALT_SELECT_SET(14)
1003 #define IOC_PD06_FUNC_CTL_ETH0_TXD_3           IOC_PAD_FUNC_CTL_ALT_SELECT_SET(18)
1004 
1005 /* IOC_PD07_FUNC_CTL function mux definitions */
1006 #define IOC_PD07_FUNC_CTL_GPIO_D_07            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(0)
1007 #define IOC_PD07_FUNC_CTL_GPTMR4_COMP_0        IOC_PAD_FUNC_CTL_ALT_SELECT_SET(1)
1008 #define IOC_PD07_FUNC_CTL_UART1_TXD            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(2)
1009 #define IOC_PD07_FUNC_CTL_SPI3_MOSI            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(5)
1010 #define IOC_PD07_FUNC_CTL_LIN1_RXD             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(6)
1011 #define IOC_PD07_FUNC_CTL_I2S2_RXD_2           IOC_PAD_FUNC_CTL_ALT_SELECT_SET(8)
1012 #define IOC_PD07_FUNC_CTL_PDM0_D_3             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(10)
1013 #define IOC_PD07_FUNC_CTL_XPI0_CA_DQS          IOC_PAD_FUNC_CTL_ALT_SELECT_SET(14)
1014 #define IOC_PD07_FUNC_CTL_ETH0_TXD_2           IOC_PAD_FUNC_CTL_ALT_SELECT_SET(18)
1015 
1016 /* IOC_PD08_FUNC_CTL function mux definitions */
1017 #define IOC_PD08_FUNC_CTL_GPIO_D_08            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(0)
1018 #define IOC_PD08_FUNC_CTL_GPTMR4_COMP_1        IOC_PAD_FUNC_CTL_ALT_SELECT_SET(1)
1019 #define IOC_PD08_FUNC_CTL_UART2_TXD            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(2)
1020 #define IOC_PD08_FUNC_CTL_I2C0_SCL             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(4)
1021 #define IOC_PD08_FUNC_CTL_SPI2_CS_2            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(5)
1022 #define IOC_PD08_FUNC_CTL_CAN2_TXD             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(7)
1023 #define IOC_PD08_FUNC_CTL_PDM0_CLK             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(10)
1024 #define IOC_PD08_FUNC_CTL_XPI0_CA_D_0          IOC_PAD_FUNC_CTL_ALT_SELECT_SET(14)
1025 #define IOC_PD08_FUNC_CTL_ETH0_TXCK            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(18)
1026 
1027 /* IOC_PD09_FUNC_CTL function mux definitions */
1028 #define IOC_PD09_FUNC_CTL_GPIO_D_09            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(0)
1029 #define IOC_PD09_FUNC_CTL_GPTMR4_CAPT_1        IOC_PAD_FUNC_CTL_ALT_SELECT_SET(1)
1030 #define IOC_PD09_FUNC_CTL_UART2_RXD            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(2)
1031 #define IOC_PD09_FUNC_CTL_I2C0_SDA             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(4)
1032 #define IOC_PD09_FUNC_CTL_SPI2_CS_1            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(5)
1033 #define IOC_PD09_FUNC_CTL_CAN2_RXD             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(7)
1034 #define IOC_PD09_FUNC_CTL_PDM0_D_2             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(10)
1035 #define IOC_PD09_FUNC_CTL_XPI0_CA_D_1          IOC_PAD_FUNC_CTL_ALT_SELECT_SET(14)
1036 #define IOC_PD09_FUNC_CTL_ETH0_TXEN            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(18)
1037 
1038 /* IOC_PD10_FUNC_CTL function mux definitions */
1039 #define IOC_PD10_FUNC_CTL_GPIO_D_10            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(0)
1040 #define IOC_PD10_FUNC_CTL_GPTMR4_COMP_2        IOC_PAD_FUNC_CTL_ALT_SELECT_SET(1)
1041 #define IOC_PD10_FUNC_CTL_UART2_DE             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(2)
1042 #define IOC_PD10_FUNC_CTL_UART2_RTS            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(3)
1043 #define IOC_PD10_FUNC_CTL_SPI2_CS_0            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(5)
1044 #define IOC_PD10_FUNC_CTL_LIN2_RXD             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(6)
1045 #define IOC_PD10_FUNC_CTL_CAN2_STBY            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(7)
1046 #define IOC_PD10_FUNC_CTL_I2S2_TXD_2           IOC_PAD_FUNC_CTL_ALT_SELECT_SET(8)
1047 #define IOC_PD10_FUNC_CTL_XPI0_CA_D_2          IOC_PAD_FUNC_CTL_ALT_SELECT_SET(14)
1048 #define IOC_PD10_FUNC_CTL_ETH0_TXD_0           IOC_PAD_FUNC_CTL_ALT_SELECT_SET(18)
1049 
1050 /* IOC_PD11_FUNC_CTL function mux definitions */
1051 #define IOC_PD11_FUNC_CTL_GPIO_D_11            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(0)
1052 #define IOC_PD11_FUNC_CTL_GPTMR4_CAPT_2        IOC_PAD_FUNC_CTL_ALT_SELECT_SET(1)
1053 #define IOC_PD11_FUNC_CTL_UART2_CTS            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(3)
1054 #define IOC_PD11_FUNC_CTL_SPI2_SCLK            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(5)
1055 #define IOC_PD11_FUNC_CTL_LIN2_TXD             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(6)
1056 #define IOC_PD11_FUNC_CTL_I2S2_TXD_3           IOC_PAD_FUNC_CTL_ALT_SELECT_SET(8)
1057 #define IOC_PD11_FUNC_CTL_XPI0_CA_D_3          IOC_PAD_FUNC_CTL_ALT_SELECT_SET(14)
1058 #define IOC_PD11_FUNC_CTL_ETH0_TXD_1           IOC_PAD_FUNC_CTL_ALT_SELECT_SET(18)
1059 
1060 /* IOC_PD12_FUNC_CTL function mux definitions */
1061 #define IOC_PD12_FUNC_CTL_GPIO_D_12            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(0)
1062 #define IOC_PD12_FUNC_CTL_GPTMR5_CAPT_3        IOC_PAD_FUNC_CTL_ALT_SELECT_SET(1)
1063 #define IOC_PD12_FUNC_CTL_UART3_CTS            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(3)
1064 #define IOC_PD12_FUNC_CTL_I2C1_SDA             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(4)
1065 #define IOC_PD12_FUNC_CTL_SPI2_MISO            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(5)
1066 #define IOC_PD12_FUNC_CTL_LIN2_TREN            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(6)
1067 #define IOC_PD12_FUNC_CTL_I2S2_RXD_1           IOC_PAD_FUNC_CTL_ALT_SELECT_SET(8)
1068 #define IOC_PD12_FUNC_CTL_XPI0_CB_CS0          IOC_PAD_FUNC_CTL_ALT_SELECT_SET(14)
1069 #define IOC_PD12_FUNC_CTL_ETH0_RXD_1           IOC_PAD_FUNC_CTL_ALT_SELECT_SET(18)
1070 
1071 /* IOC_PD13_FUNC_CTL function mux definitions */
1072 #define IOC_PD13_FUNC_CTL_GPIO_D_13            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(0)
1073 #define IOC_PD13_FUNC_CTL_GPTMR5_COMP_3        IOC_PAD_FUNC_CTL_ALT_SELECT_SET(1)
1074 #define IOC_PD13_FUNC_CTL_UART3_DE             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(2)
1075 #define IOC_PD13_FUNC_CTL_UART3_RTS            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(3)
1076 #define IOC_PD13_FUNC_CTL_I2C1_SCL             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(4)
1077 #define IOC_PD13_FUNC_CTL_SPI2_MOSI            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(5)
1078 #define IOC_PD13_FUNC_CTL_LIN3_TREN            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(6)
1079 #define IOC_PD13_FUNC_CTL_CAN3_STBY            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(7)
1080 #define IOC_PD13_FUNC_CTL_I2S2_MCLK            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(8)
1081 #define IOC_PD13_FUNC_CTL_XPI0_CB_CS1          IOC_PAD_FUNC_CTL_ALT_SELECT_SET(14)
1082 #define IOC_PD13_FUNC_CTL_ETH0_RXD_0           IOC_PAD_FUNC_CTL_ALT_SELECT_SET(18)
1083 
1084 /* IOC_PD14_FUNC_CTL function mux definitions */
1085 #define IOC_PD14_FUNC_CTL_GPIO_D_14            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(0)
1086 #define IOC_PD14_FUNC_CTL_GPTMR4_CAPT_3        IOC_PAD_FUNC_CTL_ALT_SELECT_SET(1)
1087 #define IOC_PD14_FUNC_CTL_UART3_RXD            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(2)
1088 #define IOC_PD14_FUNC_CTL_SPI2_DAT2            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(5)
1089 #define IOC_PD14_FUNC_CTL_LIN3_RXD             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(6)
1090 #define IOC_PD14_FUNC_CTL_CAN3_RXD             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(7)
1091 #define IOC_PD14_FUNC_CTL_I2S2_RXD_0           IOC_PAD_FUNC_CTL_ALT_SELECT_SET(8)
1092 #define IOC_PD14_FUNC_CTL_XPI0_CB_SCLK         IOC_PAD_FUNC_CTL_ALT_SELECT_SET(14)
1093 #define IOC_PD14_FUNC_CTL_ETH0_RXCK            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(18)
1094 
1095 /* IOC_PD15_FUNC_CTL function mux definitions */
1096 #define IOC_PD15_FUNC_CTL_GPIO_D_15            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(0)
1097 #define IOC_PD15_FUNC_CTL_GPTMR4_COMP_3        IOC_PAD_FUNC_CTL_ALT_SELECT_SET(1)
1098 #define IOC_PD15_FUNC_CTL_UART3_TXD            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(2)
1099 #define IOC_PD15_FUNC_CTL_SPI2_DAT3            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(5)
1100 #define IOC_PD15_FUNC_CTL_LIN3_TXD             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(6)
1101 #define IOC_PD15_FUNC_CTL_CAN3_TXD             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(7)
1102 #define IOC_PD15_FUNC_CTL_I2S2_BCLK            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(8)
1103 #define IOC_PD15_FUNC_CTL_XPI0_CB_D_0          IOC_PAD_FUNC_CTL_ALT_SELECT_SET(14)
1104 #define IOC_PD15_FUNC_CTL_ETH0_RXDV            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(18)
1105 
1106 /* IOC_PD16_FUNC_CTL function mux definitions */
1107 #define IOC_PD16_FUNC_CTL_GPIO_D_16            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(0)
1108 #define IOC_PD16_FUNC_CTL_GPTMR7_COMP_0        IOC_PAD_FUNC_CTL_ALT_SELECT_SET(1)
1109 #define IOC_PD16_FUNC_CTL_UART4_TXD            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(2)
1110 #define IOC_PD16_FUNC_CTL_LIN4_TXD             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(6)
1111 #define IOC_PD16_FUNC_CTL_CAN4_TXD             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(7)
1112 #define IOC_PD16_FUNC_CTL_I2S2_FCLK            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(8)
1113 #define IOC_PD16_FUNC_CTL_XPI0_CB_D_1          IOC_PAD_FUNC_CTL_ALT_SELECT_SET(14)
1114 #define IOC_PD16_FUNC_CTL_ETH0_RXD_3           IOC_PAD_FUNC_CTL_ALT_SELECT_SET(18)
1115 
1116 /* IOC_PD17_FUNC_CTL function mux definitions */
1117 #define IOC_PD17_FUNC_CTL_GPIO_D_17            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(0)
1118 #define IOC_PD17_FUNC_CTL_GPTMR7_CAPT_0        IOC_PAD_FUNC_CTL_ALT_SELECT_SET(1)
1119 #define IOC_PD17_FUNC_CTL_UART4_RXD            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(2)
1120 #define IOC_PD17_FUNC_CTL_LIN4_RXD             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(6)
1121 #define IOC_PD17_FUNC_CTL_CAN4_RXD             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(7)
1122 #define IOC_PD17_FUNC_CTL_I2S2_TXD_0           IOC_PAD_FUNC_CTL_ALT_SELECT_SET(8)
1123 #define IOC_PD17_FUNC_CTL_XPI0_CB_DQS          IOC_PAD_FUNC_CTL_ALT_SELECT_SET(14)
1124 #define IOC_PD17_FUNC_CTL_ETH0_RXD_2           IOC_PAD_FUNC_CTL_ALT_SELECT_SET(18)
1125 
1126 /* IOC_PD18_FUNC_CTL function mux definitions */
1127 #define IOC_PD18_FUNC_CTL_GPIO_D_18            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(0)
1128 #define IOC_PD18_FUNC_CTL_GPTMR7_COMP_1        IOC_PAD_FUNC_CTL_ALT_SELECT_SET(1)
1129 #define IOC_PD18_FUNC_CTL_UART4_DE             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(2)
1130 #define IOC_PD18_FUNC_CTL_UART4_RTS            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(3)
1131 #define IOC_PD18_FUNC_CTL_LIN4_TREN            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(6)
1132 #define IOC_PD18_FUNC_CTL_CAN4_STBY            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(7)
1133 #define IOC_PD18_FUNC_CTL_I2S2_MCLK            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(8)
1134 #define IOC_PD18_FUNC_CTL_XPI0_CB_D_3          IOC_PAD_FUNC_CTL_ALT_SELECT_SET(14)
1135 
1136 /* IOC_PD19_FUNC_CTL function mux definitions */
1137 #define IOC_PD19_FUNC_CTL_GPIO_D_19            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(0)
1138 #define IOC_PD19_FUNC_CTL_GPTMR7_CAPT_1        IOC_PAD_FUNC_CTL_ALT_SELECT_SET(1)
1139 #define IOC_PD19_FUNC_CTL_UART4_CTS            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(3)
1140 #define IOC_PD19_FUNC_CTL_SPI1_CS_3            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(5)
1141 #define IOC_PD19_FUNC_CTL_CAN5_STBY            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(7)
1142 #define IOC_PD19_FUNC_CTL_I2S2_TXD_1           IOC_PAD_FUNC_CTL_ALT_SELECT_SET(8)
1143 #define IOC_PD19_FUNC_CTL_XPI0_CB_D_2          IOC_PAD_FUNC_CTL_ALT_SELECT_SET(14)
1144 
1145 /* IOC_PD20_FUNC_CTL function mux definitions */
1146 #define IOC_PD20_FUNC_CTL_GPIO_D_20            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(0)
1147 #define IOC_PD20_FUNC_CTL_GPTMR7_CAPT_2        IOC_PAD_FUNC_CTL_ALT_SELECT_SET(1)
1148 #define IOC_PD20_FUNC_CTL_UART5_CTS            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(3)
1149 #define IOC_PD20_FUNC_CTL_SPI0_CS_0            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(5)
1150 #define IOC_PD20_FUNC_CTL_CAN5_RXD             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(7)
1151 #define IOC_PD20_FUNC_CTL_I2S3_RXD_1           IOC_PAD_FUNC_CTL_ALT_SELECT_SET(8)
1152 #define IOC_PD20_FUNC_CTL_ETH0_EVTI_3          IOC_PAD_FUNC_CTL_ALT_SELECT_SET(19)
1153 
1154 /* IOC_PD21_FUNC_CTL function mux definitions */
1155 #define IOC_PD21_FUNC_CTL_GPIO_D_21            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(0)
1156 #define IOC_PD21_FUNC_CTL_GPTMR7_COMP_2        IOC_PAD_FUNC_CTL_ALT_SELECT_SET(1)
1157 #define IOC_PD21_FUNC_CTL_UART5_DE             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(2)
1158 #define IOC_PD21_FUNC_CTL_UART5_RTS            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(3)
1159 #define IOC_PD21_FUNC_CTL_SPI0_SCLK            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(5)
1160 #define IOC_PD21_FUNC_CTL_LIN5_TREN            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(6)
1161 #define IOC_PD21_FUNC_CTL_CAN5_TXD             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(7)
1162 #define IOC_PD21_FUNC_CTL_I2S3_RXD_3           IOC_PAD_FUNC_CTL_ALT_SELECT_SET(8)
1163 #define IOC_PD21_FUNC_CTL_ETH0_EVTO_3          IOC_PAD_FUNC_CTL_ALT_SELECT_SET(19)
1164 
1165 /* IOC_PD22_FUNC_CTL function mux definitions */
1166 #define IOC_PD22_FUNC_CTL_GPIO_D_22            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(0)
1167 #define IOC_PD22_FUNC_CTL_GPTMR6_CAPT_0        IOC_PAD_FUNC_CTL_ALT_SELECT_SET(1)
1168 #define IOC_PD22_FUNC_CTL_UART5_RXD            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(2)
1169 #define IOC_PD22_FUNC_CTL_SPI0_MISO            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(5)
1170 #define IOC_PD22_FUNC_CTL_LIN5_TXD             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(6)
1171 #define IOC_PD22_FUNC_CTL_I2S3_RXD_0           IOC_PAD_FUNC_CTL_ALT_SELECT_SET(8)
1172 #define IOC_PD22_FUNC_CTL_ETH0_EVTI_2          IOC_PAD_FUNC_CTL_ALT_SELECT_SET(19)
1173 
1174 /* IOC_PD23_FUNC_CTL function mux definitions */
1175 #define IOC_PD23_FUNC_CTL_GPIO_D_23            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(0)
1176 #define IOC_PD23_FUNC_CTL_GPTMR6_COMP_0        IOC_PAD_FUNC_CTL_ALT_SELECT_SET(1)
1177 #define IOC_PD23_FUNC_CTL_UART5_TXD            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(2)
1178 #define IOC_PD23_FUNC_CTL_SPI0_MOSI            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(5)
1179 #define IOC_PD23_FUNC_CTL_LIN5_RXD             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(6)
1180 #define IOC_PD23_FUNC_CTL_I2S3_RXD_2           IOC_PAD_FUNC_CTL_ALT_SELECT_SET(8)
1181 #define IOC_PD23_FUNC_CTL_ETH0_EVTO_1          IOC_PAD_FUNC_CTL_ALT_SELECT_SET(19)
1182 
1183 /* IOC_PD24_FUNC_CTL function mux definitions */
1184 #define IOC_PD24_FUNC_CTL_GPIO_D_24            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(0)
1185 #define IOC_PD24_FUNC_CTL_GPTMR6_COMP_1        IOC_PAD_FUNC_CTL_ALT_SELECT_SET(1)
1186 #define IOC_PD24_FUNC_CTL_UART6_TXD            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(2)
1187 #define IOC_PD24_FUNC_CTL_I2C2_SCL             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(4)
1188 #define IOC_PD24_FUNC_CTL_SPI1_CS_2            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(5)
1189 #define IOC_PD24_FUNC_CTL_CAN6_TXD             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(7)
1190 #define IOC_PD24_FUNC_CTL_I2S3_BCLK            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(8)
1191 #define IOC_PD24_FUNC_CTL_ETH0_EVTI_1          IOC_PAD_FUNC_CTL_ALT_SELECT_SET(19)
1192 
1193 /* IOC_PD25_FUNC_CTL function mux definitions */
1194 #define IOC_PD25_FUNC_CTL_GPIO_D_25            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(0)
1195 #define IOC_PD25_FUNC_CTL_GPTMR6_CAPT_1        IOC_PAD_FUNC_CTL_ALT_SELECT_SET(1)
1196 #define IOC_PD25_FUNC_CTL_UART6_RXD            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(2)
1197 #define IOC_PD25_FUNC_CTL_I2C2_SDA             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(4)
1198 #define IOC_PD25_FUNC_CTL_SPI1_CS_1            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(5)
1199 #define IOC_PD25_FUNC_CTL_CAN6_RXD             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(7)
1200 #define IOC_PD25_FUNC_CTL_I2S3_FCLK            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(8)
1201 #define IOC_PD25_FUNC_CTL_ETH0_EVTO_2          IOC_PAD_FUNC_CTL_ALT_SELECT_SET(19)
1202 
1203 /* IOC_PD26_FUNC_CTL function mux definitions */
1204 #define IOC_PD26_FUNC_CTL_GPIO_D_26            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(0)
1205 #define IOC_PD26_FUNC_CTL_GPTMR6_COMP_2        IOC_PAD_FUNC_CTL_ALT_SELECT_SET(1)
1206 #define IOC_PD26_FUNC_CTL_UART6_DE             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(2)
1207 #define IOC_PD26_FUNC_CTL_UART6_RTS            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(3)
1208 #define IOC_PD26_FUNC_CTL_SPI1_CS_0            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(5)
1209 #define IOC_PD26_FUNC_CTL_LIN6_RXD             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(6)
1210 #define IOC_PD26_FUNC_CTL_CAN6_STBY            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(7)
1211 #define IOC_PD26_FUNC_CTL_I2S3_TXD_1           IOC_PAD_FUNC_CTL_ALT_SELECT_SET(8)
1212 #define IOC_PD26_FUNC_CTL_ETH0_MDC             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(18)
1213 
1214 /* IOC_PD27_FUNC_CTL function mux definitions */
1215 #define IOC_PD27_FUNC_CTL_GPIO_D_27            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(0)
1216 #define IOC_PD27_FUNC_CTL_GPTMR6_CAPT_2        IOC_PAD_FUNC_CTL_ALT_SELECT_SET(1)
1217 #define IOC_PD27_FUNC_CTL_UART6_CTS            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(3)
1218 #define IOC_PD27_FUNC_CTL_SPI1_SCLK            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(5)
1219 #define IOC_PD27_FUNC_CTL_LIN6_TXD             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(6)
1220 #define IOC_PD27_FUNC_CTL_I2S3_TXD_2           IOC_PAD_FUNC_CTL_ALT_SELECT_SET(8)
1221 #define IOC_PD27_FUNC_CTL_ETH0_MDIO            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(18)
1222 
1223 /* IOC_PD28_FUNC_CTL function mux definitions */
1224 #define IOC_PD28_FUNC_CTL_GPIO_D_28            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(0)
1225 #define IOC_PD28_FUNC_CTL_GPTMR7_CAPT_3        IOC_PAD_FUNC_CTL_ALT_SELECT_SET(1)
1226 #define IOC_PD28_FUNC_CTL_UART7_CTS            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(3)
1227 #define IOC_PD28_FUNC_CTL_I2C3_SDA             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(4)
1228 #define IOC_PD28_FUNC_CTL_SPI1_MISO            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(5)
1229 #define IOC_PD28_FUNC_CTL_LIN6_TREN            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(6)
1230 #define IOC_PD28_FUNC_CTL_I2S3_TXD_0           IOC_PAD_FUNC_CTL_ALT_SELECT_SET(8)
1231 
1232 /* IOC_PD29_FUNC_CTL function mux definitions */
1233 #define IOC_PD29_FUNC_CTL_GPIO_D_29            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(0)
1234 #define IOC_PD29_FUNC_CTL_GPTMR7_COMP_3        IOC_PAD_FUNC_CTL_ALT_SELECT_SET(1)
1235 #define IOC_PD29_FUNC_CTL_UART7_DE             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(2)
1236 #define IOC_PD29_FUNC_CTL_UART7_RTS            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(3)
1237 #define IOC_PD29_FUNC_CTL_I2C3_SCL             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(4)
1238 #define IOC_PD29_FUNC_CTL_SPI1_MOSI            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(5)
1239 #define IOC_PD29_FUNC_CTL_LIN7_TREN            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(6)
1240 #define IOC_PD29_FUNC_CTL_CAN7_STBY            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(7)
1241 #define IOC_PD29_FUNC_CTL_I2S3_TXD_3           IOC_PAD_FUNC_CTL_ALT_SELECT_SET(8)
1242 #define IOC_PD29_FUNC_CTL_CPU0_NMI             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(24)
1243 
1244 /* IOC_PD30_FUNC_CTL function mux definitions */
1245 #define IOC_PD30_FUNC_CTL_GPIO_D_30            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(0)
1246 #define IOC_PD30_FUNC_CTL_GPTMR6_CAPT_3        IOC_PAD_FUNC_CTL_ALT_SELECT_SET(1)
1247 #define IOC_PD30_FUNC_CTL_UART7_RXD            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(2)
1248 #define IOC_PD30_FUNC_CTL_SPI1_DAT2            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(5)
1249 #define IOC_PD30_FUNC_CTL_LIN7_RXD             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(6)
1250 #define IOC_PD30_FUNC_CTL_CAN7_RXD             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(7)
1251 #define IOC_PD30_FUNC_CTL_I2S3_MCLK            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(8)
1252 #define IOC_PD30_FUNC_CTL_ETH0_EVTI_0          IOC_PAD_FUNC_CTL_ALT_SELECT_SET(19)
1253 #define IOC_PD30_FUNC_CTL_SOC_REF0             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(24)
1254 
1255 /* IOC_PD31_FUNC_CTL function mux definitions */
1256 #define IOC_PD31_FUNC_CTL_GPIO_D_31            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(0)
1257 #define IOC_PD31_FUNC_CTL_GPTMR6_COMP_3        IOC_PAD_FUNC_CTL_ALT_SELECT_SET(1)
1258 #define IOC_PD31_FUNC_CTL_UART7_TXD            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(2)
1259 #define IOC_PD31_FUNC_CTL_SPI1_DAT3            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(5)
1260 #define IOC_PD31_FUNC_CTL_LIN7_TXD             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(6)
1261 #define IOC_PD31_FUNC_CTL_CAN7_TXD             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(7)
1262 #define IOC_PD31_FUNC_CTL_I2S3_MCLK            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(8)
1263 #define IOC_PD31_FUNC_CTL_ETH0_EVTO_0          IOC_PAD_FUNC_CTL_ALT_SELECT_SET(19)
1264 #define IOC_PD31_FUNC_CTL_SOC_REF1             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(24)
1265 
1266 /* IOC_PE00_FUNC_CTL function mux definitions */
1267 #define IOC_PE00_FUNC_CTL_GPIO_E_00            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(0)
1268 #define IOC_PE00_FUNC_CTL_GPTMR1_COMP_0        IOC_PAD_FUNC_CTL_ALT_SELECT_SET(1)
1269 #define IOC_PE00_FUNC_CTL_UART0_TXD            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(2)
1270 #define IOC_PE00_FUNC_CTL_LIN0_TXD             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(6)
1271 #define IOC_PE00_FUNC_CTL_CAN0_TXD             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(7)
1272 #define IOC_PE00_FUNC_CTL_I2S3_TXD_3           IOC_PAD_FUNC_CTL_ALT_SELECT_SET(8)
1273 #define IOC_PE00_FUNC_CTL_PDM0_CLK             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(10)
1274 #define IOC_PE00_FUNC_CTL_SYSCTL_CLK_OBS_0     IOC_PAD_FUNC_CTL_ALT_SELECT_SET(24)
1275 
1276 /* IOC_PE01_FUNC_CTL function mux definitions */
1277 #define IOC_PE01_FUNC_CTL_GPIO_E_01            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(0)
1278 #define IOC_PE01_FUNC_CTL_GPTMR1_CAPT_0        IOC_PAD_FUNC_CTL_ALT_SELECT_SET(1)
1279 #define IOC_PE01_FUNC_CTL_UART0_RXD            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(2)
1280 #define IOC_PE01_FUNC_CTL_LIN0_RXD             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(6)
1281 #define IOC_PE01_FUNC_CTL_CAN0_RXD             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(7)
1282 #define IOC_PE01_FUNC_CTL_I2S3_TXD_2           IOC_PAD_FUNC_CTL_ALT_SELECT_SET(8)
1283 #define IOC_PE01_FUNC_CTL_PDM0_D_1             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(10)
1284 
1285 /* IOC_PE02_FUNC_CTL function mux definitions */
1286 #define IOC_PE02_FUNC_CTL_GPIO_E_02            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(0)
1287 #define IOC_PE02_FUNC_CTL_GPTMR1_COMP_1        IOC_PAD_FUNC_CTL_ALT_SELECT_SET(1)
1288 #define IOC_PE02_FUNC_CTL_UART0_DE             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(2)
1289 #define IOC_PE02_FUNC_CTL_UART0_RTS            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(3)
1290 #define IOC_PE02_FUNC_CTL_LIN0_TREN            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(6)
1291 #define IOC_PE02_FUNC_CTL_CAN0_STBY            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(7)
1292 #define IOC_PE02_FUNC_CTL_I2S3_TXD_1           IOC_PAD_FUNC_CTL_ALT_SELECT_SET(8)
1293 #define IOC_PE02_FUNC_CTL_PDM0_D_0             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(10)
1294 #define IOC_PE02_FUNC_CTL_SYSCTL_CLK_OBS_2     IOC_PAD_FUNC_CTL_ALT_SELECT_SET(24)
1295 
1296 /* IOC_PE03_FUNC_CTL function mux definitions */
1297 #define IOC_PE03_FUNC_CTL_GPIO_E_03            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(0)
1298 #define IOC_PE03_FUNC_CTL_GPTMR1_CAPT_1        IOC_PAD_FUNC_CTL_ALT_SELECT_SET(1)
1299 #define IOC_PE03_FUNC_CTL_UART0_CTS            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(3)
1300 #define IOC_PE03_FUNC_CTL_SPI2_CS_3            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(5)
1301 #define IOC_PE03_FUNC_CTL_CAN1_STBY            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(7)
1302 #define IOC_PE03_FUNC_CTL_I2S3_TXD_0           IOC_PAD_FUNC_CTL_ALT_SELECT_SET(8)
1303 #define IOC_PE03_FUNC_CTL_SYSCTL_CLK_OBS_1     IOC_PAD_FUNC_CTL_ALT_SELECT_SET(24)
1304 
1305 /* IOC_PE04_FUNC_CTL function mux definitions */
1306 #define IOC_PE04_FUNC_CTL_GPIO_E_04            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(0)
1307 #define IOC_PE04_FUNC_CTL_GPTMR1_CAPT_2        IOC_PAD_FUNC_CTL_ALT_SELECT_SET(1)
1308 #define IOC_PE04_FUNC_CTL_UART1_CTS            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(3)
1309 #define IOC_PE04_FUNC_CTL_SPI3_CS_0            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(5)
1310 #define IOC_PE04_FUNC_CTL_CAN1_RXD             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(7)
1311 #define IOC_PE04_FUNC_CTL_I2S3_MCLK            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(8)
1312 #define IOC_PE04_FUNC_CTL_SYSCTL_CLK_OBS_3     IOC_PAD_FUNC_CTL_ALT_SELECT_SET(24)
1313 
1314 /* IOC_PE05_FUNC_CTL function mux definitions */
1315 #define IOC_PE05_FUNC_CTL_GPIO_E_05            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(0)
1316 #define IOC_PE05_FUNC_CTL_GPTMR1_COMP_2        IOC_PAD_FUNC_CTL_ALT_SELECT_SET(1)
1317 #define IOC_PE05_FUNC_CTL_UART1_DE             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(2)
1318 #define IOC_PE05_FUNC_CTL_UART1_RTS            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(3)
1319 #define IOC_PE05_FUNC_CTL_SPI3_SCLK            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(5)
1320 #define IOC_PE05_FUNC_CTL_LIN1_TREN            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(6)
1321 #define IOC_PE05_FUNC_CTL_CAN1_TXD             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(7)
1322 #define IOC_PE05_FUNC_CTL_DAO_RP               IOC_PAD_FUNC_CTL_ALT_SELECT_SET(10)
1323 
1324 /* IOC_PE06_FUNC_CTL function mux definitions */
1325 #define IOC_PE06_FUNC_CTL_GPIO_E_06            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(0)
1326 #define IOC_PE06_FUNC_CTL_GPTMR0_CAPT_0        IOC_PAD_FUNC_CTL_ALT_SELECT_SET(1)
1327 #define IOC_PE06_FUNC_CTL_UART1_RXD            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(2)
1328 #define IOC_PE06_FUNC_CTL_SPI3_MISO            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(5)
1329 #define IOC_PE06_FUNC_CTL_LIN1_TXD             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(6)
1330 #define IOC_PE06_FUNC_CTL_DAO_LN               IOC_PAD_FUNC_CTL_ALT_SELECT_SET(10)
1331 
1332 /* IOC_PE07_FUNC_CTL function mux definitions */
1333 #define IOC_PE07_FUNC_CTL_GPIO_E_07            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(0)
1334 #define IOC_PE07_FUNC_CTL_GPTMR0_COMP_0        IOC_PAD_FUNC_CTL_ALT_SELECT_SET(1)
1335 #define IOC_PE07_FUNC_CTL_UART1_TXD            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(2)
1336 #define IOC_PE07_FUNC_CTL_SPI3_MOSI            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(5)
1337 #define IOC_PE07_FUNC_CTL_LIN1_RXD             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(6)
1338 #define IOC_PE07_FUNC_CTL_DAO_LP               IOC_PAD_FUNC_CTL_ALT_SELECT_SET(10)
1339 
1340 /* IOC_PE08_FUNC_CTL function mux definitions */
1341 #define IOC_PE08_FUNC_CTL_GPIO_E_08            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(0)
1342 #define IOC_PE08_FUNC_CTL_GPTMR0_COMP_1        IOC_PAD_FUNC_CTL_ALT_SELECT_SET(1)
1343 #define IOC_PE08_FUNC_CTL_UART2_TXD            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(2)
1344 #define IOC_PE08_FUNC_CTL_I2C0_SCL             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(4)
1345 #define IOC_PE08_FUNC_CTL_SPI2_CS_2            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(5)
1346 #define IOC_PE08_FUNC_CTL_CAN2_TXD             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(7)
1347 #define IOC_PE08_FUNC_CTL_I2S3_FCLK            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(8)
1348 #define IOC_PE08_FUNC_CTL_ETH0_EVTO_3          IOC_PAD_FUNC_CTL_ALT_SELECT_SET(19)
1349 
1350 /* IOC_PE09_FUNC_CTL function mux definitions */
1351 #define IOC_PE09_FUNC_CTL_GPIO_E_09            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(0)
1352 #define IOC_PE09_FUNC_CTL_GPTMR0_CAPT_1        IOC_PAD_FUNC_CTL_ALT_SELECT_SET(1)
1353 #define IOC_PE09_FUNC_CTL_UART2_RXD            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(2)
1354 #define IOC_PE09_FUNC_CTL_I2C0_SDA             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(4)
1355 #define IOC_PE09_FUNC_CTL_SPI2_CS_1            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(5)
1356 #define IOC_PE09_FUNC_CTL_CAN2_RXD             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(7)
1357 #define IOC_PE09_FUNC_CTL_I2S3_MCLK            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(8)
1358 #define IOC_PE09_FUNC_CTL_ETH0_EVTI_3          IOC_PAD_FUNC_CTL_ALT_SELECT_SET(19)
1359 
1360 /* IOC_PE10_FUNC_CTL function mux definitions */
1361 #define IOC_PE10_FUNC_CTL_GPIO_E_10            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(0)
1362 #define IOC_PE10_FUNC_CTL_GPTMR0_COMP_2        IOC_PAD_FUNC_CTL_ALT_SELECT_SET(1)
1363 #define IOC_PE10_FUNC_CTL_UART2_DE             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(2)
1364 #define IOC_PE10_FUNC_CTL_UART2_RTS            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(3)
1365 #define IOC_PE10_FUNC_CTL_SPI2_CS_0            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(5)
1366 #define IOC_PE10_FUNC_CTL_LIN2_RXD             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(6)
1367 #define IOC_PE10_FUNC_CTL_CAN2_STBY            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(7)
1368 #define IOC_PE10_FUNC_CTL_I2S3_BCLK            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(8)
1369 #define IOC_PE10_FUNC_CTL_ETH0_EVTO_1          IOC_PAD_FUNC_CTL_ALT_SELECT_SET(19)
1370 
1371 /* IOC_PE11_FUNC_CTL function mux definitions */
1372 #define IOC_PE11_FUNC_CTL_GPIO_E_11            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(0)
1373 #define IOC_PE11_FUNC_CTL_GPTMR0_CAPT_2        IOC_PAD_FUNC_CTL_ALT_SELECT_SET(1)
1374 #define IOC_PE11_FUNC_CTL_UART2_CTS            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(3)
1375 #define IOC_PE11_FUNC_CTL_SPI2_SCLK            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(5)
1376 #define IOC_PE11_FUNC_CTL_LIN2_TXD             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(6)
1377 #define IOC_PE11_FUNC_CTL_DAO_RN               IOC_PAD_FUNC_CTL_ALT_SELECT_SET(10)
1378 #define IOC_PE11_FUNC_CTL_ETH0_EVTI_2          IOC_PAD_FUNC_CTL_ALT_SELECT_SET(19)
1379 
1380 /* IOC_PE12_FUNC_CTL function mux definitions */
1381 #define IOC_PE12_FUNC_CTL_GPIO_E_12            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(0)
1382 #define IOC_PE12_FUNC_CTL_GPTMR1_CAPT_3        IOC_PAD_FUNC_CTL_ALT_SELECT_SET(1)
1383 #define IOC_PE12_FUNC_CTL_UART3_CTS            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(3)
1384 #define IOC_PE12_FUNC_CTL_I2C1_SDA             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(4)
1385 #define IOC_PE12_FUNC_CTL_SPI2_MISO            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(5)
1386 #define IOC_PE12_FUNC_CTL_LIN2_TREN            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(6)
1387 #define IOC_PE12_FUNC_CTL_I2S3_RXD_1           IOC_PAD_FUNC_CTL_ALT_SELECT_SET(8)
1388 #define IOC_PE12_FUNC_CTL_PDM0_D_2             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(10)
1389 #define IOC_PE12_FUNC_CTL_ETH0_EVTO_2          IOC_PAD_FUNC_CTL_ALT_SELECT_SET(19)
1390 
1391 /* IOC_PE13_FUNC_CTL function mux definitions */
1392 #define IOC_PE13_FUNC_CTL_GPIO_E_13            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(0)
1393 #define IOC_PE13_FUNC_CTL_GPTMR1_COMP_3        IOC_PAD_FUNC_CTL_ALT_SELECT_SET(1)
1394 #define IOC_PE13_FUNC_CTL_UART3_DE             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(2)
1395 #define IOC_PE13_FUNC_CTL_UART3_RTS            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(3)
1396 #define IOC_PE13_FUNC_CTL_I2C1_SCL             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(4)
1397 #define IOC_PE13_FUNC_CTL_SPI2_MOSI            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(5)
1398 #define IOC_PE13_FUNC_CTL_LIN3_TREN            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(6)
1399 #define IOC_PE13_FUNC_CTL_CAN3_STBY            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(7)
1400 #define IOC_PE13_FUNC_CTL_I2S3_RXD_0           IOC_PAD_FUNC_CTL_ALT_SELECT_SET(8)
1401 #define IOC_PE13_FUNC_CTL_PDM0_D_3             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(10)
1402 #define IOC_PE13_FUNC_CTL_ETH0_EVTI_1          IOC_PAD_FUNC_CTL_ALT_SELECT_SET(19)
1403 
1404 /* IOC_PE14_FUNC_CTL function mux definitions */
1405 #define IOC_PE14_FUNC_CTL_GPIO_E_14            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(0)
1406 #define IOC_PE14_FUNC_CTL_GPTMR0_CAPT_3        IOC_PAD_FUNC_CTL_ALT_SELECT_SET(1)
1407 #define IOC_PE14_FUNC_CTL_UART3_RXD            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(2)
1408 #define IOC_PE14_FUNC_CTL_SPI2_DAT2            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(5)
1409 #define IOC_PE14_FUNC_CTL_LIN3_RXD             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(6)
1410 #define IOC_PE14_FUNC_CTL_CAN3_RXD             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(7)
1411 #define IOC_PE14_FUNC_CTL_I2S3_RXD_3           IOC_PAD_FUNC_CTL_ALT_SELECT_SET(8)
1412 #define IOC_PE14_FUNC_CTL_PDM0_CLK             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(10)
1413 #define IOC_PE14_FUNC_CTL_ETH0_MDIO            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(18)
1414 #define IOC_PE14_FUNC_CTL_ETH0_EVTO_0          IOC_PAD_FUNC_CTL_ALT_SELECT_SET(19)
1415 
1416 /* IOC_PE15_FUNC_CTL function mux definitions */
1417 #define IOC_PE15_FUNC_CTL_GPIO_E_15            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(0)
1418 #define IOC_PE15_FUNC_CTL_GPTMR0_COMP_3        IOC_PAD_FUNC_CTL_ALT_SELECT_SET(1)
1419 #define IOC_PE15_FUNC_CTL_UART3_TXD            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(2)
1420 #define IOC_PE15_FUNC_CTL_SPI2_DAT3            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(5)
1421 #define IOC_PE15_FUNC_CTL_LIN3_TXD             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(6)
1422 #define IOC_PE15_FUNC_CTL_CAN3_TXD             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(7)
1423 #define IOC_PE15_FUNC_CTL_I2S3_RXD_2           IOC_PAD_FUNC_CTL_ALT_SELECT_SET(8)
1424 #define IOC_PE15_FUNC_CTL_ETH0_MDC             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(18)
1425 #define IOC_PE15_FUNC_CTL_ETH0_EVTI_0          IOC_PAD_FUNC_CTL_ALT_SELECT_SET(19)
1426 
1427 /* IOC_PE16_FUNC_CTL function mux definitions */
1428 #define IOC_PE16_FUNC_CTL_GPIO_E_16            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(0)
1429 #define IOC_PE16_FUNC_CTL_GPTMR3_COMP_0        IOC_PAD_FUNC_CTL_ALT_SELECT_SET(1)
1430 #define IOC_PE16_FUNC_CTL_UART4_TXD            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(2)
1431 #define IOC_PE16_FUNC_CTL_LIN4_TXD             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(6)
1432 #define IOC_PE16_FUNC_CTL_CAN4_TXD             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(7)
1433 #define IOC_PE16_FUNC_CTL_I2S0_TXD_2           IOC_PAD_FUNC_CTL_ALT_SELECT_SET(8)
1434 #define IOC_PE16_FUNC_CTL_ETH0_EVTO_0          IOC_PAD_FUNC_CTL_ALT_SELECT_SET(19)
1435 
1436 /* IOC_PE17_FUNC_CTL function mux definitions */
1437 #define IOC_PE17_FUNC_CTL_GPIO_E_17            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(0)
1438 #define IOC_PE17_FUNC_CTL_GPTMR3_CAPT_0        IOC_PAD_FUNC_CTL_ALT_SELECT_SET(1)
1439 #define IOC_PE17_FUNC_CTL_UART4_RXD            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(2)
1440 #define IOC_PE17_FUNC_CTL_LIN4_RXD             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(6)
1441 #define IOC_PE17_FUNC_CTL_CAN4_RXD             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(7)
1442 #define IOC_PE17_FUNC_CTL_I2S0_TXD_3           IOC_PAD_FUNC_CTL_ALT_SELECT_SET(8)
1443 #define IOC_PE17_FUNC_CTL_ETH0_EVTI_0          IOC_PAD_FUNC_CTL_ALT_SELECT_SET(19)
1444 
1445 /* IOC_PE18_FUNC_CTL function mux definitions */
1446 #define IOC_PE18_FUNC_CTL_GPIO_E_18            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(0)
1447 #define IOC_PE18_FUNC_CTL_GPTMR3_COMP_1        IOC_PAD_FUNC_CTL_ALT_SELECT_SET(1)
1448 #define IOC_PE18_FUNC_CTL_UART4_DE             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(2)
1449 #define IOC_PE18_FUNC_CTL_UART4_RTS            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(3)
1450 #define IOC_PE18_FUNC_CTL_LIN4_TREN            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(6)
1451 #define IOC_PE18_FUNC_CTL_CAN4_STBY            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(7)
1452 #define IOC_PE18_FUNC_CTL_I2S0_TXD_0           IOC_PAD_FUNC_CTL_ALT_SELECT_SET(8)
1453 #define IOC_PE18_FUNC_CTL_ETH0_EVTO_1          IOC_PAD_FUNC_CTL_ALT_SELECT_SET(19)
1454 #define IOC_PE18_FUNC_CTL_USB0_PWR             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(24)
1455 
1456 /* IOC_PE19_FUNC_CTL function mux definitions */
1457 #define IOC_PE19_FUNC_CTL_GPIO_E_19            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(0)
1458 #define IOC_PE19_FUNC_CTL_GPTMR3_CAPT_1        IOC_PAD_FUNC_CTL_ALT_SELECT_SET(1)
1459 #define IOC_PE19_FUNC_CTL_UART4_CTS            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(3)
1460 #define IOC_PE19_FUNC_CTL_SPI1_CS_3            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(5)
1461 #define IOC_PE19_FUNC_CTL_CAN5_STBY            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(7)
1462 #define IOC_PE19_FUNC_CTL_I2S0_TXD_1           IOC_PAD_FUNC_CTL_ALT_SELECT_SET(8)
1463 #define IOC_PE19_FUNC_CTL_ETH0_EVTI_1          IOC_PAD_FUNC_CTL_ALT_SELECT_SET(19)
1464 
1465 /* IOC_PE20_FUNC_CTL function mux definitions */
1466 #define IOC_PE20_FUNC_CTL_GPIO_E_20            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(0)
1467 #define IOC_PE20_FUNC_CTL_GPTMR3_CAPT_2        IOC_PAD_FUNC_CTL_ALT_SELECT_SET(1)
1468 #define IOC_PE20_FUNC_CTL_UART5_CTS            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(3)
1469 #define IOC_PE20_FUNC_CTL_SPI0_CS_0            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(5)
1470 #define IOC_PE20_FUNC_CTL_CAN5_RXD             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(7)
1471 #define IOC_PE20_FUNC_CTL_I2S0_RXD_0           IOC_PAD_FUNC_CTL_ALT_SELECT_SET(8)
1472 #define IOC_PE20_FUNC_CTL_ETH0_EVTO_2          IOC_PAD_FUNC_CTL_ALT_SELECT_SET(19)
1473 #define IOC_PE20_FUNC_CTL_USB0_ID              IOC_PAD_FUNC_CTL_ALT_SELECT_SET(24)
1474 
1475 /* IOC_PE21_FUNC_CTL function mux definitions */
1476 #define IOC_PE21_FUNC_CTL_GPIO_E_21            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(0)
1477 #define IOC_PE21_FUNC_CTL_GPTMR3_COMP_2        IOC_PAD_FUNC_CTL_ALT_SELECT_SET(1)
1478 #define IOC_PE21_FUNC_CTL_UART5_DE             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(2)
1479 #define IOC_PE21_FUNC_CTL_UART5_RTS            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(3)
1480 #define IOC_PE21_FUNC_CTL_SPI0_SCLK            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(5)
1481 #define IOC_PE21_FUNC_CTL_LIN5_TREN            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(6)
1482 #define IOC_PE21_FUNC_CTL_CAN5_TXD             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(7)
1483 #define IOC_PE21_FUNC_CTL_I2S0_RXD_1           IOC_PAD_FUNC_CTL_ALT_SELECT_SET(8)
1484 #define IOC_PE21_FUNC_CTL_ETH0_EVTI_2          IOC_PAD_FUNC_CTL_ALT_SELECT_SET(19)
1485 
1486 /* IOC_PE22_FUNC_CTL function mux definitions */
1487 #define IOC_PE22_FUNC_CTL_GPIO_E_22            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(0)
1488 #define IOC_PE22_FUNC_CTL_GPTMR2_CAPT_0        IOC_PAD_FUNC_CTL_ALT_SELECT_SET(1)
1489 #define IOC_PE22_FUNC_CTL_UART5_RXD            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(2)
1490 #define IOC_PE22_FUNC_CTL_SPI0_MISO            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(5)
1491 #define IOC_PE22_FUNC_CTL_LIN5_TXD             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(6)
1492 #define IOC_PE22_FUNC_CTL_I2S0_RXD_2           IOC_PAD_FUNC_CTL_ALT_SELECT_SET(8)
1493 #define IOC_PE22_FUNC_CTL_ETH0_EVTO_3          IOC_PAD_FUNC_CTL_ALT_SELECT_SET(19)
1494 
1495 /* IOC_PE23_FUNC_CTL function mux definitions */
1496 #define IOC_PE23_FUNC_CTL_GPIO_E_23            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(0)
1497 #define IOC_PE23_FUNC_CTL_GPTMR2_COMP_0        IOC_PAD_FUNC_CTL_ALT_SELECT_SET(1)
1498 #define IOC_PE23_FUNC_CTL_UART5_TXD            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(2)
1499 #define IOC_PE23_FUNC_CTL_SPI0_MOSI            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(5)
1500 #define IOC_PE23_FUNC_CTL_LIN5_RXD             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(6)
1501 #define IOC_PE23_FUNC_CTL_I2S0_RXD_3           IOC_PAD_FUNC_CTL_ALT_SELECT_SET(8)
1502 #define IOC_PE23_FUNC_CTL_ETH0_EVTI_3          IOC_PAD_FUNC_CTL_ALT_SELECT_SET(19)
1503 #define IOC_PE23_FUNC_CTL_USB0_OC              IOC_PAD_FUNC_CTL_ALT_SELECT_SET(24)
1504 
1505 /* IOC_PE24_FUNC_CTL function mux definitions */
1506 #define IOC_PE24_FUNC_CTL_GPIO_E_24            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(0)
1507 #define IOC_PE24_FUNC_CTL_GPTMR2_COMP_1        IOC_PAD_FUNC_CTL_ALT_SELECT_SET(1)
1508 #define IOC_PE24_FUNC_CTL_UART6_TXD            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(2)
1509 #define IOC_PE24_FUNC_CTL_I2C2_SCL             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(4)
1510 #define IOC_PE24_FUNC_CTL_SPI1_CS_2            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(5)
1511 #define IOC_PE24_FUNC_CTL_CAN6_TXD             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(7)
1512 #define IOC_PE24_FUNC_CTL_I2S0_FCLK            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(8)
1513 #define IOC_PE24_FUNC_CTL_ETH0_MDIO            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(18)
1514 
1515 /* IOC_PE25_FUNC_CTL function mux definitions */
1516 #define IOC_PE25_FUNC_CTL_GPIO_E_25            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(0)
1517 #define IOC_PE25_FUNC_CTL_GPTMR2_CAPT_1        IOC_PAD_FUNC_CTL_ALT_SELECT_SET(1)
1518 #define IOC_PE25_FUNC_CTL_UART6_RXD            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(2)
1519 #define IOC_PE25_FUNC_CTL_I2C2_SDA             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(4)
1520 #define IOC_PE25_FUNC_CTL_SPI1_CS_1            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(5)
1521 #define IOC_PE25_FUNC_CTL_CAN6_RXD             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(7)
1522 #define IOC_PE25_FUNC_CTL_I2S0_MCLK            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(8)
1523 #define IOC_PE25_FUNC_CTL_ETH0_MDC             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(18)
1524 
1525 /* IOC_PE26_FUNC_CTL function mux definitions */
1526 #define IOC_PE26_FUNC_CTL_GPIO_E_26            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(0)
1527 #define IOC_PE26_FUNC_CTL_GPTMR2_COMP_2        IOC_PAD_FUNC_CTL_ALT_SELECT_SET(1)
1528 #define IOC_PE26_FUNC_CTL_UART6_DE             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(2)
1529 #define IOC_PE26_FUNC_CTL_UART6_RTS            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(3)
1530 #define IOC_PE26_FUNC_CTL_SPI1_CS_0            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(5)
1531 #define IOC_PE26_FUNC_CTL_LIN6_RXD             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(6)
1532 #define IOC_PE26_FUNC_CTL_CAN6_STBY            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(7)
1533 #define IOC_PE26_FUNC_CTL_I2S0_BCLK            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(8)
1534 
1535 /* IOC_PE27_FUNC_CTL function mux definitions */
1536 #define IOC_PE27_FUNC_CTL_GPIO_E_27            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(0)
1537 #define IOC_PE27_FUNC_CTL_GPTMR2_CAPT_2        IOC_PAD_FUNC_CTL_ALT_SELECT_SET(1)
1538 #define IOC_PE27_FUNC_CTL_UART6_CTS            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(3)
1539 #define IOC_PE27_FUNC_CTL_SPI1_SCLK            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(5)
1540 #define IOC_PE27_FUNC_CTL_LIN6_TXD             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(6)
1541 #define IOC_PE27_FUNC_CTL_I2S0_MCLK            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(8)
1542 #define IOC_PE27_FUNC_CTL_USB0_PWR             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(24)
1543 
1544 /* IOC_PE28_FUNC_CTL function mux definitions */
1545 #define IOC_PE28_FUNC_CTL_GPIO_E_28            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(0)
1546 #define IOC_PE28_FUNC_CTL_GPTMR3_CAPT_3        IOC_PAD_FUNC_CTL_ALT_SELECT_SET(1)
1547 #define IOC_PE28_FUNC_CTL_UART7_CTS            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(3)
1548 #define IOC_PE28_FUNC_CTL_I2C3_SDA             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(4)
1549 #define IOC_PE28_FUNC_CTL_SPI1_MISO            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(5)
1550 #define IOC_PE28_FUNC_CTL_LIN6_TREN            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(6)
1551 #define IOC_PE28_FUNC_CTL_DAO_RP               IOC_PAD_FUNC_CTL_ALT_SELECT_SET(10)
1552 #define IOC_PE28_FUNC_CTL_USB0_ID              IOC_PAD_FUNC_CTL_ALT_SELECT_SET(24)
1553 
1554 /* IOC_PE29_FUNC_CTL function mux definitions */
1555 #define IOC_PE29_FUNC_CTL_GPIO_E_29            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(0)
1556 #define IOC_PE29_FUNC_CTL_GPTMR3_COMP_3        IOC_PAD_FUNC_CTL_ALT_SELECT_SET(1)
1557 #define IOC_PE29_FUNC_CTL_UART7_DE             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(2)
1558 #define IOC_PE29_FUNC_CTL_UART7_RTS            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(3)
1559 #define IOC_PE29_FUNC_CTL_I2C3_SCL             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(4)
1560 #define IOC_PE29_FUNC_CTL_SPI1_MOSI            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(5)
1561 #define IOC_PE29_FUNC_CTL_LIN7_TREN            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(6)
1562 #define IOC_PE29_FUNC_CTL_CAN7_STBY            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(7)
1563 #define IOC_PE29_FUNC_CTL_DAO_LN               IOC_PAD_FUNC_CTL_ALT_SELECT_SET(10)
1564 
1565 /* IOC_PE30_FUNC_CTL function mux definitions */
1566 #define IOC_PE30_FUNC_CTL_GPIO_E_30            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(0)
1567 #define IOC_PE30_FUNC_CTL_GPTMR2_CAPT_3        IOC_PAD_FUNC_CTL_ALT_SELECT_SET(1)
1568 #define IOC_PE30_FUNC_CTL_UART7_RXD            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(2)
1569 #define IOC_PE30_FUNC_CTL_SPI1_DAT2            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(5)
1570 #define IOC_PE30_FUNC_CTL_LIN7_RXD             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(6)
1571 #define IOC_PE30_FUNC_CTL_CAN7_RXD             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(7)
1572 #define IOC_PE30_FUNC_CTL_DAO_RN               IOC_PAD_FUNC_CTL_ALT_SELECT_SET(10)
1573 #define IOC_PE30_FUNC_CTL_USB0_OC              IOC_PAD_FUNC_CTL_ALT_SELECT_SET(24)
1574 
1575 /* IOC_PE31_FUNC_CTL function mux definitions */
1576 #define IOC_PE31_FUNC_CTL_GPIO_E_31            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(0)
1577 #define IOC_PE31_FUNC_CTL_GPTMR2_COMP_3        IOC_PAD_FUNC_CTL_ALT_SELECT_SET(1)
1578 #define IOC_PE31_FUNC_CTL_UART7_TXD            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(2)
1579 #define IOC_PE31_FUNC_CTL_SPI1_DAT3            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(5)
1580 #define IOC_PE31_FUNC_CTL_LIN7_TXD             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(6)
1581 #define IOC_PE31_FUNC_CTL_CAN7_TXD             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(7)
1582 #define IOC_PE31_FUNC_CTL_DAO_LP               IOC_PAD_FUNC_CTL_ALT_SELECT_SET(10)
1583 
1584 /* IOC_PF00_FUNC_CTL function mux definitions */
1585 #define IOC_PF00_FUNC_CTL_GPIO_F_00            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(0)
1586 #define IOC_PF00_FUNC_CTL_GPTMR5_COMP_0        IOC_PAD_FUNC_CTL_ALT_SELECT_SET(1)
1587 #define IOC_PF00_FUNC_CTL_UART0_TXD            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(2)
1588 #define IOC_PF00_FUNC_CTL_LIN0_TXD             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(6)
1589 #define IOC_PF00_FUNC_CTL_CAN0_TXD             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(7)
1590 #define IOC_PF00_FUNC_CTL_PDM0_CLK             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(10)
1591 #define IOC_PF00_FUNC_CTL_USB0_PWR             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(24)
1592 
1593 /* IOC_PF01_FUNC_CTL function mux definitions */
1594 #define IOC_PF01_FUNC_CTL_GPIO_F_01            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(0)
1595 #define IOC_PF01_FUNC_CTL_GPTMR5_CAPT_0        IOC_PAD_FUNC_CTL_ALT_SELECT_SET(1)
1596 #define IOC_PF01_FUNC_CTL_UART0_RXD            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(2)
1597 #define IOC_PF01_FUNC_CTL_LIN0_RXD             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(6)
1598 #define IOC_PF01_FUNC_CTL_CAN0_RXD             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(7)
1599 #define IOC_PF01_FUNC_CTL_PDM0_D_2             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(10)
1600 #define IOC_PF01_FUNC_CTL_CPU0_NMI             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(24)
1601 
1602 /* IOC_PF02_FUNC_CTL function mux definitions */
1603 #define IOC_PF02_FUNC_CTL_GPIO_F_02            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(0)
1604 #define IOC_PF02_FUNC_CTL_GPTMR5_COMP_1        IOC_PAD_FUNC_CTL_ALT_SELECT_SET(1)
1605 #define IOC_PF02_FUNC_CTL_UART0_DE             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(2)
1606 #define IOC_PF02_FUNC_CTL_UART0_RTS            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(3)
1607 #define IOC_PF02_FUNC_CTL_LIN0_TREN            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(6)
1608 #define IOC_PF02_FUNC_CTL_CAN0_STBY            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(7)
1609 #define IOC_PF02_FUNC_CTL_PDM0_D_3             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(10)
1610 #define IOC_PF02_FUNC_CTL_ETH0_EVTO_0          IOC_PAD_FUNC_CTL_ALT_SELECT_SET(19)
1611 
1612 /* IOC_PF03_FUNC_CTL function mux definitions */
1613 #define IOC_PF03_FUNC_CTL_GPIO_F_03            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(0)
1614 #define IOC_PF03_FUNC_CTL_GPTMR5_CAPT_1        IOC_PAD_FUNC_CTL_ALT_SELECT_SET(1)
1615 #define IOC_PF03_FUNC_CTL_UART0_CTS            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(3)
1616 #define IOC_PF03_FUNC_CTL_SPI3_CS_3            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(5)
1617 #define IOC_PF03_FUNC_CTL_CAN1_STBY            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(7)
1618 #define IOC_PF03_FUNC_CTL_PDM0_D_1             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(10)
1619 #define IOC_PF03_FUNC_CTL_ETH0_EVTO_1          IOC_PAD_FUNC_CTL_ALT_SELECT_SET(19)
1620 #define IOC_PF03_FUNC_CTL_USB0_OC              IOC_PAD_FUNC_CTL_ALT_SELECT_SET(24)
1621 
1622 /* IOC_PF04_FUNC_CTL function mux definitions */
1623 #define IOC_PF04_FUNC_CTL_GPIO_F_04            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(0)
1624 #define IOC_PF04_FUNC_CTL_GPTMR5_CAPT_2        IOC_PAD_FUNC_CTL_ALT_SELECT_SET(1)
1625 #define IOC_PF04_FUNC_CTL_UART1_CTS            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(3)
1626 #define IOC_PF04_FUNC_CTL_SPI2_CS_0            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(5)
1627 #define IOC_PF04_FUNC_CTL_CAN1_RXD             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(7)
1628 #define IOC_PF04_FUNC_CTL_PDM0_CLK             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(10)
1629 #define IOC_PF04_FUNC_CTL_ETH0_EVTO_2          IOC_PAD_FUNC_CTL_ALT_SELECT_SET(19)
1630 #define IOC_PF04_FUNC_CTL_USB0_ID              IOC_PAD_FUNC_CTL_ALT_SELECT_SET(24)
1631 
1632 /* IOC_PF05_FUNC_CTL function mux definitions */
1633 #define IOC_PF05_FUNC_CTL_GPIO_F_05            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(0)
1634 #define IOC_PF05_FUNC_CTL_GPTMR5_COMP_2        IOC_PAD_FUNC_CTL_ALT_SELECT_SET(1)
1635 #define IOC_PF05_FUNC_CTL_UART1_DE             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(2)
1636 #define IOC_PF05_FUNC_CTL_UART1_RTS            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(3)
1637 #define IOC_PF05_FUNC_CTL_SPI2_SCLK            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(5)
1638 #define IOC_PF05_FUNC_CTL_LIN1_TREN            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(6)
1639 #define IOC_PF05_FUNC_CTL_CAN1_TXD             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(7)
1640 #define IOC_PF05_FUNC_CTL_PDM0_D_0             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(10)
1641 #define IOC_PF05_FUNC_CTL_ETH0_EVTO_3          IOC_PAD_FUNC_CTL_ALT_SELECT_SET(19)
1642 
1643 /* IOC_PF06_FUNC_CTL function mux definitions */
1644 #define IOC_PF06_FUNC_CTL_GPIO_F_06            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(0)
1645 #define IOC_PF06_FUNC_CTL_GPTMR4_CAPT_0        IOC_PAD_FUNC_CTL_ALT_SELECT_SET(1)
1646 #define IOC_PF06_FUNC_CTL_UART1_RXD            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(2)
1647 #define IOC_PF06_FUNC_CTL_SPI2_MISO            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(5)
1648 #define IOC_PF06_FUNC_CTL_LIN1_TXD             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(6)
1649 #define IOC_PF06_FUNC_CTL_ETH0_EVTI_0          IOC_PAD_FUNC_CTL_ALT_SELECT_SET(19)
1650 
1651 /* IOC_PF07_FUNC_CTL function mux definitions */
1652 #define IOC_PF07_FUNC_CTL_GPIO_F_07            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(0)
1653 #define IOC_PF07_FUNC_CTL_GPTMR4_COMP_0        IOC_PAD_FUNC_CTL_ALT_SELECT_SET(1)
1654 #define IOC_PF07_FUNC_CTL_UART1_TXD            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(2)
1655 #define IOC_PF07_FUNC_CTL_SPI2_MOSI            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(5)
1656 #define IOC_PF07_FUNC_CTL_LIN1_RXD             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(6)
1657 #define IOC_PF07_FUNC_CTL_ETH0_EVTI_1          IOC_PAD_FUNC_CTL_ALT_SELECT_SET(19)
1658 
1659 /* IOC_PF08_FUNC_CTL function mux definitions */
1660 #define IOC_PF08_FUNC_CTL_GPIO_F_08            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(0)
1661 #define IOC_PF08_FUNC_CTL_GPTMR4_COMP_1        IOC_PAD_FUNC_CTL_ALT_SELECT_SET(1)
1662 #define IOC_PF08_FUNC_CTL_UART2_TXD            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(2)
1663 #define IOC_PF08_FUNC_CTL_I2C0_SCL             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(4)
1664 #define IOC_PF08_FUNC_CTL_SPI3_CS_2            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(5)
1665 #define IOC_PF08_FUNC_CTL_CAN2_TXD             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(7)
1666 #define IOC_PF08_FUNC_CTL_ETH0_MDIO            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(18)
1667 #define IOC_PF08_FUNC_CTL_ETH0_EVTI_2          IOC_PAD_FUNC_CTL_ALT_SELECT_SET(19)
1668 
1669 /* IOC_PF09_FUNC_CTL function mux definitions */
1670 #define IOC_PF09_FUNC_CTL_GPIO_F_09            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(0)
1671 #define IOC_PF09_FUNC_CTL_GPTMR4_CAPT_1        IOC_PAD_FUNC_CTL_ALT_SELECT_SET(1)
1672 #define IOC_PF09_FUNC_CTL_UART2_RXD            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(2)
1673 #define IOC_PF09_FUNC_CTL_I2C0_SDA             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(4)
1674 #define IOC_PF09_FUNC_CTL_SPI3_CS_1            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(5)
1675 #define IOC_PF09_FUNC_CTL_CAN2_RXD             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(7)
1676 #define IOC_PF09_FUNC_CTL_ETH0_MDC             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(18)
1677 #define IOC_PF09_FUNC_CTL_ETH0_EVTI_3          IOC_PAD_FUNC_CTL_ALT_SELECT_SET(19)
1678 
1679 /* IOC_PF10_FUNC_CTL function mux definitions */
1680 #define IOC_PF10_FUNC_CTL_GPIO_F_10            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(0)
1681 #define IOC_PF10_FUNC_CTL_GPTMR4_COMP_2        IOC_PAD_FUNC_CTL_ALT_SELECT_SET(1)
1682 #define IOC_PF10_FUNC_CTL_UART2_DE             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(2)
1683 #define IOC_PF10_FUNC_CTL_UART2_RTS            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(3)
1684 #define IOC_PF10_FUNC_CTL_SPI3_CS_0            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(5)
1685 #define IOC_PF10_FUNC_CTL_LIN2_RXD             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(6)
1686 #define IOC_PF10_FUNC_CTL_CAN2_STBY            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(7)
1687 
1688 /* IOC_PF11_FUNC_CTL function mux definitions */
1689 #define IOC_PF11_FUNC_CTL_GPIO_F_11            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(0)
1690 #define IOC_PF11_FUNC_CTL_GPTMR4_CAPT_2        IOC_PAD_FUNC_CTL_ALT_SELECT_SET(1)
1691 #define IOC_PF11_FUNC_CTL_UART2_CTS            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(3)
1692 #define IOC_PF11_FUNC_CTL_SPI3_SCLK            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(5)
1693 #define IOC_PF11_FUNC_CTL_LIN2_TXD             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(6)
1694 
1695 /* IOC_PF12_FUNC_CTL function mux definitions */
1696 #define IOC_PF12_FUNC_CTL_GPIO_F_12            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(0)
1697 #define IOC_PF12_FUNC_CTL_GPTMR5_CAPT_3        IOC_PAD_FUNC_CTL_ALT_SELECT_SET(1)
1698 #define IOC_PF12_FUNC_CTL_UART3_CTS            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(3)
1699 #define IOC_PF12_FUNC_CTL_I2C1_SDA             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(4)
1700 #define IOC_PF12_FUNC_CTL_SPI3_MISO            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(5)
1701 #define IOC_PF12_FUNC_CTL_LIN2_TREN            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(6)
1702 
1703 /* IOC_PF13_FUNC_CTL function mux definitions */
1704 #define IOC_PF13_FUNC_CTL_GPIO_F_13            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(0)
1705 #define IOC_PF13_FUNC_CTL_GPTMR5_COMP_3        IOC_PAD_FUNC_CTL_ALT_SELECT_SET(1)
1706 #define IOC_PF13_FUNC_CTL_UART3_DE             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(2)
1707 #define IOC_PF13_FUNC_CTL_UART3_RTS            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(3)
1708 #define IOC_PF13_FUNC_CTL_I2C1_SCL             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(4)
1709 #define IOC_PF13_FUNC_CTL_SPI3_MOSI            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(5)
1710 #define IOC_PF13_FUNC_CTL_LIN3_TREN            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(6)
1711 #define IOC_PF13_FUNC_CTL_CAN3_STBY            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(7)
1712 
1713 /* IOC_PF14_FUNC_CTL function mux definitions */
1714 #define IOC_PF14_FUNC_CTL_GPIO_F_14            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(0)
1715 #define IOC_PF14_FUNC_CTL_GPTMR4_CAPT_3        IOC_PAD_FUNC_CTL_ALT_SELECT_SET(1)
1716 #define IOC_PF14_FUNC_CTL_UART3_RXD            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(2)
1717 #define IOC_PF14_FUNC_CTL_SPI3_DAT2            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(5)
1718 #define IOC_PF14_FUNC_CTL_LIN3_RXD             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(6)
1719 #define IOC_PF14_FUNC_CTL_CAN3_RXD             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(7)
1720 
1721 /* IOC_PF15_FUNC_CTL function mux definitions */
1722 #define IOC_PF15_FUNC_CTL_GPIO_F_15            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(0)
1723 #define IOC_PF15_FUNC_CTL_GPTMR4_COMP_3        IOC_PAD_FUNC_CTL_ALT_SELECT_SET(1)
1724 #define IOC_PF15_FUNC_CTL_UART3_TXD            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(2)
1725 #define IOC_PF15_FUNC_CTL_SPI3_DAT3            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(5)
1726 #define IOC_PF15_FUNC_CTL_LIN3_TXD             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(6)
1727 #define IOC_PF15_FUNC_CTL_CAN3_TXD             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(7)
1728 
1729 /* IOC_PX00_FUNC_CTL function mux definitions */
1730 #define IOC_PX00_FUNC_CTL_GPIO_X_00            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(0)
1731 #define IOC_PX00_FUNC_CTL_GPTMR7_COMP_0        IOC_PAD_FUNC_CTL_ALT_SELECT_SET(1)
1732 #define IOC_PX00_FUNC_CTL_UART4_TXD            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(2)
1733 #define IOC_PX00_FUNC_CTL_LIN4_TXD             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(6)
1734 #define IOC_PX00_FUNC_CTL_CAN4_TXD             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(7)
1735 #define IOC_PX00_FUNC_CTL_XPI0_CA_D_0          IOC_PAD_FUNC_CTL_ALT_SELECT_SET(14)
1736 
1737 /* IOC_PX01_FUNC_CTL function mux definitions */
1738 #define IOC_PX01_FUNC_CTL_GPIO_X_01            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(0)
1739 #define IOC_PX01_FUNC_CTL_GPTMR7_CAPT_0        IOC_PAD_FUNC_CTL_ALT_SELECT_SET(1)
1740 #define IOC_PX01_FUNC_CTL_UART4_RXD            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(2)
1741 #define IOC_PX01_FUNC_CTL_LIN4_RXD             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(6)
1742 #define IOC_PX01_FUNC_CTL_CAN4_RXD             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(7)
1743 #define IOC_PX01_FUNC_CTL_XPI0_CA_SCLK         IOC_PAD_FUNC_CTL_ALT_SELECT_SET(14)
1744 
1745 /* IOC_PX02_FUNC_CTL function mux definitions */
1746 #define IOC_PX02_FUNC_CTL_GPIO_X_02            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(0)
1747 #define IOC_PX02_FUNC_CTL_GPTMR7_COMP_1        IOC_PAD_FUNC_CTL_ALT_SELECT_SET(1)
1748 #define IOC_PX02_FUNC_CTL_UART4_DE             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(2)
1749 #define IOC_PX02_FUNC_CTL_UART4_RTS            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(3)
1750 #define IOC_PX02_FUNC_CTL_LIN4_TREN            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(6)
1751 #define IOC_PX02_FUNC_CTL_CAN4_STBY            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(7)
1752 #define IOC_PX02_FUNC_CTL_XPI0_CA_D_3          IOC_PAD_FUNC_CTL_ALT_SELECT_SET(14)
1753 #define IOC_PX02_FUNC_CTL_SDC1_DATA_4          IOC_PAD_FUNC_CTL_ALT_SELECT_SET(17)
1754 
1755 /* IOC_PX03_FUNC_CTL function mux definitions */
1756 #define IOC_PX03_FUNC_CTL_GPIO_X_03            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(0)
1757 #define IOC_PX03_FUNC_CTL_GPTMR7_CAPT_1        IOC_PAD_FUNC_CTL_ALT_SELECT_SET(1)
1758 #define IOC_PX03_FUNC_CTL_UART4_CTS            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(3)
1759 #define IOC_PX03_FUNC_CTL_SPI0_CS_3            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(5)
1760 #define IOC_PX03_FUNC_CTL_CAN5_STBY            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(7)
1761 #define IOC_PX03_FUNC_CTL_XPI0_CA_CS1          IOC_PAD_FUNC_CTL_ALT_SELECT_SET(14)
1762 #define IOC_PX03_FUNC_CTL_SDC1_DATA_5          IOC_PAD_FUNC_CTL_ALT_SELECT_SET(17)
1763 
1764 /* IOC_PX04_FUNC_CTL function mux definitions */
1765 #define IOC_PX04_FUNC_CTL_GPIO_X_04            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(0)
1766 #define IOC_PX04_FUNC_CTL_GPTMR7_CAPT_2        IOC_PAD_FUNC_CTL_ALT_SELECT_SET(1)
1767 #define IOC_PX04_FUNC_CTL_UART5_CTS            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(3)
1768 #define IOC_PX04_FUNC_CTL_SPI1_CS_0            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(5)
1769 #define IOC_PX04_FUNC_CTL_CAN5_RXD             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(7)
1770 #define IOC_PX04_FUNC_CTL_XPI0_CA_DQS          IOC_PAD_FUNC_CTL_ALT_SELECT_SET(14)
1771 #define IOC_PX04_FUNC_CTL_SDC1_DATA_6          IOC_PAD_FUNC_CTL_ALT_SELECT_SET(17)
1772 
1773 /* IOC_PX05_FUNC_CTL function mux definitions */
1774 #define IOC_PX05_FUNC_CTL_GPIO_X_05            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(0)
1775 #define IOC_PX05_FUNC_CTL_GPTMR7_COMP_2        IOC_PAD_FUNC_CTL_ALT_SELECT_SET(1)
1776 #define IOC_PX05_FUNC_CTL_UART5_DE             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(2)
1777 #define IOC_PX05_FUNC_CTL_UART5_RTS            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(3)
1778 #define IOC_PX05_FUNC_CTL_SPI1_SCLK            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(5)
1779 #define IOC_PX05_FUNC_CTL_LIN5_TREN            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(6)
1780 #define IOC_PX05_FUNC_CTL_CAN5_TXD             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(7)
1781 #define IOC_PX05_FUNC_CTL_XPI0_CA_CS0          IOC_PAD_FUNC_CTL_ALT_SELECT_SET(14)
1782 #define IOC_PX05_FUNC_CTL_SDC1_DATA_7          IOC_PAD_FUNC_CTL_ALT_SELECT_SET(17)
1783 
1784 /* IOC_PX06_FUNC_CTL function mux definitions */
1785 #define IOC_PX06_FUNC_CTL_GPIO_X_06            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(0)
1786 #define IOC_PX06_FUNC_CTL_GPTMR6_CAPT_0        IOC_PAD_FUNC_CTL_ALT_SELECT_SET(1)
1787 #define IOC_PX06_FUNC_CTL_UART5_RXD            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(2)
1788 #define IOC_PX06_FUNC_CTL_SPI1_MISO            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(5)
1789 #define IOC_PX06_FUNC_CTL_LIN5_TXD             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(6)
1790 #define IOC_PX06_FUNC_CTL_XPI0_CA_D_1          IOC_PAD_FUNC_CTL_ALT_SELECT_SET(14)
1791 
1792 /* IOC_PX07_FUNC_CTL function mux definitions */
1793 #define IOC_PX07_FUNC_CTL_GPIO_X_07            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(0)
1794 #define IOC_PX07_FUNC_CTL_GPTMR6_COMP_0        IOC_PAD_FUNC_CTL_ALT_SELECT_SET(1)
1795 #define IOC_PX07_FUNC_CTL_UART5_TXD            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(2)
1796 #define IOC_PX07_FUNC_CTL_SPI1_MOSI            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(5)
1797 #define IOC_PX07_FUNC_CTL_LIN5_RXD             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(6)
1798 #define IOC_PX07_FUNC_CTL_XPI0_CA_D_2          IOC_PAD_FUNC_CTL_ALT_SELECT_SET(14)
1799 
1800 /* IOC_PX08_FUNC_CTL function mux definitions */
1801 #define IOC_PX08_FUNC_CTL_GPIO_X_08            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(0)
1802 #define IOC_PX08_FUNC_CTL_GPTMR6_COMP_1        IOC_PAD_FUNC_CTL_ALT_SELECT_SET(1)
1803 #define IOC_PX08_FUNC_CTL_UART6_TXD            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(2)
1804 #define IOC_PX08_FUNC_CTL_I2C2_SCL             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(4)
1805 #define IOC_PX08_FUNC_CTL_SPI0_CS_2            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(5)
1806 #define IOC_PX08_FUNC_CTL_CAN6_TXD             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(7)
1807 #define IOC_PX08_FUNC_CTL_XPI0_CB_D_0          IOC_PAD_FUNC_CTL_ALT_SELECT_SET(14)
1808 #define IOC_PX08_FUNC_CTL_SDC1_DATA_2          IOC_PAD_FUNC_CTL_ALT_SELECT_SET(17)
1809 
1810 /* IOC_PX09_FUNC_CTL function mux definitions */
1811 #define IOC_PX09_FUNC_CTL_GPIO_X_09            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(0)
1812 #define IOC_PX09_FUNC_CTL_GPTMR6_CAPT_1        IOC_PAD_FUNC_CTL_ALT_SELECT_SET(1)
1813 #define IOC_PX09_FUNC_CTL_UART6_RXD            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(2)
1814 #define IOC_PX09_FUNC_CTL_I2C2_SDA             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(4)
1815 #define IOC_PX09_FUNC_CTL_SPI0_CS_1            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(5)
1816 #define IOC_PX09_FUNC_CTL_CAN6_RXD             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(7)
1817 #define IOC_PX09_FUNC_CTL_XPI0_CB_SCLK         IOC_PAD_FUNC_CTL_ALT_SELECT_SET(14)
1818 #define IOC_PX09_FUNC_CTL_SDC1_DATA_3          IOC_PAD_FUNC_CTL_ALT_SELECT_SET(17)
1819 
1820 /* IOC_PX10_FUNC_CTL function mux definitions */
1821 #define IOC_PX10_FUNC_CTL_GPIO_X_10            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(0)
1822 #define IOC_PX10_FUNC_CTL_GPTMR6_COMP_2        IOC_PAD_FUNC_CTL_ALT_SELECT_SET(1)
1823 #define IOC_PX10_FUNC_CTL_UART6_DE             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(2)
1824 #define IOC_PX10_FUNC_CTL_UART6_RTS            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(3)
1825 #define IOC_PX10_FUNC_CTL_SPI0_CS_0            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(5)
1826 #define IOC_PX10_FUNC_CTL_LIN6_RXD             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(6)
1827 #define IOC_PX10_FUNC_CTL_CAN6_STBY            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(7)
1828 #define IOC_PX10_FUNC_CTL_XPI0_CB_D_3          IOC_PAD_FUNC_CTL_ALT_SELECT_SET(14)
1829 #define IOC_PX10_FUNC_CTL_SDC1_CMD             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(17)
1830 
1831 /* IOC_PX11_FUNC_CTL function mux definitions */
1832 #define IOC_PX11_FUNC_CTL_GPIO_X_11            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(0)
1833 #define IOC_PX11_FUNC_CTL_GPTMR6_CAPT_2        IOC_PAD_FUNC_CTL_ALT_SELECT_SET(1)
1834 #define IOC_PX11_FUNC_CTL_UART6_CTS            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(3)
1835 #define IOC_PX11_FUNC_CTL_SPI0_SCLK            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(5)
1836 #define IOC_PX11_FUNC_CTL_LIN6_TXD             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(6)
1837 #define IOC_PX11_FUNC_CTL_XPI0_CB_DQS          IOC_PAD_FUNC_CTL_ALT_SELECT_SET(14)
1838 #define IOC_PX11_FUNC_CTL_SDC1_DS              IOC_PAD_FUNC_CTL_ALT_SELECT_SET(17)
1839 
1840 /* IOC_PX12_FUNC_CTL function mux definitions */
1841 #define IOC_PX12_FUNC_CTL_GPIO_X_12            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(0)
1842 #define IOC_PX12_FUNC_CTL_GPTMR7_CAPT_3        IOC_PAD_FUNC_CTL_ALT_SELECT_SET(1)
1843 #define IOC_PX12_FUNC_CTL_UART7_CTS            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(3)
1844 #define IOC_PX12_FUNC_CTL_I2C3_SDA             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(4)
1845 #define IOC_PX12_FUNC_CTL_SPI0_MISO            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(5)
1846 #define IOC_PX12_FUNC_CTL_LIN6_TREN            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(6)
1847 #define IOC_PX12_FUNC_CTL_XPI0_CB_CS0          IOC_PAD_FUNC_CTL_ALT_SELECT_SET(14)
1848 #define IOC_PX12_FUNC_CTL_SDC1_CLK             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(17)
1849 
1850 /* IOC_PX13_FUNC_CTL function mux definitions */
1851 #define IOC_PX13_FUNC_CTL_GPIO_X_13            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(0)
1852 #define IOC_PX13_FUNC_CTL_GPTMR7_COMP_3        IOC_PAD_FUNC_CTL_ALT_SELECT_SET(1)
1853 #define IOC_PX13_FUNC_CTL_UART7_DE             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(2)
1854 #define IOC_PX13_FUNC_CTL_UART7_RTS            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(3)
1855 #define IOC_PX13_FUNC_CTL_I2C3_SCL             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(4)
1856 #define IOC_PX13_FUNC_CTL_SPI0_MOSI            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(5)
1857 #define IOC_PX13_FUNC_CTL_LIN7_TREN            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(6)
1858 #define IOC_PX13_FUNC_CTL_CAN7_STBY            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(7)
1859 #define IOC_PX13_FUNC_CTL_XPI0_CB_CS1          IOC_PAD_FUNC_CTL_ALT_SELECT_SET(14)
1860 #define IOC_PX13_FUNC_CTL_SDC1_DATA_0          IOC_PAD_FUNC_CTL_ALT_SELECT_SET(17)
1861 
1862 /* IOC_PX14_FUNC_CTL function mux definitions */
1863 #define IOC_PX14_FUNC_CTL_GPIO_X_14            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(0)
1864 #define IOC_PX14_FUNC_CTL_GPTMR6_CAPT_3        IOC_PAD_FUNC_CTL_ALT_SELECT_SET(1)
1865 #define IOC_PX14_FUNC_CTL_UART7_RXD            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(2)
1866 #define IOC_PX14_FUNC_CTL_SPI0_DAT2            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(5)
1867 #define IOC_PX14_FUNC_CTL_LIN7_RXD             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(6)
1868 #define IOC_PX14_FUNC_CTL_CAN7_RXD             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(7)
1869 #define IOC_PX14_FUNC_CTL_XPI0_CB_D_1          IOC_PAD_FUNC_CTL_ALT_SELECT_SET(14)
1870 #define IOC_PX14_FUNC_CTL_SDC1_DATA_1          IOC_PAD_FUNC_CTL_ALT_SELECT_SET(17)
1871 
1872 /* IOC_PX15_FUNC_CTL function mux definitions */
1873 #define IOC_PX15_FUNC_CTL_GPIO_X_15            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(0)
1874 #define IOC_PX15_FUNC_CTL_GPTMR6_COMP_3        IOC_PAD_FUNC_CTL_ALT_SELECT_SET(1)
1875 #define IOC_PX15_FUNC_CTL_UART7_TXD            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(2)
1876 #define IOC_PX15_FUNC_CTL_SPI0_DAT3            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(5)
1877 #define IOC_PX15_FUNC_CTL_LIN7_TXD             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(6)
1878 #define IOC_PX15_FUNC_CTL_CAN7_TXD             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(7)
1879 #define IOC_PX15_FUNC_CTL_XPI0_CB_D_2          IOC_PAD_FUNC_CTL_ALT_SELECT_SET(14)
1880 #define IOC_PX15_FUNC_CTL_SDC1_RSTN            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(17)
1881 
1882 /* IOC_PY00_FUNC_CTL function mux definitions */
1883 #define IOC_PY00_FUNC_CTL_GPIO_Y_00            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(0)
1884 #define IOC_PY00_FUNC_CTL_GPTMR1_COMP_0        IOC_PAD_FUNC_CTL_ALT_SELECT_SET(1)
1885 #define IOC_PY00_FUNC_CTL_UART0_TXD            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(2)
1886 #define IOC_PY00_FUNC_CTL_LIN0_TXD             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(6)
1887 #define IOC_PY00_FUNC_CTL_CAN0_TXD             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(7)
1888 
1889 /* IOC_PY01_FUNC_CTL function mux definitions */
1890 #define IOC_PY01_FUNC_CTL_GPIO_Y_01            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(0)
1891 #define IOC_PY01_FUNC_CTL_GPTMR1_CAPT_0        IOC_PAD_FUNC_CTL_ALT_SELECT_SET(1)
1892 #define IOC_PY01_FUNC_CTL_UART0_RXD            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(2)
1893 #define IOC_PY01_FUNC_CTL_LIN0_RXD             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(6)
1894 #define IOC_PY01_FUNC_CTL_CAN0_RXD             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(7)
1895 
1896 /* IOC_PY02_FUNC_CTL function mux definitions */
1897 #define IOC_PY02_FUNC_CTL_GPIO_Y_02            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(0)
1898 #define IOC_PY02_FUNC_CTL_GPTMR1_COMP_1        IOC_PAD_FUNC_CTL_ALT_SELECT_SET(1)
1899 #define IOC_PY02_FUNC_CTL_UART0_DE             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(2)
1900 #define IOC_PY02_FUNC_CTL_UART0_RTS            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(3)
1901 #define IOC_PY02_FUNC_CTL_LIN0_TREN            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(6)
1902 #define IOC_PY02_FUNC_CTL_CAN0_STBY            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(7)
1903 #define IOC_PY02_FUNC_CTL_PDM0_CLK             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(10)
1904 
1905 /* IOC_PY03_FUNC_CTL function mux definitions */
1906 #define IOC_PY03_FUNC_CTL_GPIO_Y_03            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(0)
1907 #define IOC_PY03_FUNC_CTL_GPTMR1_CAPT_1        IOC_PAD_FUNC_CTL_ALT_SELECT_SET(1)
1908 #define IOC_PY03_FUNC_CTL_UART0_CTS            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(3)
1909 #define IOC_PY03_FUNC_CTL_CAN1_STBY            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(7)
1910 #define IOC_PY03_FUNC_CTL_PDM0_D_2             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(10)
1911 
1912 /* IOC_PY04_FUNC_CTL function mux definitions */
1913 #define IOC_PY04_FUNC_CTL_GPIO_Y_04            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(0)
1914 #define IOC_PY04_FUNC_CTL_GPTMR1_CAPT_2        IOC_PAD_FUNC_CTL_ALT_SELECT_SET(1)
1915 #define IOC_PY04_FUNC_CTL_UART1_CTS            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(3)
1916 #define IOC_PY04_FUNC_CTL_SPI2_CS_0            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(5)
1917 #define IOC_PY04_FUNC_CTL_CAN1_RXD             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(7)
1918 #define IOC_PY04_FUNC_CTL_PDM0_D_3             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(10)
1919 
1920 /* IOC_PY05_FUNC_CTL function mux definitions */
1921 #define IOC_PY05_FUNC_CTL_GPIO_Y_05            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(0)
1922 #define IOC_PY05_FUNC_CTL_GPTMR1_COMP_2        IOC_PAD_FUNC_CTL_ALT_SELECT_SET(1)
1923 #define IOC_PY05_FUNC_CTL_UART1_DE             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(2)
1924 #define IOC_PY05_FUNC_CTL_UART1_RTS            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(3)
1925 #define IOC_PY05_FUNC_CTL_SPI2_SCLK            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(5)
1926 #define IOC_PY05_FUNC_CTL_LIN1_TREN            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(6)
1927 #define IOC_PY05_FUNC_CTL_CAN1_TXD             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(7)
1928 #define IOC_PY05_FUNC_CTL_PDM0_D_1             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(10)
1929 
1930 /* IOC_PY06_FUNC_CTL function mux definitions */
1931 #define IOC_PY06_FUNC_CTL_GPIO_Y_06            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(0)
1932 #define IOC_PY06_FUNC_CTL_GPTMR0_CAPT_0        IOC_PAD_FUNC_CTL_ALT_SELECT_SET(1)
1933 #define IOC_PY06_FUNC_CTL_UART1_RXD            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(2)
1934 #define IOC_PY06_FUNC_CTL_SPI2_MISO            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(5)
1935 #define IOC_PY06_FUNC_CTL_LIN1_TXD             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(6)
1936 #define IOC_PY06_FUNC_CTL_PDM0_CLK             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(10)
1937 
1938 /* IOC_PY07_FUNC_CTL function mux definitions */
1939 #define IOC_PY07_FUNC_CTL_GPIO_Y_07            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(0)
1940 #define IOC_PY07_FUNC_CTL_GPTMR0_COMP_0        IOC_PAD_FUNC_CTL_ALT_SELECT_SET(1)
1941 #define IOC_PY07_FUNC_CTL_UART1_TXD            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(2)
1942 #define IOC_PY07_FUNC_CTL_SPI2_MOSI            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(5)
1943 #define IOC_PY07_FUNC_CTL_LIN1_RXD             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(6)
1944 #define IOC_PY07_FUNC_CTL_PDM0_D_0             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(10)
1945 
1946 /* IOC_PY08_FUNC_CTL function mux definitions */
1947 #define IOC_PY08_FUNC_CTL_GPIO_Y_08            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(0)
1948 #define IOC_PY08_FUNC_CTL_GPTMR0_COMP_1        IOC_PAD_FUNC_CTL_ALT_SELECT_SET(1)
1949 #define IOC_PY08_FUNC_CTL_UART2_TXD            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(2)
1950 #define IOC_PY08_FUNC_CTL_I2C0_SCL             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(4)
1951 #define IOC_PY08_FUNC_CTL_CAN2_TXD             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(7)
1952 
1953 /* IOC_PY09_FUNC_CTL function mux definitions */
1954 #define IOC_PY09_FUNC_CTL_GPIO_Y_09            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(0)
1955 #define IOC_PY09_FUNC_CTL_GPTMR0_CAPT_1        IOC_PAD_FUNC_CTL_ALT_SELECT_SET(1)
1956 #define IOC_PY09_FUNC_CTL_UART2_RXD            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(2)
1957 #define IOC_PY09_FUNC_CTL_I2C0_SDA             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(4)
1958 #define IOC_PY09_FUNC_CTL_CAN2_RXD             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(7)
1959 
1960 /* IOC_PY10_FUNC_CTL function mux definitions */
1961 #define IOC_PY10_FUNC_CTL_GPIO_Y_10            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(0)
1962 #define IOC_PY10_FUNC_CTL_GPTMR0_COMP_2        IOC_PAD_FUNC_CTL_ALT_SELECT_SET(1)
1963 #define IOC_PY10_FUNC_CTL_UART2_DE             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(2)
1964 #define IOC_PY10_FUNC_CTL_UART2_RTS            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(3)
1965 #define IOC_PY10_FUNC_CTL_SPI3_CS_0            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(5)
1966 #define IOC_PY10_FUNC_CTL_LIN2_RXD             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(6)
1967 #define IOC_PY10_FUNC_CTL_CAN2_STBY            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(7)
1968 
1969 /* IOC_PY11_FUNC_CTL function mux definitions */
1970 #define IOC_PY11_FUNC_CTL_GPIO_Y_11            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(0)
1971 #define IOC_PY11_FUNC_CTL_GPTMR0_CAPT_2        IOC_PAD_FUNC_CTL_ALT_SELECT_SET(1)
1972 #define IOC_PY11_FUNC_CTL_UART2_CTS            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(3)
1973 #define IOC_PY11_FUNC_CTL_SPI3_SCLK            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(5)
1974 #define IOC_PY11_FUNC_CTL_LIN2_TXD             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(6)
1975 
1976 /* IOC_PY12_FUNC_CTL function mux definitions */
1977 #define IOC_PY12_FUNC_CTL_GPIO_Y_12            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(0)
1978 #define IOC_PY12_FUNC_CTL_GPTMR1_CAPT_3        IOC_PAD_FUNC_CTL_ALT_SELECT_SET(1)
1979 #define IOC_PY12_FUNC_CTL_UART3_CTS            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(3)
1980 #define IOC_PY12_FUNC_CTL_I2C1_SDA             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(4)
1981 #define IOC_PY12_FUNC_CTL_SPI3_MISO            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(5)
1982 #define IOC_PY12_FUNC_CTL_LIN2_TREN            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(6)
1983 
1984 /* IOC_PY13_FUNC_CTL function mux definitions */
1985 #define IOC_PY13_FUNC_CTL_GPIO_Y_13            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(0)
1986 #define IOC_PY13_FUNC_CTL_GPTMR1_COMP_3        IOC_PAD_FUNC_CTL_ALT_SELECT_SET(1)
1987 #define IOC_PY13_FUNC_CTL_UART3_DE             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(2)
1988 #define IOC_PY13_FUNC_CTL_UART3_RTS            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(3)
1989 #define IOC_PY13_FUNC_CTL_I2C1_SCL             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(4)
1990 #define IOC_PY13_FUNC_CTL_SPI3_MOSI            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(5)
1991 #define IOC_PY13_FUNC_CTL_LIN3_TREN            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(6)
1992 #define IOC_PY13_FUNC_CTL_CAN3_STBY            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(7)
1993 
1994 /* IOC_PY14_FUNC_CTL function mux definitions */
1995 #define IOC_PY14_FUNC_CTL_GPIO_Y_14            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(0)
1996 #define IOC_PY14_FUNC_CTL_GPTMR0_CAPT_3        IOC_PAD_FUNC_CTL_ALT_SELECT_SET(1)
1997 #define IOC_PY14_FUNC_CTL_UART3_RXD            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(2)
1998 #define IOC_PY14_FUNC_CTL_LIN3_RXD             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(6)
1999 #define IOC_PY14_FUNC_CTL_CAN3_RXD             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(7)
2000 
2001 /* IOC_PY15_FUNC_CTL function mux definitions */
2002 #define IOC_PY15_FUNC_CTL_GPIO_Y_15            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(0)
2003 #define IOC_PY15_FUNC_CTL_GPTMR0_COMP_3        IOC_PAD_FUNC_CTL_ALT_SELECT_SET(1)
2004 #define IOC_PY15_FUNC_CTL_UART3_TXD            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(2)
2005 #define IOC_PY15_FUNC_CTL_LIN3_TXD             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(6)
2006 #define IOC_PY15_FUNC_CTL_CAN3_TXD             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(7)
2007 
2008 /* IOC_PZ00_FUNC_CTL function mux definitions */
2009 #define IOC_PZ00_FUNC_CTL_GPIO_Z_00            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(0)
2010 #define IOC_PZ00_FUNC_CTL_GPTMR3_COMP_0        IOC_PAD_FUNC_CTL_ALT_SELECT_SET(1)
2011 #define IOC_PZ00_FUNC_CTL_UART4_TXD            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(2)
2012 #define IOC_PZ00_FUNC_CTL_LIN4_TXD             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(6)
2013 #define IOC_PZ00_FUNC_CTL_CAN4_TXD             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(7)
2014 
2015 /* IOC_PZ01_FUNC_CTL function mux definitions */
2016 #define IOC_PZ01_FUNC_CTL_GPIO_Z_01            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(0)
2017 #define IOC_PZ01_FUNC_CTL_GPTMR3_CAPT_0        IOC_PAD_FUNC_CTL_ALT_SELECT_SET(1)
2018 #define IOC_PZ01_FUNC_CTL_UART4_RXD            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(2)
2019 #define IOC_PZ01_FUNC_CTL_LIN4_RXD             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(6)
2020 #define IOC_PZ01_FUNC_CTL_CAN4_RXD             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(7)
2021 
2022 /* IOC_PZ02_FUNC_CTL function mux definitions */
2023 #define IOC_PZ02_FUNC_CTL_GPIO_Z_02            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(0)
2024 #define IOC_PZ02_FUNC_CTL_GPTMR3_COMP_1        IOC_PAD_FUNC_CTL_ALT_SELECT_SET(1)
2025 #define IOC_PZ02_FUNC_CTL_UART4_DE             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(2)
2026 #define IOC_PZ02_FUNC_CTL_UART4_RTS            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(3)
2027 #define IOC_PZ02_FUNC_CTL_LIN4_TREN            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(6)
2028 #define IOC_PZ02_FUNC_CTL_CAN4_STBY            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(7)
2029 #define IOC_PZ02_FUNC_CTL_DAO_RP               IOC_PAD_FUNC_CTL_ALT_SELECT_SET(10)
2030 
2031 /* IOC_PZ03_FUNC_CTL function mux definitions */
2032 #define IOC_PZ03_FUNC_CTL_GPIO_Z_03            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(0)
2033 #define IOC_PZ03_FUNC_CTL_GPTMR3_CAPT_1        IOC_PAD_FUNC_CTL_ALT_SELECT_SET(1)
2034 #define IOC_PZ03_FUNC_CTL_UART4_CTS            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(3)
2035 #define IOC_PZ03_FUNC_CTL_CAN5_STBY            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(7)
2036 #define IOC_PZ03_FUNC_CTL_DAO_RN               IOC_PAD_FUNC_CTL_ALT_SELECT_SET(10)
2037 
2038 /* IOC_PZ04_FUNC_CTL function mux definitions */
2039 #define IOC_PZ04_FUNC_CTL_GPIO_Z_04            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(0)
2040 #define IOC_PZ04_FUNC_CTL_GPTMR3_CAPT_2        IOC_PAD_FUNC_CTL_ALT_SELECT_SET(1)
2041 #define IOC_PZ04_FUNC_CTL_UART5_CTS            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(3)
2042 #define IOC_PZ04_FUNC_CTL_SPI0_CS_0            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(5)
2043 #define IOC_PZ04_FUNC_CTL_CAN5_RXD             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(7)
2044 #define IOC_PZ04_FUNC_CTL_DAO_LP               IOC_PAD_FUNC_CTL_ALT_SELECT_SET(10)
2045 
2046 /* IOC_PZ05_FUNC_CTL function mux definitions */
2047 #define IOC_PZ05_FUNC_CTL_GPIO_Z_05            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(0)
2048 #define IOC_PZ05_FUNC_CTL_GPTMR3_COMP_2        IOC_PAD_FUNC_CTL_ALT_SELECT_SET(1)
2049 #define IOC_PZ05_FUNC_CTL_UART5_DE             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(2)
2050 #define IOC_PZ05_FUNC_CTL_UART5_RTS            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(3)
2051 #define IOC_PZ05_FUNC_CTL_SPI0_SCLK            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(5)
2052 #define IOC_PZ05_FUNC_CTL_LIN5_TREN            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(6)
2053 #define IOC_PZ05_FUNC_CTL_CAN5_TXD             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(7)
2054 #define IOC_PZ05_FUNC_CTL_DAO_LN               IOC_PAD_FUNC_CTL_ALT_SELECT_SET(10)
2055 
2056 /* IOC_PZ06_FUNC_CTL function mux definitions */
2057 #define IOC_PZ06_FUNC_CTL_GPIO_Z_06            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(0)
2058 #define IOC_PZ06_FUNC_CTL_GPTMR2_CAPT_0        IOC_PAD_FUNC_CTL_ALT_SELECT_SET(1)
2059 #define IOC_PZ06_FUNC_CTL_UART5_RXD            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(2)
2060 #define IOC_PZ06_FUNC_CTL_SPI0_MISO            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(5)
2061 #define IOC_PZ06_FUNC_CTL_LIN5_TXD             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(6)
2062 
2063 /* IOC_PZ07_FUNC_CTL function mux definitions */
2064 #define IOC_PZ07_FUNC_CTL_GPIO_Z_07            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(0)
2065 #define IOC_PZ07_FUNC_CTL_GPTMR2_COMP_0        IOC_PAD_FUNC_CTL_ALT_SELECT_SET(1)
2066 #define IOC_PZ07_FUNC_CTL_UART5_TXD            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(2)
2067 #define IOC_PZ07_FUNC_CTL_SPI0_MOSI            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(5)
2068 #define IOC_PZ07_FUNC_CTL_LIN5_RXD             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(6)
2069 
2070 /* IOC_PZ08_FUNC_CTL function mux definitions */
2071 #define IOC_PZ08_FUNC_CTL_GPIO_Z_08            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(0)
2072 #define IOC_PZ08_FUNC_CTL_GPTMR2_COMP_1        IOC_PAD_FUNC_CTL_ALT_SELECT_SET(1)
2073 #define IOC_PZ08_FUNC_CTL_UART6_TXD            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(2)
2074 #define IOC_PZ08_FUNC_CTL_I2C2_SCL             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(4)
2075 #define IOC_PZ08_FUNC_CTL_CAN6_TXD             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(7)
2076 
2077 /* IOC_PZ09_FUNC_CTL function mux definitions */
2078 #define IOC_PZ09_FUNC_CTL_GPIO_Z_09            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(0)
2079 #define IOC_PZ09_FUNC_CTL_GPTMR2_CAPT_1        IOC_PAD_FUNC_CTL_ALT_SELECT_SET(1)
2080 #define IOC_PZ09_FUNC_CTL_UART6_RXD            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(2)
2081 #define IOC_PZ09_FUNC_CTL_I2C2_SDA             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(4)
2082 #define IOC_PZ09_FUNC_CTL_CAN6_RXD             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(7)
2083 
2084 /* IOC_PZ10_FUNC_CTL function mux definitions */
2085 #define IOC_PZ10_FUNC_CTL_GPIO_Z_10            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(0)
2086 #define IOC_PZ10_FUNC_CTL_GPTMR2_COMP_2        IOC_PAD_FUNC_CTL_ALT_SELECT_SET(1)
2087 #define IOC_PZ10_FUNC_CTL_UART6_DE             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(2)
2088 #define IOC_PZ10_FUNC_CTL_UART6_RTS            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(3)
2089 #define IOC_PZ10_FUNC_CTL_SPI1_CS_0            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(5)
2090 #define IOC_PZ10_FUNC_CTL_LIN6_RXD             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(6)
2091 #define IOC_PZ10_FUNC_CTL_CAN6_STBY            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(7)
2092 
2093 /* IOC_PZ11_FUNC_CTL function mux definitions */
2094 #define IOC_PZ11_FUNC_CTL_GPIO_Z_11            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(0)
2095 #define IOC_PZ11_FUNC_CTL_GPTMR2_CAPT_2        IOC_PAD_FUNC_CTL_ALT_SELECT_SET(1)
2096 #define IOC_PZ11_FUNC_CTL_UART6_CTS            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(3)
2097 #define IOC_PZ11_FUNC_CTL_SPI1_SCLK            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(5)
2098 #define IOC_PZ11_FUNC_CTL_LIN6_TXD             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(6)
2099 
2100 /* IOC_PZ12_FUNC_CTL function mux definitions */
2101 #define IOC_PZ12_FUNC_CTL_GPIO_Z_12            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(0)
2102 #define IOC_PZ12_FUNC_CTL_GPTMR3_CAPT_3        IOC_PAD_FUNC_CTL_ALT_SELECT_SET(1)
2103 #define IOC_PZ12_FUNC_CTL_UART7_CTS            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(3)
2104 #define IOC_PZ12_FUNC_CTL_I2C3_SDA             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(4)
2105 #define IOC_PZ12_FUNC_CTL_SPI1_MISO            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(5)
2106 #define IOC_PZ12_FUNC_CTL_LIN6_TREN            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(6)
2107 
2108 /* IOC_PZ13_FUNC_CTL function mux definitions */
2109 #define IOC_PZ13_FUNC_CTL_GPIO_Z_13            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(0)
2110 #define IOC_PZ13_FUNC_CTL_GPTMR3_COMP_3        IOC_PAD_FUNC_CTL_ALT_SELECT_SET(1)
2111 #define IOC_PZ13_FUNC_CTL_UART7_DE             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(2)
2112 #define IOC_PZ13_FUNC_CTL_UART7_RTS            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(3)
2113 #define IOC_PZ13_FUNC_CTL_I2C3_SCL             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(4)
2114 #define IOC_PZ13_FUNC_CTL_SPI1_MOSI            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(5)
2115 #define IOC_PZ13_FUNC_CTL_LIN7_TREN            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(6)
2116 #define IOC_PZ13_FUNC_CTL_CAN7_STBY            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(7)
2117 
2118 /* IOC_PZ14_FUNC_CTL function mux definitions */
2119 #define IOC_PZ14_FUNC_CTL_GPIO_Z_14            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(0)
2120 #define IOC_PZ14_FUNC_CTL_GPTMR2_CAPT_3        IOC_PAD_FUNC_CTL_ALT_SELECT_SET(1)
2121 #define IOC_PZ14_FUNC_CTL_UART7_RXD            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(2)
2122 #define IOC_PZ14_FUNC_CTL_LIN7_RXD             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(6)
2123 #define IOC_PZ14_FUNC_CTL_CAN7_RXD             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(7)
2124 
2125 /* IOC_PZ15_FUNC_CTL function mux definitions */
2126 #define IOC_PZ15_FUNC_CTL_GPIO_Z_15            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(0)
2127 #define IOC_PZ15_FUNC_CTL_GPTMR2_COMP_3        IOC_PAD_FUNC_CTL_ALT_SELECT_SET(1)
2128 #define IOC_PZ15_FUNC_CTL_UART7_TXD            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(2)
2129 #define IOC_PZ15_FUNC_CTL_LIN7_TXD             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(6)
2130 #define IOC_PZ15_FUNC_CTL_CAN7_TXD             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(7)
2131 
2132 
2133 #endif /* HPM_IOMUX_H */
2134