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Searched defs:and_ (Results 1 – 25 of 32) sorted by relevance

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/third_party/node/deps/v8/src/regexp/ppc/
Dregexp-macro-assembler-ppc.cc465 __ and_(r3, current_character(), r0, SetRC); in CheckCharacterAfterAnd() local
467 __ and_(r3, current_character(), r0); in CheckCharacterAfterAnd() local
479 __ and_(r3, current_character(), r0, SetRC); in CheckNotCharacterAfterAnd() local
481 __ and_(r3, current_character(), r0); in CheckNotCharacterAfterAnd() local
492 __ and_(r3, r3, r0); in CheckNotCharacterAfterMinusAnd() local
/third_party/node/deps/v8/src/regexp/ia32/
Dregexp-macro-assembler-ia32.cc469 __ and_(eax, current_character()); in CheckCharacterAfterAnd() local
483 __ and_(eax, current_character()); in CheckNotCharacterAfterAnd() local
496 __ and_(eax, mask); in CheckNotCharacterAfterMinusAnd() local
562 __ and_(ebx, current_character()); in CheckBitInTable() local
/third_party/node/deps/v8/src/regexp/arm/
Dregexp-macro-assembler-arm.cc436 __ and_(r0, current_character(), Operand(mask)); in CheckCharacterAfterAnd() local
449 __ and_(r0, current_character(), Operand(mask)); in CheckNotCharacterAfterAnd() local
459 __ and_(r0, r0, Operand(mask)); in CheckNotCharacterAfterMinusAnd() local
520 __ and_(r1, current_character(), Operand(kTableSize - 1)); in CheckBitInTable() local
/third_party/vixl/benchmarks/aarch32/
Dasm-disasm-speed-test.cc473 __ and_(r5, r5, 0x1f); in Generate_3() local
481 __ and_(r0, r0, 0x1f); in Generate_3() local
489 __ and_(r1, r1, 0x1f); in Generate_3() local
890 __ and_(r3, r3, 0x1f); in Generate_6() local
1072 __ and_(r3, r8, 0x1f); in Generate_8() local
2474 __ and_(r3, r6, 0x1f); in Generate_19() local
2667 __ and_(r2, r2, 0x1f); in Generate_21() local
2671 __ and_(r2, r2, 0x1f); in Generate_21() local
2840 __ and_(lr, r3, 0x1f); in Generate_22() local
2848 __ and_(r0, r0, 0x1f); in Generate_22() local
[all …]
/third_party/node/deps/v8/src/builtins/ia32/
Dbuiltins-ia32.cc3165 __ and_(ecx, HeapNumber::kExponentMask); in Generate_DoubleToI() local
3199 __ and_( in Generate_DoubleToI() local
3721 __ and_(edx, 0xF); in Generate_MemMove() local
3737 __ and_(count, 0xF); in Generate_MemMove() local
3765 __ and_(count, 0xF); in Generate_MemMove() local
3788 __ and_(edx, 0xF); in Generate_MemMove() local
3802 __ and_(count, 0xF); in Generate_MemMove() local
3832 __ and_(count, 0xF); in Generate_MemMove() local
/third_party/python/Lib/
Doperator.py79 def and_(a, b): function
/third_party/node/deps/v8/src/codegen/ia32/
Dassembler-ia32.cc877 void Assembler::and_(Register dst, int32_t imm32) { in and_() function in v8::internal::Assembler
881 void Assembler::and_(Register dst, const Immediate& x) { in and_() function in v8::internal::Assembler
886 void Assembler::and_(Register dst, Operand src) { in and_() function in v8::internal::Assembler
892 void Assembler::and_(Operand dst, const Immediate& x) { in and_() function in v8::internal::Assembler
897 void Assembler::and_(Operand dst, Register src) { in and_() function in v8::internal::Assembler
Dassembler-ia32.h581 void and_(Register dst, Register src) { and_(dst, Operand(src)); } in and_() function
/third_party/node/deps/v8/src/compiler/backend/ppc/
Dcode-generator-ppc.cc1188 __ and_(i.OutputRegister(), i.InputRegister(0), i.InputRegister(1), in AssembleArchInstruction() local
1645 __ and_(r0, i.InputRegister(0), i.InputRegister(1), i.OutputRCBit()); in AssembleArchInstruction() local
1657 __ and_(r0, i.InputRegister(0), i.InputRegister(1), i.OutputRCBit()); in AssembleArchInstruction() local
/third_party/vixl/test/aarch64/
Dtest-api-movprfx-aarch64.cc115 __ and_(z12.VnD(), p5.Merging(), z12.VnD(), z12.VnD()); in TEST() local
686 __ and_(z25.VnB(), p4.Merging(), z25.VnB(), z27.VnB()); in TEST() local
1098 __ and_(z31.VnS(), z31.VnS(), 4); in TEST() local
1350 __ and_(z8.VnS(), p3.Merging(), z8.VnS(), z31.VnS()); in TEST() local
1353 __ and_(z20.VnS(), z20.VnS(), 4); in TEST() local
Dtest-trace-aarch64.cc65 __ and_(w27, w28, w29); in GenerateTestSequenceBase() local
66 __ and_(x2, x3, x4); in GenerateTestSequenceBase() local
651 __ and_(v10.V16B(), v8.V16B(), v27.V16B()); in GenerateTestSequenceNEON() local
652 __ and_(v5.V8B(), v1.V8B(), v16.V8B()); in GenerateTestSequenceNEON() local
Dtest-assembler-aarch64.cc616 TEST(and_) { in TEST() argument
7339 __ and_(xzr, x0, x2); in TEST() local
7340 __ and_(xzr, x2, xzr); in TEST() local
7341 __ and_(xzr, xzr, x2); in TEST() local
/third_party/skia/third_party/externals/swiftshader/third_party/subzero/src/
DIceAssemblerMIPS32.cpp413 void AssemblerMIPS32::and_(const Operand *OpRd, const Operand *OpRs, in and_() function in Ice::MIPS32::AssemblerMIPS32
DIceAssemblerARM32.cpp1361 void AssemblerARM32::and_(const Operand *OpRd, const Operand *OpRn, in and_() function in Ice::ARM32::AssemblerARM32
/third_party/vixl/src/aarch64/
Dassembler-sve-aarch64.cc100 void Assembler::and_(const ZRegister& zd, const ZRegister& zn, uint64_t imm) { in and_() function in vixl::aarch64::Assembler
130 void Assembler::and_(const ZRegister& zd, in and_() function in vixl::aarch64::Assembler
2350 void Assembler::and_(const ZRegister& zd, in and_() function in vixl::aarch64::Assembler
6101 void Assembler::and_(const PRegisterWithLaneSize& pd, in and_() function in vixl::aarch64::Assembler
Dassembler-aarch64.cc581 void Assembler::and_(const Register& rd, in and_() function in vixl::aarch64::Assembler
/third_party/node/deps/v8/src/compiler/backend/ia32/
Dcode-generator-ia32.cc1401 __ and_(esp, -8); // align to 8 byte boundary. in AssembleArchInstruction() local
3041 __ and_(esp, -16); in AssembleArchInstruction() local
/third_party/node/deps/v8/src/codegen/arm/
Dassembler-arm.cc1536 void Assembler::and_(Register dst, Register src1, const Operand& src2, SBit s, in and_() function in v8::internal::Assembler
1541 void Assembler::and_(Register dst, Register src1, Register src2, SBit s, in and_() function in v8::internal::Assembler
/third_party/vixl/src/aarch32/
Dassembler-aarch32.h1987 void and_(Register rd, Register rn, const Operand& operand) { in and_() function
1990 void and_(Condition cond, Register rd, Register rn, const Operand& operand) { in and_() function
1993 void and_(EncodingSize size, in and_() function
/third_party/node/deps/v8/src/compiler/backend/arm/
Dcode-generator-arm.cc1062 __ and_(i.OutputRegister(), i.InputRegister(0), i.InputOperand2(1), in AssembleArchInstruction() local
/third_party/node/deps/v8/src/codegen/loong64/
Dassembler-loong64.cc1109 void Assembler::and_(Register rd, Register rj, Register rk) { in and_() function in v8::internal::Assembler
/third_party/node/deps/v8/src/builtins/ppc/
Dbuiltins-ppc.cc2727 __ and_(r7, r7, ip, SetRC); in Generate_ConstructFunction() local
/third_party/node/deps/v8/src/codegen/mips/
Dassembler-mips.cc1854 void Assembler::and_(Register rd, Register rs, Register rt) { in and_() function in v8::internal::Assembler
/third_party/node/deps/v8/src/codegen/arm64/
Dassembler-arm64.cc909 void Assembler::and_(const Register& rd, const Register& rn, in and_() function in v8::internal::Assembler
/third_party/node/deps/v8/src/codegen/mips64/
Dassembler-mips64.cc1862 void Assembler::and_(Register rd, Register rs, Register rt) { in and_() function in v8::internal::Assembler

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