1 /* 2 * include/linux/amlogic/media/vout/hdmi_tx/hdmi_tx_cec_20.h 3 * 4 * Copyright (C) 2017 Amlogic, Inc. All rights reserved. 5 * 6 * This program is free software; you can redistribute it and/or modify 7 * it under the terms of the GNU General Public License as published by 8 * the Free Software Foundation; either version 2 of the License, or 9 * (at your option) any later version. 10 * 11 * This program is distributed in the hope that it will be useful, but WITHOUT 12 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or 13 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for 14 * more details. 15 * 16 */ 17 18 #ifndef _TX_CEC_H_ 19 #define _TX_CEC_H_ 20 21 #include <linux/irq.h> 22 #include <linux/amlogic/cpu_version.h> 23 #include "hdmi_info_global.h" 24 #include "hdmi_tx_module.h" 25 26 #define CEC0_LOG_ADDR 4 /* MBX logical address */ 27 #define TV_CEC_INTERVAL (HZ*3) 28 29 #define CEC_VERSION "v1.3" 30 #define _RX_DATA_BUF_SIZE_ 16 31 32 #define AO_CEC /* for switch between aocec and hdmi cec2.0 */ 33 34 #define MAX_MSG 16 35 #define MAX_NUM_OF_DEV 16 36 37 enum _cec_log_dev_addr_e { 38 CEC_TV_ADDR = 0x00, 39 CEC_RECORDING_DEVICE_1_ADDR, 40 CEC_RECORDING_DEVICE_2_ADDR, 41 CEC_TUNER_1_ADDR, 42 CEC_PLAYBACK_DEVICE_1_ADDR, 43 CEC_AUDIO_SYSTEM_ADDR, 44 CEC_TUNER_2_ADDR, 45 CEC_TUNER_3_ADDR, 46 CEC_PLAYBACK_DEVICE_2_ADDR, 47 CEC_RECORDING_DEVICE_3_ADDR, 48 CEC_TUNER_4_ADDR, 49 CEC_PLAYBACK_DEVICE_3_ADDR, 50 CEC_RESERVED_1_ADDR, 51 CEC_RESERVED_2_ADDR, 52 CEC_FREE_USE_ADDR, 53 CEC_UNREGISTERED_ADDR 54 }; 55 56 #define CEC_BROADCAST_ADDR CEC_UNREGISTERED_ADDR 57 58 #define CEC_TV (1 << CEC_TV_ADDR) 59 #define CEC_RECORDING_DEVICE_1 (1 << CEC_RECORDING_DEVICE_1_ADDR) 60 #define CEC_RECORDING_DEVICE_2 (1 << CEC_RECORDING_DEVICE_2_ADDR) 61 #define CEC_TUNER_1 (1 << CEC_TUNER_1_ADDR) 62 #define CEC_PLAYBACK_DEVICE_1 (1 << CEC_PLAYBACK_DEVICE_1_ADDR) 63 #define CEC_AUDIO_SYSTEM (1 << CEC_AUDIO_SYSTEM_ADDR) 64 #define CEC_TUNER_2 (1 << CEC_TUNER_2_ADDR) 65 #define CEC_TUNER_3 (1 << CEC_TUNER_3_ADDR) 66 #define CEC_PLAYBACK_DEVICE_2 (1 << CEC_PLAYBACK_DEVICE_2_ADDR) 67 #define CEC_RECORDING_DEVICE_3 (1 << CEC_RECORDING_DEVICE_3_ADDR) 68 #define CEC_TUNER_4 (1 << CEC_TUNER_4_ADDR) 69 #define CEC_PLAYBACK_DEVICE_3 (1 << CEC_PLAYBACK_DEVICE_3_ADDR) 70 #define CEC_RESERVED_1 (1 << CEC_RESERVED_1_ADDR) 71 #define CEC_RESERVED_2 (1 << CEC_RESERVED_2_ADDR) 72 #define CEC_FREE_USE (1 << CEC_FREE_USE_ADDR) 73 #define CEC_UNREGISTERED (1 << CEC_UNREGISTERED_ADDR) 74 75 #define CEC_DISPLAY_DEVICE (CEC_TV | CEC_FREE_USE) 76 #define CEC_RECORDING_DEVICE (CEC_RECORDING_DEVICE_1 \ 77 | CEC_RECORDING_DEVICE_2 | CEC_RECORDING_DEVICE_3) 78 #define CEC_PLAYBACK_DEVICE (CEC_PLAYBACK_DEVICE_1 \ 79 | CEC_PLAYBACK_DEVICE_2 | CEC_PLAYBACK_DEVICE_3) 80 #define CEC_TUNER_DEVICE (CEC_TUNER_1 | CEC_TUNER_2 \ 81 | CEC_TUNER_3 | CEC_TUNER_4) 82 #define CEC_AUDIO_SYSTEM_DEVICE (CEC_AUDIO_SYSTEM) 83 84 #define CEC_IOC_MAGIC 'C' 85 #define CEC_IOC_GET_PHYSICAL_ADDR _IOR(CEC_IOC_MAGIC, 0x00, uint16_t) 86 #define CEC_IOC_GET_VERSION _IOR(CEC_IOC_MAGIC, 0x01, int) 87 #define CEC_IOC_GET_VENDOR_ID _IOR(CEC_IOC_MAGIC, 0x02, uint32_t) 88 #define CEC_IOC_GET_PORT_INFO _IOR(CEC_IOC_MAGIC, 0x03, int) 89 #define CEC_IOC_GET_PORT_NUM _IOR(CEC_IOC_MAGIC, 0x04, int) 90 #define CEC_IOC_GET_SEND_FAIL_REASON _IOR(CEC_IOC_MAGIC, 0x05, uint32_t) 91 #define CEC_IOC_SET_OPTION_WAKEUP _IOW(CEC_IOC_MAGIC, 0x06, uint32_t) 92 #define CEC_IOC_SET_OPTION_ENALBE_CEC _IOW(CEC_IOC_MAGIC, 0x07, uint32_t) 93 #define CEC_IOC_SET_OPTION_SYS_CTRL _IOW(CEC_IOC_MAGIC, 0x08, uint32_t) 94 #define CEC_IOC_SET_OPTION_SET_LANG _IOW(CEC_IOC_MAGIC, 0x09, uint32_t) 95 #define CEC_IOC_GET_CONNECT_STATUS _IOR(CEC_IOC_MAGIC, 0x0A, uint32_t) 96 #define CEC_IOC_ADD_LOGICAL_ADDR _IOW(CEC_IOC_MAGIC, 0x0B, uint32_t) 97 #define CEC_IOC_CLR_LOGICAL_ADDR _IOW(CEC_IOC_MAGIC, 0x0C, uint32_t) 98 #define CEC_IOC_SET_DEV_TYPE _IOW(CEC_IOC_MAGIC, 0x0D, uint32_t) 99 #define CEC_IOC_SET_ARC_ENABLE _IOW(CEC_IOC_MAGIC, 0x0E, uint32_t) 100 #define CEC_IOC_SET_AUTO_DEVICE_OFF _IOW(CEC_IOC_MAGIC, 0x0F, uint32_t) 101 #define CEC_IOC_GET_BOOT_ADDR _IOW(CEC_IOC_MAGIC, 0x10, uint32_t) 102 #define CEC_IOC_GET_BOOT_REASON _IOW(CEC_IOC_MAGIC, 0x11, uint32_t) 103 #define CEC_IOC_SET_FREEZE_MODE _IOW(CEC_IOC_MAGIC, 0x12, uint32_t) 104 #define CEC_IOC_GET_BOOT_PORT _IOW(CEC_IOC_MAGIC, 0x13, uint32_t) 105 106 enum cec_tx_ret { 107 CEC_FAIL_NONE = 0, 108 CEC_FAIL_NACK = 1, 109 CEC_FAIL_BUSY = 2, 110 CEC_FAIL_OTHER = 3 111 }; 112 113 enum hdmi_port_type { 114 HDMI_INPUT = 0, 115 HDMI_OUTPUT = 1 116 }; 117 118 struct hdmi_port_info { 119 int type; 120 /* Port ID should start from 1 which corresponds to HDMI "port 1". */ 121 int port_id; 122 int cec_supported; 123 int arc_supported; 124 uint16_t physical_address; 125 }; 126 127 enum cec_dev_type_addr { 128 CEC_DISPLAY_DEVICE_TYPE = 0x0, 129 CEC_RECORDING_DEVICE_TYPE, 130 CEC_RESERVED_DEVICE_TYPE, 131 CEC_TUNER_DEVICE_TYPE, 132 CEC_PLAYBACK_DEVICE_TYPE, 133 CEC_AUDIO_SYSTEM_DEVICE_TYPE, 134 CEC_UNREGISTERED_DEVICE_TYPE, 135 }; 136 137 enum cec_feature_abort_e { 138 CEC_UNRECONIZED_OPCODE = 0x0, 139 CEC_NOT_CORRECT_MODE_TO_RESPOND, 140 CEC_CANNOT_PROVIDE_SOURCE, 141 CEC_INVALID_OPERAND, 142 CEC_REFUSED, 143 CEC_UNABLE_TO_DETERMINE, 144 }; 145 146 /* 147 * CEC OPCODES 148 */ 149 #define CEC_OC_ABORT_MESSAGE 0xFF 150 #define CEC_OC_ACTIVE_SOURCE 0x82 151 #define CEC_OC_CEC_VERSION 0x9E 152 #define CEC_OC_CLEAR_ANALOGUE_TIMER 0x33 153 #define CEC_OC_CLEAR_DIGITAL_TIMER 0x99 154 #define CEC_OC_CLEAR_EXTERNAL_TIMER 0xA1 155 #define CEC_OC_DECK_CONTROL 0x42 156 #define CEC_OC_DECK_STATUS 0x1B 157 #define CEC_OC_DEVICE_VENDOR_ID 0x87 158 #define CEC_OC_FEATURE_ABORT 0x00 159 #define CEC_OC_GET_CEC_VERSION 0x9F 160 #define CEC_OC_GET_MENU_LANGUAGE 0x91 161 #define CEC_OC_GIVE_AUDIO_STATUS 0x71 162 #define CEC_OC_GIVE_DECK_STATUS 0x1A 163 #define CEC_OC_GIVE_DEVICE_POWER_STATUS 0x8F 164 #define CEC_OC_GIVE_DEVICE_VENDOR_ID 0x8C 165 #define CEC_OC_GIVE_OSD_NAME 0x46 166 #define CEC_OC_GIVE_PHYSICAL_ADDRESS 0x83 167 #define CEC_OC_GIVE_SYSTEM_AUDIO_MODE_STATUS 0x7D 168 #define CEC_OC_GIVE_TUNER_DEVICE_STATUS 0x08 169 #define CEC_OC_IMAGE_VIEW_ON 0x04 170 #define CEC_OC_INACTIVE_SOURCE 0x9D 171 #define CEC_OC_MENU_REQUEST 0x8D 172 #define CEC_OC_MENU_STATUS 0x8E 173 #define CEC_OC_PLAY 0x41 174 #define CEC_OC_POLLING_MESSAGE 0xFC 175 #define CEC_OC_RECORD_OFF 0x0B 176 #define CEC_OC_RECORD_ON 0x09 177 #define CEC_OC_RECORD_STATUS 0x0A 178 #define CEC_OC_RECORD_TV_SCREEN 0x0F 179 #define CEC_OC_REPORT_AUDIO_STATUS 0x7A 180 #define CEC_OC_REPORT_PHYSICAL_ADDRESS 0x84 181 #define CEC_OC_REPORT_POWER_STATUS 0x90 182 #define CEC_OC_REQUEST_ACTIVE_SOURCE 0x85 183 #define CEC_OC_ROUTING_CHANGE 0x80 184 #define CEC_OC_ROUTING_INFORMATION 0x81 185 #define CEC_OC_SELECT_ANALOGUE_SERVICE 0x92 186 #define CEC_OC_SELECT_DIGITAL_SERVICE 0x93 187 #define CEC_OC_SET_ANALOGUE_TIMER 0x34 188 #define CEC_OC_SET_AUDIO_RATE 0x9A 189 #define CEC_OC_SET_DIGITAL_TIMER 0x97 190 #define CEC_OC_SET_EXTERNAL_TIMER 0xA2 191 #define CEC_OC_SET_MENU_LANGUAGE 0x32 192 #define CEC_OC_SET_OSD_NAME 0x47 193 #define CEC_OC_SET_OSD_STRING 0x64 194 #define CEC_OC_SET_STREAM_PATH 0x86 195 #define CEC_OC_SET_SYSTEM_AUDIO_MODE 0x72 196 #define CEC_OC_SET_TIMER_PROGRAM_TITLE 0x67 197 #define CEC_OC_STANDBY 0x36 198 #define CEC_OC_SYSTEM_AUDIO_MODE_REQUEST 0x70 199 #define CEC_OC_SYSTEM_AUDIO_MODE_STATUS 0x7E 200 #define CEC_OC_TEXT_VIEW_ON 0x0D 201 #define CEC_OC_TIMER_CLEARED_STATUS 0x43 202 #define CEC_OC_TIMER_STATUS 0x35 203 #define CEC_OC_TUNER_DEVICE_STATUS 0x07 204 #define CEC_OC_TUNER_STEP_DECREMENT 0x06 205 #define CEC_OC_TUNER_STEP_INCREMENT 0x05 206 #define CEC_OC_USER_CONTROL_PRESSED 0x44 207 #define CEC_OC_USER_CONTROL_RELEASED 0x45 208 #define CEC_OC_VENDOR_COMMAND 0x89 209 #define CEC_OC_VENDOR_COMMAND_WITH_ID 0xA0 210 #define CEC_OC_VENDOR_REMOTE_BUTTON_DOWN 0x8A 211 #define CEC_OC_VENDOR_REMOTE_BUTTON_UP 0x8B 212 213 /* cec global struct */ 214 215 enum cec_node_status_e { 216 STATE_UNKNOWN = 0x00, 217 STATE_START, 218 STATE_STOP 219 }; 220 221 enum cec_power_status_e { 222 CEC_PW_POWER_ON = 0x00, 223 CEC_PW_STANDBY, 224 CEC_PW_TRANS_STANDBY_TO_ON, 225 CEC_PW_TRANS_ON_TO_STANDBY, 226 }; 227 228 enum status_req_mode_e { 229 STATUS_REQ_ON = 1, 230 STATUS_REQ_OFF, 231 STATUS_REQ_ONCE, 232 }; 233 234 enum deck_info_e { 235 DECK_UNKNOWN_STATUS = 0, 236 DECK_PLAY = 0X11, 237 DECK_RECORD, 238 DECK_PLAY_REVERSE, 239 DECK_STILL, 240 DECK_SLOW, 241 DECK_SLOW_REVERSE, 242 DECK_FAST_FORWARD, 243 DECK_FAST_REVERSE, 244 DECK_NO_MEDIA, 245 DECK_STOP, 246 DECK_SKIP_FORWARD_WIND, 247 DECK_SKIP_REVERSE_REWIND, 248 DECK_INDEX_SEARCH_FORWARD, 249 DECK_INDEX_SEARCH_REVERSE, 250 DECK_OTHER_STATUS, 251 }; 252 253 enum deck_cnt_mode_e { 254 DECK_CNT_SKIP_FORWARD_WIND = 1, 255 DECK_CNT_SKIP_REVERSE_REWIND, 256 DECK_CNT_STOP, 257 DECK_CNT_EJECT, 258 }; 259 260 enum play_mode_e { 261 PLAY_FORWARD = 0X24, 262 PLAY_REVERSE = 0X20, 263 PLAY_STILL = 0X25, 264 FAST_FORWARD_MIN_SPEED = 0X05, 265 FAST_FORWARD_MEDIUM_SPEED = 0X06, 266 FAST_FORWARD_MAX_SPEED = 0X07, 267 FAST_REVERSE_MIN_SPEED = 0X09, 268 FAST_REVERSE_MEDIUM_SPEED = 0X0A, 269 FAST_REVERSE_MAX_SPEED = 0X0B, 270 SLOW_FORWARD_MIN_SPEED = 0X15, 271 SLOW_FORWARD_MEDIUM_SPEED = 0X16, 272 SLOW_FORWARD_MAX_SPEED = 0X17, 273 SLOW_REVERSE_MIN_SPEED = 0X19, 274 SLOW_REVERSE_MEDIUM_SPEED = 0X1A, 275 SLOW_REVERSE_MAX_SPEED = 0X1B, 276 }; 277 278 enum cec_version_e { 279 CEC_VERSION_11 = 0, 280 CEC_VERSION_12, 281 CEC_VERSION_12A, 282 CEC_VERSION_13, 283 CEC_VERSION_13A, 284 CEC_VERSION_14A, 285 CEC_VERSION_20, 286 }; 287 288 289 #define INFO_MASK_CEC_VERSION (1<<0) 290 #define INFO_MASK_VENDOR_ID (1<<1) 291 #define INFO_MASK_DEVICE_TYPE (1<<2) 292 #define INFO_MASK_POWER_STATUS (1<<3) 293 #define INFO_MASK_PHYSICAL_ADDRESS (1<<4) 294 #define INFO_MASK_LOGIC_ADDRESS (1<<5) 295 #define INFO_MASK_OSD_NAME (1<<6) 296 #define INFO_MASK_MENU_STATE (1<<7) 297 #define INFO_MASK_MENU_LANGUAGE (1<<8) 298 #define INFO_MASK_DECK_INfO (1<<9) 299 #define INFO_MASK_PLAY_MODE (1<<10) 300 301 /*CEC UI MASK*/ 302 /* 303 #define CEC_FUNC_MSAK 0 304 #define ONE_TOUCH_PLAY_MASK 1 305 #define ONE_TOUCH_STANDBY_MASK 2 306 #define AUTO_POWER_ON_MASK 3 307 */ 308 309 /* 310 * only for 1 tx device 311 */ 312 struct cec_global_info_t { 313 dev_t dev_no; 314 atomic_t open_count; 315 unsigned int hal_ctl; /* message controlled by hal */ 316 unsigned int vendor_id:24; 317 unsigned int menu_lang; 318 unsigned int cec_version; 319 unsigned char power_status; 320 unsigned char log_addr; 321 unsigned int addr_enable; 322 unsigned char menu_status; 323 unsigned char osd_name[16]; 324 struct input_dev *remote_cec_dev; /* cec input device */ 325 struct hdmitx_dev *hdmitx_device; 326 }; 327 328 enum cec_device_menu_state_e { 329 DEVICE_MENU_ACTIVE = 0, 330 DEVICE_MENU_INACTIVE, 331 }; 332 333 int cec_ll_tx(const unsigned char *msg, unsigned char len); 334 int cec_ll_rx(unsigned char *msg, unsigned char *len); 335 extern void cec_enable_arc_pin(bool enable); 336 #endif 337 338