| /third_party/musl/porting/linux/user/include/sys/ |
| D | sspret.h | 21 # define SSPRET_CALC_RETCOOKIE(reg) \ argument
24 # define SSPRET_LOAD_COOKIE(x, reg) \ argument
27 # define SSPRET_SETUP(x, reg) \ argument
31 # define SSPRET_CHECK(x, reg) \ argument
39 # define SSPRET_PUSH(reg) \ argument
42 # define SSPRET_POP(reg) \ argument
47 # define SSPRET_CALC_RETCOOKIE(reg) argument
48 # define SSPRET_LOAD_COOKIE(x, reg) argument
49 # define SSPRET_SETUP(x, reg) argument
50 # define SSPRET_CHECK(x, reg) argument
[all …]
|
| /third_party/libffi/include/ |
| D | ffi_cfi.h | 14 # define cfi_def_cfa(reg, off) .cfi_def_cfa reg, off argument
15 # define cfi_def_cfa_register(reg) .cfi_def_cfa_register reg argument
18 # define cfi_offset(reg, off) .cfi_offset reg, off argument
19 # define cfi_rel_offset(reg, off) .cfi_rel_offset reg, off argument
21 # define cfi_return_column(reg) .cfi_return_column reg argument
22 # define cfi_restore(reg) .cfi_restore reg argument
23 # define cfi_same_value(reg) .cfi_same_value reg argument
24 # define cfi_undefined(reg) .cfi_undefined reg argument
36 # define cfi_def_cfa(reg, off) argument
37 # define cfi_def_cfa_register(reg) argument
[all …]
|
| /third_party/mesa3d/src/amd/vulkan/ |
| D | radv_cs.h | 43 radeon_set_config_reg_seq(struct radeon_cmdbuf *cs, unsigned reg, unsigned num) in radeon_set_config_reg_seq()
53 radeon_set_config_reg(struct radeon_cmdbuf *cs, unsigned reg, unsigned value) in radeon_set_config_reg()
60 radeon_set_context_reg_seq(struct radeon_cmdbuf *cs, unsigned reg, unsigned num) in radeon_set_context_reg_seq()
70 radeon_set_context_reg(struct radeon_cmdbuf *cs, unsigned reg, unsigned value) in radeon_set_context_reg()
77 radeon_set_context_reg_idx(struct radeon_cmdbuf *cs, unsigned reg, unsigned idx, unsigned value) in radeon_set_context_reg_idx()
87 radeon_set_context_reg_rmw(struct radeon_cmdbuf *cs, unsigned reg, unsigned value, unsigned mask) in radeon_set_context_reg_rmw()
98 radeon_set_sh_reg_seq(struct radeon_cmdbuf *cs, unsigned reg, unsigned num) in radeon_set_sh_reg_seq()
108 radeon_set_sh_reg(struct radeon_cmdbuf *cs, unsigned reg, unsigned value) in radeon_set_sh_reg()
116 unsigned reg, unsigned idx, unsigned value) in radeon_set_sh_reg_idx()
132 gfx10_set_sh_reg_idx3(struct radeon_cmdbuf *cs, unsigned reg, unsigned value) in gfx10_set_sh_reg_idx3()
[all …]
|
| /third_party/mesa3d/src/gallium/drivers/radeonsi/ |
| D | si_build_pm4.h | 76 #define radeon_set_config_reg_seq(reg, num) do { \ argument
83 #define radeon_set_config_reg(reg, value) do { \ argument
88 #define radeon_set_context_reg_seq(reg, num) do { \ argument
95 #define radeon_set_context_reg(reg, value) do { \ argument
100 #define radeon_set_context_reg_seq_array(reg, num, values) do { \ argument
105 #define radeon_set_context_reg_idx(reg, idx, value) do { \ argument
113 #define radeon_set_sh_reg_seq(reg, num) do { \ argument
120 #define radeon_set_sh_reg_idx3_seq(reg, num) do { \ argument
127 #define radeon_set_sh_reg(reg, value) do { \ argument
132 #define radeon_set_sh_reg_idx3(reg, value) do { \ argument
[all …]
|
| /third_party/mesa3d/src/gallium/auxiliary/tgsi/ |
| D | tgsi_sanity.c | 67 scan_register_key(const scan_register *reg) in scan_register_key()
77 fill_scan_register1d(scan_register *reg, in fill_scan_register1d()
87 fill_scan_register2d(scan_register *reg, in fill_scan_register2d()
97 scan_register_dst(scan_register *reg, in scan_register_dst()
115 scan_register_src(scan_register *reg, in scan_register_src()
135 scan_register *reg = MALLOC(sizeof(scan_register)); in create_scan_register_src() local
144 scan_register *reg = MALLOC(sizeof(scan_register)); in create_scan_register_dst() local
203 const scan_register *reg) in is_register_declared()
220 scan_register *reg = (scan_register *)cso_hash_iter_data(iter); in is_any_register_declared() local
232 scan_register *reg) in is_register_used()
[all …]
|
| /third_party/gstreamer/gstplugins_good/gst/goom/ |
| D | mmx.h | 263 #define mmx_i2r(op, imm, reg) \ argument
284 #define mmx_m2r(op, mem, reg) \ argument
305 #define mmx_r2m(op, reg, mem) \ argument
369 #define mmx_i2r(op, imm, reg) \ argument
374 #define mmx_m2r(op, mem, reg) \ argument
379 #define mmx_r2m(op, reg, mem) \ argument
401 #define movq_m2r(var, reg) mmx_m2r(movq, var, reg) argument
402 #define movq_r2m(reg, var) mmx_r2m(movq, reg, var) argument
416 #define movd_m2r(var, reg) mmx_m2r(movd, var, reg) argument
417 #define movd_r2m(reg, var) mmx_r2m(movd, reg, var) argument
[all …]
|
| /third_party/gstreamer/gstplugins_good/gst/deinterlace/tvtime/ |
| D | mmx.h | 275 #define mmx_i2r(op, imm, reg) \ argument
293 #define mmx_m2r(op, mem, reg) \ argument
311 #define mmx_r2m(op, reg, mem) \ argument
366 #define mmx_i2r(op, imm, reg) \ argument
371 #define mmx_m2r(op, mem, reg) \ argument
376 #define mmx_r2m(op, reg, mem) \ argument
398 #define movq_m2r(var, reg) mmx_m2r(movq, var, reg) argument
399 #define movq_r2m(reg, var) mmx_r2m(movq, reg, var) argument
413 #define movd_m2r(var, reg) mmx_m2r(movd, var, reg) argument
414 #define movd_r2m(reg, var) mmx_r2m(movd, reg, var) argument
[all …]
|
| D | sse.h | 246 #define sse_i2r(op, imm, reg) \ argument
267 #define sse_m2r(op, mem, reg) \ argument
288 #define sse_r2m(op, reg, mem) \ argument
352 #define sse_i2r(op, imm, reg) \ argument
357 #define sse_m2r(op, mem, reg) \ argument
362 #define sse_r2m(op, reg, mem) \ argument
383 #define sse_m2ri(op, mem, reg, subop) \ argument
401 #define movaps_m2r(var, reg) sse_m2r(movaps, var, reg) argument
402 #define movaps_r2m(reg, var) sse_r2m(movaps, reg, var) argument
423 #define movups_m2r(var, reg) sse_m2r(movups, var, reg) argument
[all …]
|
| /third_party/mesa3d/src/gallium/drivers/r600/ |
| D | r600_cs.h | 128 static inline void radeon_set_config_reg_seq(struct radeon_cmdbuf *cs, unsigned reg, unsigned num) in radeon_set_config_reg_seq()
136 static inline void radeon_set_config_reg(struct radeon_cmdbuf *cs, unsigned reg, unsigned value) in radeon_set_config_reg()
142 static inline void radeon_set_context_reg_seq(struct radeon_cmdbuf *cs, unsigned reg, unsigned num) in radeon_set_context_reg_seq()
150 static inline void radeon_set_context_reg(struct radeon_cmdbuf *cs, unsigned reg, unsigned value) in radeon_set_context_reg()
157 unsigned reg, unsigned idx, in radeon_set_context_reg_idx()
167 static inline void radeon_set_sh_reg_seq(struct radeon_cmdbuf *cs, unsigned reg, unsigned num) in radeon_set_sh_reg_seq()
175 static inline void radeon_set_sh_reg(struct radeon_cmdbuf *cs, unsigned reg, unsigned value) in radeon_set_sh_reg()
181 static inline void radeon_set_uconfig_reg_seq(struct radeon_cmdbuf *cs, unsigned reg, unsigned num) in radeon_set_uconfig_reg_seq()
189 static inline void radeon_set_uconfig_reg(struct radeon_cmdbuf *cs, unsigned reg, unsigned value) in radeon_set_uconfig_reg()
196 unsigned reg, unsigned idx, in radeon_set_uconfig_reg_idx()
|
| /third_party/mesa3d/src/intel/compiler/ |
| D | brw_ir_vec4.h | 57 retype(src_reg reg, enum brw_reg_type type) in retype()
66 add_byte_offset(backend_reg *reg, unsigned bytes) in add_byte_offset()
100 byte_offset(src_reg reg, unsigned bytes) in byte_offset()
107 offset(src_reg reg, unsigned width, unsigned delta) in offset()
115 horiz_offset(src_reg reg, unsigned delta) in horiz_offset()
125 swizzle(src_reg reg, unsigned swizzle) in swizzle()
136 negate(src_reg reg) in negate()
144 is_uniform(const src_reg ®) in is_uniform()
174 retype(dst_reg reg, enum brw_reg_type type) in retype()
181 byte_offset(dst_reg reg, unsigned bytes) in byte_offset()
[all …]
|
| D | brw_ir_fs.h | 58 negate(fs_reg reg) in negate()
66 retype(fs_reg reg, enum brw_reg_type type) in retype()
73 byte_offset(fs_reg reg, unsigned delta) in byte_offset()
104 horiz_offset(const fs_reg ®, unsigned delta) in horiz_offset()
132 offset(fs_reg reg, unsigned width, unsigned delta) in offset()
155 component(fs_reg reg, unsigned idx) in component()
248 is_periodic(const fs_reg ®, unsigned n) in is_periodic()
272 is_uniform(const fs_reg ®) in is_uniform()
281 quarter(const fs_reg ®, unsigned idx) in quarter()
292 subscript(fs_reg reg, brw_reg_type type, unsigned i) in subscript()
[all …]
|
| D | brw_reg.h | 407 struct brw_reg reg; in brw_reg() local
548 retype(struct brw_reg reg, enum brw_reg_type type) in retype()
555 firsthalf(struct brw_reg reg) in firsthalf()
561 sechalf(struct brw_reg reg) in sechalf()
569 offset(struct brw_reg reg, unsigned delta) in offset()
577 byte_offset(struct brw_reg reg, unsigned bytes) in byte_offset()
586 suboffset(struct brw_reg reg, unsigned delta) in suboffset()
757 brw_address(struct brw_reg reg) in brw_address()
898 brw_flag_reg(int reg, int subreg) in brw_flag_reg()
980 stride(struct brw_reg reg, unsigned vstride, unsigned width, unsigned hstride) in stride()
[all …]
|
| /third_party/node/deps/v8/src/codegen/x64/ |
| D | assembler-x64-inl.h | 61 void Assembler::emit_rex_64(Register reg, Register rm_reg) { in emit_rex_64()
65 void Assembler::emit_rex_64(XMMRegister reg, Register rm_reg) { in emit_rex_64()
69 void Assembler::emit_rex_64(Register reg, XMMRegister rm_reg) { in emit_rex_64()
73 void Assembler::emit_rex_64(XMMRegister reg, XMMRegister rm_reg) { in emit_rex_64()
77 void Assembler::emit_rex_64(Register reg, Operand op) { in emit_rex_64()
81 void Assembler::emit_rex_64(XMMRegister reg, Operand op) { in emit_rex_64()
92 void Assembler::emit_rex_32(Register reg, Register rm_reg) { in emit_rex_32()
96 void Assembler::emit_rex_32(Register reg, Operand op) { in emit_rex_32()
104 void Assembler::emit_optional_rex_32(Register reg, Register rm_reg) { in emit_optional_rex_32()
109 void Assembler::emit_optional_rex_32(Register reg, Operand op) { in emit_optional_rex_32()
[all …]
|
| /third_party/lzma/C/ |
| D | AesOpt.c | 136 #define DECLARE_VAR(reg, ii) __m128i reg argument
137 #define LOAD_data( reg, ii) reg = data[ii]; argument
138 #define STORE_data( reg, ii) data[ii] = reg; argument
140 #define XOR_data_M1(reg, ii) MM_XOR (reg, data[ii- 1]); argument
143 #define AVX__DECLARE_VAR(reg, ii) __m256i reg argument
144 #define AVX__LOAD_data( reg, ii) reg = ((const __m256i *)(const void *)data)[ii]; argument
145 #define AVX__STORE_data( reg, ii) ((__m256i *)(void *)data)[ii] = reg; argument
146 #define AVX__XOR_data_M1(reg, ii) AVX_XOR (reg, (((const __m256i *)(const void *)(data - 1))[ii])); argument
148 #define MM_OP_key(op, reg) MM_OP(op, reg, key); argument
150 #define AES_DEC( reg, ii) MM_OP_key (_mm_aesdec_si128, reg) argument
[all …]
|
| /third_party/node/deps/openssl/openssl/include/crypto/ |
| D | sparc_arch.h | 57 # define SPARC_PIC_THUNK(reg) \ argument
63 # define SPARC_PIC_THUNK_CALL(reg) \ argument
69 # define SPARC_SETUP_GOT_REG(reg) SPARC_PIC_THUNK_CALL(reg) argument
71 # define SPARC_SETUP_GOT_REG(reg) \ argument
80 # define SPARC_LOAD_ADDRESS(SYM, reg) \ argument
90 # define SPARC_LOAD_ADDRESS(SYM, reg) \ argument
97 # define SPARC_LOAD_ADDRESS_LEAF(SYM,reg,tmp) SPARC_LOAD_ADDRESS(SYM,reg) argument
104 # define SPARC_LOAD_ADDRESS(SYM, reg) \ argument
112 # define SPARC_LOAD_ADDRESS_LEAF(SYM, reg, tmp) \ argument
|
| /third_party/openssl/include/crypto/ |
| D | sparc_arch.h | 57 # define SPARC_PIC_THUNK(reg) \ argument
63 # define SPARC_PIC_THUNK_CALL(reg) \ argument
69 # define SPARC_SETUP_GOT_REG(reg) SPARC_PIC_THUNK_CALL(reg) argument
71 # define SPARC_SETUP_GOT_REG(reg) \ argument
80 # define SPARC_LOAD_ADDRESS(SYM, reg) \ argument
90 # define SPARC_LOAD_ADDRESS(SYM, reg) \ argument
97 # define SPARC_LOAD_ADDRESS_LEAF(SYM,reg,tmp) SPARC_LOAD_ADDRESS(SYM,reg) argument
104 # define SPARC_LOAD_ADDRESS(SYM, reg) \ argument
112 # define SPARC_LOAD_ADDRESS_LEAF(SYM, reg, tmp) \ argument
|
| /third_party/node/deps/v8/src/maglev/ |
| D | maglev-regalloc.cc | 200 for (Register reg : used_registers()) { in PrintLiveRegs() local
329 *compilation_unit_, [&](ValueNode* node, interpreter::Register reg) { in UpdateUse()
342 *compilation_unit_, [&](ValueNode* node, interpreter::Register reg) { in UpdateUse()
436 void StraightForwardRegisterAllocator::DropRegisterValue(Register reg) { in DropRegisterValue()
489 Register reg = registers.PopFirst(); in InitializeConditionalBranchRegisters() local
549 Register reg = input.AssignedRegister(); in TryAllocateToInput() local
604 Register reg = Register::from_code(operand.fixed_register_index()); in AssignInput() local
636 for (Register reg : used_registers()) { in SpillRegisters() local
644 Register reg = used_registers().first(); in SpillAndClearRegisters() local
664 for (Register reg : used_registers()) { in FreeSomeRegister() local
[all …]
|
| /third_party/wpa_supplicant/wpa_supplicant-2.9_standard/src/wps/ |
| D | wps_registrar.c | 234 static void wps_registrar_add_authorized_mac(struct wps_registrar *reg, in wps_registrar_add_authorized_mac()
255 static void wps_registrar_remove_authorized_mac(struct wps_registrar *reg, in wps_registrar_remove_authorized_mac()
293 static struct wps_registrar_device * wps_device_get(struct wps_registrar *reg, in wps_device_get()
325 int wps_device_store(struct wps_registrar *reg, in wps_device_store()
346 static void wps_registrar_add_pbc_session(struct wps_registrar *reg, in wps_registrar_add_pbc_session()
398 static void wps_registrar_remove_pbc_session(struct wps_registrar *reg, in wps_registrar_remove_pbc_session()
429 int wps_registrar_pbc_overlap(struct wps_registrar *reg, in wps_registrar_pbc_overlap()
527 static int wps_build_selected_registrar(struct wps_registrar *reg, in wps_build_selected_registrar()
540 static int wps_build_sel_reg_dev_password_id(struct wps_registrar *reg, in wps_build_sel_reg_dev_password_id()
556 static int wps_build_sel_pbc_reg_uuid_e(struct wps_registrar *reg, in wps_build_sel_pbc_reg_uuid_e()
[all …]
|
| /third_party/wpa_supplicant/wpa_supplicant-2.9/src/wps/ |
| D | wps_registrar.c | 233 static void wps_registrar_add_authorized_mac(struct wps_registrar *reg, in wps_registrar_add_authorized_mac()
254 static void wps_registrar_remove_authorized_mac(struct wps_registrar *reg, in wps_registrar_remove_authorized_mac()
292 static struct wps_registrar_device * wps_device_get(struct wps_registrar *reg, in wps_device_get()
324 int wps_device_store(struct wps_registrar *reg, in wps_device_store()
345 static void wps_registrar_add_pbc_session(struct wps_registrar *reg, in wps_registrar_add_pbc_session()
397 static void wps_registrar_remove_pbc_session(struct wps_registrar *reg, in wps_registrar_remove_pbc_session()
428 int wps_registrar_pbc_overlap(struct wps_registrar *reg, in wps_registrar_pbc_overlap()
526 static int wps_build_selected_registrar(struct wps_registrar *reg, in wps_build_selected_registrar()
539 static int wps_build_sel_reg_dev_password_id(struct wps_registrar *reg, in wps_build_sel_reg_dev_password_id()
555 static int wps_build_sel_pbc_reg_uuid_e(struct wps_registrar *reg, in wps_build_sel_pbc_reg_uuid_e()
[all …]
|
| D | wps_upnp_ap.c | 22 struct wps_registrar *reg = timeout_ctx; in upnp_er_set_selected_timeout() local
29 int upnp_er_set_selected_registrar(struct wps_registrar *reg, in upnp_er_set_selected_registrar()
76 void upnp_er_remove_notification(struct wps_registrar *reg, in upnp_er_remove_notification()
|
| /third_party/node/deps/v8/src/diagnostics/riscv64/ |
| D | disasm-riscv64.cc | 184 void Decoder::PrintRegister(int reg) { in PrintRegister()
188 void Decoder::PrintVRegister(int reg) { in PrintVRegister()
193 int reg = instr->Rs1Value(); in PrintRs1() local
198 int reg = instr->Rs2Value(); in PrintRs2() local
203 int reg = instr->RdValue(); in PrintRd() local
213 int reg = instr->Vs1Value(); in PrintVs1() local
218 int reg = instr->Vs2Value(); in PrintVs2() local
223 int reg = instr->VdValue(); in PrintVd() local
233 int reg = instr->Rs1Value(); in PrintFRs1() local
238 int reg = instr->Rs2Value(); in PrintFRs2() local
[all …]
|
| /third_party/mesa3d/src/freedreno/ir3/ |
| D | ir3_parser.y | 158 struct ir3_register *reg; in new_src() local
170 struct ir3_register *reg; in new_dst() local
209 static void add_const(unsigned reg, unsigned c0, unsigned c1, unsigned c2, unsigned c3) in add_const()
230 static void add_sysval(unsigned reg, unsigned compmask, gl_system_value sysval) in add_sysval()
299 struct ir3_register *reg; member
725 unsigned reg = $2 >> 1; variable
741 unsigned reg = $3 >> 1; variable
747 unsigned reg = $3 >> 1; variable
754 unsigned reg = $3 >> 1; variable
761 unsigned reg = $3 >> 1; variable
|
| /third_party/mesa3d/src/panfrost/bifrost/test/ |
| D | test-constant-fold.cpp | 102 bi_index reg = bi_register(0); in TEST_F() local
123 bi_index reg = bi_register(0); in TEST_F() local
143 bi_index reg = bi_register(0); in TEST_F() local
157 bi_index reg = bi_register(0); in TEST_F() local
174 bi_index reg = bi_register(0); in TEST_F() local
193 bi_index reg = bi_register(0); in TEST_F() local
204 bi_index reg = bi_register(0); in TEST_F() local
|
| /third_party/node/deps/v8/src/wasm/baseline/ |
| D | liftoff-register.h | 150 constexpr explicit LiftoffRegister(Register reg) in LiftoffRegister()
155 constexpr explicit LiftoffRegister(DoubleRegister reg) in LiftoffRegister()
361 constexpr Register set(Register reg) { in set()
364 constexpr DoubleRegister set(DoubleRegister reg) { in set()
368 constexpr LiftoffRegister set(LiftoffRegister reg) { in set()
378 constexpr LiftoffRegister clear(LiftoffRegister reg) { in clear()
387 constexpr Register clear(Register reg) { in clear()
390 constexpr DoubleRegister clear(DoubleRegister reg) { in clear()
394 bool has(LiftoffRegister reg) const { in has()
401 bool has(Register reg) const { return has(LiftoffRegister{reg}); } in has()
[all …]
|
| /third_party/node/deps/v8/src/codegen/ |
| D | reglist-base.h | 43 for (RegisterT reg : regs) { in RegListBase() local
48 constexpr void set(RegisterT reg) { in set()
53 constexpr void clear(RegisterT reg) { in clear()
58 constexpr bool has(RegisterT reg) const { in has()
126 RegisterT reg = first(); in PopFirst() local
|