| /third_party/node/deps/v8/src/builtins/ |
| D | builtins-generator-gen.cc | 241 auto reg_index = IntPtrAdd(parameter_base_index, index); in TF_BUILTIN() local
260 auto reg_index = IntPtrSub(register_base_index, index); in TF_BUILTIN() local
300 auto reg_index = IntPtrSub(register_base_index, index); in TF_BUILTIN() local
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| /third_party/node/deps/v8/src/interpreter/ |
| D | interpreter-assembler.cc | 206 TNode<IntPtrT> reg_index) { in RegisterLocation()
219 TNode<Object> InterpreterAssembler::LoadRegister(TNode<IntPtrT> reg_index) { in LoadRegister()
291 TNode<IntPtrT> reg_index) { in StoreRegister()
354 TNode<IntPtrT> InterpreterAssembler::NextRegister(TNode<IntPtrT> reg_index) { in NextRegister()
1465 TNode<IntPtrT> reg_index = IntPtrAdd(reg_base, index); in ExportParametersAndRegisterFile() local
1490 TNode<IntPtrT> reg_index = in ExportParametersAndRegisterFile() local
1535 TNode<IntPtrT> reg_index = in ImportRegisterFile() local
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| /third_party/node/deps/v8/src/runtime/ |
| D | runtime-trace.cc | 45 for (int reg_index = first_reg.index(); reg_index < first_reg.index() + range; in PrintRegisterRange() local
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| /third_party/mesa3d/src/gallium/drivers/radeonsi/ |
| D | si_shader_llvm_vs.c | 388 unsigned reg_index; in si_llvm_clipvertex_to_clipdist() local
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| /third_party/node/deps/v8/src/execution/arm/ |
| D | simulator-arm.cc | 854 void Simulator::SetVFPRegister(int reg_index, const InputType& value) { in SetVFPRegister()
866 ReturnType Simulator::GetFromVFPRegister(int reg_index) { in GetFromVFPRegister()
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| /third_party/mesa3d/src/amd/compiler/ |
| D | aco_register_allocation.cpp | 890 { return reg_file[reg_index] == 0 && !ctx.war_hint[reg_index]; }; in get_reg_simple()
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| /third_party/node/deps/v8/src/baseline/ |
| D | baseline-compiler.cc | 146 for (int reg_index = 0; reg_index < list.register_count(); in Check() local
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| /third_party/node/deps/v8/src/compiler/backend/ |
| D | mid-tier-register-allocator.cc | 1306 int reg_index = base::bits::CountTrailingZeros(~bits_); in GetFirstCleared() local
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| /third_party/mesa3d/src/gallium/drivers/svga/ |
| D | svga_tgsi_vgpu10.c | 6783 unsigned reg_index = emit->clip_dist_out_index + i / 4; in emit_clip_distance_from_vpos() local
6826 unsigned reg_index = emit->clip_dist_out_index + i / 4; in emit_clip_vertex_instructions() local
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| /third_party/mesa3d/src/gallium/auxiliary/gallivm/ |
| D | lp_bld_tgsi_soa.c | 673 unsigned reg_file, unsigned reg_index, in get_indirect_index()
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| /third_party/node/deps/v8/src/execution/arm64/ |
| D | simulator-arm64.cc | 4799 int reg_index = imm5 >> lsb; in VisitNEONCopy() local
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| /third_party/vixl/src/aarch64/ |
| D | simulator-aarch64.cc | 7922 int reg_index = ExtractSignedBitfield32(31, tz + 1, imm5); in Simulator() local
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| /third_party/mesa3d/src/gallium/drivers/r300/ |
| D | r300_reg.h | 2946 #define PVS_OP_DST_OPERAND(opcode, math_inst, macro_inst, reg_index, reg_writemask, reg_class, satu… argument
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| /third_party/vixl/test/aarch64/ |
| D | test-assembler-aarch64.cc | 7873 Register reg_index = x21; in TEST() local
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