Searched +full:on +full:- +full:board +full:- +full:flash (Results 1 – 25 of 50) sorted by relevance
12
| /device/soc/hpmicro/sdk/hpm_sdk/boards/hpm6800evk/ |
| D | hpm6800evk.yaml | 1 # Copyright (c) 2021-2023 HPMicro 2 # SPDX-License-Identifier: BSD-3-Clause 4 board: 8 openocd-soc: hpm6880 9 openocd-probe: ft2232 10 on-board-ram: 14 on-board-flash: 15 type: qspi-nor-flash 18 - lcd 19 - cam [all …]
|
| /device/soc/hpmicro/sdk/hpm_sdk/boards/hpm6300evk/ |
| D | hpm6300evk.yaml | 2 # SPDX-License-Identifier: BSD-3-Clause 4 board: 8 openocd-soc: hpm6360 9 openocd-probe: ft2232 10 on-board-ram: 14 on-board-flash: 15 type: qspi-nor-flash 18 - butn 19 - sdp 20 - rng [all …]
|
| D | README_en.md | 5 …Type-C interface, a 100M Ethernet port, CAN FD interface, etc., and expands NOR Flash, SDRAM and o… 11 - HPM6360IPA MCU 12 - Onboard Memory 13 - 16bit 256Mb SDRAM 14 - 128Mb Quad SPI NOR Flash 15 - USB 16 - USB type C (USB 2.0 OTG) connector x2 17 - Ethernet 18 - 100Mb PHY 19 - Others [all …]
|
| /device/soc/hpmicro/sdk/hpm_sdk/boards/hpm6750evk/ |
| D | hpm6750evk.yaml | 1 # Copyright (c) 2021-2023 HPMicro 2 # SPDX-License-Identifier: BSD-3-Clause 4 board: 8 openocd-soc: hpm6750-dual-core 9 openocd-probe: ft2232 10 on-board-ram: 14 on-board-flash: 15 type: qspi-nor-flash 18 - butn 19 - sdp [all …]
|
| /device/soc/hpmicro/sdk/hpm_sdk/boards/hpm6750evk2/ |
| D | hpm6750evk2.yaml | 1 # Copyright (c) 2022-2023 HPMicro 2 # SPDX-License-Identifier: BSD-3-Clause 4 board: 8 openocd-soc: hpm6750-dual-core 9 openocd-probe: cmsis_dap 10 on-board-ram: 14 on-board-flash: 15 type: qspi-nor-flash 18 - butn 19 - sdp [all …]
|
| D | README_en.md | 5 …-core flashless MCU running 816Mhz. It has a 2MB continuous on-chip ram. Also, it provides various… 11 - HPM6750IVM MCU (816MHz, 2MB OCRAM) 12 - Onboard Memory 13 - 256Mb SDRAM 14 - 128Mb Quad SPI NOR Flash 15 - Display & Camera 16 - LCD connector 17 - Camera (DVP) 18 - Ethernet 19 - 1000 Mbits PHY [all …]
|
| /device/soc/hpmicro/sdk/hpm_sdk/boards/hpm6750evkmini/ |
| D | hpm6750evkmini.yaml | 1 # Copyright (c) 2021-2023 HPMicro 2 # SPDX-License-Identifier: BSD-3-Clause 4 board: 8 openocd-soc: hpm6750-dual-core 9 openocd-probe: ft2232 10 on-board-ram: 14 on-board-flash: 15 type: qspi-nor-flash 18 - butn 19 - sdp [all …]
|
| D | README_en.md | 5 …-core flashless MCU running 816Mhz. It has a 2MB continuous on-chip ram. Also, it provides various… 11 - HPM6750IVM MCU (816Mhz, 2MB OCRAM) 12 - Onboard Memory 13 - 128Mb SDRAM 14 - 64Mb Quad SPI NOR Flash 15 - Display & Camera 16 - LCD connector 17 - Camera (DVP) 18 - WiFi 19 - RW007 over SPI [all …]
|
| /device/soc/hpmicro/sdk/hpm_sdk/boards/hpm5301evklite/ |
| D | README_en.md | 5 …velopment board based on Xianji's entry-level high-performance MCU HPM5301. HPM5301EVKLite provide… 15 - KEY&BOOT controls boot mode 18 - The default working mode is flash boot mode. 19 - Follow the below steps to enter ISP boot mode: 26 | -------- | ---------------------------- | 27 | OFF | Boot from Quad SPI NOR flash | 28 | ON | ISP | 35 | -------- | -------------------------------- | 43 - UART Pin: 46 | --------- | -------- | [all …]
|
| D | hpm5301evklite.yaml | 2 # SPDX-License-Identifier: BSD-3-Clause 4 board: 8 openocd-soc: hpm5300 9 openocd-probe: cmsis_dap 10 on-board-flash: 11 type: qspi-nor-flash 14 - uart_hardware_rx_idle 15 - uart 16 - adc16 17 - pdgo [all …]
|
| D | README_zh.md | 5 HPM5301EVKLite是基于先楫的入门级高性能MCU HPM5301的开发板。HPM5301EVKLite提供了一个USB Type-C接口实现高速的USB-OTG功能,板载的按键和LED方便… 15 - 按键 KEY&BOOT 控制BOOT切换 18 - 默认工作在 flash 启动; 19 - 通过以下步骤进入 isp 启动: 26 | -------- | ----------------------- | 27 | OFF | Quad SPI NOR flash 启动 | 28 | ON | 在系统编程 | 35 | -------- | --------------------------- | 43 - UART引脚 46 | --------- | ------ | [all …]
|
| D | board.c | 3 * SPDX-License-Identifier: BSD-3-Clause 7 #include "board.h" 21 * @brief FLASH configuration option definitions: 23 * [31:16] 0xfcf9 - FLASH configuration option tag 24 * [15:4] 0 - Reserved 27 * [31:28] Flash probe type 28 * 0 - SFDP SDR / 1 - SFDP DDR 29 * 2 - 1-4-4 Read (0xEB, 24-bit address) / 3 - 1-2-2 Read(0xBB, 24-bit address) 30 * 4 - HyperFLASH 1.8V / 5 - HyperFLASH 3V 31 * 6 - OctaBus DDR (SPI -> OPI DDR) [all …]
|
| /device/soc/hpmicro/sdk/hpm_sdk/boards/hpm5300evk/ |
| D | hpm5300evk.yaml | 2 # SPDX-License-Identifier: BSD-3-Clause 4 board: 8 openocd-soc: hpm5300 9 openocd-probe: ft2232 10 on-board-flash: 11 type: qspi-nor-flash 14 - sei 15 - sdp 16 - rng 17 - rdc [all …]
|
| D | README_en.md | 5 …-class motor control interface, a ABZ output interface, a RS485/422 interface. HPM5300EVK also int… 11 - Bit 1 and 2 controls boot mode 14 | -------- | ---------------------------- | 15 | OFF, OFF | Boot from Quad SPI NOR flash | 16 | OFF, ON | Serial boot | 17 | ON, OFF | ISP | 24 | -------- | -------------------------------- | 33 - UART Pin: 36 | --------- | -------- | 41 - LIN Pin: [all …]
|
| D | board.c | 3 * SPDX-License-Identifier: BSD-3-Clause 7 #include "board.h" 21 * @brief FLASH configuration option definitions: 23 * [31:16] 0xfcf9 - FLASH configuration option tag 24 * [15:4] 0 - Reserved 27 * [31:28] Flash probe type 28 * 0 - SFDP SDR / 1 - SFDP DDR 29 * 2 - 1-4-4 Read (0xEB, 24-bit address) / 3 - 1-2-2 Read(0xBB, 24-bit address) 30 * 4 - HyperFLASH 1.8V / 5 - HyperFLASH 3V 31 * 6 - OctaBus DDR (SPI -> OPI DDR) [all …]
|
| /device/soc/hpmicro/sdk/hpm_sdk/boards/hpm6200evk/ |
| D | hpm6200evk.yaml | 2 # SPDX-License-Identifier: BSD-3-Clause 4 board: 8 openocd-soc: hpm6280-dual-core 9 openocd-probe: ft2232 10 on-board-flash: 11 type: qspi-nor-flash 14 - butn 15 - sdp 16 - rng 17 - rtc [all …]
|
| D | README_en.md | 4 …-resolution PWM output SMA interface, and a first-class motor control interface. HPM6200EVK also i… 10 - Bit 1 and 2 controls boot mode 13 | -------- | ---------------------------- | 14 | OFF, OFF | Boot from Quad SPI NOR flash | 15 | OFF, ON | Serial boot | 16 | ON, OFF | ISP | 23 | ---------- | ---------------------------------------------- | 31 - UART for core1 debug console 34 | ---------- | -------- | 38 - LIN Pin: [all …]
|
| /device/qemu/arm_mps2_an386/liteos_m/board/fs/ |
| D | BUILD.gn | 1 # Copyright (c) 2022-2022 Huawei Device Co., Ltd. All rights reserved. 24 # OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, 32 "//device/qemu/arm_mps2_an386/liteos_m/board/driver/flash/", 44 deps = [ "//device/qemu/arm_mps2_an386/liteos_m/board/driver/flash:flash" ]
|
| /device/soc/esp/esp32/components/spi_flash/private_include/ |
| D | spi_flash_defs.h | 1 // Copyright 2015-2019 Espressif Systems (Shanghai) PTE LTD 7 // http://www.apache.org/licenses/LICENSE-2.0 10 // distributed under the License is distributed on an "AS IS" BASIS, 17 /* SPI commands (actual on-wire commands not SPI controller bitmasks) 22 #define SR_WIP (1<<0) /* Status register write-in-progress bit */ 24 #define CMD_WRSR2 0x31 /* Not all SPI flash uses this command */ 28 #define CMD_RDSR2 0x35 /* Not all SPI flash uses this command */ 29 #define CMD_RDSCUR 0x2B /* on specific(MXIC) board, read security register */ 30 #define CMD_RDFR 0x48 /* on specific(ISSI) board, read function register */
|
| /device/soc/hisilicon/hi3861v100/sdk_liteos/app/demo/src/ |
| D | app_demo_nv.c | 7 * http://www.apache.org/licenses/LICENSE-2.0 10 * distributed under the License is distributed on an "AS IS" BASIS, 38 printf("flash init status:0x%x\n", err_info); in nv_demo() 42 ret = hi_nv_init(ptable->table[HI_FLASH_PARTITON_NORMAL_NV].addr, HI_NV_DEFAULT_TOTAL_SIZE, in nv_demo() 49 /* read nv data(which nv id is 0x22) from board */ in nv_demo() 59 /* write nv data(which nv id is 0x22) to board */ in nv_demo() 88 printf("flash init status:0x%x\n", err_info); in factory_nv_demo() 98 /* read factory nv data(which nv id is 0x1) from board */ in factory_nv_demo() 108 /* write factory nv data(which nv id is 0x1) to board */ in factory_nv_demo()
|
| /device/soc/hisilicon/hi3861v100/ |
| D | README.md | 1 # HiSpark\_pegasus<a name="EN-US_TOPIC_0000001130176841"></a> 3 - [Introduction](#section11660541593) 4 - [Features](#section12212842173518) 5 - [Directory Structure](#section1464106163817) 6 - [License Agreement](#section1478215290) 7 - [Repositories Involved](#section1371113476307) 11 …board. It is a 2.4 GHz Wi-Fi SoC chip that highly integrates the IEEE 802.11b/g/n baseband and rad… 18  22 - APP layer: represents the application layer. The sample code provided by the SDK is stored in t… 23 - API layer: provides common APIs developed based on the SDK. [all …]
|
| /device/soc/hpmicro/sdk/hpm_sdk/ |
| D | CHANGELOG.md | 3 ## [1.4.0] - 2023-12-29: 10 - soc: hpm5301: add hpm5301 11 - soc: hpm6880: add hpm6880 12 - soc: HPM6750: pcfg: update dcdc dcm mode config 13 - soc: clock driver: update clock_set_source_divider() and clock_get_source() 14 - boards: add hpm5301evklite 15 - boards: add hpm6800evk 16 - boards: update clock_set_source_divider() to use clk_src_t type param 17 - boards: hpm6750evkmini: use the same uart port as core1 for some samples. 18 - drivers: dao: update driver support new feature on hpm6800 [all …]
|
| /device/soc/bestechnic/bes2600/liteos_m/components/drivers/flash/ |
| D | BUILD.gn | 6 # http://www.apache.org/licenses/LICENSE-2.0 9 # distributed under the License is distributed on an "AS IS" BASIS, 16 hdf_driver("flash") { 18 "flash.c", 27 deps = [ "//device/board/fnlink/shields" ]
|
| /device/soc/rockchip/rk3588/kernel/scripts/ |
| D | mkbootimg | 8 # http://www.apache.org/licenses/LICENSE-2.0 11 # distributed under the License is distributed on an "AS IS" BASIS, 46 pad = (padding - (f.tell() & (padding - 1))) & (padding - 1) 52 return (image_size + page_size - 1) / page_size 92 args.pagesize, # flash page size we assume 98 args.vendor_boot.write(pack('16s', args.board.encode())) # asciiz product name 128 args.pagesize, # flash page size we assume 131 args.output.write(pack('16s', args.board.encode())) # asciiz product name 217 match = re.search(r'^(\d{4})-(\d{2})(?:-(\d{2}))?', x) 219 y = int(match.group(1)) - 2000 [all …]
|
| /device/qemu/arm_virt/liteos_a/ |
| D | README.md | 1 # QEMU Arm Virt Tutorial - liteos_a 5 … has been verified on the QEMU Arm Virt platform for adapting to OpenHarmony kernel\_liteos\_a. Th… 7 The Arm Virt platform is a `qemu-system-arm` target device that simulates a general-purpose board r… 8 …board whose **machine** is **virt** in QEMU is configurable. For example, you can select the core … 10 This tutorial guides you through the configuration of a board based on the Cortex-A7 architecture, … 15 …ment Setup](https://gitee.com/openharmony/docs/blob/master/en/device-dev/quick-start/Readme-EN.md). 19 …uisition](https://gitee.com/openharmony/docs/blob/HEAD/en/device-dev/get-code/sourcecode-acquire.m… 41 a) If `qemu-system-arm` has not been installed, install it. For details, see [Qemu Installation](ht… 43 …been tested on the target machine of virt-5.1, but are not available for all QEMU versions. Theref… 47 After the source code is built, the **qemu-run** script is generated in the root directory of the c… [all …]
|
12