1 // Copyright (C) 2022 Beken Corporation 2 // 3 // Licensed under the Apache License, Version 2.0 (the "License"); 4 // you may not use this file except in compliance with the License. 5 // You may obtain a copy of the License at 6 // 7 // http://www.apache.org/licenses/LICENSE-2.0 8 // 9 // Unless required by applicable law or agreed to in writing, software 10 // distributed under the License is distributed on an "AS IS" BASIS, 11 // WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 12 // See the License for the specific language governing permissions and 13 // limitations under the License. 14 15 #include "sys_hal.h" 16 #include "sys_driver.h" 17 18 //sys_ctrl CMD: CMD_QSPI_VDDRAM_VOLTAGE sys_drv_set_qspi_vddram_voltage(uint32_t param)19void sys_drv_set_qspi_vddram_voltage(uint32_t param) 20 { 21 uint32_t int_level = rtos_disable_int(); 22 23 sys_hal_set_qspi_vddram_voltage(param); 24 25 rtos_enable_int(int_level); 26 } 27 28 //sys_ctrl CMD: CMD_QSPI_IO_VOLTAGE sys_drv_set_qspi_io_voltage(uint32_t param)29void sys_drv_set_qspi_io_voltage(uint32_t param) 30 { 31 uint32_t int_level = rtos_disable_int(); 32 33 sys_hal_set_qspi_io_voltage(param); 34 35 rtos_enable_int(int_level); 36 } 37 38 /** psram Start **/ sys_drv_psram_volstage_sel(uint32_t value)39uint32_t sys_drv_psram_volstage_sel(uint32_t value) 40 { 41 uint32_t int_level = rtos_disable_int(); 42 43 sys_hal_psram_volstage_sel(value); 44 rtos_enable_int(int_level); 45 return SYS_DRV_SUCCESS; 46 } 47 sys_drv_psram_xtall_osc_enable(uint32_t value)48uint32_t sys_drv_psram_xtall_osc_enable(uint32_t value) 49 { 50 uint32_t int_level = rtos_disable_int(); 51 52 sys_hal_psram_xtall_osc_enable(value); 53 rtos_enable_int(int_level); 54 return SYS_DRV_SUCCESS; 55 } 56 sys_drv_psram_dco_enable(uint32_t value)57uint32_t sys_drv_psram_dco_enable(uint32_t value) 58 { 59 uint32_t int_level = rtos_disable_int(); 60 61 sys_hal_psram_doc_enable(value); 62 rtos_enable_int(int_level); 63 return SYS_DRV_SUCCESS; 64 } 65 sys_drv_psram_dpll_enable(uint32_t value)66uint32_t sys_drv_psram_dpll_enable(uint32_t value) 67 { 68 uint32_t int_level = rtos_disable_int(); 69 70 sys_hal_psram_dpll_enable(value); 71 rtos_enable_int(int_level); 72 return SYS_DRV_SUCCESS; 73 } 74 sys_drv_psram_ldo_enable(uint32_t value)75uint32_t sys_drv_psram_ldo_enable(uint32_t value) 76 { 77 uint32_t int_level = rtos_disable_int(); 78 79 sys_hal_psram_ldo_enable(value); 80 rtos_enable_int(int_level); 81 return SYS_DRV_SUCCESS; 82 } 83 sys_drv_psram_power_enable(void)84uint32_t sys_drv_psram_power_enable(void) 85 { 86 uint32_t int_level = rtos_disable_int(); 87 88 sys_hal_psram_power_enable(); 89 rtos_enable_int(int_level); 90 return SYS_DRV_SUCCESS; 91 } 92 sys_drv_psram_psldo_vsel(uint32_t value)93uint32_t sys_drv_psram_psldo_vsel(uint32_t value) 94 { 95 uint32_t int_level = rtos_disable_int(); 96 97 sys_hal_psram_psldo_vsel(value); 98 rtos_enable_int(int_level); 99 return SYS_DRV_SUCCESS; 100 101 } 102 103 104 /** psram End **/ 105 106