Searched refs:FPNegativeInfinity (Results 1 – 6 of 6) sorted by relevance
| /third_party/node/deps/v8/src/execution/arm64/ |
| D | simulator-arm64.cc | 2887 set_wreg(dst, FPToInt32(sreg(src), FPNegativeInfinity)); in VisitFPIntegerConvert()
2890 set_xreg(dst, FPToInt64(sreg(src), FPNegativeInfinity)); in VisitFPIntegerConvert()
2893 set_wreg(dst, FPToInt32(dreg(src), FPNegativeInfinity)); in VisitFPIntegerConvert()
2896 set_xreg(dst, FPToInt64(dreg(src), FPNegativeInfinity)); in VisitFPIntegerConvert()
2899 set_wreg(dst, FPToUInt32(sreg(src), FPNegativeInfinity)); in VisitFPIntegerConvert()
2902 set_xreg(dst, FPToUInt64(sreg(src), FPNegativeInfinity)); in VisitFPIntegerConvert()
2905 set_wreg(dst, FPToUInt32(dreg(src), FPNegativeInfinity)); in VisitFPIntegerConvert()
2908 set_xreg(dst, FPToUInt64(dreg(src), FPNegativeInfinity)); in VisitFPIntegerConvert()
3189 fpcr_rounding = FPNegativeInfinity; in VisitFPDataProcessing1Source()
4062 fpcr_rounding = FPNegativeInfinity; in VisitNEON2RegMisc()
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| D | simulator-logic-arm64.cc | 3198 case FPNegativeInfinity: { in FPRoundInt()
4015 case FPNegativeInfinity: in FPRecipEstimate()
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| /third_party/vixl/src/aarch64/ |
| D | simulator-aarch64.cc | 5617 WriteWRegister(dst, FPToInt32(ReadHRegister(src), FPNegativeInfinity)); in Simulator()
5620 WriteXRegister(dst, FPToInt64(ReadHRegister(src), FPNegativeInfinity)); in Simulator()
5623 WriteWRegister(dst, FPToInt32(ReadSRegister(src), FPNegativeInfinity)); in Simulator()
5626 WriteXRegister(dst, FPToInt64(ReadSRegister(src), FPNegativeInfinity)); in Simulator()
5629 WriteWRegister(dst, FPToInt32(ReadDRegister(src), FPNegativeInfinity)); in Simulator()
5632 WriteXRegister(dst, FPToInt64(ReadDRegister(src), FPNegativeInfinity)); in Simulator()
5635 WriteWRegister(dst, FPToUInt32(ReadHRegister(src), FPNegativeInfinity)); in Simulator()
5638 WriteXRegister(dst, FPToUInt64(ReadHRegister(src), FPNegativeInfinity)); in Simulator()
5641 WriteWRegister(dst, FPToUInt32(ReadSRegister(src), FPNegativeInfinity)); in Simulator()
5644 WriteXRegister(dst, FPToUInt64(ReadSRegister(src), FPNegativeInfinity)); in Simulator()
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| D | logic-aarch64.cc | 4830 case FPNegativeInfinity: { in FPRoundIntCommon()
6219 case FPNegativeInfinity: in FPRecipEstimate()
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| /third_party/node/deps/v8/src/codegen/arm64/ |
| D | instructions-arm64.h | 70 FPNegativeInfinity = 0x2, enumerator
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| /third_party/vixl/src/ |
| D | utils-vixl.h | 1221 FPNegativeInfinity = 0x2,
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