Searched refs:LogicOpcode (Results 1 – 2 of 2) sorted by relevance
| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/CodeGen/SelectionDAG/ |
| D | DAGCombiner.cpp | 4363 unsigned LogicOpcode = N->getOpcode(); in hoistLogicOpWithSameOpcodeHands() local
4365 assert((LogicOpcode == ISD::AND || LogicOpcode == ISD::OR || in hoistLogicOpWithSameOpcodeHands()
4366 LogicOpcode == ISD::XOR) && "Expected logic opcode"); in hoistLogicOpWithSameOpcodeHands()
4393 !TLI.isOperationLegalOrCustom(LogicOpcode, XVT)) in hoistLogicOpWithSameOpcodeHands()
4398 !TLI.isTypeDesirableForOp(LogicOpcode, XVT)) in hoistLogicOpWithSameOpcodeHands()
4401 SDValue Logic = DAG.getNode(LogicOpcode, DL, XVT, X, Y); in hoistLogicOpWithSameOpcodeHands()
4415 if (LegalOperations && !TLI.isOperationLegal(LogicOpcode, XVT)) in hoistLogicOpWithSameOpcodeHands()
4423 SDValue Logic = DAG.getNode(LogicOpcode, DL, XVT, X, Y); in hoistLogicOpWithSameOpcodeHands()
4435 SDValue Logic = DAG.getNode(LogicOpcode, DL, XVT, X, Y); in hoistLogicOpWithSameOpcodeHands()
4444 SDValue Logic = DAG.getNode(LogicOpcode, DL, XVT, X, Y); in hoistLogicOpWithSameOpcodeHands()
[all …]
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| D | TargetLowering.cpp | 3210 unsigned LogicOpcode = Cond == ISD::SETEQ ? ISD::AND : ISD::OR; in SimplifySetCC() local
3211 return DAG.getNode(LogicOpcode, dl, VT, LHS, RHS); in SimplifySetCC()
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