Searched refs:getStackRegister (Results 1 – 15 of 15) sorted by relevance
| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/Hexagon/ |
| D | HexagonRegisterInfo.h | 71 unsigned getStackRegister() const;
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| D | HexagonRegisterInfo.cpp | 299 return getStackRegister(); in getFrameRegister()
308 unsigned HexagonRegisterInfo::getStackRegister() const { in getStackRegister() function in HexagonRegisterInfo
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| D | HexagonFrameLowering.cpp | 607 unsigned SP = HRI.getStackRegister(); in insertPrologueInBlock()
651 unsigned SP = HRI.getStackRegister(); in insertEpilogueInBlock()
750 unsigned SP = HRI.getStackRegister(); in insertAllocframe()
761 unsigned SP = HRI.getStackRegister(); in insertAllocframe()
1122 unsigned SP = HRI.getStackRegister(); in getFrameIndexReference()
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| D | HexagonVLIWPacketizer.cpp | 303 if (DepReg == HRI->getFrameRegister() || DepReg == HRI->getStackRegister()) in isCallDependent()
1563 if (I.getOperand(0).getReg() == HRI->getStackRegister()) { in isLegalToPacketizeTogether()
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| D | HexagonInstrInfo.cpp | 3744 HRI.getStackRegister() == SrcReg && in getDuplexCandidateGroup()
3798 HRI.getStackRegister() == SrcReg && in getDuplexCandidateGroup()
3859 HRI.getStackRegister() == Src1Reg && MI.getOperand(1).isImm() && in getDuplexCandidateGroup()
3900 HRI.getStackRegister() == Src1Reg && MI.getOperand(1).isImm() && in getDuplexCandidateGroup()
3949 HRI.getStackRegister() == SrcReg && MI.getOperand(2).isImm() && in getDuplexCandidateGroup()
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| D | HexagonISelLowering.cpp | 429 DAG.getCopyFromReg(Chain, dl, HRI.getStackRegister(), PtrVT); in LowerCall()
1295 setStackPointerRegisterToSaveRestore(HRI.getStackRegister()); in HexagonTargetLowering()
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/X86/ |
| D | X86RegisterInfo.h | 139 Register getStackRegister() const { return StackPtr; } in getStackRegister() function
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| D | X86CallFrameOptimization.cpp | 341 if (RegInfo.regsOverlap(Reg, RegInfo.getStackRegister())) in classifyInstruction()
383 Register StackPtr = RegInfo.getStackRegister(); in collectCallInfo()
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| D | X86WinAllocaExpander.cpp | 281 StackPtr = TRI->getStackRegister(); in runOnMachineFunction()
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| D | X86ExpandPseudo.cpp | 291 Register StackPtr = TRI->getStackRegister(); in ExpandMI()
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| D | X86FrameLowering.cpp | 48 StackPtr = TRI->getStackRegister(); in X86FrameLowering()
1547 assert(Offset >= 0 && SPReg == TRI->getStackRegister()); in getPSPSlotOffsetFromSP()
1769 FrameReg = IsFixed ? TRI->getFramePtr() : TRI->getStackRegister(); in getFrameIndexReference()
1862 FrameReg = TRI->getStackRegister(); in getWin64EHFrameIndexRef()
1870 FrameReg = TRI->getStackRegister(); in getFrameIndexReferenceSP()
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| D | X86CallLowering.cpp | 112 MIRBuilder.buildCopy(SPReg, STI.getRegisterInfo()->getStackRegister()); in getStackAddress()
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| D | X86RegisterInfo.cpp | 812 Register StackReg = getStackRegister(); in getPtrSizedStackRegister()
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| D | X86FastISel.cpp | 3417 AM.Base.Reg = RegInfo->getStackRegister(); in fastLowerCall()
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| D | X86ISelLowering.cpp | 134 setStackPointerRegisterToSaveRestore(RegInfo->getStackRegister()); in X86TargetLowering()
4019 StackPtr = DAG.getCopyFromReg(Chain, dl, RegInfo->getStackRegister(), in LowerCall()
4133 StackPtr = DAG.getCopyFromReg(Chain, dl, RegInfo->getStackRegister(), in LowerCall()
23105 Register SPReg = RegInfo->getStackRegister(); in LowerDYNAMIC_STACKALLOC()
31881 Register SP = RegInfo->getStackRegister(); in emitEHSjLjLongJmp()
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