| /third_party/node/deps/v8/src/codegen/mips/ |
| D | register-mips.h | 217 bool is_valid() const { return reg_code == kFCSRRegister; } in is_valid()
218 bool is(FPUControlRegister creg) const { return reg_code == creg.reg_code; } in is()
221 return reg_code; in code()
225 return 1 << reg_code; in bit()
228 reg_code = f; in setcode()
232 int reg_code; member
241 return (reg_code == kMSAIRRegister) || (reg_code == kMSACSRRegister); in is_valid()
243 bool is(MSAControlRegister creg) const { return reg_code == creg.reg_code; } in is()
246 return reg_code; in code()
250 return 1 << reg_code; in bit()
[all …]
|
| /third_party/node/deps/v8/src/codegen/mips64/ |
| D | register-mips64.h | 228 bool is_valid() const { return reg_code == kFCSRRegister; } in is_valid()
229 bool is(FPUControlRegister creg) const { return reg_code == creg.reg_code; } in is()
232 return reg_code; in code()
236 return 1 << reg_code; in bit()
239 reg_code = f; in setcode()
243 int reg_code; member
252 return (reg_code == kMSAIRRegister) || (reg_code == kMSACSRRegister); in is_valid()
254 bool is(MSAControlRegister creg) const { return reg_code == creg.reg_code; } in is()
257 return reg_code; in code()
261 return 1 << reg_code; in bit()
[all …]
|
| /third_party/node/deps/v8/src/execution/riscv64/ |
| D | frame-constants-riscv64.h | 63 static int GetPushedGpRegisterOffset(int reg_code) { in GetPushedGpRegisterOffset() argument
64 DCHECK_NE(0, kPushedGpRegs.bits() & (1 << reg_code)); in GetPushedGpRegisterOffset()
66 kPushedGpRegs.bits() & ((uint32_t{1} << reg_code) - 1); in GetPushedGpRegisterOffset()
71 static int GetPushedFpRegisterOffset(int reg_code) { in GetPushedFpRegisterOffset() argument
72 DCHECK_NE(0, kPushedFpRegs.bits() & (1 << reg_code)); in GetPushedFpRegisterOffset()
74 kPushedFpRegs.bits() & ((uint32_t{1} << reg_code) - 1); in GetPushedFpRegisterOffset()
|
| /third_party/node/deps/v8/src/execution/s390/ |
| D | frame-constants-s390.h | 64 static int GetPushedGpRegisterOffset(int reg_code) { in GetPushedGpRegisterOffset() argument
65 DCHECK_NE(0, kPushedGpRegs.bits() & (1 << reg_code)); in GetPushedGpRegisterOffset()
67 kPushedGpRegs.bits() & ((uint32_t{1} << reg_code) - 1); in GetPushedGpRegisterOffset()
72 static int GetPushedFpRegisterOffset(int reg_code) { in GetPushedFpRegisterOffset() argument
73 DCHECK_NE(0, kPushedFpRegs.bits() & (1 << reg_code)); in GetPushedFpRegisterOffset()
75 kPushedFpRegs.bits() & ((uint32_t{1} << reg_code) - 1); in GetPushedFpRegisterOffset()
|
| /third_party/node/deps/v8/src/execution/ia32/ |
| D | frame-constants-ia32.h | 71 static int GetPushedGpRegisterOffset(int reg_code) { in GetPushedGpRegisterOffset() argument
72 DCHECK_NE(0, kPushedGpRegs.bits() & (1 << reg_code)); in GetPushedGpRegisterOffset()
74 kPushedGpRegs.bits() & ((uint32_t{1} << reg_code) - 1); in GetPushedGpRegisterOffset()
79 static int GetPushedFpRegisterOffset(int reg_code) { in GetPushedFpRegisterOffset() argument
80 DCHECK_NE(0, kPushedFpRegs.bits() & (1 << reg_code)); in GetPushedFpRegisterOffset()
82 kPushedFpRegs.bits() & ((uint32_t{1} << reg_code) - 1); in GetPushedFpRegisterOffset()
|
| /third_party/node/deps/v8/src/execution/mips/ |
| D | frame-constants-mips.h | 64 static int GetPushedGpRegisterOffset(int reg_code) { in GetPushedGpRegisterOffset() argument
65 DCHECK_NE(0, kPushedGpRegs.bits() & (1 << reg_code)); in GetPushedGpRegisterOffset()
67 kPushedGpRegs.bits() & ((uint32_t{1} << reg_code) - 1); in GetPushedGpRegisterOffset()
72 static int GetPushedFpRegisterOffset(int reg_code) { in GetPushedFpRegisterOffset() argument
73 DCHECK_NE(0, kPushedFpRegs.bits() & (1 << reg_code)); in GetPushedFpRegisterOffset()
75 kPushedFpRegs.bits() & ((uint32_t{1} << reg_code) - 1); in GetPushedFpRegisterOffset()
|
| /third_party/node/deps/v8/src/execution/mips64/ |
| D | frame-constants-mips64.h | 60 static int GetPushedGpRegisterOffset(int reg_code) { in GetPushedGpRegisterOffset() argument
61 DCHECK_NE(0, kPushedGpRegs.bits() & (1 << reg_code)); in GetPushedGpRegisterOffset()
63 kPushedGpRegs.bits() & ((uint32_t{1} << reg_code) - 1); in GetPushedGpRegisterOffset()
68 static int GetPushedFpRegisterOffset(int reg_code) { in GetPushedFpRegisterOffset() argument
69 DCHECK_NE(0, kPushedFpRegs.bits() & (1 << reg_code)); in GetPushedFpRegisterOffset()
71 kPushedFpRegs.bits() & ((uint32_t{1} << reg_code) - 1); in GetPushedFpRegisterOffset()
|
| /third_party/node/deps/v8/src/execution/x64/ |
| D | frame-constants-x64.h | 78 static int GetPushedGpRegisterOffset(int reg_code) { in GetPushedGpRegisterOffset() argument
79 DCHECK_NE(0, kPushedGpRegs.bits() & (1 << reg_code)); in GetPushedGpRegisterOffset()
81 kPushedGpRegs.bits() & ((uint32_t{1} << reg_code) - 1); in GetPushedGpRegisterOffset()
86 static int GetPushedFpRegisterOffset(int reg_code) { in GetPushedFpRegisterOffset() argument
87 DCHECK_NE(0, kPushedFpRegs.bits() & (1 << reg_code)); in GetPushedFpRegisterOffset()
89 kPushedFpRegs.bits() & ((uint32_t{1} << reg_code) - 1); in GetPushedFpRegisterOffset()
|
| /third_party/node/deps/v8/src/execution/ppc/ |
| D | frame-constants-ppc.h | 65 static int GetPushedGpRegisterOffset(int reg_code) { in GetPushedGpRegisterOffset() argument
66 DCHECK_NE(0, kPushedGpRegs.bits() & (1 << reg_code)); in GetPushedGpRegisterOffset()
68 kPushedGpRegs.bits() & ((uint32_t{1} << reg_code) - 1); in GetPushedGpRegisterOffset()
73 static int GetPushedFpRegisterOffset(int reg_code) { in GetPushedFpRegisterOffset() argument
74 DCHECK_NE(0, kPushedFpRegs.bits() & (1 << reg_code)); in GetPushedFpRegisterOffset()
76 kPushedFpRegs.bits() & ((uint32_t{1} << reg_code) - 1); in GetPushedFpRegisterOffset()
|
| /third_party/node/deps/v8/src/execution/loong64/ |
| D | frame-constants-loong64.h | 61 static int GetPushedGpRegisterOffset(int reg_code) { in GetPushedGpRegisterOffset() argument
62 DCHECK_NE(0, kPushedGpRegs.bits() & (1 << reg_code)); in GetPushedGpRegisterOffset()
64 kPushedGpRegs.bits() & ((uint32_t{1} << reg_code) - 1); in GetPushedGpRegisterOffset()
69 static int GetPushedFpRegisterOffset(int reg_code) { in GetPushedFpRegisterOffset() argument
70 DCHECK_NE(0, kPushedFpRegs.bits() & (1 << reg_code)); in GetPushedFpRegisterOffset()
72 kPushedFpRegs.bits() & ((uint32_t{1} << reg_code) - 1); in GetPushedFpRegisterOffset()
|
| /third_party/node/deps/v8/src/execution/arm/ |
| D | frame-constants-arm.h | 97 static int GetPushedGpRegisterOffset(int reg_code) { in GetPushedGpRegisterOffset() argument
98 DCHECK_NE(0, kPushedGpRegs.bits() & (1 << reg_code)); in GetPushedGpRegisterOffset()
100 kPushedGpRegs.bits() & ((uint32_t{1} << reg_code) - 1); in GetPushedGpRegisterOffset()
105 static int GetPushedFpRegisterOffset(int reg_code) { in GetPushedFpRegisterOffset() argument
106 DCHECK_NE(0, kPushedFpRegs.bits() & (1 << reg_code)); in GetPushedFpRegisterOffset()
108 kPushedFpRegs.bits() & ((uint32_t{1} << reg_code) - 1); in GetPushedFpRegisterOffset()
|
| /third_party/node/deps/v8/src/execution/arm64/ |
| D | frame-constants-arm64.h | 124 static int GetPushedGpRegisterOffset(int reg_code) { in GetPushedGpRegisterOffset() argument
125 DCHECK_NE(0, kPushedGpRegs.bits() & (1 << reg_code)); in GetPushedGpRegisterOffset()
127 kPushedGpRegs.bits() & ((uint32_t{1} << reg_code) - 1); in GetPushedGpRegisterOffset()
132 static int GetPushedFpRegisterOffset(int reg_code) { in GetPushedFpRegisterOffset() argument
133 DCHECK_NE(0, kPushedFpRegs.bits() & (1 << reg_code)); in GetPushedFpRegisterOffset()
135 kPushedFpRegs.bits() & ((uint32_t{1} << reg_code) - 1); in GetPushedFpRegisterOffset()
|
| D | simulator-arm64.h | 1335 void PrintRead(uintptr_t address, unsigned reg_code,
1337 void PrintWrite(uintptr_t address, unsigned reg_code,
1339 void PrintVRead(uintptr_t address, unsigned reg_code,
1341 void PrintVWrite(uintptr_t address, unsigned reg_code,
1345 void LogRead(uintptr_t address, unsigned reg_code, in LogRead() argument
1347 if (log_parameters() & LOG_REGS) PrintRead(address, reg_code, format); in LogRead()
1349 void LogWrite(uintptr_t address, unsigned reg_code, in LogWrite() argument
1351 if (log_parameters() & LOG_WRITE) PrintWrite(address, reg_code, format); in LogWrite()
1353 void LogVRead(uintptr_t address, unsigned reg_code,
1356 PrintVRead(address, reg_code, format, lane);
[all …]
|
| D | simulator-arm64.cc | 1612 void Simulator::PrintRead(uintptr_t address, unsigned reg_code, in PrintRead() argument
1614 registers_[reg_code].NotifyRegisterLogged(); in PrintRead()
1619 PrintRegisterRawHelper(reg_code, Reg31IsZeroRegister); in PrintRead()
1624 void Simulator::PrintVRead(uintptr_t address, unsigned reg_code, in PrintVRead() argument
1626 vregisters_[reg_code].NotifyRegisterLogged(); in PrintVRead()
1629 PrintVRegisterRawHelper(reg_code); in PrintVRead()
1631 PrintVRegisterFPHelper(reg_code, GetPrintRegLaneSizeInBytes(format), in PrintVRead()
1638 void Simulator::PrintWrite(uintptr_t address, unsigned reg_code, in PrintWrite() argument
1644 PrintRegisterRawHelper(reg_code, Reg31IsZeroRegister, in PrintWrite()
1650 void Simulator::PrintVWrite(uintptr_t address, unsigned reg_code, in PrintVWrite() argument
[all …]
|
| /third_party/node/deps/v8/src/codegen/arm/ |
| D | register-arm.h | 119 static void split_code(int reg_code, int* vm, int* m) { in split_code() argument
120 DCHECK(from_code(reg_code).is_valid()); in split_code()
121 *m = reg_code & 0x1; in split_code()
122 *vm = reg_code >> 1; in split_code()
159 static void split_code(int reg_code, int* vm, int* m) { in split_code() argument
160 DCHECK(from_code(reg_code).is_valid()); in split_code()
161 *m = (reg_code & 0x10) >> 4; in split_code()
162 *vm = reg_code & 0x0F; in split_code()
214 static void split_code(int reg_code, int* vm, int* m) { in split_code() argument
215 DCHECK(from_code(reg_code).is_valid()); in split_code()
[all …]
|
| /third_party/node/deps/v8/src/codegen/loong64/ |
| D | register-loong64.h | 160 bool is_valid() const { return (reg_code >> 2) == 0; } in is_valid()
161 bool is(FPUControlRegister creg) const { return reg_code == creg.reg_code; } in is()
164 return reg_code; in code()
168 return 1 << reg_code; in bit()
171 reg_code = f; in setcode()
175 int reg_code; member
|
| /third_party/node/deps/v8/src/wasm/ |
| D | wasm-debug.h | 54 int reg_code; // if kind == kRegister member
66 return reg_code == other.reg_code;
|
| D | wasm-debug.cc | 105 os << "reg#" << value.reg_code; in Print()
597 auto reg = LiftoffRegister::from_liftoff_code(value->reg_code); in GetValue()
|
| /third_party/node/deps/v8/src/codegen/ |
| D | safepoint-table.h | 244 void DefineTaggedRegister(int reg_code) { in DefineTaggedRegister() argument
245 DCHECK_LT(reg_code, in DefineTaggedRegister()
247 entry_->register_indexes |= 1u << reg_code; in DefineTaggedRegister()
|
| /third_party/vixl/src/aarch64/ |
| D | instructions-aarch64.cc | 557 int reg_code = GetRmLow16(); in GetSVEMulZmAndIndex() local
571 reg_code &= 7; // Three bits used for the register. in GetSVEMulZmAndIndex()
577 return std::make_pair(reg_code, index); in GetSVEMulZmAndIndex()
585 int reg_code = GetRmLow16(); in GetSVEMulLongZmAndIndex() local
592 reg_code &= 7; in GetSVEMulLongZmAndIndex()
602 return std::make_pair(reg_code, index); in GetSVEMulLongZmAndIndex()
|
| /third_party/node/deps/v8/src/deoptimizer/ |
| D | translated-state.cc | 128 int reg_code = iterator.Next(); in TranslationArrayPrintSingleFrame() local
129 os << "{input=" << converter.NameOfCPURegister(reg_code) << "}"; in TranslationArrayPrintSingleFrame()
135 int reg_code = iterator.Next(); in TranslationArrayPrintSingleFrame() local
136 os << "{input=" << converter.NameOfCPURegister(reg_code) << " (int32)}"; in TranslationArrayPrintSingleFrame()
142 int reg_code = iterator.Next(); in TranslationArrayPrintSingleFrame() local
143 os << "{input=" << converter.NameOfCPURegister(reg_code) << " (int64)}"; in TranslationArrayPrintSingleFrame()
149 int reg_code = iterator.Next(); in TranslationArrayPrintSingleFrame() local
150 os << "{input=" << converter.NameOfCPURegister(reg_code) in TranslationArrayPrintSingleFrame()
157 int reg_code = iterator.Next(); in TranslationArrayPrintSingleFrame() local
158 os << "{input=" << converter.NameOfCPURegister(reg_code) << " (bool)}"; in TranslationArrayPrintSingleFrame()
[all …]
|
| /third_party/node/deps/v8/src/compiler/backend/ |
| D | mid-tier-register-allocator.cc | 1353 RegisterIndex FromRegCode(int reg_code, MachineRepresentation rep) const;
1619 int reg_code = index_to_reg_code_[i]; in SinglePassRegisterAllocator() local
1620 reg_code_to_index_[reg_code] = RegisterIndex(i); in SinglePassRegisterAllocator()
1634 int reg_code = config->allocatable_float_codes()[i]; in SinglePassRegisterAllocator() local
1637 if (reg_code % 2 != 0) continue; in SinglePassRegisterAllocator()
1639 CHECK_EQ(1, config->GetAliases(MachineRepresentation::kFloat32, reg_code, in SinglePassRegisterAllocator()
1643 float32_reg_code_to_index_->at(reg_code) = double_reg; in SinglePassRegisterAllocator()
1644 index_to_float32_reg_code_->at(double_reg.ToInt()) = reg_code; in SinglePassRegisterAllocator()
1653 int reg_code = config->allocatable_simd128_codes()[i]; in SinglePassRegisterAllocator() local
1655 CHECK_EQ(2, config->GetAliases(MachineRepresentation::kSimd128, reg_code, in SinglePassRegisterAllocator()
[all …]
|
| /third_party/node/deps/v8/src/wasm/baseline/ |
| D | liftoff-assembler.cc | 965 int reg_code = loc.AsRegister(); in PrepareStackTransfers() local
967 LiftoffRegister::from_external_code(rc, kind, reg_code); in PrepareStackTransfers()
1223 int reg_code = loc.AsRegister(); in MoveToReturnLocations() local
1227 LiftoffRegister::from_external_code(rc, return_kind, reg_code); in MoveToReturnLocations()
|
| /third_party/node/deps/v8/src/codegen/arm64/ |
| D | register-arm64.h | 329 static VRegister Create(int reg_code, VectorFormat format) { in Create() argument
332 return VRegister::Create(reg_code, reg_size, reg_count); in Create()
|
| /third_party/node/deps/v8/src/execution/ |
| D | frames.cc | 2170 int reg_code = base::bits::CountTrailingZeros(tagged_register_indexes); in Iterate() local
2171 tagged_register_indexes &= ~(1 << reg_code); in Iterate()
2174 WasmDebugBreakFrameConstants::GetPushedGpRegisterOffset(reg_code))); in Iterate()
|