1 /*
2 * Copyright (c) 2020 HiSilicon (Shanghai) Technologies CO., LIMITED.
3 * Licensed under the Apache License, Version 2.0 (the "License");
4 * you may not use this file except in compliance with the License.
5 * You may obtain a copy of the License at
6 *
7 * http://www.apache.org/licenses/LICENSE-2.0
8 *
9 * Unless required by applicable law or agreed to in writing, software
10 * distributed under the License is distributed on an "AS IS" BASIS,
11 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
12 * See the License for the specific language governing permissions and
13 * limitations under the License.
14 */
15
16 #include <hi3861_platform_base.h>
17 #include <hi_tsensor.h>
18
19 #define TSENSOR_BASE_ADDRESS (W_CTL_BASE_ADDR)
20 #define TSENSOR_START 0x0500 /* TSENSOR start register */
21 #define TSENSOR_CTRL 0x0504 /* TSENSOR control register */
22 #define TSENSOR_MAN_STS 0x0508 /* TSENSOR manual control status register */
23 #define TSENSOR_AUTO_STS 0x050C /* TSENSOR auto control status register */
24 #define TSENSOR_TRIM_CTRL 0x0510 /* TSENSOR TRIM configuration register */
25 #define TSENSOR_TEMP_HIGH_LIMIT 0x0514 /* TSENSOR high temperature threshold register */
26 #define TSENSOR_TEMP_LOW_LIMIT 0x0518 /* TSENSOR low temperature threshold register */
27 #define TSENSOR_TEMP_OVER_LIMIT 0x051C /* TSENSOR over temperature threshold register */
28 #define TSENSOR_TEMP_INT_EN 0x0520 /* TSENSOR interrupt configuration register */
29 #define TSENSOR_TEMP_INT_CLR 0x0524 /* TSENSOR interrupt clear register */
30 #define TSENSOR_TEMP_INT_STATE 0x0528 /* TSENSOR interrupt state register */
31 #define TSENSOR_TEMP_PD_LIMIT 0x0530 /* TSENSOR power down temperature threshold register */
32 #define TSENSOR_AUTO_REFRESH_PERIOD 0x0540 /* TSENSOR auto refresh period control register */
33 #define TSENSOR_AUTO_REFRESH_CFG 0x0544 /* TSENSOR auto refresh control register */
34
35 #define TSENSOR_CLK_GATE_BIT 3
36 #define TSENSOR_CLK_SET_VALUE ((hi_u16)1 << (TSENSOR_CLK_GATE_BIT))
37
38 typedef struct {
39 hi_u16 trim_ctrl;
40 hi_u16 high_limit;
41 hi_u16 low_limit;
42 hi_u16 over_limit;
43 hi_u16 pd_limit;
44 hi_u16 int_en;
45 hi_u16 int_clr;
46 hi_u16 clk_en;
47 hi_u16 clk_div;
48 hi_u16 ctrl;
49 hi_u16 refresh_period;
50 hi_u16 refresh_en;
51 hi_u16 start;
52 } tsensor_lp_regs;
53
54 tsensor_lp_regs g_lp_regs_save = {0};
55
hi_tsensor_lp_save(hi_void)56 hi_void hi_tsensor_lp_save(hi_void)
57 {
58 g_lp_regs_save.trim_ctrl = hi_reg_read_val16(TSENSOR_BASE_ADDRESS + TSENSOR_TRIM_CTRL);
59 g_lp_regs_save.high_limit = hi_reg_read_val16(TSENSOR_BASE_ADDRESS + TSENSOR_TEMP_HIGH_LIMIT);
60 g_lp_regs_save.low_limit = hi_reg_read_val16(TSENSOR_BASE_ADDRESS + TSENSOR_TEMP_LOW_LIMIT);
61 g_lp_regs_save.over_limit = hi_reg_read_val16(TSENSOR_BASE_ADDRESS + TSENSOR_TEMP_OVER_LIMIT);
62 g_lp_regs_save.pd_limit = hi_reg_read_val16(TSENSOR_BASE_ADDRESS + TSENSOR_TEMP_PD_LIMIT);
63
64 g_lp_regs_save.int_en = hi_reg_read_val16(TSENSOR_BASE_ADDRESS + TSENSOR_TEMP_INT_EN);
65 g_lp_regs_save.int_clr = hi_reg_read_val16(TSENSOR_BASE_ADDRESS + TSENSOR_TEMP_INT_CLR);
66
67 g_lp_regs_save.clk_en = hi_reg_read_val16(W_CTL_UART_MAC80M_CLKEN_REG);
68 g_lp_regs_save.clk_div = hi_reg_read_val16(W_CTL_TSENSOR_DIV_REG);
69 g_lp_regs_save.ctrl = hi_reg_read_val16(TSENSOR_BASE_ADDRESS + TSENSOR_CTRL);
70 g_lp_regs_save.refresh_period = hi_reg_read_val16(TSENSOR_BASE_ADDRESS + TSENSOR_AUTO_REFRESH_PERIOD);
71 g_lp_regs_save.refresh_en = hi_reg_read_val16(TSENSOR_BASE_ADDRESS + TSENSOR_AUTO_REFRESH_CFG);
72
73 g_lp_regs_save.start = hi_reg_read_val16(TSENSOR_BASE_ADDRESS + TSENSOR_START);
74 }
75
hi_tsensor_lp_restore(hi_void)76 hi_void hi_tsensor_lp_restore(hi_void)
77 {
78 hi_reg_write16((TSENSOR_BASE_ADDRESS + TSENSOR_TRIM_CTRL), g_lp_regs_save.trim_ctrl);
79 hi_reg_write16((TSENSOR_BASE_ADDRESS + TSENSOR_TEMP_HIGH_LIMIT), g_lp_regs_save.high_limit);
80 hi_reg_write16((TSENSOR_BASE_ADDRESS + TSENSOR_TEMP_LOW_LIMIT), g_lp_regs_save.low_limit);
81 hi_reg_write16((TSENSOR_BASE_ADDRESS + TSENSOR_TEMP_OVER_LIMIT), g_lp_regs_save.over_limit);
82 hi_reg_write16((TSENSOR_BASE_ADDRESS + TSENSOR_TEMP_PD_LIMIT), g_lp_regs_save.pd_limit);
83
84 hi_reg_write16((TSENSOR_BASE_ADDRESS + TSENSOR_TEMP_INT_EN), g_lp_regs_save.int_en);
85 hi_reg_write16((TSENSOR_BASE_ADDRESS + TSENSOR_TEMP_INT_CLR), g_lp_regs_save.int_clr);
86
87 if ((g_lp_regs_save.clk_en & TSENSOR_CLK_SET_VALUE) == TSENSOR_CLK_SET_VALUE) {
88 hi_reg_setbit(W_CTL_UART_MAC80M_CLKEN_REG, TSENSOR_CLK_GATE_BIT);
89 } else {
90 hi_reg_clrbit(W_CTL_UART_MAC80M_CLKEN_REG, TSENSOR_CLK_GATE_BIT);
91 hi_reg_setbit((TSENSOR_BASE_ADDRESS + TSENSOR_MAN_STS), 0);
92 hi_reg_setbit((TSENSOR_BASE_ADDRESS + TSENSOR_AUTO_STS), 0);
93 }
94
95 hi_reg_write16(W_CTL_TSENSOR_DIV_REG, g_lp_regs_save.clk_div);
96 hi_reg_write16((TSENSOR_BASE_ADDRESS + TSENSOR_CTRL), g_lp_regs_save.ctrl);
97 hi_reg_write16((TSENSOR_BASE_ADDRESS + TSENSOR_AUTO_REFRESH_PERIOD), g_lp_regs_save.refresh_period);
98 hi_reg_write16((TSENSOR_BASE_ADDRESS + TSENSOR_AUTO_REFRESH_CFG), g_lp_regs_save.refresh_en);
99
100 hi_reg_write16(TSENSOR_BASE_ADDRESS + TSENSOR_START, g_lp_regs_save.start);
101 }
102
103