Lines Matching +full:way +full:- +full:select
1 # SPDX-License-Identifier: GPL-2.0
5 select ARCH_32BIT_OFF_T
6 select ARCH_HAS_BINFMT_FLAT
7 select ARCH_HAS_CPU_FINALIZE_INIT if MMU
8 select ARCH_HAS_DEBUG_VIRTUAL if MMU
9 select ARCH_HAS_DEVMEM_IS_ALLOWED
10 select ARCH_HAS_DMA_WRITE_COMBINE if !ARM_DMA_MEM_BUFFERABLE
11 select ARCH_HAS_ELF_RANDOMIZE
12 select ARCH_HAS_FORTIFY_SOURCE
13 select ARCH_HAS_KEEPINITRD
14 select ARCH_HAS_KCOV
15 select ARCH_HAS_MEMBARRIER_SYNC_CORE
16 select ARCH_HAS_NON_OVERLAPPING_ADDRESS_SPACE
17 select ARCH_HAS_PTE_SPECIAL if ARM_LPAE
18 select ARCH_HAS_PHYS_TO_DMA
19 select ARCH_HAS_SETUP_DMA_OPS
20 select ARCH_HAS_SET_MEMORY
21 select ARCH_HAS_STRICT_KERNEL_RWX if MMU && !XIP_KERNEL
22 select ARCH_HAS_STRICT_MODULE_RWX if MMU
23 select ARCH_HAS_SYNC_DMA_FOR_DEVICE if SWIOTLB
24 select ARCH_HAS_SYNC_DMA_FOR_CPU if SWIOTLB
25 select ARCH_HAS_TEARDOWN_DMA_OPS if MMU
26 select ARCH_HAS_TICK_BROADCAST if GENERIC_CLOCKEVENTS_BROADCAST
27 select ARCH_HAVE_CUSTOM_GPIO_H
28 select ARCH_HAS_GCOV_PROFILE_ALL
29 select ARCH_KEEP_MEMBLOCK
30 select ARCH_MIGHT_HAVE_PC_PARPORT
31 select ARCH_NO_SG_CHAIN if !ARM_HAS_SG_CHAIN
32 select ARCH_OPTIONAL_KERNEL_RWX if ARCH_HAS_STRICT_KERNEL_RWX
33 select ARCH_OPTIONAL_KERNEL_RWX_DEFAULT if CPU_V7
34 select ARCH_SUPPORTS_ATOMIC_RMW
35 select ARCH_USE_BUILTIN_BSWAP
36 select ARCH_USE_CMPXCHG_LOCKREF
37 select ARCH_WANT_DEFAULT_TOPDOWN_MMAP_LAYOUT if MMU
38 select ARCH_WANT_IPC_PARSE_VERSION
39 select ARCH_WANT_LD_ORPHAN_WARN
40 select BINFMT_FLAT_ARGVP_ENVP_ON_STACK
41 select BUILDTIME_TABLE_SORT if MMU
42 select CLONE_BACKWARDS
43 select CPU_PM if SUSPEND || CPU_IDLE
44 select DCACHE_WORD_ACCESS if HAVE_EFFICIENT_UNALIGNED_ACCESS
45 select DMA_DECLARE_COHERENT
46 select DMA_OPS
47 select DMA_REMAP if MMU
48 select EDAC_SUPPORT
49 select EDAC_ATOMIC_SCRUB
50 select GENERIC_ALLOCATOR
51 select GENERIC_ARCH_TOPOLOGY if ARM_CPU_TOPOLOGY
52 select GENERIC_ATOMIC64 if CPU_V7M || CPU_V6 || !CPU_32v6K || !AEABI
53 select GENERIC_CLOCKEVENTS_BROADCAST if SMP
54 select GENERIC_IRQ_IPI if SMP
55 select GENERIC_CPU_AUTOPROBE
56 select GENERIC_EARLY_IOREMAP
57 select GENERIC_IDLE_POLL_SETUP
58 select GENERIC_IRQ_PROBE
59 select GENERIC_IRQ_SHOW
60 select GENERIC_IRQ_SHOW_LEVEL
61 select GENERIC_PCI_IOMAP
62 select GENERIC_SCHED_CLOCK
63 select GENERIC_SMP_IDLE_THREAD
64 select GENERIC_STRNCPY_FROM_USER
65 select GENERIC_STRNLEN_USER
66 select HANDLE_DOMAIN_IRQ
67 select HARDIRQS_SW_RESEND
68 select HAVE_ARCH_AUDITSYSCALL if AEABI && !OABI_COMPAT
69 select HAVE_ARCH_BITREVERSE if (CPU_32v7M || CPU_32v7) && !CPU_32v6
70 select HAVE_ARCH_JUMP_LABEL if !XIP_KERNEL && !CPU_ENDIAN_BE32 && MMU
71 select HAVE_ARCH_KGDB if !CPU_ENDIAN_BE32 && MMU
72 select HAVE_ARCH_KASAN if MMU && !XIP_KERNEL
73 select HAVE_ARCH_MMAP_RND_BITS if MMU
74 select HAVE_ARCH_SECCOMP
75 select HAVE_ARCH_SECCOMP_FILTER if AEABI && !OABI_COMPAT
76 select HAVE_ARCH_THREAD_STRUCT_WHITELIST
77 select HAVE_ARCH_TRACEHOOK
78 select HAVE_ARM_SMCCC if CPU_V7
79 select HAVE_EBPF_JIT if !CPU_ENDIAN_BE32
80 select HAVE_CONTEXT_TRACKING
81 select HAVE_C_RECORDMCOUNT
82 select HAVE_DEBUG_KMEMLEAK if !XIP_KERNEL
83 select HAVE_DMA_CONTIGUOUS if MMU
84 select HAVE_DYNAMIC_FTRACE if !XIP_KERNEL && !CPU_ENDIAN_BE32 && MMU
85 select HAVE_DYNAMIC_FTRACE_WITH_REGS if HAVE_DYNAMIC_FTRACE
86 select HAVE_EFFICIENT_UNALIGNED_ACCESS if (CPU_V6 || CPU_V6K || CPU_V7) && MMU
87 select HAVE_EXIT_THREAD
88 select HAVE_FAST_GUP if ARM_LPAE
89 select HAVE_FTRACE_MCOUNT_RECORD if !XIP_KERNEL
90 select HAVE_FUNCTION_GRAPH_TRACER if !THUMB2_KERNEL && !CC_IS_CLANG
91 select HAVE_FUNCTION_TRACER if !XIP_KERNEL
92 select HAVE_FUTEX_CMPXCHG if FUTEX
93 select HAVE_GCC_PLUGINS
94 select HAVE_HW_BREAKPOINT if PERF_EVENTS && (CPU_V6 || CPU_V6K || CPU_V7)
95 select HAVE_IDE if PCI || ISA || PCMCIA
96 select HAVE_IRQ_TIME_ACCOUNTING
97 select HAVE_KERNEL_GZIP
98 select HAVE_KERNEL_LZ4
99 select HAVE_KERNEL_LZMA
100 select HAVE_KERNEL_LZO
101 select HAVE_KERNEL_XZ
102 select HAVE_KPROBES if !XIP_KERNEL && !CPU_ENDIAN_BE32 && !CPU_V7M
103 select HAVE_KRETPROBES if HAVE_KPROBES
104 select HAVE_MOD_ARCH_SPECIFIC
105 select HAVE_NMI
106 select HAVE_OPROFILE if HAVE_PERF_EVENTS
107 select HAVE_OPTPROBES if !THUMB2_KERNEL
108 select HAVE_PERF_EVENTS
109 select HAVE_PERF_REGS
110 select HAVE_PERF_USER_STACK_DUMP
111 select MMU_GATHER_RCU_TABLE_FREE if SMP && ARM_LPAE
112 select HAVE_REGS_AND_STACK_ACCESS_API
113 select HAVE_RSEQ
114 select HAVE_STACKPROTECTOR
115 select HAVE_SYSCALL_TRACEPOINTS
116 select HAVE_UID16
117 select HAVE_VIRT_CPU_ACCOUNTING_GEN
118 select IRQ_FORCED_THREADING
119 select MODULES_USE_ELF_REL
120 select NEED_DMA_MAP_STATE
121 select OF_EARLY_FLATTREE if OF
122 select OLD_SIGACTION
123 select OLD_SIGSUSPEND3
124 select PCI_SYSCALL if PCI
125 select PERF_USE_VMALLOC
126 select RTC_LIB
127 select SET_FS
128 select SYS_SUPPORTS_APM_EMULATION
132 The ARM series is a line of low-power-consumption RISC chip designs
134 handhelds such as the Compaq IPAQ. ARM-based PCs are no longer
135 manufactured, but legacy ARM-based PC hardware remains popular in
144 select ARM_HAS_SG_CHAIN
145 select NEED_SG_DMA_LENGTH
173 select GENERIC_ALLOCATOR
245 Patch phys-to-virt and virt-to-phys translation functions at
249 This can only be used with non-XIP MMU kernels where the base
259 Select this when mach/io.h is required to provide special
266 Select this when mach/memory.h is required to provide special
295 bool "MMU-based Paged Memory Management Support"
298 Select if you want MMU-based virtualised addressing space
321 select ARCH_FLATMEM_ENABLE
322 select ARCH_SPARSEMEM_ENABLE
323 select ARCH_SELECT_MEMORY_MODEL
324 select ARM_HAS_SG_CHAIN
325 select ARM_PATCH_PHYS_VIRT
326 select AUTO_ZRELADDR
327 select TIMER_OF
328 select COMMON_CLK
329 select GENERIC_CLOCKEVENTS
330 select GENERIC_IRQ_MULTI_HANDLER
331 select HAVE_PCI
332 select PCI_DOMAINS_GENERIC if PCI
333 select SPARSE_IRQ
334 select USE_OF
337 bool "ARMv7-M based platforms (Cortex-M0/M3/M4)"
339 select ARM_NVIC
340 select AUTO_ZRELADDR
341 select TIMER_OF
342 select COMMON_CLK
343 select CPU_V7M
344 select GENERIC_CLOCKEVENTS
345 select NO_IOPORT_MAP
346 select SPARSE_IRQ
347 select USE_OF
350 bool "EBSA-110"
351 select ARCH_USES_GETTIMEOFFSET
352 select CPU_SA110
353 select ISA
354 select NEED_MACH_IO_H
355 select NEED_MACH_MEMORY_H
356 select NO_IOPORT_MAP
359 from Digital. It has limited hardware on-board, including an
364 bool "EP93xx-based"
365 select ARCH_SPARSEMEM_ENABLE
366 select ARM_AMBA
368 select ARM_VIC
369 select AUTO_ZRELADDR
370 select CLKDEV_LOOKUP
371 select CLKSRC_MMIO
372 select CPU_ARM920T
373 select GENERIC_CLOCKEVENTS
374 select GPIOLIB
375 select HAVE_LEGACY_CLK
381 select CPU_SA110
382 select FOOTBRIDGE
383 select GENERIC_CLOCKEVENTS
384 select HAVE_IDE
385 select NEED_MACH_IO_H if !MMU
386 select NEED_MACH_MEMORY_H
392 bool "IOP32x-based"
394 select CPU_XSCALE
395 select GPIO_IOP
396 select GPIOLIB
397 select NEED_RET_TO_USER
398 select FORCE_PCI
399 select PLAT_IOP
405 bool "IXP4xx-based"
407 select ARCH_HAS_DMA_SET_COHERENT_MASK
408 select ARCH_SUPPORTS_BIG_ENDIAN
409 select CPU_XSCALE
410 select DMABOUNCE if PCI
411 select GENERIC_CLOCKEVENTS
412 select GENERIC_IRQ_MULTI_HANDLER
413 select GPIO_IXP4XX
414 select GPIOLIB
415 select HAVE_PCI
416 select IXP4XX_IRQ
417 select IXP4XX_TIMER
418 select NEED_MACH_IO_H
419 select USB_EHCI_BIG_ENDIAN_DESC
420 select USB_EHCI_BIG_ENDIAN_MMIO
426 select CPU_PJ4
427 select GENERIC_CLOCKEVENTS
428 select GENERIC_IRQ_MULTI_HANDLER
429 select GPIOLIB
430 select HAVE_PCI
431 select MVEBU_MBUS
432 select PINCTRL
433 select PINCTRL_DOVE
434 select PLAT_ORION_LEGACY
435 select SPARSE_IRQ
436 select PM_GENERIC_DOMAINS if PM
441 bool "PXA2xx/PXA3xx-based"
443 select ARCH_MTD_XIP
444 select ARM_CPU_SUSPEND if PM
445 select AUTO_ZRELADDR
446 select COMMON_CLK
447 select CLKSRC_PXA
448 select CLKSRC_MMIO
449 select TIMER_OF
450 select CPU_XSCALE if !CPU_XSC3
451 select GENERIC_CLOCKEVENTS
452 select GENERIC_IRQ_MULTI_HANDLER
453 select GPIO_PXA
454 select GPIOLIB
455 select HAVE_IDE
456 select IRQ_DOMAIN
457 select PLAT_PXA
458 select SPARSE_IRQ
465 select ARCH_ACORN
466 select ARCH_MAY_HAVE_PC_FDC
467 select ARCH_SPARSEMEM_ENABLE
468 select ARM_HAS_SG_CHAIN
469 select CPU_SA110
470 select FIQ
471 select HAVE_IDE
472 select HAVE_PATA_PLATFORM
473 select ISA_DMA_API
474 select NEED_MACH_IO_H
475 select NEED_MACH_MEMORY_H
476 select NO_IOPORT_MAP
478 On the Acorn Risc-PC, Linux can support the internal IDE disk and
479 CD-ROM interface, serial and parallel port, and the floppy drive.
482 bool "SA1100-based"
483 select ARCH_MTD_XIP
484 select ARCH_SPARSEMEM_ENABLE
485 select CLKSRC_MMIO
486 select CLKSRC_PXA
487 select TIMER_OF if OF
488 select COMMON_CLK
489 select CPU_FREQ
490 select CPU_SA1100
491 select GENERIC_CLOCKEVENTS
492 select GENERIC_IRQ_MULTI_HANDLER
493 select GPIOLIB
494 select HAVE_IDE
495 select IRQ_DOMAIN
496 select ISA
497 select NEED_MACH_MEMORY_H
498 select SPARSE_IRQ
504 select ATAGS
505 select CLKSRC_SAMSUNG_PWM
506 select GENERIC_CLOCKEVENTS
507 select GPIO_SAMSUNG
508 select GPIOLIB
509 select GENERIC_IRQ_MULTI_HANDLER
510 select HAVE_S3C2410_I2C if I2C
511 select HAVE_S3C_RTC if RTC_CLASS
512 select NEED_MACH_IO_H
513 select S3C2410_WATCHDOG
514 select SAMSUNG_ATAGS
515 select USE_OF
516 select WATCHDOG
526 select ARCH_OMAP
527 select CLKDEV_LOOKUP
528 select CLKSRC_MMIO
529 select GENERIC_CLOCKEVENTS
530 select GENERIC_IRQ_CHIP
531 select GENERIC_IRQ_MULTI_HANDLER
532 select GPIOLIB
533 select HAVE_IDE
534 select HAVE_LEGACY_CLK
535 select IRQ_DOMAIN
536 select NEED_MACH_IO_H if PCCARD
537 select NEED_MACH_MEMORY_H
538 select SPARSE_IRQ
552 select ARCH_MULTI_V4_V5
553 select CPU_FA526
558 select ARCH_MULTI_V4_V5
559 select CPU_ARM920T if !(CPU_ARM7TDMI || CPU_ARM720T || \
566 select ARCH_MULTI_V4_V5
567 select CPU_ARM926T if !(CPU_ARM946E || CPU_ARM1020 || \
576 select ARCH_MULTI_V6_V7
577 select CPU_V6K
580 bool "ARMv7 based platforms (Cortex-A, PJ4, Scorpion, Krait)"
582 select ARCH_MULTI_V6_V7
583 select CPU_V7
584 select HAVE_SMP
588 select MIGHT_HAVE_CACHE_L2X0
592 select ARCH_MULTI_V5
599 select ARM_AMBA
600 select ARM_GIC
601 select ARM_GIC_V2M if PCI
602 select ARM_GIC_V3
603 select ARM_GIC_V3_ITS if PCI
604 select ARM_PSCI
605 select HAVE_ARM_ARCH_TIMER
606 select ARCH_SUPPORTS_BIG_ENDIAN
609 # This is sorted alphabetically by mach-* pathname. However, plat-*
611 # plat- suffix) or along side the corresponding mach-* source.
613 source "arch/arm/mach-actions/Kconfig"
615 source "arch/arm/mach-alpine/Kconfig"
617 source "arch/arm/mach-artpec/Kconfig"
619 source "arch/arm/mach-asm9260/Kconfig"
621 source "arch/arm/mach-aspeed/Kconfig"
623 source "arch/arm/mach-at91/Kconfig"
625 source "arch/arm/mach-axxia/Kconfig"
627 source "arch/arm/mach-bcm/Kconfig"
629 source "arch/arm/mach-berlin/Kconfig"
631 source "arch/arm/mach-clps711x/Kconfig"
633 source "arch/arm/mach-cns3xxx/Kconfig"
635 source "arch/arm/mach-davinci/Kconfig"
637 source "arch/arm/mach-digicolor/Kconfig"
639 source "arch/arm/mach-dove/Kconfig"
641 source "arch/arm/mach-ep93xx/Kconfig"
643 source "arch/arm/mach-exynos/Kconfig"
645 source "arch/arm/mach-footbridge/Kconfig"
647 source "arch/arm/mach-gemini/Kconfig"
649 source "arch/arm/mach-highbank/Kconfig"
651 source "arch/arm/mach-hisi/Kconfig"
653 source "arch/arm/mach-imx/Kconfig"
655 source "arch/arm/mach-integrator/Kconfig"
657 source "arch/arm/mach-iop32x/Kconfig"
659 source "arch/arm/mach-ixp4xx/Kconfig"
661 source "arch/arm/mach-keystone/Kconfig"
663 source "arch/arm/mach-lpc32xx/Kconfig"
665 source "arch/arm/mach-mediatek/Kconfig"
667 source "arch/arm/mach-meson/Kconfig"
669 source "arch/arm/mach-milbeaut/Kconfig"
671 source "arch/arm/mach-mmp/Kconfig"
673 source "arch/arm/mach-moxart/Kconfig"
675 source "arch/arm/mach-mstar/Kconfig"
677 source "arch/arm/mach-mv78xx0/Kconfig"
679 source "arch/arm/mach-mvebu/Kconfig"
681 source "arch/arm/mach-mxs/Kconfig"
683 source "arch/arm/mach-nomadik/Kconfig"
685 source "arch/arm/mach-npcm/Kconfig"
687 source "arch/arm/mach-nspire/Kconfig"
689 source "arch/arm/plat-omap/Kconfig"
691 source "arch/arm/mach-omap1/Kconfig"
693 source "arch/arm/mach-omap2/Kconfig"
695 source "arch/arm/mach-orion5x/Kconfig"
697 source "arch/arm/mach-oxnas/Kconfig"
699 source "arch/arm/mach-picoxcell/Kconfig"
701 source "arch/arm/mach-prima2/Kconfig"
703 source "arch/arm/mach-pxa/Kconfig"
704 source "arch/arm/plat-pxa/Kconfig"
706 source "arch/arm/mach-qcom/Kconfig"
708 source "arch/arm/mach-rda/Kconfig"
710 source "arch/arm/mach-realtek/Kconfig"
712 source "arch/arm/mach-realview/Kconfig"
714 source "arch/arm/mach-rockchip/Kconfig"
716 source "arch/arm/mach-s3c/Kconfig"
718 source "arch/arm/mach-s5pv210/Kconfig"
720 source "arch/arm/mach-sa1100/Kconfig"
722 source "arch/arm/mach-shmobile/Kconfig"
724 source "arch/arm/mach-socfpga/Kconfig"
726 source "arch/arm/mach-spear/Kconfig"
728 source "arch/arm/mach-sti/Kconfig"
730 source "arch/arm/mach-stm32/Kconfig"
732 source "arch/arm/mach-sunxi/Kconfig"
734 source "arch/arm/mach-tango/Kconfig"
736 source "arch/arm/mach-tegra/Kconfig"
738 source "arch/arm/mach-u300/Kconfig"
740 source "arch/arm/mach-uniphier/Kconfig"
742 source "arch/arm/mach-ux500/Kconfig"
744 source "arch/arm/mach-versatile/Kconfig"
746 source "arch/arm/mach-vexpress/Kconfig"
748 source "arch/arm/mach-vt8500/Kconfig"
750 source "arch/arm/mach-zx/Kconfig"
752 source "arch/arm/mach-zynq/Kconfig"
754 # ARMv7-M architecture
758 select GPIOLIB
766 select ARCH_HAS_RESET_CONTROLLER
767 select ARM_AMBA
768 select CLKSRC_LPC32XX
769 select PINCTRL
771 Support for NXP's LPC18xx Cortex-M3 and LPC43xx Cortex-M4
777 select ARM_AMBA
778 select CLKSRC_MPS2
780 Support for Cortex-M Prototyping System (or V2M-MPS2) which comes
781 with a range of available cores like Cortex-M3/M4/M7.
792 select GENERIC_CLOCKEVENTS
796 select CLKSRC_MMIO
797 select COMMON_CLK
798 select GENERIC_IRQ_CHIP
799 select IRQ_DOMAIN
803 select PLAT_ORION
822 source "arch/arm/Kconfig-nommu"
840 bool "ARM errata: FSR write bit incorrect on a SWP to read-only memory"
843 Executing a SWP instruction to read-only memory does not set bit 11
861 This option enables the workaround for the 430973 Cortex-A8
864 same virtual address, whether due to self-modifying code or virtual
865 to physical address re-mapping, Cortex-A8 does not recover from the
866 stale interworking branch prediction. This results in Cortex-A8
871 available in non-secure mode.
878 This option enables the workaround for the 458693 Cortex-A8 (r2p0)
885 register may not be available in non-secure mode.
892 This option enables the workaround for the 460075 Cortex-A8 (r2p0)
896 workaround disables the write-allocate mode for the L2 cache via the
898 may not be available in non-secure mode.
905 This option enables the workaround for the 742230 Cortex-A9
909 the diagnostic register of the Cortex-A9 which causes the DMB
918 This option enables the workaround for the 742231 Cortex-A9
920 Cortex-A9 MPCore micro-architecture, two CPUs working in SMP mode,
925 register of the Cortex-A9 which reduces the linefill issuing
933 This option enables the workaround for the 643719 Cortex-A9 (prior to
943 This option enables the workaround for the 720789 Cortex-A9 (prior to
956 This option enables the workaround for the 743622 Cortex-A9
958 optimisation in the Cortex-A9 Store Buffer may lead to data
960 register of the Cortex-A9 which disables the Store Buffer
970 This option enables the workaround for the 751472 Cortex-A9 (prior
980 This option enables the workaround for the 754322 Cortex-A9 (r2p*,
983 can populate the micro-TLB with a stale entry which may be hit with
991 This option enables the workaround for the 754327 Cortex-A9 (prior to
999 bool "ARM errata: Possible cache data corruption with hit-under-miss enabled"
1004 hit-under-miss enabled). It sets the undocumented bit 31 in
1006 register, thus disabling hit-under-miss without putting the
1015 affecting Cortex-A9 MPCore with two or more processors (all
1028 This option enables the workaround for the 775420 Cortex-A9 (r2p2,
1035 bool "ARM errata: TLBI/DSB failure on Cortex-A15"
1038 On Cortex-A15 (r0p0..r3p2) the TLBI*IS/DSB operations are not
1048 This option enables the workaround for the 773022 Cortex-A15
1058 - Cortex-A12 818325: Execution of an UNPREDICTABLE STR or STM
1060 - Cortex-A12 852422: Execution of a sequence of instructions might
1062 any Cortex-A12 cores yet.
1071 This option enables the workaround for the 821420 Cortex-A12
1075 deadlock when the VMOV instructions are issued out-of-order.
1081 This option enables the workaround for the 825619 Cortex-A12
1084 and Device/Strongly-Ordered loads and stores might cause deadlock
1090 This option enables the workaround for the 857271 Cortex-A12
1098 This option enables the workaround for the 852421 Cortex-A17
1108 - Cortex-A17 852423: Execution of a sequence of instructions might
1110 any Cortex-A17 cores yet.
1111 This is identical to Cortex-A12 erratum 852422. It is a separate
1112 config option from the A12 erratum due to the way errata are checked
1119 This option enables the workaround for the 857272 Cortex-A17 erratum.
1121 This is identical to Cortex-A12 erratum 857271. It is a separate
1122 config option from the A12 erratum due to the way errata are checked
1135 name of a bus system, i.e. the way the CPU talks to the other stuff
1140 # Select ISA DMA controller support
1143 select ISA_DMA_API
1145 # Select ISA DMA interface
1156 bool "ARM errata: Cache maintenance by set/way operations can execute out of order"
1162 However, because of this erratum, an L2 set/way cache maintenance
1163 operation can overtake an L1 set/way cache maintenance operation.
1164 This ERRATA only affected the Cortex-A7 and present in r0p2, r0p3,
1174 This option should be selected by machines which have an SMP-
1177 The only effect of this option is to make the SMP-related
1181 bool "Symmetric Multi-Processing"
1186 select IRQ_WORK
1192 If you say N here, the kernel will run on uni- and multiprocessor
1198 See also <file:Documentation/x86/i386/IO-APIC.rst>,
1199 <file:Documentation/admin-guide/lockup-watchdogs.rst> and the SMP-HOWTO available at
1200 <http://tldp.org/HOWTO/SMP-HOWTO.html>.
1209 SMP kernels contain instructions which fail on non-SMP processors.
1226 bool "Multi-core scheduler support"
1229 Multi-core scheduler support improves the CPU scheduler's decision
1230 making when dealing with multi-core CPU chips at a cost of slightly
1249 select ARM_ARCH_TIMER
1259 bool "Multi-Cluster Power Management"
1263 for (multi-)cluster based systems, such as big.LITTLE based
1272 Platforms with 3 or 4 clusters that use MCPM must select this
1278 select MCPM
1286 select CPU_PM
1305 Select the desired split between kernel and user memory.
1339 int "Maximum number of CPUs (2-32)"
1345 bool "Support for hot-pluggable CPUs"
1347 select GENERIC_IRQ_MIGRATION
1355 select ARM_PSCI_FW
1358 implementing the PSCI specification for CPU-centric power
1428 bool "Compile the kernel in Thumb-2 mode" if !CPU_THUMBONLY
1431 select ARM_UNWIND
1434 Thumb-2 mode.
1485 selected, since there is no way yet to sensibly distinguish
1502 select SPARSEMEM_STATIC if SPARSEMEM
1525 bool "Allocate 2nd-level pagetables from highmem" if EXPERT
1533 user-space 2nd level page tables to reside in high memory.
1536 bool "Enable use of CPU domains to implement privileged no-access"
1542 use-after-free bugs becoming an exploitable privilege escalation
1546 CPUs with low-vector mappings use a best-efforts implementation.
1579 Disabling this is usually safe for small single-platform
1602 select HAVE_PROC_CPU if PROC_FS
1606 address divisible by 4. On 32-bit ARM processors, these non-aligned
1609 correct operation of some network protocols. With an IP-only
1618 cores where a 8-word STM instruction give significantly higher
1625 However, if the CPU data cache is using a write-allocate mode,
1637 select PARAVIRT
1639 Select this option to enable fine granularity task steal time
1656 select ARCH_DMA_ADDR_T_64BIT
1657 select ARM_PSCI
1658 select SWIOTLB
1659 select SWIOTLB_XEN
1660 select PARAVIRT
1667 select GCC_PLUGIN_ARM_SSP_PER_TASK
1682 select HAVE_ARCH_PREL32_RELOCATIONS
1688 select RELOCATABLE
1689 select ARM_MODULE_PLTS if MODULES
1690 select MODULE_REL_CRCS if MODVERSIONS
1702 select IRQ_DOMAIN
1703 select OF
1711 This is the traditional way of passing data to the kernel at boot
1718 bool "Provide old way to pass kernel parameters"
1722 Some old boot loaders still use this way.
1730 The physical address at which the ROM-able zImage is to be
1732 ROM-able zImage formats normally set this to a suitable
1742 for the ROM-able zImage which must be available while the
1745 Platforms which normally make use of ROM-able zImage formats
1797 Uses the command-line options passed by the boot loader instead of
1804 The command-line arguments provided by the boot loader will be
1813 On some architectures (EBSA110 and CATS), there is currently no way
1815 architectures, you should supply some command-line options at build
1826 Uses the command-line options passed by the boot loader. If
1833 The command-line arguments provided by the boot loader will be
1842 command-line options your boot loader passes to the kernel.
1846 bool "Kernel Execute-In-Place from ROM"
1849 Execute-In-Place allows the kernel to run from non-volatile storage
1852 to RAM. Read-write sections, such as the data section and stack,
1878 select ZLIB_INFLATE
1890 select KEXEC_CORE
1914 loaded in the main kernel with kexec-tools into a specially
1919 For more details see Documentation/admin-guide/kdump/kdump.rst
1926 will be determined at run-time by masking the current IP with
1936 select UCS2_STRING
1937 select EFI_PARAMS_FROM_FDT
1938 select EFI_STUB
1939 select EFI_GENERIC_STUB
1940 select EFI_RUNTIME_WRAPPERS
1943 by UEFI firmware (such as non-volatile variables, realtime
1958 continue to boot on existing non-UEFI platforms.
1964 to be enabled much earlier than we do on ARM, which is non-trivial.
1987 your machine has an FPA or floating point co-processor podule.
1996 Say Y to include 80-bit support in the kernel floating-point
1997 emulator. Otherwise, only 32 and 64-bit support is compiled in.
1998 Note that gcc does not generate 80-bit operations by default,
2011 It is very simple, and approximately 3-6 times faster than NWFPE.
2019 bool "VFP-format floating point maths"
2025 Please see <file:Documentation/arm/vfp/release-notes.rst> for