Lines Matching +full:imx28 +full:- +full:i2c
1 // SPDX-License-Identifier: GPL-2.0+ OR MIT
6 #include <dt-bindings/clock/imx7d-clock.h>
7 #include <dt-bindings/power/imx7-power.h>
8 #include <dt-bindings/gpio/gpio.h>
9 #include <dt-bindings/input/input.h>
10 #include <dt-bindings/interrupt-controller/arm-gic.h>
11 #include <dt-bindings/reset/imx7-reset.h>
12 #include "imx7d-pinfunc.h"
15 #address-cells = <1>;
16 #size-cells = <1>;
19 * pre-existing /chosen node to be available to insert the
55 #address-cells = <1>;
56 #size-cells = <0>;
58 idle-states {
59 entry-method = "psci";
61 cpu_sleep_wait: cpu-sleep-wait {
62 compatible = "arm,idle-state";
63 arm,psci-suspend-param = <0x0010000>;
64 local-timer-stop;
65 entry-latency-us = <100>;
66 exit-latency-us = <50>;
67 min-residency-us = <1000>;
72 compatible = "arm,cortex-a7";
75 clock-frequency = <792000000>;
76 clock-latency = <61036>; /* two CLK32 periods */
78 cpu-idle-states = <&cpu_sleep_wait>;
82 ckil: clock-cki {
83 compatible = "fixed-clock";
84 #clock-cells = <0>;
85 clock-frequency = <32768>;
86 clock-output-names = "ckil";
89 osc: clock-osc {
90 compatible = "fixed-clock";
91 #clock-cells = <0>;
92 clock-frequency = <24000000>;
93 clock-output-names = "osc";
97 compatible = "usb-nop-xceiv";
99 clock-names = "main_clk";
100 #phy-cells = <0>;
104 compatible = "usb-nop-xceiv";
106 clock-names = "main_clk";
107 power-domains = <&pgc_hsic_phy>;
108 #phy-cells = <0>;
112 compatible = "arm,cortex-a7-pmu";
113 interrupt-parent = <&gpc>;
115 interrupt-affinity = <&cpu0>;
120 * non-configurable replicators don't show up on the
123 compatible = "arm,coresight-static-replicator";
125 out-ports {
126 #address-cells = <1>;
127 #size-cells = <0>;
132 remote-endpoint = <&tpiu_in_port>;
139 remote-endpoint = <&etr_in_port>;
144 in-ports {
147 remote-endpoint = <&etf_out_port>;
154 compatible = "arm,armv7-timer";
155 interrupt-parent = <&intc>;
163 #address-cells = <1>;
164 #size-cells = <1>;
165 compatible = "simple-bus";
166 interrupt-parent = <&gpc>;
170 compatible = "arm,coresight-dynamic-funnel", "arm,primecell";
173 clock-names = "apb_pclk";
175 ca_funnel_in_ports: in-ports {
178 remote-endpoint = <&etm0_out_port>;
185 out-ports {
188 remote-endpoint = <&hugo_funnel_in_port0>;
196 compatible = "arm,coresight-etm3x", "arm,primecell";
200 clock-names = "apb_pclk";
202 out-ports {
205 remote-endpoint = <&ca_funnel_in_port0>;
212 compatible = "arm,coresight-dynamic-funnel", "arm,primecell";
215 clock-names = "apb_pclk";
217 in-ports {
218 #address-cells = <1>;
219 #size-cells = <0>;
224 remote-endpoint = <&ca_funnel_out_port0>;
237 out-ports {
240 remote-endpoint = <&etf_in_port>;
247 compatible = "arm,coresight-tmc", "arm,primecell";
250 clock-names = "apb_pclk";
252 in-ports {
255 remote-endpoint = <&hugo_funnel_out_port0>;
260 out-ports {
263 remote-endpoint = <&replicator_in_port0>;
270 compatible = "arm,coresight-tmc", "arm,primecell";
273 clock-names = "apb_pclk";
275 in-ports {
278 remote-endpoint = <&replicator_out_port1>;
285 compatible = "arm,coresight-tpiu", "arm,primecell";
288 clock-names = "apb_pclk";
290 in-ports {
293 remote-endpoint = <&replicator_out_port0>;
299 intc: interrupt-controller@31001000 {
300 compatible = "arm,cortex-a7-gic";
302 #interrupt-cells = <3>;
303 interrupt-controller;
304 interrupt-parent = <&intc>;
312 compatible = "fsl,aips-bus", "simple-bus";
313 #address-cells = <1>;
314 #size-cells = <1>;
319 compatible = "fsl,imx7d-gpio", "fsl,imx35-gpio";
323 gpio-controller;
324 #gpio-cells = <2>;
325 interrupt-controller;
326 #interrupt-cells = <2>;
327 gpio-ranges = <&iomuxc_lpsr 0 0 8>, <&iomuxc 8 5 8>;
331 compatible = "fsl,imx7d-gpio", "fsl,imx35-gpio";
335 gpio-controller;
336 #gpio-cells = <2>;
337 interrupt-controller;
338 #interrupt-cells = <2>;
339 gpio-ranges = <&iomuxc 0 13 32>;
343 compatible = "fsl,imx7d-gpio", "fsl,imx35-gpio";
347 gpio-controller;
348 #gpio-cells = <2>;
349 interrupt-controller;
350 #interrupt-cells = <2>;
351 gpio-ranges = <&iomuxc 0 45 29>;
355 compatible = "fsl,imx7d-gpio", "fsl,imx35-gpio";
359 gpio-controller;
360 #gpio-cells = <2>;
361 interrupt-controller;
362 #interrupt-cells = <2>;
363 gpio-ranges = <&iomuxc 0 74 24>;
367 compatible = "fsl,imx7d-gpio", "fsl,imx35-gpio";
371 gpio-controller;
372 #gpio-cells = <2>;
373 interrupt-controller;
374 #interrupt-cells = <2>;
375 gpio-ranges = <&iomuxc 0 98 18>;
379 compatible = "fsl,imx7d-gpio", "fsl,imx35-gpio";
383 gpio-controller;
384 #gpio-cells = <2>;
385 interrupt-controller;
386 #interrupt-cells = <2>;
387 gpio-ranges = <&iomuxc 0 116 23>;
391 compatible = "fsl,imx7d-gpio", "fsl,imx35-gpio";
395 gpio-controller;
396 #gpio-cells = <2>;
397 interrupt-controller;
398 #interrupt-cells = <2>;
399 gpio-ranges = <&iomuxc 0 139 16>;
403 compatible = "fsl,imx7d-wdt", "fsl,imx21-wdt";
410 compatible = "fsl,imx7d-wdt", "fsl,imx21-wdt";
418 compatible = "fsl,imx7d-wdt", "fsl,imx21-wdt";
426 compatible = "fsl,imx7d-wdt", "fsl,imx21-wdt";
433 iomuxc_lpsr: iomuxc-lpsr@302c0000 {
434 compatible = "fsl,imx7d-iomuxc-lpsr";
436 fsl,input-sel = <&iomuxc>;
440 compatible = "fsl,imx7d-gpt", "fsl,imx6dl-gpt";
445 clock-names = "ipg", "per";
449 compatible = "fsl,imx7d-gpt", "fsl,imx6dl-gpt";
454 clock-names = "ipg", "per";
459 compatible = "fsl,imx7d-gpt", "fsl,imx6dl-gpt";
464 clock-names = "ipg", "per";
469 compatible = "fsl,imx7d-gpt", "fsl,imx6dl-gpt";
474 clock-names = "ipg", "per";
479 compatible = "fsl,imx7d-kpp", "fsl,imx21-kpp";
487 compatible = "fsl,imx7d-iomuxc";
491 gpr: iomuxc-gpr@30340000 {
492 compatible = "fsl,imx7d-iomuxc-gpr",
493 "fsl,imx6q-iomuxc-gpr", "syscon",
494 "simple-mfd";
497 mux: mux-controller {
498 compatible = "mmio-mux";
499 #mux-control-cells = <1>;
500 mux-reg-masks = <0x14 0x00000010>;
503 video_mux: csi-mux {
504 compatible = "video-mux";
505 mux-controls = <&mux 0>;
506 #address-cells = <1>;
507 #size-cells = <0>;
518 remote-endpoint = <&mipi_vc0_to_csi_mux>;
526 remote-endpoint = <&csi_from_csi_mux>;
533 #address-cells = <1>;
534 #size-cells = <1>;
535 compatible = "fsl,imx7d-ocotp", "syscon";
543 fuse_grade: fuse-grade@10 {
549 compatible = "fsl,imx7d-anatop", "fsl,imx6q-anatop",
550 "syscon", "simple-mfd";
555 reg_1p0d: regulator-vdd1p0d {
556 compatible = "fsl,anatop-regulator";
557 regulator-name = "vdd1p0d";
558 regulator-min-microvolt = <800000>;
559 regulator-max-microvolt = <1200000>;
560 anatop-reg-offset = <0x210>;
561 anatop-vol-bit-shift = <8>;
562 anatop-vol-bit-width = <5>;
563 anatop-min-bit-val = <8>;
564 anatop-min-voltage = <800000>;
565 anatop-max-voltage = <1200000>;
566 anatop-enable-bit = <0>;
569 reg_1p2: regulator-vdd1p2 {
570 compatible = "fsl,anatop-regulator";
571 regulator-name = "vdd1p2";
572 regulator-min-microvolt = <1100000>;
573 regulator-max-microvolt = <1300000>;
574 anatop-reg-offset = <0x220>;
575 anatop-vol-bit-shift = <8>;
576 anatop-vol-bit-width = <5>;
577 anatop-min-bit-val = <0x14>;
578 anatop-min-voltage = <1100000>;
579 anatop-max-voltage = <1300000>;
580 anatop-enable-bit = <0>;
584 compatible = "fsl,imx7d-tempmon";
585 interrupt-parent = <&gpc>;
588 nvmem-cells = <&tempmon_calib>, <&fuse_grade>;
589 nvmem-cell-names = "calib", "temp_grade";
595 compatible = "fsl,sec-v4.0-mon", "syscon", "simple-mfd";
598 snvs_rtc: snvs-rtc-lp {
599 compatible = "fsl,sec-v4.0-mon-rtc-lp";
605 clock-names = "snvs-rtc";
608 snvs_pwrkey: snvs-powerkey {
609 compatible = "fsl,sec-v4.0-pwrkey";
613 clock-names = "snvs-pwrkey";
615 wakeup-source;
620 clks: clock-controller@30380000 {
621 compatible = "fsl,imx7d-ccm";
625 #clock-cells = <1>;
627 clock-names = "ckil", "osc";
630 src: reset-controller@30390000 {
631 compatible = "fsl,imx7d-src", "syscon";
634 #reset-cells = <1>;
638 compatible = "fsl,imx7d-gpc";
640 interrupt-controller;
642 #interrupt-cells = <3>;
643 interrupt-parent = <&intc>;
644 #power-domain-cells = <1>;
647 #address-cells = <1>;
648 #size-cells = <0>;
650 pgc_mipi_phy: power-domain@0 {
651 #power-domain-cells = <0>;
653 power-supply = <®_1p0d>;
656 pgc_pcie_phy: power-domain@1 {
657 #power-domain-cells = <0>;
659 power-supply = <®_1p0d>;
662 pgc_hsic_phy: power-domain@2 {
663 #power-domain-cells = <0>;
665 power-supply = <®_1p2>;
672 compatible = "fsl,aips-bus", "simple-bus";
673 #address-cells = <1>;
674 #size-cells = <1>;
679 compatible = "fsl,imx7d-adc";
683 clock-names = "adc";
684 #io-channel-cells = <1>;
689 compatible = "fsl,imx7d-adc";
693 clock-names = "adc";
694 #io-channel-cells = <1>;
699 #address-cells = <1>;
700 #size-cells = <0>;
701 compatible = "fsl,imx7d-ecspi", "fsl,imx51-ecspi";
706 clock-names = "ipg", "per";
711 compatible = "fsl,imx7d-pwm", "fsl,imx27-pwm";
716 clock-names = "ipg", "per";
717 #pwm-cells = <3>;
722 compatible = "fsl,imx7d-pwm", "fsl,imx27-pwm";
727 clock-names = "ipg", "per";
728 #pwm-cells = <3>;
733 compatible = "fsl,imx7d-pwm", "fsl,imx27-pwm";
738 clock-names = "ipg", "per";
739 #pwm-cells = <3>;
744 compatible = "fsl,imx7d-pwm", "fsl,imx27-pwm";
749 clock-names = "ipg", "per";
750 #pwm-cells = <3>;
755 compatible = "fsl,imx7-csi";
761 clock-names = "axi", "mclk", "dcic";
766 remote-endpoint = <&csi_mux_to_csi>;
772 compatible = "fsl,imx7d-lcdif", "fsl,imx28-lcdif";
777 clock-names = "pix", "axi";
781 mipi_csi: mipi-csi@30750000 {
782 compatible = "fsl,imx7-mipi-csi2";
784 #address-cells = <1>;
785 #size-cells = <0>;
790 clock-names = "pclk", "wrap", "phy";
791 power-domains = <&pgc_mipi_phy>;
792 phy-supply = <®_1p0d>;
794 reset-names = "mrst";
805 remote-endpoint = <&csi_mux_from_mipi_vc0>;
812 compatible = "fsl,aips-bus", "simple-bus";
813 #address-cells = <1>;
814 #size-cells = <1>;
818 spba-bus@30800000 {
819 compatible = "fsl,spba-bus", "simple-bus";
820 #address-cells = <1>;
821 #size-cells = <1>;
826 #address-cells = <1>;
827 #size-cells = <0>;
828 compatible = "fsl,imx7d-ecspi", "fsl,imx51-ecspi";
833 clock-names = "ipg", "per";
838 #address-cells = <1>;
839 #size-cells = <0>;
840 compatible = "fsl,imx7d-ecspi", "fsl,imx51-ecspi";
845 clock-names = "ipg", "per";
850 #address-cells = <1>;
851 #size-cells = <0>;
852 compatible = "fsl,imx7d-ecspi", "fsl,imx51-ecspi";
857 clock-names = "ipg", "per";
862 compatible = "fsl,imx7d-uart",
863 "fsl,imx6q-uart";
868 clock-names = "ipg", "per";
873 compatible = "fsl,imx7d-uart",
874 "fsl,imx6q-uart";
879 clock-names = "ipg", "per";
884 compatible = "fsl,imx7d-uart",
885 "fsl,imx6q-uart";
890 clock-names = "ipg", "per";
895 #sound-dai-cells = <0>;
896 compatible = "fsl,imx7d-sai", "fsl,imx6sx-sai";
903 clock-names = "bus", "mclk1", "mclk2", "mclk3";
904 dma-names = "rx", "tx";
910 #sound-dai-cells = <0>;
911 compatible = "fsl,imx7d-sai", "fsl,imx6sx-sai";
918 clock-names = "bus", "mclk1", "mclk2", "mclk3";
919 dma-names = "rx", "tx";
925 #sound-dai-cells = <0>;
926 compatible = "fsl,imx7d-sai", "fsl,imx6sx-sai";
933 clock-names = "bus", "mclk1", "mclk2", "mclk3";
934 dma-names = "rx", "tx";
941 compatible = "fsl,sec-v4.0";
942 #address-cells = <1>;
943 #size-cells = <1>;
949 clock-names = "ipg", "aclk";
952 compatible = "fsl,sec-v4.0-job-ring";
958 compatible = "fsl,sec-v4.0-job-ring";
964 compatible = "fsl,sec-v4.0-job-ring";
971 compatible = "fsl,imx7d-flexcan", "fsl,imx6q-flexcan";
976 clock-names = "ipg", "per";
977 fsl,stop-mode = <&gpr 0x10 1 0x10 17>;
982 compatible = "fsl,imx7d-flexcan", "fsl,imx6q-flexcan";
987 clock-names = "ipg", "per";
988 fsl,stop-mode = <&gpr 0x10 2 0x10 18>;
992 i2c1: i2c@30a20000 {
993 #address-cells = <1>;
994 #size-cells = <0>;
995 compatible = "fsl,imx7d-i2c", "fsl,imx21-i2c";
1002 i2c2: i2c@30a30000 {
1003 #address-cells = <1>;
1004 #size-cells = <0>;
1005 compatible = "fsl,imx7d-i2c", "fsl,imx21-i2c";
1012 i2c3: i2c@30a40000 {
1013 #address-cells = <1>;
1014 #size-cells = <0>;
1015 compatible = "fsl,imx7d-i2c", "fsl,imx21-i2c";
1022 i2c4: i2c@30a50000 {
1023 #address-cells = <1>;
1024 #size-cells = <0>;
1025 compatible = "fsl,imx7d-i2c", "fsl,imx21-i2c";
1033 compatible = "fsl,imx7d-uart",
1034 "fsl,imx6q-uart";
1039 clock-names = "ipg", "per";
1044 compatible = "fsl,imx7d-uart",
1045 "fsl,imx6q-uart";
1050 clock-names = "ipg", "per";
1055 compatible = "fsl,imx7d-uart",
1056 "fsl,imx6q-uart";
1061 clock-names = "ipg", "per";
1066 compatible = "fsl,imx7d-uart",
1067 "fsl,imx6q-uart";
1072 clock-names = "ipg", "per";
1077 compatible = "fsl,imx7s-mu", "fsl,imx6sx-mu";
1081 #mbox-cells = <2>;
1086 compatible = "fsl,imx7s-mu", "fsl,imx6sx-mu";
1090 #mbox-cells = <2>;
1091 fsl,mu-side-b;
1096 compatible = "fsl,imx7d-usb", "fsl,imx27-usb";
1102 phy-clkgate-delay-us = <400>;
1107 compatible = "fsl,imx7d-usb", "fsl,imx27-usb";
1115 phy-clkgate-delay-us = <400>;
1120 #index-cells = <1>;
1121 compatible = "fsl,imx7d-usbmisc", "fsl,imx6q-usbmisc";
1126 #index-cells = <1>;
1127 compatible = "fsl,imx7d-usbmisc", "fsl,imx6q-usbmisc";
1132 compatible = "fsl,imx7d-usdhc", "fsl,imx6sl-usdhc";
1138 clock-names = "ipg", "ahb", "per";
1139 bus-width = <4>;
1140 fsl,tuning-step = <2>;
1141 fsl,tuning-start-tap = <20>;
1146 compatible = "fsl,imx7d-usdhc", "fsl,imx6sl-usdhc";
1152 clock-names = "ipg", "ahb", "per";
1153 bus-width = <4>;
1154 fsl,tuning-step = <2>;
1155 fsl,tuning-start-tap = <20>;
1160 compatible = "fsl,imx7d-usdhc", "fsl,imx6sl-usdhc";
1166 clock-names = "ipg", "ahb", "per";
1167 bus-width = <4>;
1168 fsl,tuning-step = <2>;
1169 fsl,tuning-start-tap = <20>;
1174 compatible = "fsl,imx7d-qspi";
1176 reg-names = "QuadSPI", "QuadSPI-memory";
1177 #address-cells = <1>;
1178 #size-cells = <0>;
1182 clock-names = "qspi_en", "qspi";
1186 sdma: dma-controller@30bd0000 {
1187 compatible = "fsl,imx7d-sdma", "fsl,imx35-sdma";
1192 clock-names = "ipg", "ahb";
1193 #dma-cells = <3>;
1194 fsl,sdma-ram-script-name = "imx/sdma/sdma-imx7d.bin";
1198 compatible = "fsl,imx7d-fec", "fsl,imx6sx-fec";
1200 interrupt-names = "int0", "int1", "int2", "pps";
1210 clock-names = "ipg", "ahb", "ptp",
1212 fsl,num-tx-queues = <3>;
1213 fsl,num-rx-queues = <3>;
1214 fsl,stop-mode = <&gpr 0x10 3>;
1219 dma_apbh: dma-controller@33000000 {
1220 compatible = "fsl,imx7d-dma-apbh", "fsl,imx28-dma-apbh";
1226 #dma-cells = <1>;
1227 dma-channels = <4>;
1231 gpmi: nand-controller@33002000{
1232 compatible = "fsl,imx7d-gpmi-nand";
1233 #address-cells = <1>;
1234 #size-cells = <1>;
1236 reg-names = "gpmi-nand", "bch";
1238 interrupt-names = "bch";
1241 clock-names = "gpmi_io", "gpmi_bch_apb";
1243 dma-names = "rx-tx";
1245 assigned-clocks = <&clks IMX7D_NAND_ROOT_SRC>;
1246 assigned-clock-parents = <&clks IMX7D_PLL_ENET_MAIN_500M_CLK>;